bna_enet.c 51 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Linux network driver for QLogic BR-series Converged Network Adapter.
  4. */
  5. /*
  6. * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
  7. * Copyright (c) 2014-2015 QLogic Corporation
  8. * All rights reserved
  9. * www.qlogic.com
  10. */
  11. #include "bna.h"
  12. static inline int
  13. ethport_can_be_up(struct bna_ethport *ethport)
  14. {
  15. int ready = 0;
  16. if (ethport->bna->enet.type == BNA_ENET_T_REGULAR)
  17. ready = ((ethport->flags & BNA_ETHPORT_F_ADMIN_UP) &&
  18. (ethport->flags & BNA_ETHPORT_F_RX_STARTED) &&
  19. (ethport->flags & BNA_ETHPORT_F_PORT_ENABLED));
  20. else
  21. ready = ((ethport->flags & BNA_ETHPORT_F_ADMIN_UP) &&
  22. (ethport->flags & BNA_ETHPORT_F_RX_STARTED) &&
  23. !(ethport->flags & BNA_ETHPORT_F_PORT_ENABLED));
  24. return ready;
  25. }
  26. #define ethport_is_up ethport_can_be_up
  27. enum bna_ethport_event {
  28. ETHPORT_E_START = 1,
  29. ETHPORT_E_STOP = 2,
  30. ETHPORT_E_FAIL = 3,
  31. ETHPORT_E_UP = 4,
  32. ETHPORT_E_DOWN = 5,
  33. ETHPORT_E_FWRESP_UP_OK = 6,
  34. ETHPORT_E_FWRESP_DOWN = 7,
  35. ETHPORT_E_FWRESP_UP_FAIL = 8,
  36. };
  37. enum bna_enet_event {
  38. ENET_E_START = 1,
  39. ENET_E_STOP = 2,
  40. ENET_E_FAIL = 3,
  41. ENET_E_PAUSE_CFG = 4,
  42. ENET_E_MTU_CFG = 5,
  43. ENET_E_FWRESP_PAUSE = 6,
  44. ENET_E_CHLD_STOPPED = 7,
  45. };
  46. enum bna_ioceth_event {
  47. IOCETH_E_ENABLE = 1,
  48. IOCETH_E_DISABLE = 2,
  49. IOCETH_E_IOC_RESET = 3,
  50. IOCETH_E_IOC_FAILED = 4,
  51. IOCETH_E_IOC_READY = 5,
  52. IOCETH_E_ENET_ATTR_RESP = 6,
  53. IOCETH_E_ENET_STOPPED = 7,
  54. IOCETH_E_IOC_DISABLED = 8,
  55. };
  56. #define bna_stats_copy(_name, _type) \
  57. do { \
  58. count = sizeof(struct bfi_enet_stats_ ## _type) / sizeof(u64); \
  59. stats_src = (u64 *)&bna->stats.hw_stats_kva->_name ## _stats; \
  60. stats_dst = (u64 *)&bna->stats.hw_stats._name ## _stats; \
  61. for (i = 0; i < count; i++) \
  62. stats_dst[i] = be64_to_cpu(stats_src[i]); \
  63. } while (0) \
  64. /*
  65. * FW response handlers
  66. */
  67. static void
  68. bna_bfi_ethport_enable_aen(struct bna_ethport *ethport,
  69. struct bfi_msgq_mhdr *msghdr)
  70. {
  71. ethport->flags |= BNA_ETHPORT_F_PORT_ENABLED;
  72. if (ethport_can_be_up(ethport))
  73. bfa_fsm_send_event(ethport, ETHPORT_E_UP);
  74. }
  75. static void
  76. bna_bfi_ethport_disable_aen(struct bna_ethport *ethport,
  77. struct bfi_msgq_mhdr *msghdr)
  78. {
  79. int ethport_up = ethport_is_up(ethport);
  80. ethport->flags &= ~BNA_ETHPORT_F_PORT_ENABLED;
  81. if (ethport_up)
  82. bfa_fsm_send_event(ethport, ETHPORT_E_DOWN);
  83. }
  84. static void
  85. bna_bfi_ethport_admin_rsp(struct bna_ethport *ethport,
  86. struct bfi_msgq_mhdr *msghdr)
  87. {
  88. struct bfi_enet_enable_req *admin_req =
  89. &ethport->bfi_enet_cmd.admin_req;
  90. struct bfi_enet_rsp *rsp =
  91. container_of(msghdr, struct bfi_enet_rsp, mh);
  92. switch (admin_req->enable) {
  93. case BNA_STATUS_T_ENABLED:
  94. if (rsp->error == BFI_ENET_CMD_OK)
  95. bfa_fsm_send_event(ethport, ETHPORT_E_FWRESP_UP_OK);
  96. else {
  97. ethport->flags &= ~BNA_ETHPORT_F_PORT_ENABLED;
  98. bfa_fsm_send_event(ethport, ETHPORT_E_FWRESP_UP_FAIL);
  99. }
  100. break;
  101. case BNA_STATUS_T_DISABLED:
  102. bfa_fsm_send_event(ethport, ETHPORT_E_FWRESP_DOWN);
  103. ethport->link_status = BNA_LINK_DOWN;
  104. ethport->link_cbfn(ethport->bna->bnad, BNA_LINK_DOWN);
  105. break;
  106. }
  107. }
  108. static void
  109. bna_bfi_ethport_lpbk_rsp(struct bna_ethport *ethport,
  110. struct bfi_msgq_mhdr *msghdr)
  111. {
  112. struct bfi_enet_diag_lb_req *diag_lb_req =
  113. &ethport->bfi_enet_cmd.lpbk_req;
  114. struct bfi_enet_rsp *rsp =
  115. container_of(msghdr, struct bfi_enet_rsp, mh);
  116. switch (diag_lb_req->enable) {
  117. case BNA_STATUS_T_ENABLED:
  118. if (rsp->error == BFI_ENET_CMD_OK)
  119. bfa_fsm_send_event(ethport, ETHPORT_E_FWRESP_UP_OK);
  120. else {
  121. ethport->flags &= ~BNA_ETHPORT_F_ADMIN_UP;
  122. bfa_fsm_send_event(ethport, ETHPORT_E_FWRESP_UP_FAIL);
  123. }
  124. break;
  125. case BNA_STATUS_T_DISABLED:
  126. bfa_fsm_send_event(ethport, ETHPORT_E_FWRESP_DOWN);
  127. break;
  128. }
  129. }
  130. static void
  131. bna_bfi_pause_set_rsp(struct bna_enet *enet, struct bfi_msgq_mhdr *msghdr)
  132. {
  133. bfa_fsm_send_event(enet, ENET_E_FWRESP_PAUSE);
  134. }
  135. static void
  136. bna_bfi_attr_get_rsp(struct bna_ioceth *ioceth,
  137. struct bfi_msgq_mhdr *msghdr)
  138. {
  139. struct bfi_enet_attr_rsp *rsp =
  140. container_of(msghdr, struct bfi_enet_attr_rsp, mh);
  141. /**
  142. * Store only if not set earlier, since BNAD can override the HW
  143. * attributes
  144. */
  145. if (!ioceth->attr.fw_query_complete) {
  146. ioceth->attr.num_txq = ntohl(rsp->max_cfg);
  147. ioceth->attr.num_rxp = ntohl(rsp->max_cfg);
  148. ioceth->attr.num_ucmac = ntohl(rsp->max_ucmac);
  149. ioceth->attr.num_mcmac = BFI_ENET_MAX_MCAM;
  150. ioceth->attr.max_rit_size = ntohl(rsp->rit_size);
  151. ioceth->attr.fw_query_complete = true;
  152. }
  153. bfa_fsm_send_event(ioceth, IOCETH_E_ENET_ATTR_RESP);
  154. }
  155. static void
  156. bna_bfi_stats_get_rsp(struct bna *bna, struct bfi_msgq_mhdr *msghdr)
  157. {
  158. struct bfi_enet_stats_req *stats_req = &bna->stats_mod.stats_get;
  159. u64 *stats_src;
  160. u64 *stats_dst;
  161. u32 tx_enet_mask = ntohl(stats_req->tx_enet_mask);
  162. u32 rx_enet_mask = ntohl(stats_req->rx_enet_mask);
  163. int count;
  164. int i;
  165. bna_stats_copy(mac, mac);
  166. bna_stats_copy(bpc, bpc);
  167. bna_stats_copy(rad, rad);
  168. bna_stats_copy(rlb, rad);
  169. bna_stats_copy(fc_rx, fc_rx);
  170. bna_stats_copy(fc_tx, fc_tx);
  171. stats_src = (u64 *)&(bna->stats.hw_stats_kva->rxf_stats[0]);
  172. /* Copy Rxf stats to SW area, scatter them while copying */
  173. for (i = 0; i < BFI_ENET_CFG_MAX; i++) {
  174. stats_dst = (u64 *)&(bna->stats.hw_stats.rxf_stats[i]);
  175. memset(stats_dst, 0, sizeof(struct bfi_enet_stats_rxf));
  176. if (rx_enet_mask & BIT(i)) {
  177. int k;
  178. count = sizeof(struct bfi_enet_stats_rxf) /
  179. sizeof(u64);
  180. for (k = 0; k < count; k++) {
  181. stats_dst[k] = be64_to_cpu(*stats_src);
  182. stats_src++;
  183. }
  184. }
  185. }
  186. /* Copy Txf stats to SW area, scatter them while copying */
  187. for (i = 0; i < BFI_ENET_CFG_MAX; i++) {
  188. stats_dst = (u64 *)&(bna->stats.hw_stats.txf_stats[i]);
  189. memset(stats_dst, 0, sizeof(struct bfi_enet_stats_txf));
  190. if (tx_enet_mask & BIT(i)) {
  191. int k;
  192. count = sizeof(struct bfi_enet_stats_txf) /
  193. sizeof(u64);
  194. for (k = 0; k < count; k++) {
  195. stats_dst[k] = be64_to_cpu(*stats_src);
  196. stats_src++;
  197. }
  198. }
  199. }
  200. bna->stats_mod.stats_get_busy = false;
  201. bnad_cb_stats_get(bna->bnad, BNA_CB_SUCCESS, &bna->stats);
  202. }
  203. static void
  204. bna_bfi_ethport_linkup_aen(struct bna_ethport *ethport,
  205. struct bfi_msgq_mhdr *msghdr)
  206. {
  207. ethport->link_status = BNA_LINK_UP;
  208. /* Dispatch events */
  209. ethport->link_cbfn(ethport->bna->bnad, ethport->link_status);
  210. }
  211. static void
  212. bna_bfi_ethport_linkdown_aen(struct bna_ethport *ethport,
  213. struct bfi_msgq_mhdr *msghdr)
  214. {
  215. ethport->link_status = BNA_LINK_DOWN;
  216. /* Dispatch events */
  217. ethport->link_cbfn(ethport->bna->bnad, BNA_LINK_DOWN);
  218. }
  219. static void
  220. bna_err_handler(struct bna *bna, u32 intr_status)
  221. {
  222. if (BNA_IS_HALT_INTR(bna, intr_status))
  223. bna_halt_clear(bna);
  224. bfa_nw_ioc_error_isr(&bna->ioceth.ioc);
  225. }
  226. void
  227. bna_mbox_handler(struct bna *bna, u32 intr_status)
  228. {
  229. if (BNA_IS_ERR_INTR(bna, intr_status)) {
  230. bna_err_handler(bna, intr_status);
  231. return;
  232. }
  233. if (BNA_IS_MBOX_INTR(bna, intr_status))
  234. bfa_nw_ioc_mbox_isr(&bna->ioceth.ioc);
  235. }
  236. static void
  237. bna_msgq_rsp_handler(void *arg, struct bfi_msgq_mhdr *msghdr)
  238. {
  239. struct bna *bna = (struct bna *)arg;
  240. struct bna_tx *tx;
  241. struct bna_rx *rx;
  242. switch (msghdr->msg_id) {
  243. case BFI_ENET_I2H_RX_CFG_SET_RSP:
  244. bna_rx_from_rid(bna, msghdr->enet_id, rx);
  245. if (rx)
  246. bna_bfi_rx_enet_start_rsp(rx, msghdr);
  247. break;
  248. case BFI_ENET_I2H_RX_CFG_CLR_RSP:
  249. bna_rx_from_rid(bna, msghdr->enet_id, rx);
  250. if (rx)
  251. bna_bfi_rx_enet_stop_rsp(rx, msghdr);
  252. break;
  253. case BFI_ENET_I2H_RIT_CFG_RSP:
  254. case BFI_ENET_I2H_RSS_CFG_RSP:
  255. case BFI_ENET_I2H_RSS_ENABLE_RSP:
  256. case BFI_ENET_I2H_RX_PROMISCUOUS_RSP:
  257. case BFI_ENET_I2H_RX_DEFAULT_RSP:
  258. case BFI_ENET_I2H_MAC_UCAST_CLR_RSP:
  259. case BFI_ENET_I2H_MAC_UCAST_ADD_RSP:
  260. case BFI_ENET_I2H_MAC_UCAST_DEL_RSP:
  261. case BFI_ENET_I2H_MAC_MCAST_DEL_RSP:
  262. case BFI_ENET_I2H_MAC_MCAST_FILTER_RSP:
  263. case BFI_ENET_I2H_RX_VLAN_SET_RSP:
  264. case BFI_ENET_I2H_RX_VLAN_STRIP_ENABLE_RSP:
  265. bna_rx_from_rid(bna, msghdr->enet_id, rx);
  266. if (rx)
  267. bna_bfi_rxf_cfg_rsp(&rx->rxf, msghdr);
  268. break;
  269. case BFI_ENET_I2H_MAC_UCAST_SET_RSP:
  270. bna_rx_from_rid(bna, msghdr->enet_id, rx);
  271. if (rx)
  272. bna_bfi_rxf_ucast_set_rsp(&rx->rxf, msghdr);
  273. break;
  274. case BFI_ENET_I2H_MAC_MCAST_ADD_RSP:
  275. bna_rx_from_rid(bna, msghdr->enet_id, rx);
  276. if (rx)
  277. bna_bfi_rxf_mcast_add_rsp(&rx->rxf, msghdr);
  278. break;
  279. case BFI_ENET_I2H_TX_CFG_SET_RSP:
  280. bna_tx_from_rid(bna, msghdr->enet_id, tx);
  281. if (tx)
  282. bna_bfi_tx_enet_start_rsp(tx, msghdr);
  283. break;
  284. case BFI_ENET_I2H_TX_CFG_CLR_RSP:
  285. bna_tx_from_rid(bna, msghdr->enet_id, tx);
  286. if (tx)
  287. bna_bfi_tx_enet_stop_rsp(tx, msghdr);
  288. break;
  289. case BFI_ENET_I2H_PORT_ADMIN_RSP:
  290. bna_bfi_ethport_admin_rsp(&bna->ethport, msghdr);
  291. break;
  292. case BFI_ENET_I2H_DIAG_LOOPBACK_RSP:
  293. bna_bfi_ethport_lpbk_rsp(&bna->ethport, msghdr);
  294. break;
  295. case BFI_ENET_I2H_SET_PAUSE_RSP:
  296. bna_bfi_pause_set_rsp(&bna->enet, msghdr);
  297. break;
  298. case BFI_ENET_I2H_GET_ATTR_RSP:
  299. bna_bfi_attr_get_rsp(&bna->ioceth, msghdr);
  300. break;
  301. case BFI_ENET_I2H_STATS_GET_RSP:
  302. bna_bfi_stats_get_rsp(bna, msghdr);
  303. break;
  304. case BFI_ENET_I2H_STATS_CLR_RSP:
  305. /* No-op */
  306. break;
  307. case BFI_ENET_I2H_LINK_UP_AEN:
  308. bna_bfi_ethport_linkup_aen(&bna->ethport, msghdr);
  309. break;
  310. case BFI_ENET_I2H_LINK_DOWN_AEN:
  311. bna_bfi_ethport_linkdown_aen(&bna->ethport, msghdr);
  312. break;
  313. case BFI_ENET_I2H_PORT_ENABLE_AEN:
  314. bna_bfi_ethport_enable_aen(&bna->ethport, msghdr);
  315. break;
  316. case BFI_ENET_I2H_PORT_DISABLE_AEN:
  317. bna_bfi_ethport_disable_aen(&bna->ethport, msghdr);
  318. break;
  319. case BFI_ENET_I2H_BW_UPDATE_AEN:
  320. bna_bfi_bw_update_aen(&bna->tx_mod);
  321. break;
  322. default:
  323. break;
  324. }
  325. }
  326. /* ETHPORT */
  327. #define call_ethport_stop_cbfn(_ethport) \
  328. do { \
  329. if ((_ethport)->stop_cbfn) { \
  330. void (*cbfn)(struct bna_enet *); \
  331. cbfn = (_ethport)->stop_cbfn; \
  332. (_ethport)->stop_cbfn = NULL; \
  333. cbfn(&(_ethport)->bna->enet); \
  334. } \
  335. } while (0)
  336. #define call_ethport_adminup_cbfn(ethport, status) \
  337. do { \
  338. if ((ethport)->adminup_cbfn) { \
  339. void (*cbfn)(struct bnad *, enum bna_cb_status); \
  340. cbfn = (ethport)->adminup_cbfn; \
  341. (ethport)->adminup_cbfn = NULL; \
  342. cbfn((ethport)->bna->bnad, status); \
  343. } \
  344. } while (0)
  345. static void
  346. bna_bfi_ethport_admin_up(struct bna_ethport *ethport)
  347. {
  348. struct bfi_enet_enable_req *admin_up_req =
  349. &ethport->bfi_enet_cmd.admin_req;
  350. bfi_msgq_mhdr_set(admin_up_req->mh, BFI_MC_ENET,
  351. BFI_ENET_H2I_PORT_ADMIN_UP_REQ, 0, 0);
  352. admin_up_req->mh.num_entries = htons(
  353. bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_enable_req)));
  354. admin_up_req->enable = BNA_STATUS_T_ENABLED;
  355. bfa_msgq_cmd_set(&ethport->msgq_cmd, NULL, NULL,
  356. sizeof(struct bfi_enet_enable_req), &admin_up_req->mh);
  357. bfa_msgq_cmd_post(&ethport->bna->msgq, &ethport->msgq_cmd);
  358. }
  359. static void
  360. bna_bfi_ethport_admin_down(struct bna_ethport *ethport)
  361. {
  362. struct bfi_enet_enable_req *admin_down_req =
  363. &ethport->bfi_enet_cmd.admin_req;
  364. bfi_msgq_mhdr_set(admin_down_req->mh, BFI_MC_ENET,
  365. BFI_ENET_H2I_PORT_ADMIN_UP_REQ, 0, 0);
  366. admin_down_req->mh.num_entries = htons(
  367. bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_enable_req)));
  368. admin_down_req->enable = BNA_STATUS_T_DISABLED;
  369. bfa_msgq_cmd_set(&ethport->msgq_cmd, NULL, NULL,
  370. sizeof(struct bfi_enet_enable_req), &admin_down_req->mh);
  371. bfa_msgq_cmd_post(&ethport->bna->msgq, &ethport->msgq_cmd);
  372. }
  373. static void
  374. bna_bfi_ethport_lpbk_up(struct bna_ethport *ethport)
  375. {
  376. struct bfi_enet_diag_lb_req *lpbk_up_req =
  377. &ethport->bfi_enet_cmd.lpbk_req;
  378. bfi_msgq_mhdr_set(lpbk_up_req->mh, BFI_MC_ENET,
  379. BFI_ENET_H2I_DIAG_LOOPBACK_REQ, 0, 0);
  380. lpbk_up_req->mh.num_entries = htons(
  381. bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_diag_lb_req)));
  382. lpbk_up_req->mode = (ethport->bna->enet.type ==
  383. BNA_ENET_T_LOOPBACK_INTERNAL) ?
  384. BFI_ENET_DIAG_LB_OPMODE_EXT :
  385. BFI_ENET_DIAG_LB_OPMODE_CBL;
  386. lpbk_up_req->enable = BNA_STATUS_T_ENABLED;
  387. bfa_msgq_cmd_set(&ethport->msgq_cmd, NULL, NULL,
  388. sizeof(struct bfi_enet_diag_lb_req), &lpbk_up_req->mh);
  389. bfa_msgq_cmd_post(&ethport->bna->msgq, &ethport->msgq_cmd);
  390. }
  391. static void
  392. bna_bfi_ethport_lpbk_down(struct bna_ethport *ethport)
  393. {
  394. struct bfi_enet_diag_lb_req *lpbk_down_req =
  395. &ethport->bfi_enet_cmd.lpbk_req;
  396. bfi_msgq_mhdr_set(lpbk_down_req->mh, BFI_MC_ENET,
  397. BFI_ENET_H2I_DIAG_LOOPBACK_REQ, 0, 0);
  398. lpbk_down_req->mh.num_entries = htons(
  399. bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_diag_lb_req)));
  400. lpbk_down_req->enable = BNA_STATUS_T_DISABLED;
  401. bfa_msgq_cmd_set(&ethport->msgq_cmd, NULL, NULL,
  402. sizeof(struct bfi_enet_diag_lb_req), &lpbk_down_req->mh);
  403. bfa_msgq_cmd_post(&ethport->bna->msgq, &ethport->msgq_cmd);
  404. }
  405. static void
  406. bna_bfi_ethport_up(struct bna_ethport *ethport)
  407. {
  408. if (ethport->bna->enet.type == BNA_ENET_T_REGULAR)
  409. bna_bfi_ethport_admin_up(ethport);
  410. else
  411. bna_bfi_ethport_lpbk_up(ethport);
  412. }
  413. static void
  414. bna_bfi_ethport_down(struct bna_ethport *ethport)
  415. {
  416. if (ethport->bna->enet.type == BNA_ENET_T_REGULAR)
  417. bna_bfi_ethport_admin_down(ethport);
  418. else
  419. bna_bfi_ethport_lpbk_down(ethport);
  420. }
  421. bfa_fsm_state_decl(bna_ethport, stopped, struct bna_ethport,
  422. enum bna_ethport_event);
  423. bfa_fsm_state_decl(bna_ethport, down, struct bna_ethport,
  424. enum bna_ethport_event);
  425. bfa_fsm_state_decl(bna_ethport, up_resp_wait, struct bna_ethport,
  426. enum bna_ethport_event);
  427. bfa_fsm_state_decl(bna_ethport, down_resp_wait, struct bna_ethport,
  428. enum bna_ethport_event);
  429. bfa_fsm_state_decl(bna_ethport, up, struct bna_ethport,
  430. enum bna_ethport_event);
  431. bfa_fsm_state_decl(bna_ethport, last_resp_wait, struct bna_ethport,
  432. enum bna_ethport_event);
  433. static void
  434. bna_ethport_sm_stopped_entry(struct bna_ethport *ethport)
  435. {
  436. call_ethport_stop_cbfn(ethport);
  437. }
  438. static void
  439. bna_ethport_sm_stopped(struct bna_ethport *ethport,
  440. enum bna_ethport_event event)
  441. {
  442. switch (event) {
  443. case ETHPORT_E_START:
  444. bfa_fsm_set_state(ethport, bna_ethport_sm_down);
  445. break;
  446. case ETHPORT_E_STOP:
  447. call_ethport_stop_cbfn(ethport);
  448. break;
  449. case ETHPORT_E_FAIL:
  450. /* No-op */
  451. break;
  452. case ETHPORT_E_DOWN:
  453. /* This event is received due to Rx objects failing */
  454. /* No-op */
  455. break;
  456. default:
  457. bfa_sm_fault(event);
  458. }
  459. }
  460. static void
  461. bna_ethport_sm_down_entry(struct bna_ethport *ethport)
  462. {
  463. }
  464. static void
  465. bna_ethport_sm_down(struct bna_ethport *ethport,
  466. enum bna_ethport_event event)
  467. {
  468. switch (event) {
  469. case ETHPORT_E_STOP:
  470. bfa_fsm_set_state(ethport, bna_ethport_sm_stopped);
  471. break;
  472. case ETHPORT_E_FAIL:
  473. bfa_fsm_set_state(ethport, bna_ethport_sm_stopped);
  474. break;
  475. case ETHPORT_E_UP:
  476. bfa_fsm_set_state(ethport, bna_ethport_sm_up_resp_wait);
  477. bna_bfi_ethport_up(ethport);
  478. break;
  479. default:
  480. bfa_sm_fault(event);
  481. }
  482. }
  483. static void
  484. bna_ethport_sm_up_resp_wait_entry(struct bna_ethport *ethport)
  485. {
  486. }
  487. static void
  488. bna_ethport_sm_up_resp_wait(struct bna_ethport *ethport,
  489. enum bna_ethport_event event)
  490. {
  491. switch (event) {
  492. case ETHPORT_E_STOP:
  493. bfa_fsm_set_state(ethport, bna_ethport_sm_last_resp_wait);
  494. break;
  495. case ETHPORT_E_FAIL:
  496. call_ethport_adminup_cbfn(ethport, BNA_CB_FAIL);
  497. bfa_fsm_set_state(ethport, bna_ethport_sm_stopped);
  498. break;
  499. case ETHPORT_E_DOWN:
  500. call_ethport_adminup_cbfn(ethport, BNA_CB_INTERRUPT);
  501. bfa_fsm_set_state(ethport, bna_ethport_sm_down_resp_wait);
  502. break;
  503. case ETHPORT_E_FWRESP_UP_OK:
  504. call_ethport_adminup_cbfn(ethport, BNA_CB_SUCCESS);
  505. bfa_fsm_set_state(ethport, bna_ethport_sm_up);
  506. break;
  507. case ETHPORT_E_FWRESP_UP_FAIL:
  508. call_ethport_adminup_cbfn(ethport, BNA_CB_FAIL);
  509. bfa_fsm_set_state(ethport, bna_ethport_sm_down);
  510. break;
  511. case ETHPORT_E_FWRESP_DOWN:
  512. /* down_resp_wait -> up_resp_wait transition on ETHPORT_E_UP */
  513. bna_bfi_ethport_up(ethport);
  514. break;
  515. default:
  516. bfa_sm_fault(event);
  517. }
  518. }
  519. static void
  520. bna_ethport_sm_down_resp_wait_entry(struct bna_ethport *ethport)
  521. {
  522. /**
  523. * NOTE: Do not call bna_bfi_ethport_down() here. That will over step
  524. * mbox due to up_resp_wait -> down_resp_wait transition on event
  525. * ETHPORT_E_DOWN
  526. */
  527. }
  528. static void
  529. bna_ethport_sm_down_resp_wait(struct bna_ethport *ethport,
  530. enum bna_ethport_event event)
  531. {
  532. switch (event) {
  533. case ETHPORT_E_STOP:
  534. bfa_fsm_set_state(ethport, bna_ethport_sm_last_resp_wait);
  535. break;
  536. case ETHPORT_E_FAIL:
  537. bfa_fsm_set_state(ethport, bna_ethport_sm_stopped);
  538. break;
  539. case ETHPORT_E_UP:
  540. bfa_fsm_set_state(ethport, bna_ethport_sm_up_resp_wait);
  541. break;
  542. case ETHPORT_E_FWRESP_UP_OK:
  543. /* up_resp_wait->down_resp_wait transition on ETHPORT_E_DOWN */
  544. bna_bfi_ethport_down(ethport);
  545. break;
  546. case ETHPORT_E_FWRESP_UP_FAIL:
  547. case ETHPORT_E_FWRESP_DOWN:
  548. bfa_fsm_set_state(ethport, bna_ethport_sm_down);
  549. break;
  550. default:
  551. bfa_sm_fault(event);
  552. }
  553. }
  554. static void
  555. bna_ethport_sm_up_entry(struct bna_ethport *ethport)
  556. {
  557. }
  558. static void
  559. bna_ethport_sm_up(struct bna_ethport *ethport,
  560. enum bna_ethport_event event)
  561. {
  562. switch (event) {
  563. case ETHPORT_E_STOP:
  564. bfa_fsm_set_state(ethport, bna_ethport_sm_last_resp_wait);
  565. bna_bfi_ethport_down(ethport);
  566. break;
  567. case ETHPORT_E_FAIL:
  568. bfa_fsm_set_state(ethport, bna_ethport_sm_stopped);
  569. break;
  570. case ETHPORT_E_DOWN:
  571. bfa_fsm_set_state(ethport, bna_ethport_sm_down_resp_wait);
  572. bna_bfi_ethport_down(ethport);
  573. break;
  574. default:
  575. bfa_sm_fault(event);
  576. }
  577. }
  578. static void
  579. bna_ethport_sm_last_resp_wait_entry(struct bna_ethport *ethport)
  580. {
  581. }
  582. static void
  583. bna_ethport_sm_last_resp_wait(struct bna_ethport *ethport,
  584. enum bna_ethport_event event)
  585. {
  586. switch (event) {
  587. case ETHPORT_E_FAIL:
  588. bfa_fsm_set_state(ethport, bna_ethport_sm_stopped);
  589. break;
  590. case ETHPORT_E_DOWN:
  591. /**
  592. * This event is received due to Rx objects stopping in
  593. * parallel to ethport
  594. */
  595. /* No-op */
  596. break;
  597. case ETHPORT_E_FWRESP_UP_OK:
  598. /* up_resp_wait->last_resp_wait transition on ETHPORT_T_STOP */
  599. bna_bfi_ethport_down(ethport);
  600. break;
  601. case ETHPORT_E_FWRESP_UP_FAIL:
  602. case ETHPORT_E_FWRESP_DOWN:
  603. bfa_fsm_set_state(ethport, bna_ethport_sm_stopped);
  604. break;
  605. default:
  606. bfa_sm_fault(event);
  607. }
  608. }
  609. static void
  610. bna_ethport_init(struct bna_ethport *ethport, struct bna *bna)
  611. {
  612. ethport->flags |= (BNA_ETHPORT_F_ADMIN_UP | BNA_ETHPORT_F_PORT_ENABLED);
  613. ethport->bna = bna;
  614. ethport->link_status = BNA_LINK_DOWN;
  615. ethport->link_cbfn = bnad_cb_ethport_link_status;
  616. ethport->rx_started_count = 0;
  617. ethport->stop_cbfn = NULL;
  618. ethport->adminup_cbfn = NULL;
  619. bfa_fsm_set_state(ethport, bna_ethport_sm_stopped);
  620. }
  621. static void
  622. bna_ethport_uninit(struct bna_ethport *ethport)
  623. {
  624. ethport->flags &= ~BNA_ETHPORT_F_ADMIN_UP;
  625. ethport->flags &= ~BNA_ETHPORT_F_PORT_ENABLED;
  626. ethport->bna = NULL;
  627. }
  628. static void
  629. bna_ethport_start(struct bna_ethport *ethport)
  630. {
  631. bfa_fsm_send_event(ethport, ETHPORT_E_START);
  632. }
  633. static void
  634. bna_enet_cb_ethport_stopped(struct bna_enet *enet)
  635. {
  636. bfa_wc_down(&enet->chld_stop_wc);
  637. }
  638. static void
  639. bna_ethport_stop(struct bna_ethport *ethport)
  640. {
  641. ethport->stop_cbfn = bna_enet_cb_ethport_stopped;
  642. bfa_fsm_send_event(ethport, ETHPORT_E_STOP);
  643. }
  644. static void
  645. bna_ethport_fail(struct bna_ethport *ethport)
  646. {
  647. /* Reset the physical port status to enabled */
  648. ethport->flags |= BNA_ETHPORT_F_PORT_ENABLED;
  649. if (ethport->link_status != BNA_LINK_DOWN) {
  650. ethport->link_status = BNA_LINK_DOWN;
  651. ethport->link_cbfn(ethport->bna->bnad, BNA_LINK_DOWN);
  652. }
  653. bfa_fsm_send_event(ethport, ETHPORT_E_FAIL);
  654. }
  655. /* Should be called only when ethport is disabled */
  656. void
  657. bna_ethport_cb_rx_started(struct bna_ethport *ethport)
  658. {
  659. ethport->rx_started_count++;
  660. if (ethport->rx_started_count == 1) {
  661. ethport->flags |= BNA_ETHPORT_F_RX_STARTED;
  662. if (ethport_can_be_up(ethport))
  663. bfa_fsm_send_event(ethport, ETHPORT_E_UP);
  664. }
  665. }
  666. void
  667. bna_ethport_cb_rx_stopped(struct bna_ethport *ethport)
  668. {
  669. int ethport_up = ethport_is_up(ethport);
  670. ethport->rx_started_count--;
  671. if (ethport->rx_started_count == 0) {
  672. ethport->flags &= ~BNA_ETHPORT_F_RX_STARTED;
  673. if (ethport_up)
  674. bfa_fsm_send_event(ethport, ETHPORT_E_DOWN);
  675. }
  676. }
  677. /* ENET */
  678. #define bna_enet_chld_start(enet) \
  679. do { \
  680. enum bna_tx_type tx_type = \
  681. ((enet)->type == BNA_ENET_T_REGULAR) ? \
  682. BNA_TX_T_REGULAR : BNA_TX_T_LOOPBACK; \
  683. enum bna_rx_type rx_type = \
  684. ((enet)->type == BNA_ENET_T_REGULAR) ? \
  685. BNA_RX_T_REGULAR : BNA_RX_T_LOOPBACK; \
  686. bna_ethport_start(&(enet)->bna->ethport); \
  687. bna_tx_mod_start(&(enet)->bna->tx_mod, tx_type); \
  688. bna_rx_mod_start(&(enet)->bna->rx_mod, rx_type); \
  689. } while (0)
  690. #define bna_enet_chld_stop(enet) \
  691. do { \
  692. enum bna_tx_type tx_type = \
  693. ((enet)->type == BNA_ENET_T_REGULAR) ? \
  694. BNA_TX_T_REGULAR : BNA_TX_T_LOOPBACK; \
  695. enum bna_rx_type rx_type = \
  696. ((enet)->type == BNA_ENET_T_REGULAR) ? \
  697. BNA_RX_T_REGULAR : BNA_RX_T_LOOPBACK; \
  698. bfa_wc_init(&(enet)->chld_stop_wc, bna_enet_cb_chld_stopped, (enet));\
  699. bfa_wc_up(&(enet)->chld_stop_wc); \
  700. bna_ethport_stop(&(enet)->bna->ethport); \
  701. bfa_wc_up(&(enet)->chld_stop_wc); \
  702. bna_tx_mod_stop(&(enet)->bna->tx_mod, tx_type); \
  703. bfa_wc_up(&(enet)->chld_stop_wc); \
  704. bna_rx_mod_stop(&(enet)->bna->rx_mod, rx_type); \
  705. bfa_wc_wait(&(enet)->chld_stop_wc); \
  706. } while (0)
  707. #define bna_enet_chld_fail(enet) \
  708. do { \
  709. bna_ethport_fail(&(enet)->bna->ethport); \
  710. bna_tx_mod_fail(&(enet)->bna->tx_mod); \
  711. bna_rx_mod_fail(&(enet)->bna->rx_mod); \
  712. } while (0)
  713. #define bna_enet_rx_start(enet) \
  714. do { \
  715. enum bna_rx_type rx_type = \
  716. ((enet)->type == BNA_ENET_T_REGULAR) ? \
  717. BNA_RX_T_REGULAR : BNA_RX_T_LOOPBACK; \
  718. bna_rx_mod_start(&(enet)->bna->rx_mod, rx_type); \
  719. } while (0)
  720. #define bna_enet_rx_stop(enet) \
  721. do { \
  722. enum bna_rx_type rx_type = \
  723. ((enet)->type == BNA_ENET_T_REGULAR) ? \
  724. BNA_RX_T_REGULAR : BNA_RX_T_LOOPBACK; \
  725. bfa_wc_init(&(enet)->chld_stop_wc, bna_enet_cb_chld_stopped, (enet));\
  726. bfa_wc_up(&(enet)->chld_stop_wc); \
  727. bna_rx_mod_stop(&(enet)->bna->rx_mod, rx_type); \
  728. bfa_wc_wait(&(enet)->chld_stop_wc); \
  729. } while (0)
  730. #define call_enet_stop_cbfn(enet) \
  731. do { \
  732. if ((enet)->stop_cbfn) { \
  733. void (*cbfn)(void *); \
  734. void *cbarg; \
  735. cbfn = (enet)->stop_cbfn; \
  736. cbarg = (enet)->stop_cbarg; \
  737. (enet)->stop_cbfn = NULL; \
  738. (enet)->stop_cbarg = NULL; \
  739. cbfn(cbarg); \
  740. } \
  741. } while (0)
  742. #define call_enet_mtu_cbfn(enet) \
  743. do { \
  744. if ((enet)->mtu_cbfn) { \
  745. void (*cbfn)(struct bnad *); \
  746. cbfn = (enet)->mtu_cbfn; \
  747. (enet)->mtu_cbfn = NULL; \
  748. cbfn((enet)->bna->bnad); \
  749. } \
  750. } while (0)
  751. static void bna_enet_cb_chld_stopped(void *arg);
  752. static void bna_bfi_pause_set(struct bna_enet *enet);
  753. bfa_fsm_state_decl(bna_enet, stopped, struct bna_enet,
  754. enum bna_enet_event);
  755. bfa_fsm_state_decl(bna_enet, pause_init_wait, struct bna_enet,
  756. enum bna_enet_event);
  757. bfa_fsm_state_decl(bna_enet, last_resp_wait, struct bna_enet,
  758. enum bna_enet_event);
  759. bfa_fsm_state_decl(bna_enet, started, struct bna_enet,
  760. enum bna_enet_event);
  761. bfa_fsm_state_decl(bna_enet, cfg_wait, struct bna_enet,
  762. enum bna_enet_event);
  763. bfa_fsm_state_decl(bna_enet, cfg_stop_wait, struct bna_enet,
  764. enum bna_enet_event);
  765. bfa_fsm_state_decl(bna_enet, chld_stop_wait, struct bna_enet,
  766. enum bna_enet_event);
  767. static void
  768. bna_enet_sm_stopped_entry(struct bna_enet *enet)
  769. {
  770. call_enet_mtu_cbfn(enet);
  771. call_enet_stop_cbfn(enet);
  772. }
  773. static void
  774. bna_enet_sm_stopped(struct bna_enet *enet, enum bna_enet_event event)
  775. {
  776. switch (event) {
  777. case ENET_E_START:
  778. bfa_fsm_set_state(enet, bna_enet_sm_pause_init_wait);
  779. break;
  780. case ENET_E_STOP:
  781. call_enet_stop_cbfn(enet);
  782. break;
  783. case ENET_E_FAIL:
  784. /* No-op */
  785. break;
  786. case ENET_E_PAUSE_CFG:
  787. break;
  788. case ENET_E_MTU_CFG:
  789. call_enet_mtu_cbfn(enet);
  790. break;
  791. case ENET_E_CHLD_STOPPED:
  792. /**
  793. * This event is received due to Ethport, Tx and Rx objects
  794. * failing
  795. */
  796. /* No-op */
  797. break;
  798. default:
  799. bfa_sm_fault(event);
  800. }
  801. }
  802. static void
  803. bna_enet_sm_pause_init_wait_entry(struct bna_enet *enet)
  804. {
  805. bna_bfi_pause_set(enet);
  806. }
  807. static void
  808. bna_enet_sm_pause_init_wait(struct bna_enet *enet,
  809. enum bna_enet_event event)
  810. {
  811. switch (event) {
  812. case ENET_E_STOP:
  813. enet->flags &= ~BNA_ENET_F_PAUSE_CHANGED;
  814. bfa_fsm_set_state(enet, bna_enet_sm_last_resp_wait);
  815. break;
  816. case ENET_E_FAIL:
  817. enet->flags &= ~BNA_ENET_F_PAUSE_CHANGED;
  818. bfa_fsm_set_state(enet, bna_enet_sm_stopped);
  819. break;
  820. case ENET_E_PAUSE_CFG:
  821. enet->flags |= BNA_ENET_F_PAUSE_CHANGED;
  822. break;
  823. case ENET_E_MTU_CFG:
  824. /* No-op */
  825. break;
  826. case ENET_E_FWRESP_PAUSE:
  827. if (enet->flags & BNA_ENET_F_PAUSE_CHANGED) {
  828. enet->flags &= ~BNA_ENET_F_PAUSE_CHANGED;
  829. bna_bfi_pause_set(enet);
  830. } else {
  831. bfa_fsm_set_state(enet, bna_enet_sm_started);
  832. bna_enet_chld_start(enet);
  833. }
  834. break;
  835. default:
  836. bfa_sm_fault(event);
  837. }
  838. }
  839. static void
  840. bna_enet_sm_last_resp_wait_entry(struct bna_enet *enet)
  841. {
  842. enet->flags &= ~BNA_ENET_F_PAUSE_CHANGED;
  843. }
  844. static void
  845. bna_enet_sm_last_resp_wait(struct bna_enet *enet,
  846. enum bna_enet_event event)
  847. {
  848. switch (event) {
  849. case ENET_E_FAIL:
  850. case ENET_E_FWRESP_PAUSE:
  851. bfa_fsm_set_state(enet, bna_enet_sm_stopped);
  852. break;
  853. default:
  854. bfa_sm_fault(event);
  855. }
  856. }
  857. static void
  858. bna_enet_sm_started_entry(struct bna_enet *enet)
  859. {
  860. /**
  861. * NOTE: Do not call bna_enet_chld_start() here, since it will be
  862. * inadvertently called during cfg_wait->started transition as well
  863. */
  864. call_enet_mtu_cbfn(enet);
  865. }
  866. static void
  867. bna_enet_sm_started(struct bna_enet *enet,
  868. enum bna_enet_event event)
  869. {
  870. switch (event) {
  871. case ENET_E_STOP:
  872. bfa_fsm_set_state(enet, bna_enet_sm_chld_stop_wait);
  873. break;
  874. case ENET_E_FAIL:
  875. bfa_fsm_set_state(enet, bna_enet_sm_stopped);
  876. bna_enet_chld_fail(enet);
  877. break;
  878. case ENET_E_PAUSE_CFG:
  879. bfa_fsm_set_state(enet, bna_enet_sm_cfg_wait);
  880. bna_bfi_pause_set(enet);
  881. break;
  882. case ENET_E_MTU_CFG:
  883. bfa_fsm_set_state(enet, bna_enet_sm_cfg_wait);
  884. bna_enet_rx_stop(enet);
  885. break;
  886. default:
  887. bfa_sm_fault(event);
  888. }
  889. }
  890. static void
  891. bna_enet_sm_cfg_wait_entry(struct bna_enet *enet)
  892. {
  893. }
  894. static void
  895. bna_enet_sm_cfg_wait(struct bna_enet *enet,
  896. enum bna_enet_event event)
  897. {
  898. switch (event) {
  899. case ENET_E_STOP:
  900. enet->flags &= ~BNA_ENET_F_PAUSE_CHANGED;
  901. enet->flags &= ~BNA_ENET_F_MTU_CHANGED;
  902. bfa_fsm_set_state(enet, bna_enet_sm_cfg_stop_wait);
  903. break;
  904. case ENET_E_FAIL:
  905. enet->flags &= ~BNA_ENET_F_PAUSE_CHANGED;
  906. enet->flags &= ~BNA_ENET_F_MTU_CHANGED;
  907. bfa_fsm_set_state(enet, bna_enet_sm_stopped);
  908. bna_enet_chld_fail(enet);
  909. break;
  910. case ENET_E_PAUSE_CFG:
  911. enet->flags |= BNA_ENET_F_PAUSE_CHANGED;
  912. break;
  913. case ENET_E_MTU_CFG:
  914. enet->flags |= BNA_ENET_F_MTU_CHANGED;
  915. break;
  916. case ENET_E_CHLD_STOPPED:
  917. bna_enet_rx_start(enet);
  918. fallthrough;
  919. case ENET_E_FWRESP_PAUSE:
  920. if (enet->flags & BNA_ENET_F_PAUSE_CHANGED) {
  921. enet->flags &= ~BNA_ENET_F_PAUSE_CHANGED;
  922. bna_bfi_pause_set(enet);
  923. } else if (enet->flags & BNA_ENET_F_MTU_CHANGED) {
  924. enet->flags &= ~BNA_ENET_F_MTU_CHANGED;
  925. bna_enet_rx_stop(enet);
  926. } else {
  927. bfa_fsm_set_state(enet, bna_enet_sm_started);
  928. }
  929. break;
  930. default:
  931. bfa_sm_fault(event);
  932. }
  933. }
  934. static void
  935. bna_enet_sm_cfg_stop_wait_entry(struct bna_enet *enet)
  936. {
  937. enet->flags &= ~BNA_ENET_F_PAUSE_CHANGED;
  938. enet->flags &= ~BNA_ENET_F_MTU_CHANGED;
  939. }
  940. static void
  941. bna_enet_sm_cfg_stop_wait(struct bna_enet *enet,
  942. enum bna_enet_event event)
  943. {
  944. switch (event) {
  945. case ENET_E_FAIL:
  946. bfa_fsm_set_state(enet, bna_enet_sm_stopped);
  947. bna_enet_chld_fail(enet);
  948. break;
  949. case ENET_E_FWRESP_PAUSE:
  950. case ENET_E_CHLD_STOPPED:
  951. bfa_fsm_set_state(enet, bna_enet_sm_chld_stop_wait);
  952. break;
  953. default:
  954. bfa_sm_fault(event);
  955. }
  956. }
  957. static void
  958. bna_enet_sm_chld_stop_wait_entry(struct bna_enet *enet)
  959. {
  960. bna_enet_chld_stop(enet);
  961. }
  962. static void
  963. bna_enet_sm_chld_stop_wait(struct bna_enet *enet,
  964. enum bna_enet_event event)
  965. {
  966. switch (event) {
  967. case ENET_E_FAIL:
  968. bfa_fsm_set_state(enet, bna_enet_sm_stopped);
  969. bna_enet_chld_fail(enet);
  970. break;
  971. case ENET_E_CHLD_STOPPED:
  972. bfa_fsm_set_state(enet, bna_enet_sm_stopped);
  973. break;
  974. default:
  975. bfa_sm_fault(event);
  976. }
  977. }
  978. static void
  979. bna_bfi_pause_set(struct bna_enet *enet)
  980. {
  981. struct bfi_enet_set_pause_req *pause_req = &enet->pause_req;
  982. bfi_msgq_mhdr_set(pause_req->mh, BFI_MC_ENET,
  983. BFI_ENET_H2I_SET_PAUSE_REQ, 0, 0);
  984. pause_req->mh.num_entries = htons(
  985. bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_set_pause_req)));
  986. pause_req->tx_pause = enet->pause_config.tx_pause;
  987. pause_req->rx_pause = enet->pause_config.rx_pause;
  988. bfa_msgq_cmd_set(&enet->msgq_cmd, NULL, NULL,
  989. sizeof(struct bfi_enet_set_pause_req), &pause_req->mh);
  990. bfa_msgq_cmd_post(&enet->bna->msgq, &enet->msgq_cmd);
  991. }
  992. static void
  993. bna_enet_cb_chld_stopped(void *arg)
  994. {
  995. struct bna_enet *enet = (struct bna_enet *)arg;
  996. bfa_fsm_send_event(enet, ENET_E_CHLD_STOPPED);
  997. }
  998. static void
  999. bna_enet_init(struct bna_enet *enet, struct bna *bna)
  1000. {
  1001. enet->bna = bna;
  1002. enet->flags = 0;
  1003. enet->mtu = 0;
  1004. enet->type = BNA_ENET_T_REGULAR;
  1005. enet->stop_cbfn = NULL;
  1006. enet->stop_cbarg = NULL;
  1007. enet->mtu_cbfn = NULL;
  1008. bfa_fsm_set_state(enet, bna_enet_sm_stopped);
  1009. }
  1010. static void
  1011. bna_enet_uninit(struct bna_enet *enet)
  1012. {
  1013. enet->flags = 0;
  1014. enet->bna = NULL;
  1015. }
  1016. static void
  1017. bna_enet_start(struct bna_enet *enet)
  1018. {
  1019. enet->flags |= BNA_ENET_F_IOCETH_READY;
  1020. if (enet->flags & BNA_ENET_F_ENABLED)
  1021. bfa_fsm_send_event(enet, ENET_E_START);
  1022. }
  1023. static void
  1024. bna_ioceth_cb_enet_stopped(void *arg)
  1025. {
  1026. struct bna_ioceth *ioceth = (struct bna_ioceth *)arg;
  1027. bfa_fsm_send_event(ioceth, IOCETH_E_ENET_STOPPED);
  1028. }
  1029. static void
  1030. bna_enet_stop(struct bna_enet *enet)
  1031. {
  1032. enet->stop_cbfn = bna_ioceth_cb_enet_stopped;
  1033. enet->stop_cbarg = &enet->bna->ioceth;
  1034. enet->flags &= ~BNA_ENET_F_IOCETH_READY;
  1035. bfa_fsm_send_event(enet, ENET_E_STOP);
  1036. }
  1037. static void
  1038. bna_enet_fail(struct bna_enet *enet)
  1039. {
  1040. enet->flags &= ~BNA_ENET_F_IOCETH_READY;
  1041. bfa_fsm_send_event(enet, ENET_E_FAIL);
  1042. }
  1043. void
  1044. bna_enet_cb_tx_stopped(struct bna_enet *enet)
  1045. {
  1046. bfa_wc_down(&enet->chld_stop_wc);
  1047. }
  1048. void
  1049. bna_enet_cb_rx_stopped(struct bna_enet *enet)
  1050. {
  1051. bfa_wc_down(&enet->chld_stop_wc);
  1052. }
  1053. int
  1054. bna_enet_mtu_get(struct bna_enet *enet)
  1055. {
  1056. return enet->mtu;
  1057. }
  1058. void
  1059. bna_enet_enable(struct bna_enet *enet)
  1060. {
  1061. if (enet->fsm != bna_enet_sm_stopped)
  1062. return;
  1063. enet->flags |= BNA_ENET_F_ENABLED;
  1064. if (enet->flags & BNA_ENET_F_IOCETH_READY)
  1065. bfa_fsm_send_event(enet, ENET_E_START);
  1066. }
  1067. void
  1068. bna_enet_disable(struct bna_enet *enet, enum bna_cleanup_type type,
  1069. void (*cbfn)(void *))
  1070. {
  1071. if (type == BNA_SOFT_CLEANUP) {
  1072. (*cbfn)(enet->bna->bnad);
  1073. return;
  1074. }
  1075. enet->stop_cbfn = cbfn;
  1076. enet->stop_cbarg = enet->bna->bnad;
  1077. enet->flags &= ~BNA_ENET_F_ENABLED;
  1078. bfa_fsm_send_event(enet, ENET_E_STOP);
  1079. }
  1080. void
  1081. bna_enet_pause_config(struct bna_enet *enet,
  1082. struct bna_pause_config *pause_config)
  1083. {
  1084. enet->pause_config = *pause_config;
  1085. bfa_fsm_send_event(enet, ENET_E_PAUSE_CFG);
  1086. }
  1087. void
  1088. bna_enet_mtu_set(struct bna_enet *enet, int mtu,
  1089. void (*cbfn)(struct bnad *))
  1090. {
  1091. enet->mtu = mtu;
  1092. enet->mtu_cbfn = cbfn;
  1093. bfa_fsm_send_event(enet, ENET_E_MTU_CFG);
  1094. }
  1095. void
  1096. bna_enet_perm_mac_get(struct bna_enet *enet, u8 *mac)
  1097. {
  1098. bfa_nw_ioc_get_mac(&enet->bna->ioceth.ioc, mac);
  1099. }
  1100. /* IOCETH */
  1101. #define enable_mbox_intr(_ioceth) \
  1102. do { \
  1103. u32 intr_status; \
  1104. bna_intr_status_get((_ioceth)->bna, intr_status); \
  1105. bnad_cb_mbox_intr_enable((_ioceth)->bna->bnad); \
  1106. bna_mbox_intr_enable((_ioceth)->bna); \
  1107. } while (0)
  1108. #define disable_mbox_intr(_ioceth) \
  1109. do { \
  1110. bna_mbox_intr_disable((_ioceth)->bna); \
  1111. bnad_cb_mbox_intr_disable((_ioceth)->bna->bnad); \
  1112. } while (0)
  1113. #define call_ioceth_stop_cbfn(_ioceth) \
  1114. do { \
  1115. if ((_ioceth)->stop_cbfn) { \
  1116. void (*cbfn)(struct bnad *); \
  1117. struct bnad *cbarg; \
  1118. cbfn = (_ioceth)->stop_cbfn; \
  1119. cbarg = (_ioceth)->stop_cbarg; \
  1120. (_ioceth)->stop_cbfn = NULL; \
  1121. (_ioceth)->stop_cbarg = NULL; \
  1122. cbfn(cbarg); \
  1123. } \
  1124. } while (0)
  1125. #define bna_stats_mod_uninit(_stats_mod) \
  1126. do { \
  1127. } while (0)
  1128. #define bna_stats_mod_start(_stats_mod) \
  1129. do { \
  1130. (_stats_mod)->ioc_ready = true; \
  1131. } while (0)
  1132. #define bna_stats_mod_stop(_stats_mod) \
  1133. do { \
  1134. (_stats_mod)->ioc_ready = false; \
  1135. } while (0)
  1136. #define bna_stats_mod_fail(_stats_mod) \
  1137. do { \
  1138. (_stats_mod)->ioc_ready = false; \
  1139. (_stats_mod)->stats_get_busy = false; \
  1140. (_stats_mod)->stats_clr_busy = false; \
  1141. } while (0)
  1142. static void bna_bfi_attr_get(struct bna_ioceth *ioceth);
  1143. bfa_fsm_state_decl(bna_ioceth, stopped, struct bna_ioceth,
  1144. enum bna_ioceth_event);
  1145. bfa_fsm_state_decl(bna_ioceth, ioc_ready_wait, struct bna_ioceth,
  1146. enum bna_ioceth_event);
  1147. bfa_fsm_state_decl(bna_ioceth, enet_attr_wait, struct bna_ioceth,
  1148. enum bna_ioceth_event);
  1149. bfa_fsm_state_decl(bna_ioceth, ready, struct bna_ioceth,
  1150. enum bna_ioceth_event);
  1151. bfa_fsm_state_decl(bna_ioceth, last_resp_wait, struct bna_ioceth,
  1152. enum bna_ioceth_event);
  1153. bfa_fsm_state_decl(bna_ioceth, enet_stop_wait, struct bna_ioceth,
  1154. enum bna_ioceth_event);
  1155. bfa_fsm_state_decl(bna_ioceth, ioc_disable_wait, struct bna_ioceth,
  1156. enum bna_ioceth_event);
  1157. bfa_fsm_state_decl(bna_ioceth, failed, struct bna_ioceth,
  1158. enum bna_ioceth_event);
  1159. static void
  1160. bna_ioceth_sm_stopped_entry(struct bna_ioceth *ioceth)
  1161. {
  1162. call_ioceth_stop_cbfn(ioceth);
  1163. }
  1164. static void
  1165. bna_ioceth_sm_stopped(struct bna_ioceth *ioceth,
  1166. enum bna_ioceth_event event)
  1167. {
  1168. switch (event) {
  1169. case IOCETH_E_ENABLE:
  1170. bfa_fsm_set_state(ioceth, bna_ioceth_sm_ioc_ready_wait);
  1171. bfa_nw_ioc_enable(&ioceth->ioc);
  1172. break;
  1173. case IOCETH_E_DISABLE:
  1174. bfa_fsm_set_state(ioceth, bna_ioceth_sm_stopped);
  1175. break;
  1176. case IOCETH_E_IOC_RESET:
  1177. enable_mbox_intr(ioceth);
  1178. break;
  1179. case IOCETH_E_IOC_FAILED:
  1180. disable_mbox_intr(ioceth);
  1181. bfa_fsm_set_state(ioceth, bna_ioceth_sm_failed);
  1182. break;
  1183. default:
  1184. bfa_sm_fault(event);
  1185. }
  1186. }
  1187. static void
  1188. bna_ioceth_sm_ioc_ready_wait_entry(struct bna_ioceth *ioceth)
  1189. {
  1190. /**
  1191. * Do not call bfa_nw_ioc_enable() here. It must be called in the
  1192. * previous state due to failed -> ioc_ready_wait transition.
  1193. */
  1194. }
  1195. static void
  1196. bna_ioceth_sm_ioc_ready_wait(struct bna_ioceth *ioceth,
  1197. enum bna_ioceth_event event)
  1198. {
  1199. switch (event) {
  1200. case IOCETH_E_DISABLE:
  1201. bfa_fsm_set_state(ioceth, bna_ioceth_sm_ioc_disable_wait);
  1202. bfa_nw_ioc_disable(&ioceth->ioc);
  1203. break;
  1204. case IOCETH_E_IOC_RESET:
  1205. enable_mbox_intr(ioceth);
  1206. break;
  1207. case IOCETH_E_IOC_FAILED:
  1208. disable_mbox_intr(ioceth);
  1209. bfa_fsm_set_state(ioceth, bna_ioceth_sm_failed);
  1210. break;
  1211. case IOCETH_E_IOC_READY:
  1212. bfa_fsm_set_state(ioceth, bna_ioceth_sm_enet_attr_wait);
  1213. break;
  1214. default:
  1215. bfa_sm_fault(event);
  1216. }
  1217. }
  1218. static void
  1219. bna_ioceth_sm_enet_attr_wait_entry(struct bna_ioceth *ioceth)
  1220. {
  1221. bna_bfi_attr_get(ioceth);
  1222. }
  1223. static void
  1224. bna_ioceth_sm_enet_attr_wait(struct bna_ioceth *ioceth,
  1225. enum bna_ioceth_event event)
  1226. {
  1227. switch (event) {
  1228. case IOCETH_E_DISABLE:
  1229. bfa_fsm_set_state(ioceth, bna_ioceth_sm_last_resp_wait);
  1230. break;
  1231. case IOCETH_E_IOC_FAILED:
  1232. disable_mbox_intr(ioceth);
  1233. bfa_fsm_set_state(ioceth, bna_ioceth_sm_failed);
  1234. break;
  1235. case IOCETH_E_ENET_ATTR_RESP:
  1236. bfa_fsm_set_state(ioceth, bna_ioceth_sm_ready);
  1237. break;
  1238. default:
  1239. bfa_sm_fault(event);
  1240. }
  1241. }
  1242. static void
  1243. bna_ioceth_sm_ready_entry(struct bna_ioceth *ioceth)
  1244. {
  1245. bna_enet_start(&ioceth->bna->enet);
  1246. bna_stats_mod_start(&ioceth->bna->stats_mod);
  1247. bnad_cb_ioceth_ready(ioceth->bna->bnad);
  1248. }
  1249. static void
  1250. bna_ioceth_sm_ready(struct bna_ioceth *ioceth, enum bna_ioceth_event event)
  1251. {
  1252. switch (event) {
  1253. case IOCETH_E_DISABLE:
  1254. bfa_fsm_set_state(ioceth, bna_ioceth_sm_enet_stop_wait);
  1255. break;
  1256. case IOCETH_E_IOC_FAILED:
  1257. disable_mbox_intr(ioceth);
  1258. bna_enet_fail(&ioceth->bna->enet);
  1259. bna_stats_mod_fail(&ioceth->bna->stats_mod);
  1260. bfa_fsm_set_state(ioceth, bna_ioceth_sm_failed);
  1261. break;
  1262. default:
  1263. bfa_sm_fault(event);
  1264. }
  1265. }
  1266. static void
  1267. bna_ioceth_sm_last_resp_wait_entry(struct bna_ioceth *ioceth)
  1268. {
  1269. }
  1270. static void
  1271. bna_ioceth_sm_last_resp_wait(struct bna_ioceth *ioceth,
  1272. enum bna_ioceth_event event)
  1273. {
  1274. switch (event) {
  1275. case IOCETH_E_IOC_FAILED:
  1276. bfa_fsm_set_state(ioceth, bna_ioceth_sm_ioc_disable_wait);
  1277. disable_mbox_intr(ioceth);
  1278. bfa_nw_ioc_disable(&ioceth->ioc);
  1279. break;
  1280. case IOCETH_E_ENET_ATTR_RESP:
  1281. bfa_fsm_set_state(ioceth, bna_ioceth_sm_ioc_disable_wait);
  1282. bfa_nw_ioc_disable(&ioceth->ioc);
  1283. break;
  1284. default:
  1285. bfa_sm_fault(event);
  1286. }
  1287. }
  1288. static void
  1289. bna_ioceth_sm_enet_stop_wait_entry(struct bna_ioceth *ioceth)
  1290. {
  1291. bna_stats_mod_stop(&ioceth->bna->stats_mod);
  1292. bna_enet_stop(&ioceth->bna->enet);
  1293. }
  1294. static void
  1295. bna_ioceth_sm_enet_stop_wait(struct bna_ioceth *ioceth,
  1296. enum bna_ioceth_event event)
  1297. {
  1298. switch (event) {
  1299. case IOCETH_E_IOC_FAILED:
  1300. bfa_fsm_set_state(ioceth, bna_ioceth_sm_ioc_disable_wait);
  1301. disable_mbox_intr(ioceth);
  1302. bna_enet_fail(&ioceth->bna->enet);
  1303. bna_stats_mod_fail(&ioceth->bna->stats_mod);
  1304. bfa_nw_ioc_disable(&ioceth->ioc);
  1305. break;
  1306. case IOCETH_E_ENET_STOPPED:
  1307. bfa_fsm_set_state(ioceth, bna_ioceth_sm_ioc_disable_wait);
  1308. bfa_nw_ioc_disable(&ioceth->ioc);
  1309. break;
  1310. default:
  1311. bfa_sm_fault(event);
  1312. }
  1313. }
  1314. static void
  1315. bna_ioceth_sm_ioc_disable_wait_entry(struct bna_ioceth *ioceth)
  1316. {
  1317. }
  1318. static void
  1319. bna_ioceth_sm_ioc_disable_wait(struct bna_ioceth *ioceth,
  1320. enum bna_ioceth_event event)
  1321. {
  1322. switch (event) {
  1323. case IOCETH_E_IOC_DISABLED:
  1324. disable_mbox_intr(ioceth);
  1325. bfa_fsm_set_state(ioceth, bna_ioceth_sm_stopped);
  1326. break;
  1327. case IOCETH_E_ENET_STOPPED:
  1328. /* This event is received due to enet failing */
  1329. /* No-op */
  1330. break;
  1331. default:
  1332. bfa_sm_fault(event);
  1333. }
  1334. }
  1335. static void
  1336. bna_ioceth_sm_failed_entry(struct bna_ioceth *ioceth)
  1337. {
  1338. bnad_cb_ioceth_failed(ioceth->bna->bnad);
  1339. }
  1340. static void
  1341. bna_ioceth_sm_failed(struct bna_ioceth *ioceth,
  1342. enum bna_ioceth_event event)
  1343. {
  1344. switch (event) {
  1345. case IOCETH_E_DISABLE:
  1346. bfa_fsm_set_state(ioceth, bna_ioceth_sm_ioc_disable_wait);
  1347. bfa_nw_ioc_disable(&ioceth->ioc);
  1348. break;
  1349. case IOCETH_E_IOC_RESET:
  1350. enable_mbox_intr(ioceth);
  1351. bfa_fsm_set_state(ioceth, bna_ioceth_sm_ioc_ready_wait);
  1352. break;
  1353. case IOCETH_E_IOC_FAILED:
  1354. break;
  1355. default:
  1356. bfa_sm_fault(event);
  1357. }
  1358. }
  1359. static void
  1360. bna_bfi_attr_get(struct bna_ioceth *ioceth)
  1361. {
  1362. struct bfi_enet_attr_req *attr_req = &ioceth->attr_req;
  1363. bfi_msgq_mhdr_set(attr_req->mh, BFI_MC_ENET,
  1364. BFI_ENET_H2I_GET_ATTR_REQ, 0, 0);
  1365. attr_req->mh.num_entries = htons(
  1366. bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_attr_req)));
  1367. bfa_msgq_cmd_set(&ioceth->msgq_cmd, NULL, NULL,
  1368. sizeof(struct bfi_enet_attr_req), &attr_req->mh);
  1369. bfa_msgq_cmd_post(&ioceth->bna->msgq, &ioceth->msgq_cmd);
  1370. }
  1371. /* IOC callback functions */
  1372. static void
  1373. bna_cb_ioceth_enable(void *arg, enum bfa_status error)
  1374. {
  1375. struct bna_ioceth *ioceth = (struct bna_ioceth *)arg;
  1376. if (error)
  1377. bfa_fsm_send_event(ioceth, IOCETH_E_IOC_FAILED);
  1378. else
  1379. bfa_fsm_send_event(ioceth, IOCETH_E_IOC_READY);
  1380. }
  1381. static void
  1382. bna_cb_ioceth_disable(void *arg)
  1383. {
  1384. struct bna_ioceth *ioceth = (struct bna_ioceth *)arg;
  1385. bfa_fsm_send_event(ioceth, IOCETH_E_IOC_DISABLED);
  1386. }
  1387. static void
  1388. bna_cb_ioceth_hbfail(void *arg)
  1389. {
  1390. struct bna_ioceth *ioceth = (struct bna_ioceth *)arg;
  1391. bfa_fsm_send_event(ioceth, IOCETH_E_IOC_FAILED);
  1392. }
  1393. static void
  1394. bna_cb_ioceth_reset(void *arg)
  1395. {
  1396. struct bna_ioceth *ioceth = (struct bna_ioceth *)arg;
  1397. bfa_fsm_send_event(ioceth, IOCETH_E_IOC_RESET);
  1398. }
  1399. static struct bfa_ioc_cbfn bna_ioceth_cbfn = {
  1400. .enable_cbfn = bna_cb_ioceth_enable,
  1401. .disable_cbfn = bna_cb_ioceth_disable,
  1402. .hbfail_cbfn = bna_cb_ioceth_hbfail,
  1403. .reset_cbfn = bna_cb_ioceth_reset
  1404. };
  1405. static void bna_attr_init(struct bna_ioceth *ioceth)
  1406. {
  1407. ioceth->attr.num_txq = BFI_ENET_DEF_TXQ;
  1408. ioceth->attr.num_rxp = BFI_ENET_DEF_RXP;
  1409. ioceth->attr.num_ucmac = BFI_ENET_DEF_UCAM;
  1410. ioceth->attr.num_mcmac = BFI_ENET_MAX_MCAM;
  1411. ioceth->attr.max_rit_size = BFI_ENET_DEF_RITSZ;
  1412. ioceth->attr.fw_query_complete = false;
  1413. }
  1414. static void
  1415. bna_ioceth_init(struct bna_ioceth *ioceth, struct bna *bna,
  1416. struct bna_res_info *res_info)
  1417. {
  1418. u64 dma;
  1419. u8 *kva;
  1420. ioceth->bna = bna;
  1421. /**
  1422. * Attach IOC and claim:
  1423. * 1. DMA memory for IOC attributes
  1424. * 2. Kernel memory for FW trace
  1425. */
  1426. bfa_nw_ioc_attach(&ioceth->ioc, ioceth, &bna_ioceth_cbfn);
  1427. bfa_nw_ioc_pci_init(&ioceth->ioc, &bna->pcidev, BFI_PCIFN_CLASS_ETH);
  1428. BNA_GET_DMA_ADDR(
  1429. &res_info[BNA_RES_MEM_T_ATTR].res_u.mem_info.mdl[0].dma, dma);
  1430. kva = res_info[BNA_RES_MEM_T_ATTR].res_u.mem_info.mdl[0].kva;
  1431. bfa_nw_ioc_mem_claim(&ioceth->ioc, kva, dma);
  1432. kva = res_info[BNA_RES_MEM_T_FWTRC].res_u.mem_info.mdl[0].kva;
  1433. bfa_nw_ioc_debug_memclaim(&ioceth->ioc, kva);
  1434. /**
  1435. * Attach common modules (Diag, SFP, CEE, Port) and claim respective
  1436. * DMA memory.
  1437. */
  1438. BNA_GET_DMA_ADDR(
  1439. &res_info[BNA_RES_MEM_T_COM].res_u.mem_info.mdl[0].dma, dma);
  1440. kva = res_info[BNA_RES_MEM_T_COM].res_u.mem_info.mdl[0].kva;
  1441. bfa_nw_cee_attach(&bna->cee, &ioceth->ioc, bna);
  1442. bfa_nw_cee_mem_claim(&bna->cee, kva, dma);
  1443. kva += bfa_nw_cee_meminfo();
  1444. dma += bfa_nw_cee_meminfo();
  1445. bfa_nw_flash_attach(&bna->flash, &ioceth->ioc, bna);
  1446. bfa_nw_flash_memclaim(&bna->flash, kva, dma);
  1447. kva += bfa_nw_flash_meminfo();
  1448. dma += bfa_nw_flash_meminfo();
  1449. bfa_msgq_attach(&bna->msgq, &ioceth->ioc);
  1450. bfa_msgq_memclaim(&bna->msgq, kva, dma);
  1451. bfa_msgq_regisr(&bna->msgq, BFI_MC_ENET, bna_msgq_rsp_handler, bna);
  1452. kva += bfa_msgq_meminfo();
  1453. dma += bfa_msgq_meminfo();
  1454. ioceth->stop_cbfn = NULL;
  1455. ioceth->stop_cbarg = NULL;
  1456. bna_attr_init(ioceth);
  1457. bfa_fsm_set_state(ioceth, bna_ioceth_sm_stopped);
  1458. }
  1459. static void
  1460. bna_ioceth_uninit(struct bna_ioceth *ioceth)
  1461. {
  1462. bfa_nw_ioc_detach(&ioceth->ioc);
  1463. ioceth->bna = NULL;
  1464. }
  1465. void
  1466. bna_ioceth_enable(struct bna_ioceth *ioceth)
  1467. {
  1468. if (ioceth->fsm == bna_ioceth_sm_ready) {
  1469. bnad_cb_ioceth_ready(ioceth->bna->bnad);
  1470. return;
  1471. }
  1472. if (ioceth->fsm == bna_ioceth_sm_stopped)
  1473. bfa_fsm_send_event(ioceth, IOCETH_E_ENABLE);
  1474. }
  1475. void
  1476. bna_ioceth_disable(struct bna_ioceth *ioceth, enum bna_cleanup_type type)
  1477. {
  1478. if (type == BNA_SOFT_CLEANUP) {
  1479. bnad_cb_ioceth_disabled(ioceth->bna->bnad);
  1480. return;
  1481. }
  1482. ioceth->stop_cbfn = bnad_cb_ioceth_disabled;
  1483. ioceth->stop_cbarg = ioceth->bna->bnad;
  1484. bfa_fsm_send_event(ioceth, IOCETH_E_DISABLE);
  1485. }
  1486. static void
  1487. bna_ucam_mod_init(struct bna_ucam_mod *ucam_mod, struct bna *bna,
  1488. struct bna_res_info *res_info)
  1489. {
  1490. int i;
  1491. ucam_mod->ucmac = (struct bna_mac *)
  1492. res_info[BNA_MOD_RES_MEM_T_UCMAC_ARRAY].res_u.mem_info.mdl[0].kva;
  1493. INIT_LIST_HEAD(&ucam_mod->free_q);
  1494. for (i = 0; i < bna->ioceth.attr.num_ucmac; i++)
  1495. list_add_tail(&ucam_mod->ucmac[i].qe, &ucam_mod->free_q);
  1496. /* A separate queue to allow synchronous setting of a list of MACs */
  1497. INIT_LIST_HEAD(&ucam_mod->del_q);
  1498. for (; i < (bna->ioceth.attr.num_ucmac * 2); i++)
  1499. list_add_tail(&ucam_mod->ucmac[i].qe, &ucam_mod->del_q);
  1500. ucam_mod->bna = bna;
  1501. }
  1502. static void
  1503. bna_ucam_mod_uninit(struct bna_ucam_mod *ucam_mod)
  1504. {
  1505. ucam_mod->bna = NULL;
  1506. }
  1507. static void
  1508. bna_mcam_mod_init(struct bna_mcam_mod *mcam_mod, struct bna *bna,
  1509. struct bna_res_info *res_info)
  1510. {
  1511. int i;
  1512. mcam_mod->mcmac = (struct bna_mac *)
  1513. res_info[BNA_MOD_RES_MEM_T_MCMAC_ARRAY].res_u.mem_info.mdl[0].kva;
  1514. INIT_LIST_HEAD(&mcam_mod->free_q);
  1515. for (i = 0; i < bna->ioceth.attr.num_mcmac; i++)
  1516. list_add_tail(&mcam_mod->mcmac[i].qe, &mcam_mod->free_q);
  1517. mcam_mod->mchandle = (struct bna_mcam_handle *)
  1518. res_info[BNA_MOD_RES_MEM_T_MCHANDLE_ARRAY].res_u.mem_info.mdl[0].kva;
  1519. INIT_LIST_HEAD(&mcam_mod->free_handle_q);
  1520. for (i = 0; i < bna->ioceth.attr.num_mcmac; i++)
  1521. list_add_tail(&mcam_mod->mchandle[i].qe,
  1522. &mcam_mod->free_handle_q);
  1523. /* A separate queue to allow synchronous setting of a list of MACs */
  1524. INIT_LIST_HEAD(&mcam_mod->del_q);
  1525. for (; i < (bna->ioceth.attr.num_mcmac * 2); i++)
  1526. list_add_tail(&mcam_mod->mcmac[i].qe, &mcam_mod->del_q);
  1527. mcam_mod->bna = bna;
  1528. }
  1529. static void
  1530. bna_mcam_mod_uninit(struct bna_mcam_mod *mcam_mod)
  1531. {
  1532. mcam_mod->bna = NULL;
  1533. }
  1534. static void
  1535. bna_bfi_stats_get(struct bna *bna)
  1536. {
  1537. struct bfi_enet_stats_req *stats_req = &bna->stats_mod.stats_get;
  1538. bna->stats_mod.stats_get_busy = true;
  1539. bfi_msgq_mhdr_set(stats_req->mh, BFI_MC_ENET,
  1540. BFI_ENET_H2I_STATS_GET_REQ, 0, 0);
  1541. stats_req->mh.num_entries = htons(
  1542. bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_stats_req)));
  1543. stats_req->stats_mask = htons(BFI_ENET_STATS_ALL);
  1544. stats_req->tx_enet_mask = htonl(bna->tx_mod.rid_mask);
  1545. stats_req->rx_enet_mask = htonl(bna->rx_mod.rid_mask);
  1546. stats_req->host_buffer.a32.addr_hi = bna->stats.hw_stats_dma.msb;
  1547. stats_req->host_buffer.a32.addr_lo = bna->stats.hw_stats_dma.lsb;
  1548. bfa_msgq_cmd_set(&bna->stats_mod.stats_get_cmd, NULL, NULL,
  1549. sizeof(struct bfi_enet_stats_req), &stats_req->mh);
  1550. bfa_msgq_cmd_post(&bna->msgq, &bna->stats_mod.stats_get_cmd);
  1551. }
  1552. void
  1553. bna_res_req(struct bna_res_info *res_info)
  1554. {
  1555. /* DMA memory for COMMON_MODULE */
  1556. res_info[BNA_RES_MEM_T_COM].res_type = BNA_RES_T_MEM;
  1557. res_info[BNA_RES_MEM_T_COM].res_u.mem_info.mem_type = BNA_MEM_T_DMA;
  1558. res_info[BNA_RES_MEM_T_COM].res_u.mem_info.num = 1;
  1559. res_info[BNA_RES_MEM_T_COM].res_u.mem_info.len = ALIGN(
  1560. (bfa_nw_cee_meminfo() +
  1561. bfa_nw_flash_meminfo() +
  1562. bfa_msgq_meminfo()), PAGE_SIZE);
  1563. /* DMA memory for retrieving IOC attributes */
  1564. res_info[BNA_RES_MEM_T_ATTR].res_type = BNA_RES_T_MEM;
  1565. res_info[BNA_RES_MEM_T_ATTR].res_u.mem_info.mem_type = BNA_MEM_T_DMA;
  1566. res_info[BNA_RES_MEM_T_ATTR].res_u.mem_info.num = 1;
  1567. res_info[BNA_RES_MEM_T_ATTR].res_u.mem_info.len =
  1568. ALIGN(bfa_nw_ioc_meminfo(), PAGE_SIZE);
  1569. /* Virtual memory for retreiving fw_trc */
  1570. res_info[BNA_RES_MEM_T_FWTRC].res_type = BNA_RES_T_MEM;
  1571. res_info[BNA_RES_MEM_T_FWTRC].res_u.mem_info.mem_type = BNA_MEM_T_KVA;
  1572. res_info[BNA_RES_MEM_T_FWTRC].res_u.mem_info.num = 1;
  1573. res_info[BNA_RES_MEM_T_FWTRC].res_u.mem_info.len = BNA_DBG_FWTRC_LEN;
  1574. /* DMA memory for retreiving stats */
  1575. res_info[BNA_RES_MEM_T_STATS].res_type = BNA_RES_T_MEM;
  1576. res_info[BNA_RES_MEM_T_STATS].res_u.mem_info.mem_type = BNA_MEM_T_DMA;
  1577. res_info[BNA_RES_MEM_T_STATS].res_u.mem_info.num = 1;
  1578. res_info[BNA_RES_MEM_T_STATS].res_u.mem_info.len =
  1579. ALIGN(sizeof(struct bfi_enet_stats),
  1580. PAGE_SIZE);
  1581. }
  1582. void
  1583. bna_mod_res_req(struct bna *bna, struct bna_res_info *res_info)
  1584. {
  1585. struct bna_attr *attr = &bna->ioceth.attr;
  1586. /* Virtual memory for Tx objects - stored by Tx module */
  1587. res_info[BNA_MOD_RES_MEM_T_TX_ARRAY].res_type = BNA_RES_T_MEM;
  1588. res_info[BNA_MOD_RES_MEM_T_TX_ARRAY].res_u.mem_info.mem_type =
  1589. BNA_MEM_T_KVA;
  1590. res_info[BNA_MOD_RES_MEM_T_TX_ARRAY].res_u.mem_info.num = 1;
  1591. res_info[BNA_MOD_RES_MEM_T_TX_ARRAY].res_u.mem_info.len =
  1592. attr->num_txq * sizeof(struct bna_tx);
  1593. /* Virtual memory for TxQ - stored by Tx module */
  1594. res_info[BNA_MOD_RES_MEM_T_TXQ_ARRAY].res_type = BNA_RES_T_MEM;
  1595. res_info[BNA_MOD_RES_MEM_T_TXQ_ARRAY].res_u.mem_info.mem_type =
  1596. BNA_MEM_T_KVA;
  1597. res_info[BNA_MOD_RES_MEM_T_TXQ_ARRAY].res_u.mem_info.num = 1;
  1598. res_info[BNA_MOD_RES_MEM_T_TXQ_ARRAY].res_u.mem_info.len =
  1599. attr->num_txq * sizeof(struct bna_txq);
  1600. /* Virtual memory for Rx objects - stored by Rx module */
  1601. res_info[BNA_MOD_RES_MEM_T_RX_ARRAY].res_type = BNA_RES_T_MEM;
  1602. res_info[BNA_MOD_RES_MEM_T_RX_ARRAY].res_u.mem_info.mem_type =
  1603. BNA_MEM_T_KVA;
  1604. res_info[BNA_MOD_RES_MEM_T_RX_ARRAY].res_u.mem_info.num = 1;
  1605. res_info[BNA_MOD_RES_MEM_T_RX_ARRAY].res_u.mem_info.len =
  1606. attr->num_rxp * sizeof(struct bna_rx);
  1607. /* Virtual memory for RxPath - stored by Rx module */
  1608. res_info[BNA_MOD_RES_MEM_T_RXP_ARRAY].res_type = BNA_RES_T_MEM;
  1609. res_info[BNA_MOD_RES_MEM_T_RXP_ARRAY].res_u.mem_info.mem_type =
  1610. BNA_MEM_T_KVA;
  1611. res_info[BNA_MOD_RES_MEM_T_RXP_ARRAY].res_u.mem_info.num = 1;
  1612. res_info[BNA_MOD_RES_MEM_T_RXP_ARRAY].res_u.mem_info.len =
  1613. attr->num_rxp * sizeof(struct bna_rxp);
  1614. /* Virtual memory for RxQ - stored by Rx module */
  1615. res_info[BNA_MOD_RES_MEM_T_RXQ_ARRAY].res_type = BNA_RES_T_MEM;
  1616. res_info[BNA_MOD_RES_MEM_T_RXQ_ARRAY].res_u.mem_info.mem_type =
  1617. BNA_MEM_T_KVA;
  1618. res_info[BNA_MOD_RES_MEM_T_RXQ_ARRAY].res_u.mem_info.num = 1;
  1619. res_info[BNA_MOD_RES_MEM_T_RXQ_ARRAY].res_u.mem_info.len =
  1620. (attr->num_rxp * 2) * sizeof(struct bna_rxq);
  1621. /* Virtual memory for Unicast MAC address - stored by ucam module */
  1622. res_info[BNA_MOD_RES_MEM_T_UCMAC_ARRAY].res_type = BNA_RES_T_MEM;
  1623. res_info[BNA_MOD_RES_MEM_T_UCMAC_ARRAY].res_u.mem_info.mem_type =
  1624. BNA_MEM_T_KVA;
  1625. res_info[BNA_MOD_RES_MEM_T_UCMAC_ARRAY].res_u.mem_info.num = 1;
  1626. res_info[BNA_MOD_RES_MEM_T_UCMAC_ARRAY].res_u.mem_info.len =
  1627. (attr->num_ucmac * 2) * sizeof(struct bna_mac);
  1628. /* Virtual memory for Multicast MAC address - stored by mcam module */
  1629. res_info[BNA_MOD_RES_MEM_T_MCMAC_ARRAY].res_type = BNA_RES_T_MEM;
  1630. res_info[BNA_MOD_RES_MEM_T_MCMAC_ARRAY].res_u.mem_info.mem_type =
  1631. BNA_MEM_T_KVA;
  1632. res_info[BNA_MOD_RES_MEM_T_MCMAC_ARRAY].res_u.mem_info.num = 1;
  1633. res_info[BNA_MOD_RES_MEM_T_MCMAC_ARRAY].res_u.mem_info.len =
  1634. (attr->num_mcmac * 2) * sizeof(struct bna_mac);
  1635. /* Virtual memory for Multicast handle - stored by mcam module */
  1636. res_info[BNA_MOD_RES_MEM_T_MCHANDLE_ARRAY].res_type = BNA_RES_T_MEM;
  1637. res_info[BNA_MOD_RES_MEM_T_MCHANDLE_ARRAY].res_u.mem_info.mem_type =
  1638. BNA_MEM_T_KVA;
  1639. res_info[BNA_MOD_RES_MEM_T_MCHANDLE_ARRAY].res_u.mem_info.num = 1;
  1640. res_info[BNA_MOD_RES_MEM_T_MCHANDLE_ARRAY].res_u.mem_info.len =
  1641. attr->num_mcmac * sizeof(struct bna_mcam_handle);
  1642. }
  1643. void
  1644. bna_init(struct bna *bna, struct bnad *bnad,
  1645. struct bfa_pcidev *pcidev, struct bna_res_info *res_info)
  1646. {
  1647. bna->bnad = bnad;
  1648. bna->pcidev = *pcidev;
  1649. bna->stats.hw_stats_kva = (struct bfi_enet_stats *)
  1650. res_info[BNA_RES_MEM_T_STATS].res_u.mem_info.mdl[0].kva;
  1651. bna->stats.hw_stats_dma.msb =
  1652. res_info[BNA_RES_MEM_T_STATS].res_u.mem_info.mdl[0].dma.msb;
  1653. bna->stats.hw_stats_dma.lsb =
  1654. res_info[BNA_RES_MEM_T_STATS].res_u.mem_info.mdl[0].dma.lsb;
  1655. bna_reg_addr_init(bna, &bna->pcidev);
  1656. /* Also initializes diag, cee, sfp, phy_port, msgq */
  1657. bna_ioceth_init(&bna->ioceth, bna, res_info);
  1658. bna_enet_init(&bna->enet, bna);
  1659. bna_ethport_init(&bna->ethport, bna);
  1660. }
  1661. void
  1662. bna_mod_init(struct bna *bna, struct bna_res_info *res_info)
  1663. {
  1664. bna_tx_mod_init(&bna->tx_mod, bna, res_info);
  1665. bna_rx_mod_init(&bna->rx_mod, bna, res_info);
  1666. bna_ucam_mod_init(&bna->ucam_mod, bna, res_info);
  1667. bna_mcam_mod_init(&bna->mcam_mod, bna, res_info);
  1668. bna->default_mode_rid = BFI_INVALID_RID;
  1669. bna->promisc_rid = BFI_INVALID_RID;
  1670. bna->mod_flags |= BNA_MOD_F_INIT_DONE;
  1671. }
  1672. void
  1673. bna_uninit(struct bna *bna)
  1674. {
  1675. if (bna->mod_flags & BNA_MOD_F_INIT_DONE) {
  1676. bna_mcam_mod_uninit(&bna->mcam_mod);
  1677. bna_ucam_mod_uninit(&bna->ucam_mod);
  1678. bna_rx_mod_uninit(&bna->rx_mod);
  1679. bna_tx_mod_uninit(&bna->tx_mod);
  1680. bna->mod_flags &= ~BNA_MOD_F_INIT_DONE;
  1681. }
  1682. bna_stats_mod_uninit(&bna->stats_mod);
  1683. bna_ethport_uninit(&bna->ethport);
  1684. bna_enet_uninit(&bna->enet);
  1685. bna_ioceth_uninit(&bna->ioceth);
  1686. bna->bnad = NULL;
  1687. }
  1688. int
  1689. bna_num_txq_set(struct bna *bna, int num_txq)
  1690. {
  1691. if (bna->ioceth.attr.fw_query_complete &&
  1692. (num_txq <= bna->ioceth.attr.num_txq)) {
  1693. bna->ioceth.attr.num_txq = num_txq;
  1694. return BNA_CB_SUCCESS;
  1695. }
  1696. return BNA_CB_FAIL;
  1697. }
  1698. int
  1699. bna_num_rxp_set(struct bna *bna, int num_rxp)
  1700. {
  1701. if (bna->ioceth.attr.fw_query_complete &&
  1702. (num_rxp <= bna->ioceth.attr.num_rxp)) {
  1703. bna->ioceth.attr.num_rxp = num_rxp;
  1704. return BNA_CB_SUCCESS;
  1705. }
  1706. return BNA_CB_FAIL;
  1707. }
  1708. struct bna_mac *
  1709. bna_cam_mod_mac_get(struct list_head *head)
  1710. {
  1711. struct bna_mac *mac;
  1712. mac = list_first_entry_or_null(head, struct bna_mac, qe);
  1713. if (mac)
  1714. list_del(&mac->qe);
  1715. return mac;
  1716. }
  1717. struct bna_mcam_handle *
  1718. bna_mcam_mod_handle_get(struct bna_mcam_mod *mcam_mod)
  1719. {
  1720. struct bna_mcam_handle *handle;
  1721. handle = list_first_entry_or_null(&mcam_mod->free_handle_q,
  1722. struct bna_mcam_handle, qe);
  1723. if (handle)
  1724. list_del(&handle->qe);
  1725. return handle;
  1726. }
  1727. void
  1728. bna_mcam_mod_handle_put(struct bna_mcam_mod *mcam_mod,
  1729. struct bna_mcam_handle *handle)
  1730. {
  1731. list_add_tail(&handle->qe, &mcam_mod->free_handle_q);
  1732. }
  1733. void
  1734. bna_hw_stats_get(struct bna *bna)
  1735. {
  1736. if (!bna->stats_mod.ioc_ready) {
  1737. bnad_cb_stats_get(bna->bnad, BNA_CB_FAIL, &bna->stats);
  1738. return;
  1739. }
  1740. if (bna->stats_mod.stats_get_busy) {
  1741. bnad_cb_stats_get(bna->bnad, BNA_CB_BUSY, &bna->stats);
  1742. return;
  1743. }
  1744. bna_bfi_stats_get(bna);
  1745. }