enic_res.c 8.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
  4. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  5. */
  6. #include <linux/kernel.h>
  7. #include <linux/errno.h>
  8. #include <linux/types.h>
  9. #include <linux/pci.h>
  10. #include <linux/netdevice.h>
  11. #include "wq_enet_desc.h"
  12. #include "rq_enet_desc.h"
  13. #include "cq_enet_desc.h"
  14. #include "vnic_resource.h"
  15. #include "vnic_enet.h"
  16. #include "vnic_dev.h"
  17. #include "vnic_wq.h"
  18. #include "vnic_rq.h"
  19. #include "vnic_cq.h"
  20. #include "vnic_intr.h"
  21. #include "vnic_stats.h"
  22. #include "vnic_nic.h"
  23. #include "vnic_rss.h"
  24. #include "enic_res.h"
  25. #include "enic.h"
  26. int enic_get_vnic_config(struct enic *enic)
  27. {
  28. struct vnic_enet_config *c = &enic->config;
  29. int err;
  30. err = vnic_dev_get_mac_addr(enic->vdev, enic->mac_addr);
  31. if (err) {
  32. dev_err(enic_get_dev(enic),
  33. "Error getting MAC addr, %d\n", err);
  34. return err;
  35. }
  36. #define GET_CONFIG(m) \
  37. do { \
  38. err = vnic_dev_spec(enic->vdev, \
  39. offsetof(struct vnic_enet_config, m), \
  40. sizeof(c->m), &c->m); \
  41. if (err) { \
  42. dev_err(enic_get_dev(enic), \
  43. "Error getting %s, %d\n", #m, err); \
  44. return err; \
  45. } \
  46. } while (0)
  47. GET_CONFIG(flags);
  48. GET_CONFIG(wq_desc_count);
  49. GET_CONFIG(rq_desc_count);
  50. GET_CONFIG(mtu);
  51. GET_CONFIG(intr_timer_type);
  52. GET_CONFIG(intr_mode);
  53. GET_CONFIG(intr_timer_usec);
  54. GET_CONFIG(loop_tag);
  55. GET_CONFIG(num_arfs);
  56. c->wq_desc_count =
  57. min_t(u32, ENIC_MAX_WQ_DESCS,
  58. max_t(u32, ENIC_MIN_WQ_DESCS,
  59. c->wq_desc_count));
  60. c->wq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
  61. c->rq_desc_count =
  62. min_t(u32, ENIC_MAX_RQ_DESCS,
  63. max_t(u32, ENIC_MIN_RQ_DESCS,
  64. c->rq_desc_count));
  65. c->rq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
  66. if (c->mtu == 0)
  67. c->mtu = 1500;
  68. c->mtu = min_t(u16, ENIC_MAX_MTU,
  69. max_t(u16, ENIC_MIN_MTU,
  70. c->mtu));
  71. c->intr_timer_usec = min_t(u32, c->intr_timer_usec,
  72. vnic_dev_get_intr_coal_timer_max(enic->vdev));
  73. dev_info(enic_get_dev(enic),
  74. "vNIC MAC addr %pM wq/rq %d/%d mtu %d\n",
  75. enic->mac_addr, c->wq_desc_count, c->rq_desc_count, c->mtu);
  76. dev_info(enic_get_dev(enic), "vNIC csum tx/rx %s/%s "
  77. "tso/lro %s/%s rss %s intr mode %s type %s timer %d usec "
  78. "loopback tag 0x%04x\n",
  79. ENIC_SETTING(enic, TXCSUM) ? "yes" : "no",
  80. ENIC_SETTING(enic, RXCSUM) ? "yes" : "no",
  81. ENIC_SETTING(enic, TSO) ? "yes" : "no",
  82. ENIC_SETTING(enic, LRO) ? "yes" : "no",
  83. ENIC_SETTING(enic, RSS) ? "yes" : "no",
  84. c->intr_mode == VENET_INTR_MODE_INTX ? "INTx" :
  85. c->intr_mode == VENET_INTR_MODE_MSI ? "MSI" :
  86. c->intr_mode == VENET_INTR_MODE_ANY ? "any" :
  87. "unknown",
  88. c->intr_timer_type == VENET_INTR_TYPE_MIN ? "min" :
  89. c->intr_timer_type == VENET_INTR_TYPE_IDLE ? "idle" :
  90. "unknown",
  91. c->intr_timer_usec,
  92. c->loop_tag);
  93. return 0;
  94. }
  95. int enic_add_vlan(struct enic *enic, u16 vlanid)
  96. {
  97. u64 a0 = vlanid, a1 = 0;
  98. int wait = 1000;
  99. int err;
  100. err = vnic_dev_cmd(enic->vdev, CMD_VLAN_ADD, &a0, &a1, wait);
  101. if (err)
  102. dev_err(enic_get_dev(enic), "Can't add vlan id, %d\n", err);
  103. return err;
  104. }
  105. int enic_del_vlan(struct enic *enic, u16 vlanid)
  106. {
  107. u64 a0 = vlanid, a1 = 0;
  108. int wait = 1000;
  109. int err;
  110. err = vnic_dev_cmd(enic->vdev, CMD_VLAN_DEL, &a0, &a1, wait);
  111. if (err)
  112. dev_err(enic_get_dev(enic), "Can't delete vlan id, %d\n", err);
  113. return err;
  114. }
  115. int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type,
  116. u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en,
  117. u8 ig_vlan_strip_en)
  118. {
  119. enum vnic_devcmd_cmd cmd = CMD_NIC_CFG;
  120. u64 a0, a1;
  121. u32 nic_cfg;
  122. int wait = 1000;
  123. vnic_set_nic_cfg(&nic_cfg, rss_default_cpu,
  124. rss_hash_type, rss_hash_bits, rss_base_cpu,
  125. rss_enable, tso_ipid_split_en, ig_vlan_strip_en);
  126. a0 = nic_cfg;
  127. a1 = 0;
  128. if (rss_hash_type & (NIC_CFG_RSS_HASH_TYPE_UDP_IPV4 |
  129. NIC_CFG_RSS_HASH_TYPE_UDP_IPV6))
  130. cmd = CMD_NIC_CFG_CHK;
  131. return vnic_dev_cmd(enic->vdev, cmd, &a0, &a1, wait);
  132. }
  133. int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len)
  134. {
  135. u64 a0 = (u64)key_pa, a1 = len;
  136. int wait = 1000;
  137. return vnic_dev_cmd(enic->vdev, CMD_RSS_KEY, &a0, &a1, wait);
  138. }
  139. int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, u64 len)
  140. {
  141. u64 a0 = (u64)cpu_pa, a1 = len;
  142. int wait = 1000;
  143. return vnic_dev_cmd(enic->vdev, CMD_RSS_CPU, &a0, &a1, wait);
  144. }
  145. void enic_free_vnic_resources(struct enic *enic)
  146. {
  147. unsigned int i;
  148. for (i = 0; i < enic->wq_count; i++)
  149. vnic_wq_free(&enic->wq[i]);
  150. for (i = 0; i < enic->rq_count; i++)
  151. vnic_rq_free(&enic->rq[i]);
  152. for (i = 0; i < enic->cq_count; i++)
  153. vnic_cq_free(&enic->cq[i]);
  154. for (i = 0; i < enic->intr_count; i++)
  155. vnic_intr_free(&enic->intr[i]);
  156. }
  157. void enic_get_res_counts(struct enic *enic)
  158. {
  159. enic->wq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ);
  160. enic->rq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_RQ);
  161. enic->cq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_CQ);
  162. enic->intr_count = vnic_dev_get_res_count(enic->vdev,
  163. RES_TYPE_INTR_CTRL);
  164. dev_info(enic_get_dev(enic),
  165. "vNIC resources avail: wq %d rq %d cq %d intr %d\n",
  166. enic->wq_count, enic->rq_count,
  167. enic->cq_count, enic->intr_count);
  168. }
  169. void enic_init_vnic_resources(struct enic *enic)
  170. {
  171. enum vnic_dev_intr_mode intr_mode;
  172. unsigned int mask_on_assertion;
  173. unsigned int interrupt_offset;
  174. unsigned int error_interrupt_enable;
  175. unsigned int error_interrupt_offset;
  176. unsigned int cq_index;
  177. unsigned int i;
  178. intr_mode = vnic_dev_get_intr_mode(enic->vdev);
  179. /* Init RQ/WQ resources.
  180. *
  181. * RQ[0 - n-1] point to CQ[0 - n-1]
  182. * WQ[0 - m-1] point to CQ[n - n+m-1]
  183. *
  184. * Error interrupt is not enabled for MSI.
  185. */
  186. switch (intr_mode) {
  187. case VNIC_DEV_INTR_MODE_INTX:
  188. case VNIC_DEV_INTR_MODE_MSIX:
  189. error_interrupt_enable = 1;
  190. error_interrupt_offset = enic->intr_count - 2;
  191. break;
  192. default:
  193. error_interrupt_enable = 0;
  194. error_interrupt_offset = 0;
  195. break;
  196. }
  197. for (i = 0; i < enic->rq_count; i++) {
  198. cq_index = i;
  199. vnic_rq_init(&enic->rq[i],
  200. cq_index,
  201. error_interrupt_enable,
  202. error_interrupt_offset);
  203. }
  204. for (i = 0; i < enic->wq_count; i++) {
  205. cq_index = enic->rq_count + i;
  206. vnic_wq_init(&enic->wq[i],
  207. cq_index,
  208. error_interrupt_enable,
  209. error_interrupt_offset);
  210. }
  211. /* Init CQ resources
  212. *
  213. * CQ[0 - n+m-1] point to INTR[0] for INTx, MSI
  214. * CQ[0 - n+m-1] point to INTR[0 - n+m-1] for MSI-X
  215. */
  216. for (i = 0; i < enic->cq_count; i++) {
  217. switch (intr_mode) {
  218. case VNIC_DEV_INTR_MODE_MSIX:
  219. interrupt_offset = i;
  220. break;
  221. default:
  222. interrupt_offset = 0;
  223. break;
  224. }
  225. vnic_cq_init(&enic->cq[i],
  226. 0 /* flow_control_enable */,
  227. 1 /* color_enable */,
  228. 0 /* cq_head */,
  229. 0 /* cq_tail */,
  230. 1 /* cq_tail_color */,
  231. 1 /* interrupt_enable */,
  232. 1 /* cq_entry_enable */,
  233. 0 /* cq_message_enable */,
  234. interrupt_offset,
  235. 0 /* cq_message_addr */);
  236. }
  237. /* Init INTR resources
  238. *
  239. * mask_on_assertion is not used for INTx due to the level-
  240. * triggered nature of INTx
  241. */
  242. switch (intr_mode) {
  243. case VNIC_DEV_INTR_MODE_MSI:
  244. case VNIC_DEV_INTR_MODE_MSIX:
  245. mask_on_assertion = 1;
  246. break;
  247. default:
  248. mask_on_assertion = 0;
  249. break;
  250. }
  251. for (i = 0; i < enic->intr_count; i++) {
  252. vnic_intr_init(&enic->intr[i],
  253. enic->config.intr_timer_usec,
  254. enic->config.intr_timer_type,
  255. mask_on_assertion);
  256. }
  257. }
  258. int enic_alloc_vnic_resources(struct enic *enic)
  259. {
  260. enum vnic_dev_intr_mode intr_mode;
  261. unsigned int i;
  262. int err;
  263. intr_mode = vnic_dev_get_intr_mode(enic->vdev);
  264. dev_info(enic_get_dev(enic), "vNIC resources used: "
  265. "wq %d rq %d cq %d intr %d intr mode %s\n",
  266. enic->wq_count, enic->rq_count,
  267. enic->cq_count, enic->intr_count,
  268. intr_mode == VNIC_DEV_INTR_MODE_INTX ? "legacy PCI INTx" :
  269. intr_mode == VNIC_DEV_INTR_MODE_MSI ? "MSI" :
  270. intr_mode == VNIC_DEV_INTR_MODE_MSIX ? "MSI-X" :
  271. "unknown");
  272. /* Allocate queue resources
  273. */
  274. for (i = 0; i < enic->wq_count; i++) {
  275. err = vnic_wq_alloc(enic->vdev, &enic->wq[i], i,
  276. enic->config.wq_desc_count,
  277. sizeof(struct wq_enet_desc));
  278. if (err)
  279. goto err_out_cleanup;
  280. }
  281. for (i = 0; i < enic->rq_count; i++) {
  282. err = vnic_rq_alloc(enic->vdev, &enic->rq[i], i,
  283. enic->config.rq_desc_count,
  284. sizeof(struct rq_enet_desc));
  285. if (err)
  286. goto err_out_cleanup;
  287. }
  288. for (i = 0; i < enic->cq_count; i++) {
  289. if (i < enic->rq_count)
  290. err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
  291. enic->config.rq_desc_count,
  292. sizeof(struct cq_enet_rq_desc));
  293. else
  294. err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
  295. enic->config.wq_desc_count,
  296. sizeof(struct cq_enet_wq_desc));
  297. if (err)
  298. goto err_out_cleanup;
  299. }
  300. for (i = 0; i < enic->intr_count; i++) {
  301. err = vnic_intr_alloc(enic->vdev, &enic->intr[i], i);
  302. if (err)
  303. goto err_out_cleanup;
  304. }
  305. /* Hook remaining resource
  306. */
  307. enic->legacy_pba = vnic_dev_get_res(enic->vdev,
  308. RES_TYPE_INTR_PBA_LEGACY, 0);
  309. if (!enic->legacy_pba && intr_mode == VNIC_DEV_INTR_MODE_INTX) {
  310. dev_err(enic_get_dev(enic),
  311. "Failed to hook legacy pba resource\n");
  312. err = -ENODEV;
  313. goto err_out_cleanup;
  314. }
  315. return 0;
  316. err_out_cleanup:
  317. enic_free_vnic_resources(enic);
  318. return err;
  319. }