hinic_devlink.c 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Huawei HiNIC PCI Express Linux driver
  3. * Copyright(c) 2017 Huawei Technologies Co., Ltd
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. *
  14. */
  15. #include <linux/netlink.h>
  16. #include <net/devlink.h>
  17. #include <linux/firmware.h>
  18. #include "hinic_port.h"
  19. #include "hinic_devlink.h"
  20. #include "hinic_hw_dev.h"
  21. static bool check_image_valid(struct hinic_devlink_priv *priv, const u8 *buf,
  22. u32 image_size, struct host_image_st *host_image)
  23. {
  24. struct fw_image_st *fw_image = NULL;
  25. u32 len = 0;
  26. u32 i;
  27. fw_image = (struct fw_image_st *)buf;
  28. if (fw_image->fw_magic != HINIC_MAGIC_NUM) {
  29. dev_err(&priv->hwdev->hwif->pdev->dev, "Wrong fw_magic read from file, fw_magic: 0x%x\n",
  30. fw_image->fw_magic);
  31. return false;
  32. }
  33. if (fw_image->fw_info.fw_section_cnt > MAX_FW_TYPE_NUM) {
  34. dev_err(&priv->hwdev->hwif->pdev->dev, "Wrong fw_type_num read from file, fw_type_num: 0x%x\n",
  35. fw_image->fw_info.fw_section_cnt);
  36. return false;
  37. }
  38. for (i = 0; i < fw_image->fw_info.fw_section_cnt; i++) {
  39. len += fw_image->fw_section_info[i].fw_section_len;
  40. host_image->image_section_info[i] = fw_image->fw_section_info[i];
  41. }
  42. if (len != fw_image->fw_len ||
  43. (fw_image->fw_len + UPDATEFW_IMAGE_HEAD_SIZE) != image_size) {
  44. dev_err(&priv->hwdev->hwif->pdev->dev, "Wrong data size read from file\n");
  45. return false;
  46. }
  47. host_image->image_info.up_total_len = fw_image->fw_len;
  48. host_image->image_info.fw_version = fw_image->fw_version;
  49. host_image->section_type_num = fw_image->fw_info.fw_section_cnt;
  50. host_image->device_id = fw_image->device_id;
  51. return true;
  52. }
  53. static bool check_image_integrity(struct hinic_devlink_priv *priv,
  54. struct host_image_st *host_image,
  55. u32 update_type)
  56. {
  57. u32 collect_section_type = 0;
  58. u32 i, type;
  59. for (i = 0; i < host_image->section_type_num; i++) {
  60. type = host_image->image_section_info[i].fw_section_type;
  61. if (collect_section_type & (1U << type)) {
  62. dev_err(&priv->hwdev->hwif->pdev->dev, "Duplicate section type: %u\n",
  63. type);
  64. return false;
  65. }
  66. collect_section_type |= (1U << type);
  67. }
  68. if (update_type == FW_UPDATE_COLD &&
  69. (((collect_section_type & _IMAGE_COLD_SUB_MODULES_MUST_IN) ==
  70. _IMAGE_COLD_SUB_MODULES_MUST_IN) ||
  71. collect_section_type == _IMAGE_CFG_SUB_MODULES_MUST_IN))
  72. return true;
  73. if (update_type == FW_UPDATE_HOT &&
  74. (collect_section_type & _IMAGE_HOT_SUB_MODULES_MUST_IN) ==
  75. _IMAGE_HOT_SUB_MODULES_MUST_IN)
  76. return true;
  77. if (update_type == FW_UPDATE_COLD)
  78. dev_err(&priv->hwdev->hwif->pdev->dev, "Check file integrity failed, valid: 0x%x or 0x%lx, current: 0x%x\n",
  79. _IMAGE_COLD_SUB_MODULES_MUST_IN,
  80. _IMAGE_CFG_SUB_MODULES_MUST_IN, collect_section_type);
  81. else
  82. dev_err(&priv->hwdev->hwif->pdev->dev, "Check file integrity failed, valid:0x%x, current: 0x%x\n",
  83. _IMAGE_HOT_SUB_MODULES_MUST_IN, collect_section_type);
  84. return false;
  85. }
  86. static int check_image_device_type(struct hinic_devlink_priv *priv,
  87. u32 image_device_type)
  88. {
  89. struct hinic_comm_board_info board_info = {0};
  90. if (hinic_get_board_info(priv->hwdev, &board_info)) {
  91. dev_err(&priv->hwdev->hwif->pdev->dev, "Get board info failed\n");
  92. return false;
  93. }
  94. if (image_device_type == board_info.info.board_type)
  95. return true;
  96. dev_err(&priv->hwdev->hwif->pdev->dev, "The device type of upgrade file doesn't match the device type of current firmware, please check the upgrade file\n");
  97. dev_err(&priv->hwdev->hwif->pdev->dev, "The image device type: 0x%x, firmware device type: 0x%x\n",
  98. image_device_type, board_info.info.board_type);
  99. return false;
  100. }
  101. static int hinic_flash_fw(struct hinic_devlink_priv *priv, const u8 *data,
  102. struct host_image_st *host_image)
  103. {
  104. u32 section_remain_send_len, send_fragment_len, send_pos, up_total_len;
  105. struct hinic_cmd_update_fw *fw_update_msg = NULL;
  106. u32 section_type, section_crc, section_version;
  107. u32 i, len, section_len, section_offset;
  108. u16 out_size = sizeof(*fw_update_msg);
  109. int total_len_flag = 0;
  110. int err;
  111. fw_update_msg = kzalloc(sizeof(*fw_update_msg), GFP_KERNEL);
  112. if (!fw_update_msg)
  113. return -ENOMEM;
  114. up_total_len = host_image->image_info.up_total_len;
  115. for (i = 0; i < host_image->section_type_num; i++) {
  116. len = host_image->image_section_info[i].fw_section_len;
  117. if (host_image->image_section_info[i].fw_section_type ==
  118. UP_FW_UPDATE_BOOT) {
  119. up_total_len = up_total_len - len;
  120. break;
  121. }
  122. }
  123. for (i = 0; i < host_image->section_type_num; i++) {
  124. section_len =
  125. host_image->image_section_info[i].fw_section_len;
  126. section_offset =
  127. host_image->image_section_info[i].fw_section_offset;
  128. section_remain_send_len = section_len;
  129. section_type =
  130. host_image->image_section_info[i].fw_section_type;
  131. section_crc = host_image->image_section_info[i].fw_section_crc;
  132. section_version =
  133. host_image->image_section_info[i].fw_section_version;
  134. if (section_type == UP_FW_UPDATE_BOOT)
  135. continue;
  136. send_fragment_len = 0;
  137. send_pos = 0;
  138. while (section_remain_send_len > 0) {
  139. if (!total_len_flag) {
  140. fw_update_msg->total_len = up_total_len;
  141. total_len_flag = 1;
  142. } else {
  143. fw_update_msg->total_len = 0;
  144. }
  145. memset(fw_update_msg->data, 0, MAX_FW_FRAGMENT_LEN);
  146. fw_update_msg->ctl_info.SF =
  147. (section_remain_send_len == section_len) ?
  148. true : false;
  149. fw_update_msg->section_info.FW_section_CRC = section_crc;
  150. fw_update_msg->fw_section_version = section_version;
  151. fw_update_msg->ctl_info.flag = UP_TYPE_A;
  152. if (section_type <= UP_FW_UPDATE_UP_DATA_B) {
  153. fw_update_msg->section_info.FW_section_type =
  154. (section_type % 2) ?
  155. UP_FW_UPDATE_UP_DATA :
  156. UP_FW_UPDATE_UP_TEXT;
  157. fw_update_msg->ctl_info.flag = UP_TYPE_B;
  158. if (section_type <= UP_FW_UPDATE_UP_DATA_A)
  159. fw_update_msg->ctl_info.flag = UP_TYPE_A;
  160. } else {
  161. fw_update_msg->section_info.FW_section_type =
  162. section_type - 0x2;
  163. }
  164. fw_update_msg->setion_total_len = section_len;
  165. fw_update_msg->section_offset = send_pos;
  166. if (section_remain_send_len <= MAX_FW_FRAGMENT_LEN) {
  167. fw_update_msg->ctl_info.SL = true;
  168. fw_update_msg->ctl_info.fragment_len =
  169. section_remain_send_len;
  170. send_fragment_len += section_remain_send_len;
  171. } else {
  172. fw_update_msg->ctl_info.SL = false;
  173. fw_update_msg->ctl_info.fragment_len =
  174. MAX_FW_FRAGMENT_LEN;
  175. send_fragment_len += MAX_FW_FRAGMENT_LEN;
  176. }
  177. memcpy(fw_update_msg->data,
  178. data + UPDATEFW_IMAGE_HEAD_SIZE +
  179. section_offset + send_pos,
  180. fw_update_msg->ctl_info.fragment_len);
  181. err = hinic_port_msg_cmd(priv->hwdev,
  182. HINIC_PORT_CMD_UPDATE_FW,
  183. fw_update_msg,
  184. sizeof(*fw_update_msg),
  185. fw_update_msg, &out_size);
  186. if (err || !out_size || fw_update_msg->status) {
  187. dev_err(&priv->hwdev->hwif->pdev->dev, "Failed to update firmware, err: %d, status: 0x%x, out size: 0x%x\n",
  188. err, fw_update_msg->status, out_size);
  189. err = fw_update_msg->status ?
  190. fw_update_msg->status : -EIO;
  191. kfree(fw_update_msg);
  192. return err;
  193. }
  194. send_pos = send_fragment_len;
  195. section_remain_send_len = section_len -
  196. send_fragment_len;
  197. }
  198. }
  199. kfree(fw_update_msg);
  200. return 0;
  201. }
  202. static int hinic_firmware_update(struct hinic_devlink_priv *priv,
  203. const struct firmware *fw,
  204. struct netlink_ext_ack *extack)
  205. {
  206. struct host_image_st host_image;
  207. int err;
  208. memset(&host_image, 0, sizeof(struct host_image_st));
  209. if (!check_image_valid(priv, fw->data, fw->size, &host_image) ||
  210. !check_image_integrity(priv, &host_image, FW_UPDATE_COLD) ||
  211. !check_image_device_type(priv, host_image.device_id)) {
  212. NL_SET_ERR_MSG_MOD(extack, "Check image failed");
  213. return -EINVAL;
  214. }
  215. dev_info(&priv->hwdev->hwif->pdev->dev, "Flash firmware begin\n");
  216. err = hinic_flash_fw(priv, fw->data, &host_image);
  217. if (err) {
  218. if (err == HINIC_FW_DISMATCH_ERROR) {
  219. dev_err(&priv->hwdev->hwif->pdev->dev, "Firmware image doesn't match this card, please use newer image, err: %d\n",
  220. err);
  221. NL_SET_ERR_MSG_MOD(extack,
  222. "Firmware image doesn't match this card, please use newer image");
  223. } else {
  224. dev_err(&priv->hwdev->hwif->pdev->dev, "Send firmware image data failed, err: %d\n",
  225. err);
  226. NL_SET_ERR_MSG_MOD(extack, "Send firmware image data failed");
  227. }
  228. return err;
  229. }
  230. dev_info(&priv->hwdev->hwif->pdev->dev, "Flash firmware end\n");
  231. return 0;
  232. }
  233. static int hinic_devlink_flash_update(struct devlink *devlink,
  234. struct devlink_flash_update_params *params,
  235. struct netlink_ext_ack *extack)
  236. {
  237. struct hinic_devlink_priv *priv = devlink_priv(devlink);
  238. return hinic_firmware_update(priv, params->fw, extack);
  239. }
  240. static const struct devlink_ops hinic_devlink_ops = {
  241. .flash_update = hinic_devlink_flash_update,
  242. };
  243. struct devlink *hinic_devlink_alloc(struct device *dev)
  244. {
  245. return devlink_alloc(&hinic_devlink_ops, sizeof(struct hinic_dev), dev);
  246. }
  247. void hinic_devlink_free(struct devlink *devlink)
  248. {
  249. devlink_free(devlink);
  250. }
  251. void hinic_devlink_register(struct hinic_devlink_priv *priv)
  252. {
  253. struct devlink *devlink = priv_to_devlink(priv);
  254. devlink_register(devlink);
  255. }
  256. void hinic_devlink_unregister(struct hinic_devlink_priv *priv)
  257. {
  258. struct devlink *devlink = priv_to_devlink(priv);
  259. devlink_unregister(devlink);
  260. }
  261. static void chip_fault_show(struct devlink_fmsg *fmsg,
  262. struct hinic_fault_event *event)
  263. {
  264. const char * const level_str[FAULT_LEVEL_MAX + 1] = {
  265. "fatal", "reset", "flr", "general", "suggestion", "Unknown"};
  266. u8 fault_level;
  267. fault_level = (event->event.chip.err_level < FAULT_LEVEL_MAX) ?
  268. event->event.chip.err_level : FAULT_LEVEL_MAX;
  269. if (fault_level == FAULT_LEVEL_SERIOUS_FLR)
  270. devlink_fmsg_u32_pair_put(fmsg, "Function level err func_id",
  271. (u32)event->event.chip.func_id);
  272. devlink_fmsg_u8_pair_put(fmsg, "module_id", event->event.chip.node_id);
  273. devlink_fmsg_u32_pair_put(fmsg, "err_type", (u32)event->event.chip.err_type);
  274. devlink_fmsg_string_pair_put(fmsg, "err_level", level_str[fault_level]);
  275. devlink_fmsg_u32_pair_put(fmsg, "err_csr_addr",
  276. event->event.chip.err_csr_addr);
  277. devlink_fmsg_u32_pair_put(fmsg, "err_csr_value",
  278. event->event.chip.err_csr_value);
  279. }
  280. static void fault_report_show(struct devlink_fmsg *fmsg,
  281. struct hinic_fault_event *event)
  282. {
  283. const char * const type_str[FAULT_TYPE_MAX + 1] = {
  284. "chip", "ucode", "mem rd timeout", "mem wr timeout",
  285. "reg rd timeout", "reg wr timeout", "phy fault", "Unknown"};
  286. u8 fault_type;
  287. fault_type = (event->type < FAULT_TYPE_MAX) ? event->type : FAULT_TYPE_MAX;
  288. devlink_fmsg_string_pair_put(fmsg, "Fault type", type_str[fault_type]);
  289. devlink_fmsg_binary_pair_put(fmsg, "Fault raw data", event->event.val,
  290. sizeof(event->event.val));
  291. switch (event->type) {
  292. case FAULT_TYPE_CHIP:
  293. chip_fault_show(fmsg, event);
  294. break;
  295. case FAULT_TYPE_UCODE:
  296. devlink_fmsg_u8_pair_put(fmsg, "Cause_id", event->event.ucode.cause_id);
  297. devlink_fmsg_u8_pair_put(fmsg, "core_id", event->event.ucode.core_id);
  298. devlink_fmsg_u8_pair_put(fmsg, "c_id", event->event.ucode.c_id);
  299. devlink_fmsg_u8_pair_put(fmsg, "epc", event->event.ucode.epc);
  300. break;
  301. case FAULT_TYPE_MEM_RD_TIMEOUT:
  302. case FAULT_TYPE_MEM_WR_TIMEOUT:
  303. devlink_fmsg_u32_pair_put(fmsg, "Err_csr_ctrl",
  304. event->event.mem_timeout.err_csr_ctrl);
  305. devlink_fmsg_u32_pair_put(fmsg, "err_csr_data",
  306. event->event.mem_timeout.err_csr_data);
  307. devlink_fmsg_u32_pair_put(fmsg, "ctrl_tab",
  308. event->event.mem_timeout.ctrl_tab);
  309. devlink_fmsg_u32_pair_put(fmsg, "mem_index",
  310. event->event.mem_timeout.mem_index);
  311. break;
  312. case FAULT_TYPE_REG_RD_TIMEOUT:
  313. case FAULT_TYPE_REG_WR_TIMEOUT:
  314. devlink_fmsg_u32_pair_put(fmsg, "Err_csr", event->event.reg_timeout.err_csr);
  315. break;
  316. case FAULT_TYPE_PHY_FAULT:
  317. devlink_fmsg_u8_pair_put(fmsg, "Op_type", event->event.phy_fault.op_type);
  318. devlink_fmsg_u8_pair_put(fmsg, "port_id", event->event.phy_fault.port_id);
  319. devlink_fmsg_u8_pair_put(fmsg, "dev_ad", event->event.phy_fault.dev_ad);
  320. devlink_fmsg_u32_pair_put(fmsg, "csr_addr", event->event.phy_fault.csr_addr);
  321. devlink_fmsg_u32_pair_put(fmsg, "op_data", event->event.phy_fault.op_data);
  322. break;
  323. default:
  324. break;
  325. }
  326. }
  327. static int hinic_hw_reporter_dump(struct devlink_health_reporter *reporter,
  328. struct devlink_fmsg *fmsg, void *priv_ctx,
  329. struct netlink_ext_ack *extack)
  330. {
  331. if (priv_ctx)
  332. fault_report_show(fmsg, priv_ctx);
  333. return 0;
  334. }
  335. static void mgmt_watchdog_report_show(struct devlink_fmsg *fmsg,
  336. struct hinic_mgmt_watchdog_info *winfo)
  337. {
  338. devlink_fmsg_u32_pair_put(fmsg, "Mgmt deadloop time_h", winfo->curr_time_h);
  339. devlink_fmsg_u32_pair_put(fmsg, "time_l", winfo->curr_time_l);
  340. devlink_fmsg_u32_pair_put(fmsg, "task_id", winfo->task_id);
  341. devlink_fmsg_u32_pair_put(fmsg, "sp", winfo->sp);
  342. devlink_fmsg_u32_pair_put(fmsg, "stack_current_used", winfo->curr_used);
  343. devlink_fmsg_u32_pair_put(fmsg, "peak_used", winfo->peak_used);
  344. devlink_fmsg_u32_pair_put(fmsg, "\n Overflow_flag", winfo->is_overflow);
  345. devlink_fmsg_u32_pair_put(fmsg, "stack_top", winfo->stack_top);
  346. devlink_fmsg_u32_pair_put(fmsg, "stack_bottom", winfo->stack_bottom);
  347. devlink_fmsg_u32_pair_put(fmsg, "mgmt_pc", winfo->pc);
  348. devlink_fmsg_u32_pair_put(fmsg, "lr", winfo->lr);
  349. devlink_fmsg_u32_pair_put(fmsg, "cpsr", winfo->cpsr);
  350. devlink_fmsg_binary_pair_put(fmsg, "Mgmt register info", winfo->reg,
  351. sizeof(winfo->reg));
  352. devlink_fmsg_binary_pair_put(fmsg, "Mgmt dump stack(start from sp)",
  353. winfo->data, sizeof(winfo->data));
  354. }
  355. static int hinic_fw_reporter_dump(struct devlink_health_reporter *reporter,
  356. struct devlink_fmsg *fmsg, void *priv_ctx,
  357. struct netlink_ext_ack *extack)
  358. {
  359. if (priv_ctx)
  360. mgmt_watchdog_report_show(fmsg, priv_ctx);
  361. return 0;
  362. }
  363. static const struct devlink_health_reporter_ops hinic_hw_fault_reporter_ops = {
  364. .name = "hw",
  365. .dump = hinic_hw_reporter_dump,
  366. };
  367. static const struct devlink_health_reporter_ops hinic_fw_fault_reporter_ops = {
  368. .name = "fw",
  369. .dump = hinic_fw_reporter_dump,
  370. };
  371. int hinic_health_reporters_create(struct hinic_devlink_priv *priv)
  372. {
  373. struct devlink *devlink = priv_to_devlink(priv);
  374. priv->hw_fault_reporter =
  375. devlink_health_reporter_create(devlink, &hinic_hw_fault_reporter_ops,
  376. 0, priv);
  377. if (IS_ERR(priv->hw_fault_reporter)) {
  378. dev_warn(&priv->hwdev->hwif->pdev->dev, "Failed to create hw fault reporter, err: %ld\n",
  379. PTR_ERR(priv->hw_fault_reporter));
  380. return PTR_ERR(priv->hw_fault_reporter);
  381. }
  382. priv->fw_fault_reporter =
  383. devlink_health_reporter_create(devlink, &hinic_fw_fault_reporter_ops,
  384. 0, priv);
  385. if (IS_ERR(priv->fw_fault_reporter)) {
  386. dev_warn(&priv->hwdev->hwif->pdev->dev, "Failed to create fw fault reporter, err: %ld\n",
  387. PTR_ERR(priv->fw_fault_reporter));
  388. devlink_health_reporter_destroy(priv->hw_fault_reporter);
  389. priv->hw_fault_reporter = NULL;
  390. return PTR_ERR(priv->fw_fault_reporter);
  391. }
  392. return 0;
  393. }
  394. void hinic_health_reporters_destroy(struct hinic_devlink_priv *priv)
  395. {
  396. if (!IS_ERR_OR_NULL(priv->fw_fault_reporter)) {
  397. devlink_health_reporter_destroy(priv->fw_fault_reporter);
  398. priv->fw_fault_reporter = NULL;
  399. }
  400. if (!IS_ERR_OR_NULL(priv->hw_fault_reporter)) {
  401. devlink_health_reporter_destroy(priv->hw_fault_reporter);
  402. priv->hw_fault_reporter = NULL;
  403. }
  404. }