i40e_debugfs.c 56 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright(c) 2013 - 2018 Intel Corporation. */
  3. #ifdef CONFIG_DEBUG_FS
  4. #include <linux/fs.h>
  5. #include <linux/debugfs.h>
  6. #include <linux/if_bridge.h>
  7. #include "i40e.h"
  8. #include "i40e_virtchnl_pf.h"
  9. static struct dentry *i40e_dbg_root;
  10. enum ring_type {
  11. RING_TYPE_RX,
  12. RING_TYPE_TX,
  13. RING_TYPE_XDP
  14. };
  15. /**
  16. * i40e_dbg_find_vsi - searches for the vsi with the given seid
  17. * @pf: the PF structure to search for the vsi
  18. * @seid: seid of the vsi it is searching for
  19. **/
  20. static struct i40e_vsi *i40e_dbg_find_vsi(struct i40e_pf *pf, int seid)
  21. {
  22. if (seid < 0) {
  23. dev_info(&pf->pdev->dev, "%d: bad seid\n", seid);
  24. return NULL;
  25. }
  26. return i40e_pf_get_vsi_by_seid(pf, seid);
  27. }
  28. /**************************************************************
  29. * command
  30. * The command entry in debugfs is for giving the driver commands
  31. * to be executed - these may be for changing the internal switch
  32. * setup, adding or removing filters, or other things. Many of
  33. * these will be useful for some forms of unit testing.
  34. **************************************************************/
  35. static char *i40e_filter_state_string[] = {
  36. "INVALID",
  37. "NEW",
  38. "ACTIVE",
  39. "FAILED",
  40. "REMOVE",
  41. "NEW_SYNC",
  42. };
  43. /**
  44. * i40e_dbg_dump_vsi_seid - handles dump vsi seid write into command datum
  45. * @pf: the i40e_pf created in command write
  46. * @seid: the seid the user put in
  47. **/
  48. static void i40e_dbg_dump_vsi_seid(struct i40e_pf *pf, int seid)
  49. {
  50. struct rtnl_link_stats64 *nstat;
  51. struct i40e_mac_filter *f;
  52. struct i40e_vsi *vsi;
  53. int i, bkt;
  54. vsi = i40e_dbg_find_vsi(pf, seid);
  55. if (!vsi) {
  56. dev_info(&pf->pdev->dev,
  57. "dump %d: seid not found\n", seid);
  58. return;
  59. }
  60. dev_info(&pf->pdev->dev, "vsi seid %d\n", seid);
  61. if (vsi->netdev) {
  62. struct net_device *nd = vsi->netdev;
  63. dev_info(&pf->pdev->dev, " netdev: name = %s, state = %lu, flags = 0x%08x\n",
  64. nd->name, nd->state, nd->flags);
  65. dev_info(&pf->pdev->dev, " features = 0x%08lx\n",
  66. (unsigned long int)nd->features);
  67. dev_info(&pf->pdev->dev, " hw_features = 0x%08lx\n",
  68. (unsigned long int)nd->hw_features);
  69. dev_info(&pf->pdev->dev, " vlan_features = 0x%08lx\n",
  70. (unsigned long int)nd->vlan_features);
  71. }
  72. dev_info(&pf->pdev->dev,
  73. " flags = 0x%08lx, netdev_registered = %i, current_netdev_flags = 0x%04x\n",
  74. vsi->flags, vsi->netdev_registered, vsi->current_netdev_flags);
  75. for (i = 0; i < BITS_TO_LONGS(__I40E_VSI_STATE_SIZE__); i++)
  76. dev_info(&pf->pdev->dev,
  77. " state[%d] = %08lx\n",
  78. i, vsi->state[i]);
  79. if (vsi->type == I40E_VSI_MAIN)
  80. dev_info(&pf->pdev->dev, " MAC address: %pM Port MAC: %pM\n",
  81. pf->hw.mac.addr,
  82. pf->hw.mac.port_addr);
  83. hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
  84. dev_info(&pf->pdev->dev,
  85. " mac_filter_hash: %pM vid=%d, state %s\n",
  86. f->macaddr, f->vlan,
  87. i40e_filter_state_string[f->state]);
  88. }
  89. dev_info(&pf->pdev->dev, " active_filters %u, promisc_threshold %u, overflow promisc %s\n",
  90. vsi->active_filters, vsi->promisc_threshold,
  91. (test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state) ?
  92. "ON" : "OFF"));
  93. nstat = i40e_get_vsi_stats_struct(vsi);
  94. dev_info(&pf->pdev->dev,
  95. " net_stats: rx_packets = %lu, rx_bytes = %lu, rx_errors = %lu, rx_dropped = %lu\n",
  96. (unsigned long int)nstat->rx_packets,
  97. (unsigned long int)nstat->rx_bytes,
  98. (unsigned long int)nstat->rx_errors,
  99. (unsigned long int)nstat->rx_dropped);
  100. dev_info(&pf->pdev->dev,
  101. " net_stats: tx_packets = %lu, tx_bytes = %lu, tx_errors = %lu, tx_dropped = %lu\n",
  102. (unsigned long int)nstat->tx_packets,
  103. (unsigned long int)nstat->tx_bytes,
  104. (unsigned long int)nstat->tx_errors,
  105. (unsigned long int)nstat->tx_dropped);
  106. dev_info(&pf->pdev->dev,
  107. " net_stats: multicast = %lu, collisions = %lu\n",
  108. (unsigned long int)nstat->multicast,
  109. (unsigned long int)nstat->collisions);
  110. dev_info(&pf->pdev->dev,
  111. " net_stats: rx_length_errors = %lu, rx_over_errors = %lu, rx_crc_errors = %lu\n",
  112. (unsigned long int)nstat->rx_length_errors,
  113. (unsigned long int)nstat->rx_over_errors,
  114. (unsigned long int)nstat->rx_crc_errors);
  115. dev_info(&pf->pdev->dev,
  116. " net_stats: rx_frame_errors = %lu, rx_fifo_errors = %lu, rx_missed_errors = %lu\n",
  117. (unsigned long int)nstat->rx_frame_errors,
  118. (unsigned long int)nstat->rx_fifo_errors,
  119. (unsigned long int)nstat->rx_missed_errors);
  120. dev_info(&pf->pdev->dev,
  121. " net_stats: tx_aborted_errors = %lu, tx_carrier_errors = %lu, tx_fifo_errors = %lu\n",
  122. (unsigned long int)nstat->tx_aborted_errors,
  123. (unsigned long int)nstat->tx_carrier_errors,
  124. (unsigned long int)nstat->tx_fifo_errors);
  125. dev_info(&pf->pdev->dev,
  126. " net_stats: tx_heartbeat_errors = %lu, tx_window_errors = %lu\n",
  127. (unsigned long int)nstat->tx_heartbeat_errors,
  128. (unsigned long int)nstat->tx_window_errors);
  129. dev_info(&pf->pdev->dev,
  130. " net_stats: rx_compressed = %lu, tx_compressed = %lu\n",
  131. (unsigned long int)nstat->rx_compressed,
  132. (unsigned long int)nstat->tx_compressed);
  133. dev_info(&pf->pdev->dev,
  134. " net_stats_offsets: rx_packets = %lu, rx_bytes = %lu, rx_errors = %lu, rx_dropped = %lu\n",
  135. (unsigned long int)vsi->net_stats_offsets.rx_packets,
  136. (unsigned long int)vsi->net_stats_offsets.rx_bytes,
  137. (unsigned long int)vsi->net_stats_offsets.rx_errors,
  138. (unsigned long int)vsi->net_stats_offsets.rx_dropped);
  139. dev_info(&pf->pdev->dev,
  140. " net_stats_offsets: tx_packets = %lu, tx_bytes = %lu, tx_errors = %lu, tx_dropped = %lu\n",
  141. (unsigned long int)vsi->net_stats_offsets.tx_packets,
  142. (unsigned long int)vsi->net_stats_offsets.tx_bytes,
  143. (unsigned long int)vsi->net_stats_offsets.tx_errors,
  144. (unsigned long int)vsi->net_stats_offsets.tx_dropped);
  145. dev_info(&pf->pdev->dev,
  146. " net_stats_offsets: multicast = %lu, collisions = %lu\n",
  147. (unsigned long int)vsi->net_stats_offsets.multicast,
  148. (unsigned long int)vsi->net_stats_offsets.collisions);
  149. dev_info(&pf->pdev->dev,
  150. " net_stats_offsets: rx_length_errors = %lu, rx_over_errors = %lu, rx_crc_errors = %lu\n",
  151. (unsigned long int)vsi->net_stats_offsets.rx_length_errors,
  152. (unsigned long int)vsi->net_stats_offsets.rx_over_errors,
  153. (unsigned long int)vsi->net_stats_offsets.rx_crc_errors);
  154. dev_info(&pf->pdev->dev,
  155. " net_stats_offsets: rx_frame_errors = %lu, rx_fifo_errors = %lu, rx_missed_errors = %lu\n",
  156. (unsigned long int)vsi->net_stats_offsets.rx_frame_errors,
  157. (unsigned long int)vsi->net_stats_offsets.rx_fifo_errors,
  158. (unsigned long int)vsi->net_stats_offsets.rx_missed_errors);
  159. dev_info(&pf->pdev->dev,
  160. " net_stats_offsets: tx_aborted_errors = %lu, tx_carrier_errors = %lu, tx_fifo_errors = %lu\n",
  161. (unsigned long int)vsi->net_stats_offsets.tx_aborted_errors,
  162. (unsigned long int)vsi->net_stats_offsets.tx_carrier_errors,
  163. (unsigned long int)vsi->net_stats_offsets.tx_fifo_errors);
  164. dev_info(&pf->pdev->dev,
  165. " net_stats_offsets: tx_heartbeat_errors = %lu, tx_window_errors = %lu\n",
  166. (unsigned long int)vsi->net_stats_offsets.tx_heartbeat_errors,
  167. (unsigned long int)vsi->net_stats_offsets.tx_window_errors);
  168. dev_info(&pf->pdev->dev,
  169. " net_stats_offsets: rx_compressed = %lu, tx_compressed = %lu\n",
  170. (unsigned long int)vsi->net_stats_offsets.rx_compressed,
  171. (unsigned long int)vsi->net_stats_offsets.tx_compressed);
  172. dev_info(&pf->pdev->dev,
  173. " tx_restart = %llu, tx_busy = %llu, rx_buf_failed = %llu, rx_page_failed = %llu\n",
  174. vsi->tx_restart, vsi->tx_busy,
  175. vsi->rx_buf_failed, vsi->rx_page_failed);
  176. rcu_read_lock();
  177. for (i = 0; i < vsi->num_queue_pairs; i++) {
  178. struct i40e_ring *rx_ring = READ_ONCE(vsi->rx_rings[i]);
  179. if (!rx_ring)
  180. continue;
  181. dev_info(&pf->pdev->dev,
  182. " rx_rings[%i]: state = %lu, queue_index = %d, reg_idx = %d\n",
  183. i, *rx_ring->state,
  184. rx_ring->queue_index,
  185. rx_ring->reg_idx);
  186. dev_info(&pf->pdev->dev,
  187. " rx_rings[%i]: rx_buf_len = %d\n",
  188. i, rx_ring->rx_buf_len);
  189. dev_info(&pf->pdev->dev,
  190. " rx_rings[%i]: next_to_use = %d, next_to_clean = %d, ring_active = %i\n",
  191. i,
  192. rx_ring->next_to_use,
  193. rx_ring->next_to_clean,
  194. rx_ring->ring_active);
  195. dev_info(&pf->pdev->dev,
  196. " rx_rings[%i]: rx_stats: packets = %lld, bytes = %lld, non_eop_descs = %lld\n",
  197. i, rx_ring->stats.packets,
  198. rx_ring->stats.bytes,
  199. rx_ring->rx_stats.non_eop_descs);
  200. dev_info(&pf->pdev->dev,
  201. " rx_rings[%i]: rx_stats: alloc_page_failed = %lld, alloc_buff_failed = %lld\n",
  202. i,
  203. rx_ring->rx_stats.alloc_page_failed,
  204. rx_ring->rx_stats.alloc_buff_failed);
  205. dev_info(&pf->pdev->dev,
  206. " rx_rings[%i]: rx_stats: realloc_count = 0, page_reuse_count = %lld\n",
  207. i,
  208. rx_ring->rx_stats.page_reuse_count);
  209. dev_info(&pf->pdev->dev,
  210. " rx_rings[%i]: size = %i\n",
  211. i, rx_ring->size);
  212. dev_info(&pf->pdev->dev,
  213. " rx_rings[%i]: itr_setting = %d (%s)\n",
  214. i, rx_ring->itr_setting,
  215. ITR_IS_DYNAMIC(rx_ring->itr_setting) ? "dynamic" : "fixed");
  216. }
  217. for (i = 0; i < vsi->num_queue_pairs; i++) {
  218. struct i40e_ring *tx_ring = READ_ONCE(vsi->tx_rings[i]);
  219. if (!tx_ring)
  220. continue;
  221. dev_info(&pf->pdev->dev,
  222. " tx_rings[%i]: state = %lu, queue_index = %d, reg_idx = %d\n",
  223. i, *tx_ring->state,
  224. tx_ring->queue_index,
  225. tx_ring->reg_idx);
  226. dev_info(&pf->pdev->dev,
  227. " tx_rings[%i]: next_to_use = %d, next_to_clean = %d, ring_active = %i\n",
  228. i,
  229. tx_ring->next_to_use,
  230. tx_ring->next_to_clean,
  231. tx_ring->ring_active);
  232. dev_info(&pf->pdev->dev,
  233. " tx_rings[%i]: tx_stats: packets = %lld, bytes = %lld, restart_queue = %lld\n",
  234. i, tx_ring->stats.packets,
  235. tx_ring->stats.bytes,
  236. tx_ring->tx_stats.restart_queue);
  237. dev_info(&pf->pdev->dev,
  238. " tx_rings[%i]: tx_stats: tx_busy = %lld, tx_done_old = %lld, tx_stopped = %lld\n",
  239. i,
  240. tx_ring->tx_stats.tx_busy,
  241. tx_ring->tx_stats.tx_done_old,
  242. tx_ring->tx_stats.tx_stopped);
  243. dev_info(&pf->pdev->dev,
  244. " tx_rings[%i]: size = %i\n",
  245. i, tx_ring->size);
  246. dev_info(&pf->pdev->dev,
  247. " tx_rings[%i]: DCB tc = %d\n",
  248. i, tx_ring->dcb_tc);
  249. dev_info(&pf->pdev->dev,
  250. " tx_rings[%i]: itr_setting = %d (%s)\n",
  251. i, tx_ring->itr_setting,
  252. ITR_IS_DYNAMIC(tx_ring->itr_setting) ? "dynamic" : "fixed");
  253. }
  254. if (i40e_enabled_xdp_vsi(vsi)) {
  255. for (i = 0; i < vsi->num_queue_pairs; i++) {
  256. struct i40e_ring *xdp_ring = READ_ONCE(vsi->xdp_rings[i]);
  257. if (!xdp_ring)
  258. continue;
  259. dev_info(&pf->pdev->dev,
  260. " xdp_rings[%i]: state = %lu, queue_index = %d, reg_idx = %d\n",
  261. i, *xdp_ring->state,
  262. xdp_ring->queue_index,
  263. xdp_ring->reg_idx);
  264. dev_info(&pf->pdev->dev,
  265. " xdp_rings[%i]: next_to_use = %d, next_to_clean = %d, ring_active = %i\n",
  266. i,
  267. xdp_ring->next_to_use,
  268. xdp_ring->next_to_clean,
  269. xdp_ring->ring_active);
  270. dev_info(&pf->pdev->dev,
  271. " xdp_rings[%i]: tx_stats: packets = %lld, bytes = %lld, restart_queue = %lld\n",
  272. i, xdp_ring->stats.packets,
  273. xdp_ring->stats.bytes,
  274. xdp_ring->tx_stats.restart_queue);
  275. dev_info(&pf->pdev->dev,
  276. " xdp_rings[%i]: tx_stats: tx_busy = %lld, tx_done_old = %lld\n",
  277. i,
  278. xdp_ring->tx_stats.tx_busy,
  279. xdp_ring->tx_stats.tx_done_old);
  280. dev_info(&pf->pdev->dev,
  281. " xdp_rings[%i]: size = %i\n",
  282. i, xdp_ring->size);
  283. dev_info(&pf->pdev->dev,
  284. " xdp_rings[%i]: DCB tc = %d\n",
  285. i, xdp_ring->dcb_tc);
  286. dev_info(&pf->pdev->dev,
  287. " xdp_rings[%i]: itr_setting = %d (%s)\n",
  288. i, xdp_ring->itr_setting,
  289. ITR_IS_DYNAMIC(xdp_ring->itr_setting) ?
  290. "dynamic" : "fixed");
  291. }
  292. }
  293. rcu_read_unlock();
  294. dev_info(&pf->pdev->dev,
  295. " work_limit = %d\n",
  296. vsi->work_limit);
  297. dev_info(&pf->pdev->dev,
  298. " max_frame = %d, rx_buf_len = %d dtype = %d\n",
  299. vsi->max_frame, vsi->rx_buf_len, 0);
  300. dev_info(&pf->pdev->dev,
  301. " num_q_vectors = %i, base_vector = %i\n",
  302. vsi->num_q_vectors, vsi->base_vector);
  303. dev_info(&pf->pdev->dev,
  304. " seid = %d, id = %d, uplink_seid = %d\n",
  305. vsi->seid, vsi->id, vsi->uplink_seid);
  306. dev_info(&pf->pdev->dev,
  307. " base_queue = %d, num_queue_pairs = %d, num_tx_desc = %d, num_rx_desc = %d\n",
  308. vsi->base_queue, vsi->num_queue_pairs, vsi->num_tx_desc,
  309. vsi->num_rx_desc);
  310. dev_info(&pf->pdev->dev, " type = %i\n", vsi->type);
  311. if (vsi->type == I40E_VSI_SRIOV)
  312. dev_info(&pf->pdev->dev, " VF ID = %i\n", vsi->vf_id);
  313. dev_info(&pf->pdev->dev,
  314. " info: valid_sections = 0x%04x, switch_id = 0x%04x\n",
  315. vsi->info.valid_sections, vsi->info.switch_id);
  316. dev_info(&pf->pdev->dev,
  317. " info: sw_reserved[] = 0x%02x 0x%02x\n",
  318. vsi->info.sw_reserved[0], vsi->info.sw_reserved[1]);
  319. dev_info(&pf->pdev->dev,
  320. " info: sec_flags = 0x%02x, sec_reserved = 0x%02x\n",
  321. vsi->info.sec_flags, vsi->info.sec_reserved);
  322. dev_info(&pf->pdev->dev,
  323. " info: pvid = 0x%04x, fcoe_pvid = 0x%04x, port_vlan_flags = 0x%02x\n",
  324. vsi->info.pvid, vsi->info.fcoe_pvid,
  325. vsi->info.port_vlan_flags);
  326. dev_info(&pf->pdev->dev,
  327. " info: pvlan_reserved[] = 0x%02x 0x%02x 0x%02x\n",
  328. vsi->info.pvlan_reserved[0], vsi->info.pvlan_reserved[1],
  329. vsi->info.pvlan_reserved[2]);
  330. dev_info(&pf->pdev->dev,
  331. " info: ingress_table = 0x%08x, egress_table = 0x%08x\n",
  332. vsi->info.ingress_table, vsi->info.egress_table);
  333. dev_info(&pf->pdev->dev,
  334. " info: cas_pv_stag = 0x%04x, cas_pv_flags= 0x%02x, cas_pv_reserved = 0x%02x\n",
  335. vsi->info.cas_pv_tag, vsi->info.cas_pv_flags,
  336. vsi->info.cas_pv_reserved);
  337. dev_info(&pf->pdev->dev,
  338. " info: queue_mapping[0..7 ] = 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x\n",
  339. vsi->info.queue_mapping[0], vsi->info.queue_mapping[1],
  340. vsi->info.queue_mapping[2], vsi->info.queue_mapping[3],
  341. vsi->info.queue_mapping[4], vsi->info.queue_mapping[5],
  342. vsi->info.queue_mapping[6], vsi->info.queue_mapping[7]);
  343. dev_info(&pf->pdev->dev,
  344. " info: queue_mapping[8..15] = 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x\n",
  345. vsi->info.queue_mapping[8], vsi->info.queue_mapping[9],
  346. vsi->info.queue_mapping[10], vsi->info.queue_mapping[11],
  347. vsi->info.queue_mapping[12], vsi->info.queue_mapping[13],
  348. vsi->info.queue_mapping[14], vsi->info.queue_mapping[15]);
  349. dev_info(&pf->pdev->dev,
  350. " info: tc_mapping[] = 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x\n",
  351. vsi->info.tc_mapping[0], vsi->info.tc_mapping[1],
  352. vsi->info.tc_mapping[2], vsi->info.tc_mapping[3],
  353. vsi->info.tc_mapping[4], vsi->info.tc_mapping[5],
  354. vsi->info.tc_mapping[6], vsi->info.tc_mapping[7]);
  355. dev_info(&pf->pdev->dev,
  356. " info: queueing_opt_flags = 0x%02x queueing_opt_reserved[0..2] = 0x%02x 0x%02x 0x%02x\n",
  357. vsi->info.queueing_opt_flags,
  358. vsi->info.queueing_opt_reserved[0],
  359. vsi->info.queueing_opt_reserved[1],
  360. vsi->info.queueing_opt_reserved[2]);
  361. dev_info(&pf->pdev->dev,
  362. " info: up_enable_bits = 0x%02x\n",
  363. vsi->info.up_enable_bits);
  364. dev_info(&pf->pdev->dev,
  365. " info: sched_reserved = 0x%02x, outer_up_table = 0x%04x\n",
  366. vsi->info.sched_reserved, vsi->info.outer_up_table);
  367. dev_info(&pf->pdev->dev,
  368. " info: cmd_reserved[] = 0x%02x 0x%02x 0x%02x 0x0%02x 0x%02x 0x%02x 0x%02x 0x0%02x\n",
  369. vsi->info.cmd_reserved[0], vsi->info.cmd_reserved[1],
  370. vsi->info.cmd_reserved[2], vsi->info.cmd_reserved[3],
  371. vsi->info.cmd_reserved[4], vsi->info.cmd_reserved[5],
  372. vsi->info.cmd_reserved[6], vsi->info.cmd_reserved[7]);
  373. dev_info(&pf->pdev->dev,
  374. " info: qs_handle[] = 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x\n",
  375. vsi->info.qs_handle[0], vsi->info.qs_handle[1],
  376. vsi->info.qs_handle[2], vsi->info.qs_handle[3],
  377. vsi->info.qs_handle[4], vsi->info.qs_handle[5],
  378. vsi->info.qs_handle[6], vsi->info.qs_handle[7]);
  379. dev_info(&pf->pdev->dev,
  380. " info: stat_counter_idx = 0x%04x, sched_id = 0x%04x\n",
  381. vsi->info.stat_counter_idx, vsi->info.sched_id);
  382. dev_info(&pf->pdev->dev,
  383. " info: resp_reserved[] = 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n",
  384. vsi->info.resp_reserved[0], vsi->info.resp_reserved[1],
  385. vsi->info.resp_reserved[2], vsi->info.resp_reserved[3],
  386. vsi->info.resp_reserved[4], vsi->info.resp_reserved[5],
  387. vsi->info.resp_reserved[6], vsi->info.resp_reserved[7],
  388. vsi->info.resp_reserved[8], vsi->info.resp_reserved[9],
  389. vsi->info.resp_reserved[10], vsi->info.resp_reserved[11]);
  390. dev_info(&pf->pdev->dev, " idx = %d\n", vsi->idx);
  391. dev_info(&pf->pdev->dev,
  392. " tc_config: numtc = %d, enabled_tc = 0x%x\n",
  393. vsi->tc_config.numtc, vsi->tc_config.enabled_tc);
  394. for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
  395. dev_info(&pf->pdev->dev,
  396. " tc_config: tc = %d, qoffset = %d, qcount = %d, netdev_tc = %d\n",
  397. i, vsi->tc_config.tc_info[i].qoffset,
  398. vsi->tc_config.tc_info[i].qcount,
  399. vsi->tc_config.tc_info[i].netdev_tc);
  400. }
  401. dev_info(&pf->pdev->dev,
  402. " bw: bw_limit = %d, bw_max_quanta = %d\n",
  403. vsi->bw_limit, vsi->bw_max_quanta);
  404. for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
  405. dev_info(&pf->pdev->dev,
  406. " bw[%d]: ets_share_credits = %d, ets_limit_credits = %d, max_quanta = %d\n",
  407. i, vsi->bw_ets_share_credits[i],
  408. vsi->bw_ets_limit_credits[i],
  409. vsi->bw_ets_max_quanta[i]);
  410. }
  411. }
  412. /**
  413. * i40e_dbg_dump_aq_desc - handles dump aq_desc write into command datum
  414. * @pf: the i40e_pf created in command write
  415. **/
  416. static void i40e_dbg_dump_aq_desc(struct i40e_pf *pf)
  417. {
  418. struct i40e_adminq_ring *ring;
  419. struct i40e_hw *hw = &pf->hw;
  420. char hdr[32];
  421. int i;
  422. snprintf(hdr, sizeof(hdr), "%s %s: ",
  423. dev_driver_string(&pf->pdev->dev),
  424. dev_name(&pf->pdev->dev));
  425. /* first the send (command) ring, then the receive (event) ring */
  426. dev_info(&pf->pdev->dev, "AdminQ Tx Ring\n");
  427. ring = &(hw->aq.asq);
  428. for (i = 0; i < ring->count; i++) {
  429. struct i40e_aq_desc *d = I40E_ADMINQ_DESC(*ring, i);
  430. dev_info(&pf->pdev->dev,
  431. " at[%02d] flags=0x%04x op=0x%04x dlen=0x%04x ret=0x%04x cookie_h=0x%08x cookie_l=0x%08x\n",
  432. i, d->flags, d->opcode, d->datalen, d->retval,
  433. d->cookie_high, d->cookie_low);
  434. print_hex_dump(KERN_INFO, hdr, DUMP_PREFIX_NONE,
  435. 16, 1, d->params.raw, 16, 0);
  436. }
  437. dev_info(&pf->pdev->dev, "AdminQ Rx Ring\n");
  438. ring = &(hw->aq.arq);
  439. for (i = 0; i < ring->count; i++) {
  440. struct i40e_aq_desc *d = I40E_ADMINQ_DESC(*ring, i);
  441. dev_info(&pf->pdev->dev,
  442. " ar[%02d] flags=0x%04x op=0x%04x dlen=0x%04x ret=0x%04x cookie_h=0x%08x cookie_l=0x%08x\n",
  443. i, d->flags, d->opcode, d->datalen, d->retval,
  444. d->cookie_high, d->cookie_low);
  445. print_hex_dump(KERN_INFO, hdr, DUMP_PREFIX_NONE,
  446. 16, 1, d->params.raw, 16, 0);
  447. }
  448. }
  449. /**
  450. * i40e_dbg_dump_desc - handles dump desc write into command datum
  451. * @cnt: number of arguments that the user supplied
  452. * @vsi_seid: vsi id entered by user
  453. * @ring_id: ring id entered by user
  454. * @desc_n: descriptor number entered by user
  455. * @pf: the i40e_pf created in command write
  456. * @type: enum describing whether ring is RX, TX or XDP
  457. **/
  458. static void i40e_dbg_dump_desc(int cnt, int vsi_seid, int ring_id, int desc_n,
  459. struct i40e_pf *pf, enum ring_type type)
  460. {
  461. bool is_rx_ring = type == RING_TYPE_RX;
  462. struct i40e_tx_desc *txd;
  463. union i40e_rx_desc *rxd;
  464. struct i40e_ring *ring;
  465. struct i40e_vsi *vsi;
  466. int i;
  467. vsi = i40e_dbg_find_vsi(pf, vsi_seid);
  468. if (!vsi) {
  469. dev_info(&pf->pdev->dev, "vsi %d not found\n", vsi_seid);
  470. return;
  471. }
  472. if (vsi->type != I40E_VSI_MAIN &&
  473. vsi->type != I40E_VSI_FDIR &&
  474. vsi->type != I40E_VSI_VMDQ2) {
  475. dev_info(&pf->pdev->dev,
  476. "vsi %d type %d descriptor rings not available\n",
  477. vsi_seid, vsi->type);
  478. return;
  479. }
  480. if (type == RING_TYPE_XDP && !i40e_enabled_xdp_vsi(vsi)) {
  481. dev_info(&pf->pdev->dev, "XDP not enabled on VSI %d\n", vsi_seid);
  482. return;
  483. }
  484. if (ring_id >= vsi->num_queue_pairs || ring_id < 0) {
  485. dev_info(&pf->pdev->dev, "ring %d not found\n", ring_id);
  486. return;
  487. }
  488. if (!vsi->tx_rings || !vsi->tx_rings[0]->desc) {
  489. dev_info(&pf->pdev->dev,
  490. "descriptor rings have not been allocated for vsi %d\n",
  491. vsi_seid);
  492. return;
  493. }
  494. switch (type) {
  495. case RING_TYPE_RX:
  496. ring = kmemdup(vsi->rx_rings[ring_id], sizeof(*ring), GFP_KERNEL);
  497. break;
  498. case RING_TYPE_TX:
  499. ring = kmemdup(vsi->tx_rings[ring_id], sizeof(*ring), GFP_KERNEL);
  500. break;
  501. case RING_TYPE_XDP:
  502. ring = kmemdup(vsi->xdp_rings[ring_id], sizeof(*ring), GFP_KERNEL);
  503. break;
  504. default:
  505. ring = NULL;
  506. break;
  507. }
  508. if (!ring)
  509. return;
  510. if (cnt == 2) {
  511. switch (type) {
  512. case RING_TYPE_RX:
  513. dev_info(&pf->pdev->dev, "VSI = %02i Rx ring = %02i\n", vsi_seid, ring_id);
  514. break;
  515. case RING_TYPE_TX:
  516. dev_info(&pf->pdev->dev, "VSI = %02i Tx ring = %02i\n", vsi_seid, ring_id);
  517. break;
  518. case RING_TYPE_XDP:
  519. dev_info(&pf->pdev->dev, "VSI = %02i XDP ring = %02i\n", vsi_seid, ring_id);
  520. break;
  521. }
  522. for (i = 0; i < ring->count; i++) {
  523. if (!is_rx_ring) {
  524. txd = I40E_TX_DESC(ring, i);
  525. dev_info(&pf->pdev->dev,
  526. " d[%03x] = 0x%016llx 0x%016llx\n",
  527. i, txd->buffer_addr,
  528. txd->cmd_type_offset_bsz);
  529. } else {
  530. rxd = I40E_RX_DESC(ring, i);
  531. dev_info(&pf->pdev->dev,
  532. " d[%03x] = 0x%016llx 0x%016llx\n",
  533. i, rxd->read.pkt_addr,
  534. rxd->read.hdr_addr);
  535. }
  536. }
  537. } else if (cnt == 3) {
  538. if (desc_n >= ring->count || desc_n < 0) {
  539. dev_info(&pf->pdev->dev,
  540. "descriptor %d not found\n", desc_n);
  541. goto out;
  542. }
  543. if (!is_rx_ring) {
  544. txd = I40E_TX_DESC(ring, desc_n);
  545. dev_info(&pf->pdev->dev,
  546. "vsi = %02i tx ring = %02i d[%03x] = 0x%016llx 0x%016llx\n",
  547. vsi_seid, ring_id, desc_n,
  548. txd->buffer_addr, txd->cmd_type_offset_bsz);
  549. } else {
  550. rxd = I40E_RX_DESC(ring, desc_n);
  551. dev_info(&pf->pdev->dev,
  552. "vsi = %02i rx ring = %02i d[%03x] = 0x%016llx 0x%016llx\n",
  553. vsi_seid, ring_id, desc_n,
  554. rxd->read.pkt_addr, rxd->read.hdr_addr);
  555. }
  556. } else {
  557. dev_info(&pf->pdev->dev, "dump desc rx/tx/xdp <vsi_seid> <ring_id> [<desc_n>]\n");
  558. }
  559. out:
  560. kfree(ring);
  561. }
  562. /**
  563. * i40e_dbg_dump_vsi_no_seid - handles dump vsi write into command datum
  564. * @pf: the i40e_pf created in command write
  565. **/
  566. static void i40e_dbg_dump_vsi_no_seid(struct i40e_pf *pf)
  567. {
  568. struct i40e_vsi *vsi;
  569. int i;
  570. i40e_pf_for_each_vsi(pf, i, vsi)
  571. dev_info(&pf->pdev->dev, "dump vsi[%d]: %d\n", i, vsi->seid);
  572. }
  573. /**
  574. * i40e_dbg_dump_eth_stats - handles dump stats write into command datum
  575. * @pf: the i40e_pf created in command write
  576. * @estats: the eth stats structure to be dumped
  577. **/
  578. static void i40e_dbg_dump_eth_stats(struct i40e_pf *pf,
  579. struct i40e_eth_stats *estats)
  580. {
  581. dev_info(&pf->pdev->dev, " ethstats:\n");
  582. dev_info(&pf->pdev->dev,
  583. " rx_bytes = \t%lld \trx_unicast = \t\t%lld \trx_multicast = \t%lld\n",
  584. estats->rx_bytes, estats->rx_unicast, estats->rx_multicast);
  585. dev_info(&pf->pdev->dev,
  586. " rx_broadcast = \t%lld \trx_discards = \t\t%lld\n",
  587. estats->rx_broadcast, estats->rx_discards);
  588. dev_info(&pf->pdev->dev,
  589. " rx_unknown_protocol = \t%lld \ttx_bytes = \t%lld\n",
  590. estats->rx_unknown_protocol, estats->tx_bytes);
  591. dev_info(&pf->pdev->dev,
  592. " tx_unicast = \t%lld \ttx_multicast = \t\t%lld \ttx_broadcast = \t%lld\n",
  593. estats->tx_unicast, estats->tx_multicast, estats->tx_broadcast);
  594. dev_info(&pf->pdev->dev,
  595. " tx_discards = \t%lld \ttx_errors = \t\t%lld\n",
  596. estats->tx_discards, estats->tx_errors);
  597. }
  598. /**
  599. * i40e_dbg_dump_veb_seid - handles dump stats of a single given veb
  600. * @pf: the i40e_pf created in command write
  601. * @seid: the seid the user put in
  602. **/
  603. static void i40e_dbg_dump_veb_seid(struct i40e_pf *pf, int seid)
  604. {
  605. struct i40e_veb *veb;
  606. veb = i40e_pf_get_veb_by_seid(pf, seid);
  607. if (!veb) {
  608. dev_info(&pf->pdev->dev, "can't find veb %d\n", seid);
  609. return;
  610. }
  611. dev_info(&pf->pdev->dev,
  612. "veb idx=%d stats_ic=%d seid=%d uplink=%d mode=%s\n",
  613. veb->idx, veb->stats_idx, veb->seid, veb->uplink_seid,
  614. veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
  615. i40e_dbg_dump_eth_stats(pf, &veb->stats);
  616. }
  617. /**
  618. * i40e_dbg_dump_veb_all - dumps all known veb's stats
  619. * @pf: the i40e_pf created in command write
  620. **/
  621. static void i40e_dbg_dump_veb_all(struct i40e_pf *pf)
  622. {
  623. struct i40e_veb *veb;
  624. int i;
  625. i40e_pf_for_each_veb(pf, i, veb)
  626. i40e_dbg_dump_veb_seid(pf, veb->seid);
  627. }
  628. /**
  629. * i40e_dbg_dump_vf - dump VF info
  630. * @pf: the i40e_pf created in command write
  631. * @vf_id: the vf_id from the user
  632. **/
  633. static void i40e_dbg_dump_vf(struct i40e_pf *pf, int vf_id)
  634. {
  635. struct i40e_vf *vf;
  636. struct i40e_vsi *vsi;
  637. if (!pf->num_alloc_vfs) {
  638. dev_info(&pf->pdev->dev, "no VFs allocated\n");
  639. } else if ((vf_id >= 0) && (vf_id < pf->num_alloc_vfs)) {
  640. vf = &pf->vf[vf_id];
  641. vsi = pf->vsi[vf->lan_vsi_idx];
  642. dev_info(&pf->pdev->dev, "vf %2d: VSI id=%d, seid=%d, qps=%d\n",
  643. vf_id, vf->lan_vsi_id, vsi->seid, vf->num_queue_pairs);
  644. dev_info(&pf->pdev->dev, " num MDD=%lld\n",
  645. vf->num_mdd_events);
  646. } else {
  647. dev_info(&pf->pdev->dev, "invalid VF id %d\n", vf_id);
  648. }
  649. }
  650. /**
  651. * i40e_dbg_dump_vf_all - dump VF info for all VFs
  652. * @pf: the i40e_pf created in command write
  653. **/
  654. static void i40e_dbg_dump_vf_all(struct i40e_pf *pf)
  655. {
  656. int i;
  657. if (!pf->num_alloc_vfs)
  658. dev_info(&pf->pdev->dev, "no VFs enabled!\n");
  659. else
  660. for (i = 0; i < pf->num_alloc_vfs; i++)
  661. i40e_dbg_dump_vf(pf, i);
  662. }
  663. /**
  664. * i40e_dbg_command_write - write into command datum
  665. * @filp: the opened file
  666. * @buffer: where to find the user's data
  667. * @count: the length of the user's data
  668. * @ppos: file position offset
  669. **/
  670. static ssize_t i40e_dbg_command_write(struct file *filp,
  671. const char __user *buffer,
  672. size_t count, loff_t *ppos)
  673. {
  674. struct i40e_pf *pf = filp->private_data;
  675. char *cmd_buf, *cmd_buf_tmp;
  676. int bytes_not_copied;
  677. struct i40e_vsi *vsi;
  678. int vsi_seid;
  679. int veb_seid;
  680. int vf_id;
  681. int cnt;
  682. /* don't allow partial writes */
  683. if (*ppos != 0)
  684. return 0;
  685. cmd_buf = kzalloc(count + 1, GFP_KERNEL);
  686. if (!cmd_buf)
  687. return count;
  688. bytes_not_copied = copy_from_user(cmd_buf, buffer, count);
  689. if (bytes_not_copied) {
  690. kfree(cmd_buf);
  691. return -EFAULT;
  692. }
  693. cmd_buf[count] = '\0';
  694. cmd_buf_tmp = strchr(cmd_buf, '\n');
  695. if (cmd_buf_tmp) {
  696. *cmd_buf_tmp = '\0';
  697. count = cmd_buf_tmp - cmd_buf + 1;
  698. }
  699. if (strncmp(cmd_buf, "add vsi", 7) == 0) {
  700. vsi_seid = -1;
  701. cnt = sscanf(&cmd_buf[7], "%i", &vsi_seid);
  702. if (cnt == 0) {
  703. /* default to PF VSI */
  704. vsi = i40e_pf_get_main_vsi(pf);
  705. vsi_seid = vsi->seid;
  706. } else if (vsi_seid < 0) {
  707. dev_info(&pf->pdev->dev, "add VSI %d: bad vsi seid\n",
  708. vsi_seid);
  709. goto command_write_done;
  710. }
  711. /* By default we are in VEPA mode, if this is the first VF/VMDq
  712. * VSI to be added switch to VEB mode.
  713. */
  714. if (!test_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags)) {
  715. set_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags);
  716. i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
  717. }
  718. vsi = i40e_vsi_setup(pf, I40E_VSI_VMDQ2, vsi_seid, 0);
  719. if (vsi)
  720. dev_info(&pf->pdev->dev, "added VSI %d to relay %d\n",
  721. vsi->seid, vsi->uplink_seid);
  722. else
  723. dev_info(&pf->pdev->dev, "'%s' failed\n", cmd_buf);
  724. } else if (strncmp(cmd_buf, "del vsi", 7) == 0) {
  725. cnt = sscanf(&cmd_buf[7], "%i", &vsi_seid);
  726. if (cnt != 1) {
  727. dev_info(&pf->pdev->dev,
  728. "del vsi: bad command string, cnt=%d\n",
  729. cnt);
  730. goto command_write_done;
  731. }
  732. vsi = i40e_dbg_find_vsi(pf, vsi_seid);
  733. if (!vsi) {
  734. dev_info(&pf->pdev->dev, "del VSI %d: seid not found\n",
  735. vsi_seid);
  736. goto command_write_done;
  737. }
  738. dev_info(&pf->pdev->dev, "deleting VSI %d\n", vsi_seid);
  739. i40e_vsi_release(vsi);
  740. } else if (strncmp(cmd_buf, "add relay", 9) == 0) {
  741. struct i40e_veb *veb;
  742. u8 enabled_tc = 0x1;
  743. int uplink_seid;
  744. cnt = sscanf(&cmd_buf[9], "%i %i", &uplink_seid, &vsi_seid);
  745. if (cnt == 0) {
  746. uplink_seid = 0;
  747. vsi_seid = 0;
  748. } else if (cnt != 2) {
  749. dev_info(&pf->pdev->dev,
  750. "add relay: bad command string, cnt=%d\n",
  751. cnt);
  752. goto command_write_done;
  753. } else if (uplink_seid < 0) {
  754. dev_info(&pf->pdev->dev,
  755. "add relay %d: bad uplink seid\n",
  756. uplink_seid);
  757. goto command_write_done;
  758. }
  759. if (uplink_seid != 0 && uplink_seid != pf->mac_seid) {
  760. dev_info(&pf->pdev->dev,
  761. "add relay: relay uplink %d not found\n",
  762. uplink_seid);
  763. goto command_write_done;
  764. } else if (uplink_seid) {
  765. vsi = i40e_pf_get_vsi_by_seid(pf, vsi_seid);
  766. if (!vsi) {
  767. dev_info(&pf->pdev->dev,
  768. "add relay: VSI %d not found\n",
  769. vsi_seid);
  770. goto command_write_done;
  771. }
  772. enabled_tc = vsi->tc_config.enabled_tc;
  773. } else if (vsi_seid) {
  774. dev_info(&pf->pdev->dev,
  775. "add relay: VSI must be 0 for floating relay\n");
  776. goto command_write_done;
  777. }
  778. veb = i40e_veb_setup(pf, uplink_seid, vsi_seid, enabled_tc);
  779. if (veb)
  780. dev_info(&pf->pdev->dev, "added relay %d\n", veb->seid);
  781. else
  782. dev_info(&pf->pdev->dev, "add relay failed\n");
  783. } else if (strncmp(cmd_buf, "del relay", 9) == 0) {
  784. struct i40e_veb *veb;
  785. int i;
  786. cnt = sscanf(&cmd_buf[9], "%i", &veb_seid);
  787. if (cnt != 1) {
  788. dev_info(&pf->pdev->dev,
  789. "del relay: bad command string, cnt=%d\n",
  790. cnt);
  791. goto command_write_done;
  792. } else if (veb_seid < 0) {
  793. dev_info(&pf->pdev->dev,
  794. "del relay %d: bad relay seid\n", veb_seid);
  795. goto command_write_done;
  796. }
  797. /* find the veb */
  798. i40e_pf_for_each_veb(pf, i, veb)
  799. if (veb->seid == veb_seid)
  800. break;
  801. if (i >= I40E_MAX_VEB) {
  802. dev_info(&pf->pdev->dev,
  803. "del relay: relay %d not found\n", veb_seid);
  804. goto command_write_done;
  805. }
  806. dev_info(&pf->pdev->dev, "deleting relay %d\n", veb_seid);
  807. i40e_veb_release(veb);
  808. } else if (strncmp(cmd_buf, "add pvid", 8) == 0) {
  809. unsigned int v;
  810. int ret;
  811. u16 vid;
  812. cnt = sscanf(&cmd_buf[8], "%i %u", &vsi_seid, &v);
  813. if (cnt != 2) {
  814. dev_info(&pf->pdev->dev,
  815. "add pvid: bad command string, cnt=%d\n", cnt);
  816. goto command_write_done;
  817. }
  818. vsi = i40e_dbg_find_vsi(pf, vsi_seid);
  819. if (!vsi) {
  820. dev_info(&pf->pdev->dev, "add pvid: VSI %d not found\n",
  821. vsi_seid);
  822. goto command_write_done;
  823. }
  824. vid = v;
  825. ret = i40e_vsi_add_pvid(vsi, vid);
  826. if (!ret)
  827. dev_info(&pf->pdev->dev,
  828. "add pvid: %d added to VSI %d\n",
  829. vid, vsi_seid);
  830. else
  831. dev_info(&pf->pdev->dev,
  832. "add pvid: %d to VSI %d failed, ret=%d\n",
  833. vid, vsi_seid, ret);
  834. } else if (strncmp(cmd_buf, "del pvid", 8) == 0) {
  835. cnt = sscanf(&cmd_buf[8], "%i", &vsi_seid);
  836. if (cnt != 1) {
  837. dev_info(&pf->pdev->dev,
  838. "del pvid: bad command string, cnt=%d\n",
  839. cnt);
  840. goto command_write_done;
  841. }
  842. vsi = i40e_dbg_find_vsi(pf, vsi_seid);
  843. if (!vsi) {
  844. dev_info(&pf->pdev->dev,
  845. "del pvid: VSI %d not found\n", vsi_seid);
  846. goto command_write_done;
  847. }
  848. i40e_vsi_remove_pvid(vsi);
  849. dev_info(&pf->pdev->dev,
  850. "del pvid: removed from VSI %d\n", vsi_seid);
  851. } else if (strncmp(cmd_buf, "dump", 4) == 0) {
  852. if (strncmp(&cmd_buf[5], "switch", 6) == 0) {
  853. i40e_fetch_switch_configuration(pf, true);
  854. } else if (strncmp(&cmd_buf[5], "vsi", 3) == 0) {
  855. cnt = sscanf(&cmd_buf[8], "%i", &vsi_seid);
  856. if (cnt > 0)
  857. i40e_dbg_dump_vsi_seid(pf, vsi_seid);
  858. else
  859. i40e_dbg_dump_vsi_no_seid(pf);
  860. } else if (strncmp(&cmd_buf[5], "veb", 3) == 0) {
  861. cnt = sscanf(&cmd_buf[8], "%i", &vsi_seid);
  862. if (cnt > 0)
  863. i40e_dbg_dump_veb_seid(pf, vsi_seid);
  864. else
  865. i40e_dbg_dump_veb_all(pf);
  866. } else if (strncmp(&cmd_buf[5], "vf", 2) == 0) {
  867. cnt = sscanf(&cmd_buf[7], "%i", &vf_id);
  868. if (cnt > 0)
  869. i40e_dbg_dump_vf(pf, vf_id);
  870. else
  871. i40e_dbg_dump_vf_all(pf);
  872. } else if (strncmp(&cmd_buf[5], "desc", 4) == 0) {
  873. int ring_id, desc_n;
  874. if (strncmp(&cmd_buf[10], "rx", 2) == 0) {
  875. cnt = sscanf(&cmd_buf[12], "%i %i %i",
  876. &vsi_seid, &ring_id, &desc_n);
  877. i40e_dbg_dump_desc(cnt, vsi_seid, ring_id,
  878. desc_n, pf, RING_TYPE_RX);
  879. } else if (strncmp(&cmd_buf[10], "tx", 2)
  880. == 0) {
  881. cnt = sscanf(&cmd_buf[12], "%i %i %i",
  882. &vsi_seid, &ring_id, &desc_n);
  883. i40e_dbg_dump_desc(cnt, vsi_seid, ring_id,
  884. desc_n, pf, RING_TYPE_TX);
  885. } else if (strncmp(&cmd_buf[10], "xdp", 3)
  886. == 0) {
  887. cnt = sscanf(&cmd_buf[13], "%i %i %i",
  888. &vsi_seid, &ring_id, &desc_n);
  889. i40e_dbg_dump_desc(cnt, vsi_seid, ring_id,
  890. desc_n, pf, RING_TYPE_XDP);
  891. } else if (strncmp(&cmd_buf[10], "aq", 2) == 0) {
  892. i40e_dbg_dump_aq_desc(pf);
  893. } else {
  894. dev_info(&pf->pdev->dev,
  895. "dump desc tx <vsi_seid> <ring_id> [<desc_n>]\n");
  896. dev_info(&pf->pdev->dev,
  897. "dump desc rx <vsi_seid> <ring_id> [<desc_n>]\n");
  898. dev_info(&pf->pdev->dev,
  899. "dump desc xdp <vsi_seid> <ring_id> [<desc_n>]\n");
  900. dev_info(&pf->pdev->dev, "dump desc aq\n");
  901. }
  902. } else if (strncmp(&cmd_buf[5], "reset stats", 11) == 0) {
  903. dev_info(&pf->pdev->dev,
  904. "core reset count: %d\n", pf->corer_count);
  905. dev_info(&pf->pdev->dev,
  906. "global reset count: %d\n", pf->globr_count);
  907. dev_info(&pf->pdev->dev,
  908. "emp reset count: %d\n", pf->empr_count);
  909. dev_info(&pf->pdev->dev,
  910. "pf reset count: %d\n", pf->pfr_count);
  911. } else if (strncmp(&cmd_buf[5], "port", 4) == 0) {
  912. struct i40e_aqc_query_port_ets_config_resp *bw_data;
  913. struct i40e_dcbx_config *cfg =
  914. &pf->hw.local_dcbx_config;
  915. struct i40e_dcbx_config *r_cfg =
  916. &pf->hw.remote_dcbx_config;
  917. int i, ret;
  918. u16 switch_id;
  919. bw_data = kzalloc(sizeof(
  920. struct i40e_aqc_query_port_ets_config_resp),
  921. GFP_KERNEL);
  922. if (!bw_data) {
  923. ret = -ENOMEM;
  924. goto command_write_done;
  925. }
  926. vsi = i40e_pf_get_main_vsi(pf);
  927. switch_id =
  928. le16_to_cpu(vsi->info.switch_id) &
  929. I40E_AQ_VSI_SW_ID_MASK;
  930. ret = i40e_aq_query_port_ets_config(&pf->hw,
  931. switch_id,
  932. bw_data, NULL);
  933. if (ret) {
  934. dev_info(&pf->pdev->dev,
  935. "Query Port ETS Config AQ command failed =0x%x\n",
  936. pf->hw.aq.asq_last_status);
  937. kfree(bw_data);
  938. bw_data = NULL;
  939. goto command_write_done;
  940. }
  941. dev_info(&pf->pdev->dev,
  942. "port bw: tc_valid=0x%x tc_strict_prio=0x%x, tc_bw_max=0x%04x,0x%04x\n",
  943. bw_data->tc_valid_bits,
  944. bw_data->tc_strict_priority_bits,
  945. le16_to_cpu(bw_data->tc_bw_max[0]),
  946. le16_to_cpu(bw_data->tc_bw_max[1]));
  947. for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
  948. dev_info(&pf->pdev->dev, "port bw: tc_bw_share=%d tc_bw_limit=%d\n",
  949. bw_data->tc_bw_share_credits[i],
  950. le16_to_cpu(bw_data->tc_bw_limits[i]));
  951. }
  952. kfree(bw_data);
  953. bw_data = NULL;
  954. dev_info(&pf->pdev->dev,
  955. "port dcbx_mode=%d\n", cfg->dcbx_mode);
  956. dev_info(&pf->pdev->dev,
  957. "port ets_cfg: willing=%d cbs=%d, maxtcs=%d\n",
  958. cfg->etscfg.willing, cfg->etscfg.cbs,
  959. cfg->etscfg.maxtcs);
  960. for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
  961. dev_info(&pf->pdev->dev, "port ets_cfg: %d prio_tc=%d tcbw=%d tctsa=%d\n",
  962. i, cfg->etscfg.prioritytable[i],
  963. cfg->etscfg.tcbwtable[i],
  964. cfg->etscfg.tsatable[i]);
  965. }
  966. for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
  967. dev_info(&pf->pdev->dev, "port ets_rec: %d prio_tc=%d tcbw=%d tctsa=%d\n",
  968. i, cfg->etsrec.prioritytable[i],
  969. cfg->etsrec.tcbwtable[i],
  970. cfg->etsrec.tsatable[i]);
  971. }
  972. dev_info(&pf->pdev->dev,
  973. "port pfc_cfg: willing=%d mbc=%d, pfccap=%d pfcenable=0x%x\n",
  974. cfg->pfc.willing, cfg->pfc.mbc,
  975. cfg->pfc.pfccap, cfg->pfc.pfcenable);
  976. dev_info(&pf->pdev->dev,
  977. "port app_table: num_apps=%d\n", cfg->numapps);
  978. for (i = 0; i < cfg->numapps; i++) {
  979. dev_info(&pf->pdev->dev, "port app_table: %d prio=%d selector=%d protocol=0x%x\n",
  980. i, cfg->app[i].priority,
  981. cfg->app[i].selector,
  982. cfg->app[i].protocolid);
  983. }
  984. /* Peer TLV DCBX data */
  985. dev_info(&pf->pdev->dev,
  986. "remote port ets_cfg: willing=%d cbs=%d, maxtcs=%d\n",
  987. r_cfg->etscfg.willing,
  988. r_cfg->etscfg.cbs, r_cfg->etscfg.maxtcs);
  989. for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
  990. dev_info(&pf->pdev->dev, "remote port ets_cfg: %d prio_tc=%d tcbw=%d tctsa=%d\n",
  991. i, r_cfg->etscfg.prioritytable[i],
  992. r_cfg->etscfg.tcbwtable[i],
  993. r_cfg->etscfg.tsatable[i]);
  994. }
  995. for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
  996. dev_info(&pf->pdev->dev, "remote port ets_rec: %d prio_tc=%d tcbw=%d tctsa=%d\n",
  997. i, r_cfg->etsrec.prioritytable[i],
  998. r_cfg->etsrec.tcbwtable[i],
  999. r_cfg->etsrec.tsatable[i]);
  1000. }
  1001. dev_info(&pf->pdev->dev,
  1002. "remote port pfc_cfg: willing=%d mbc=%d, pfccap=%d pfcenable=0x%x\n",
  1003. r_cfg->pfc.willing,
  1004. r_cfg->pfc.mbc,
  1005. r_cfg->pfc.pfccap,
  1006. r_cfg->pfc.pfcenable);
  1007. dev_info(&pf->pdev->dev,
  1008. "remote port app_table: num_apps=%d\n",
  1009. r_cfg->numapps);
  1010. for (i = 0; i < r_cfg->numapps; i++) {
  1011. dev_info(&pf->pdev->dev, "remote port app_table: %d prio=%d selector=%d protocol=0x%x\n",
  1012. i, r_cfg->app[i].priority,
  1013. r_cfg->app[i].selector,
  1014. r_cfg->app[i].protocolid);
  1015. }
  1016. } else if (strncmp(&cmd_buf[5], "debug fwdata", 12) == 0) {
  1017. int cluster_id, table_id;
  1018. int index, ret;
  1019. u16 buff_len = 4096;
  1020. u32 next_index;
  1021. u8 next_table;
  1022. u8 *buff;
  1023. u16 rlen;
  1024. cnt = sscanf(&cmd_buf[18], "%i %i %i",
  1025. &cluster_id, &table_id, &index);
  1026. if (cnt != 3) {
  1027. dev_info(&pf->pdev->dev,
  1028. "dump debug fwdata <cluster_id> <table_id> <index>\n");
  1029. goto command_write_done;
  1030. }
  1031. dev_info(&pf->pdev->dev,
  1032. "AQ debug dump fwdata params %x %x %x %x\n",
  1033. cluster_id, table_id, index, buff_len);
  1034. buff = kzalloc(buff_len, GFP_KERNEL);
  1035. if (!buff)
  1036. goto command_write_done;
  1037. ret = i40e_aq_debug_dump(&pf->hw, cluster_id, table_id,
  1038. index, buff_len, buff, &rlen,
  1039. &next_table, &next_index,
  1040. NULL);
  1041. if (ret) {
  1042. dev_info(&pf->pdev->dev,
  1043. "debug dump fwdata AQ Failed %d 0x%x\n",
  1044. ret, pf->hw.aq.asq_last_status);
  1045. kfree(buff);
  1046. buff = NULL;
  1047. goto command_write_done;
  1048. }
  1049. dev_info(&pf->pdev->dev,
  1050. "AQ debug dump fwdata rlen=0x%x next_table=0x%x next_index=0x%x\n",
  1051. rlen, next_table, next_index);
  1052. print_hex_dump(KERN_INFO, "AQ buffer WB: ",
  1053. DUMP_PREFIX_OFFSET, 16, 1,
  1054. buff, rlen, true);
  1055. kfree(buff);
  1056. buff = NULL;
  1057. } else {
  1058. dev_info(&pf->pdev->dev,
  1059. "dump desc tx <vsi_seid> <ring_id> [<desc_n>], dump desc rx <vsi_seid> <ring_id> [<desc_n>], dump desc xdp <vsi_seid> <ring_id> [<desc_n>],\n");
  1060. dev_info(&pf->pdev->dev, "dump switch\n");
  1061. dev_info(&pf->pdev->dev, "dump vsi [seid]\n");
  1062. dev_info(&pf->pdev->dev, "dump reset stats\n");
  1063. dev_info(&pf->pdev->dev, "dump port\n");
  1064. dev_info(&pf->pdev->dev, "dump vf [vf_id]\n");
  1065. dev_info(&pf->pdev->dev,
  1066. "dump debug fwdata <cluster_id> <table_id> <index>\n");
  1067. }
  1068. } else if (strncmp(cmd_buf, "pfr", 3) == 0) {
  1069. dev_info(&pf->pdev->dev, "debugfs: forcing PFR\n");
  1070. i40e_do_reset_safe(pf, BIT(__I40E_PF_RESET_REQUESTED));
  1071. } else if (strncmp(cmd_buf, "corer", 5) == 0) {
  1072. dev_info(&pf->pdev->dev, "debugfs: forcing CoreR\n");
  1073. i40e_do_reset_safe(pf, BIT(__I40E_CORE_RESET_REQUESTED));
  1074. } else if (strncmp(cmd_buf, "globr", 5) == 0) {
  1075. dev_info(&pf->pdev->dev, "debugfs: forcing GlobR\n");
  1076. i40e_do_reset_safe(pf, BIT(__I40E_GLOBAL_RESET_REQUESTED));
  1077. } else if (strncmp(cmd_buf, "read", 4) == 0) {
  1078. u32 address;
  1079. u32 value;
  1080. cnt = sscanf(&cmd_buf[4], "%i", &address);
  1081. if (cnt != 1) {
  1082. dev_info(&pf->pdev->dev, "read <reg>\n");
  1083. goto command_write_done;
  1084. }
  1085. /* check the range on address */
  1086. if (address > (pf->ioremap_len - sizeof(u32))) {
  1087. dev_info(&pf->pdev->dev, "read reg address 0x%08x too large, max=0x%08lx\n",
  1088. address, (unsigned long int)(pf->ioremap_len - sizeof(u32)));
  1089. goto command_write_done;
  1090. }
  1091. value = rd32(&pf->hw, address);
  1092. dev_info(&pf->pdev->dev, "read: 0x%08x = 0x%08x\n",
  1093. address, value);
  1094. } else if (strncmp(cmd_buf, "write", 5) == 0) {
  1095. u32 address, value;
  1096. cnt = sscanf(&cmd_buf[5], "%i %i", &address, &value);
  1097. if (cnt != 2) {
  1098. dev_info(&pf->pdev->dev, "write <reg> <value>\n");
  1099. goto command_write_done;
  1100. }
  1101. /* check the range on address */
  1102. if (address > (pf->ioremap_len - sizeof(u32))) {
  1103. dev_info(&pf->pdev->dev, "write reg address 0x%08x too large, max=0x%08lx\n",
  1104. address, (unsigned long int)(pf->ioremap_len - sizeof(u32)));
  1105. goto command_write_done;
  1106. }
  1107. wr32(&pf->hw, address, value);
  1108. value = rd32(&pf->hw, address);
  1109. dev_info(&pf->pdev->dev, "write: 0x%08x = 0x%08x\n",
  1110. address, value);
  1111. } else if (strncmp(cmd_buf, "clear_stats", 11) == 0) {
  1112. if (strncmp(&cmd_buf[12], "vsi", 3) == 0) {
  1113. cnt = sscanf(&cmd_buf[15], "%i", &vsi_seid);
  1114. if (cnt == 0) {
  1115. int i;
  1116. i40e_pf_for_each_vsi(pf, i, vsi)
  1117. i40e_vsi_reset_stats(vsi);
  1118. dev_info(&pf->pdev->dev, "vsi clear stats called for all vsi's\n");
  1119. } else if (cnt == 1) {
  1120. vsi = i40e_dbg_find_vsi(pf, vsi_seid);
  1121. if (!vsi) {
  1122. dev_info(&pf->pdev->dev,
  1123. "clear_stats vsi: bad vsi %d\n",
  1124. vsi_seid);
  1125. goto command_write_done;
  1126. }
  1127. i40e_vsi_reset_stats(vsi);
  1128. dev_info(&pf->pdev->dev,
  1129. "vsi clear stats called for vsi %d\n",
  1130. vsi_seid);
  1131. } else {
  1132. dev_info(&pf->pdev->dev, "clear_stats vsi [seid]\n");
  1133. }
  1134. } else if (strncmp(&cmd_buf[12], "port", 4) == 0) {
  1135. if (pf->hw.partition_id == 1) {
  1136. i40e_pf_reset_stats(pf);
  1137. dev_info(&pf->pdev->dev, "port stats cleared\n");
  1138. } else {
  1139. dev_info(&pf->pdev->dev, "clear port stats not allowed on this port partition\n");
  1140. }
  1141. } else {
  1142. dev_info(&pf->pdev->dev, "clear_stats vsi [seid] or clear_stats port\n");
  1143. }
  1144. } else if (strncmp(cmd_buf, "send aq_cmd", 11) == 0) {
  1145. struct i40e_aq_desc *desc;
  1146. int ret;
  1147. desc = kzalloc(sizeof(struct i40e_aq_desc), GFP_KERNEL);
  1148. if (!desc)
  1149. goto command_write_done;
  1150. cnt = sscanf(&cmd_buf[11],
  1151. "%hi %hi %hi %hi %i %i %i %i %i %i",
  1152. &desc->flags,
  1153. &desc->opcode, &desc->datalen, &desc->retval,
  1154. &desc->cookie_high, &desc->cookie_low,
  1155. &desc->params.internal.param0,
  1156. &desc->params.internal.param1,
  1157. &desc->params.internal.param2,
  1158. &desc->params.internal.param3);
  1159. if (cnt != 10) {
  1160. dev_info(&pf->pdev->dev,
  1161. "send aq_cmd: bad command string, cnt=%d\n",
  1162. cnt);
  1163. kfree(desc);
  1164. desc = NULL;
  1165. goto command_write_done;
  1166. }
  1167. ret = i40e_asq_send_command(&pf->hw, desc, NULL, 0, NULL);
  1168. if (!ret) {
  1169. dev_info(&pf->pdev->dev, "AQ command sent Status : Success\n");
  1170. } else if (ret == -EIO) {
  1171. dev_info(&pf->pdev->dev,
  1172. "AQ command send failed Opcode %x AQ Error: %d\n",
  1173. desc->opcode, pf->hw.aq.asq_last_status);
  1174. } else {
  1175. dev_info(&pf->pdev->dev,
  1176. "AQ command send failed Opcode %x Status: %d\n",
  1177. desc->opcode, ret);
  1178. }
  1179. dev_info(&pf->pdev->dev,
  1180. "AQ desc WB 0x%04x 0x%04x 0x%04x 0x%04x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
  1181. desc->flags, desc->opcode, desc->datalen, desc->retval,
  1182. desc->cookie_high, desc->cookie_low,
  1183. desc->params.internal.param0,
  1184. desc->params.internal.param1,
  1185. desc->params.internal.param2,
  1186. desc->params.internal.param3);
  1187. kfree(desc);
  1188. desc = NULL;
  1189. } else if (strncmp(cmd_buf, "send indirect aq_cmd", 20) == 0) {
  1190. struct i40e_aq_desc *desc;
  1191. u16 buffer_len;
  1192. u8 *buff;
  1193. int ret;
  1194. desc = kzalloc(sizeof(struct i40e_aq_desc), GFP_KERNEL);
  1195. if (!desc)
  1196. goto command_write_done;
  1197. cnt = sscanf(&cmd_buf[20],
  1198. "%hi %hi %hi %hi %i %i %i %i %i %i %hi",
  1199. &desc->flags,
  1200. &desc->opcode, &desc->datalen, &desc->retval,
  1201. &desc->cookie_high, &desc->cookie_low,
  1202. &desc->params.internal.param0,
  1203. &desc->params.internal.param1,
  1204. &desc->params.internal.param2,
  1205. &desc->params.internal.param3,
  1206. &buffer_len);
  1207. if (cnt != 11) {
  1208. dev_info(&pf->pdev->dev,
  1209. "send indirect aq_cmd: bad command string, cnt=%d\n",
  1210. cnt);
  1211. kfree(desc);
  1212. desc = NULL;
  1213. goto command_write_done;
  1214. }
  1215. /* Just stub a buffer big enough in case user messed up */
  1216. if (buffer_len == 0)
  1217. buffer_len = 1280;
  1218. buff = kzalloc(buffer_len, GFP_KERNEL);
  1219. if (!buff) {
  1220. kfree(desc);
  1221. desc = NULL;
  1222. goto command_write_done;
  1223. }
  1224. desc->flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
  1225. ret = i40e_asq_send_command(&pf->hw, desc, buff,
  1226. buffer_len, NULL);
  1227. if (!ret) {
  1228. dev_info(&pf->pdev->dev, "AQ command sent Status : Success\n");
  1229. } else if (ret == -EIO) {
  1230. dev_info(&pf->pdev->dev,
  1231. "AQ command send failed Opcode %x AQ Error: %d\n",
  1232. desc->opcode, pf->hw.aq.asq_last_status);
  1233. } else {
  1234. dev_info(&pf->pdev->dev,
  1235. "AQ command send failed Opcode %x Status: %d\n",
  1236. desc->opcode, ret);
  1237. }
  1238. dev_info(&pf->pdev->dev,
  1239. "AQ desc WB 0x%04x 0x%04x 0x%04x 0x%04x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
  1240. desc->flags, desc->opcode, desc->datalen, desc->retval,
  1241. desc->cookie_high, desc->cookie_low,
  1242. desc->params.internal.param0,
  1243. desc->params.internal.param1,
  1244. desc->params.internal.param2,
  1245. desc->params.internal.param3);
  1246. print_hex_dump(KERN_INFO, "AQ buffer WB: ",
  1247. DUMP_PREFIX_OFFSET, 16, 1,
  1248. buff, buffer_len, true);
  1249. kfree(buff);
  1250. buff = NULL;
  1251. kfree(desc);
  1252. desc = NULL;
  1253. } else if (strncmp(cmd_buf, "fd current cnt", 14) == 0) {
  1254. dev_info(&pf->pdev->dev, "FD current total filter count for this interface: %d\n",
  1255. i40e_get_current_fd_count(pf));
  1256. } else if (strncmp(cmd_buf, "lldp", 4) == 0) {
  1257. /* Get main VSI */
  1258. struct i40e_vsi *main_vsi = i40e_pf_get_main_vsi(pf);
  1259. if (strncmp(&cmd_buf[5], "stop", 4) == 0) {
  1260. int ret;
  1261. ret = i40e_aq_stop_lldp(&pf->hw, false, false, NULL);
  1262. if (ret) {
  1263. dev_info(&pf->pdev->dev,
  1264. "Stop LLDP AQ command failed =0x%x\n",
  1265. pf->hw.aq.asq_last_status);
  1266. goto command_write_done;
  1267. }
  1268. ret = i40e_aq_add_rem_control_packet_filter(&pf->hw,
  1269. pf->hw.mac.addr, ETH_P_LLDP, 0,
  1270. main_vsi->seid, 0, true, NULL,
  1271. NULL);
  1272. if (ret) {
  1273. dev_info(&pf->pdev->dev,
  1274. "%s: Add Control Packet Filter AQ command failed =0x%x\n",
  1275. __func__, pf->hw.aq.asq_last_status);
  1276. goto command_write_done;
  1277. }
  1278. #ifdef CONFIG_I40E_DCB
  1279. pf->dcbx_cap = DCB_CAP_DCBX_HOST |
  1280. DCB_CAP_DCBX_VER_IEEE;
  1281. #endif /* CONFIG_I40E_DCB */
  1282. } else if (strncmp(&cmd_buf[5], "start", 5) == 0) {
  1283. int ret;
  1284. ret = i40e_aq_add_rem_control_packet_filter(&pf->hw,
  1285. pf->hw.mac.addr, ETH_P_LLDP, 0,
  1286. main_vsi->seid, 0, false, NULL,
  1287. NULL);
  1288. if (ret) {
  1289. dev_info(&pf->pdev->dev,
  1290. "%s: Remove Control Packet Filter AQ command failed =0x%x\n",
  1291. __func__, pf->hw.aq.asq_last_status);
  1292. /* Continue and start FW LLDP anyways */
  1293. }
  1294. ret = i40e_aq_start_lldp(&pf->hw, false, NULL);
  1295. if (ret) {
  1296. dev_info(&pf->pdev->dev,
  1297. "Start LLDP AQ command failed =0x%x\n",
  1298. pf->hw.aq.asq_last_status);
  1299. goto command_write_done;
  1300. }
  1301. #ifdef CONFIG_I40E_DCB
  1302. pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
  1303. DCB_CAP_DCBX_VER_IEEE;
  1304. #endif /* CONFIG_I40E_DCB */
  1305. } else if (strncmp(&cmd_buf[5],
  1306. "get local", 9) == 0) {
  1307. u16 llen, rlen;
  1308. int ret;
  1309. u8 *buff;
  1310. buff = kzalloc(I40E_LLDPDU_SIZE, GFP_KERNEL);
  1311. if (!buff)
  1312. goto command_write_done;
  1313. ret = i40e_aq_get_lldp_mib(&pf->hw, 0,
  1314. I40E_AQ_LLDP_MIB_LOCAL,
  1315. buff, I40E_LLDPDU_SIZE,
  1316. &llen, &rlen, NULL);
  1317. if (ret) {
  1318. dev_info(&pf->pdev->dev,
  1319. "Get LLDP MIB (local) AQ command failed =0x%x\n",
  1320. pf->hw.aq.asq_last_status);
  1321. kfree(buff);
  1322. buff = NULL;
  1323. goto command_write_done;
  1324. }
  1325. dev_info(&pf->pdev->dev, "LLDP MIB (local)\n");
  1326. print_hex_dump(KERN_INFO, "LLDP MIB (local): ",
  1327. DUMP_PREFIX_OFFSET, 16, 1,
  1328. buff, I40E_LLDPDU_SIZE, true);
  1329. kfree(buff);
  1330. buff = NULL;
  1331. } else if (strncmp(&cmd_buf[5], "get remote", 10) == 0) {
  1332. u16 llen, rlen;
  1333. int ret;
  1334. u8 *buff;
  1335. buff = kzalloc(I40E_LLDPDU_SIZE, GFP_KERNEL);
  1336. if (!buff)
  1337. goto command_write_done;
  1338. ret = i40e_aq_get_lldp_mib(&pf->hw,
  1339. I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
  1340. I40E_AQ_LLDP_MIB_REMOTE,
  1341. buff, I40E_LLDPDU_SIZE,
  1342. &llen, &rlen, NULL);
  1343. if (ret) {
  1344. dev_info(&pf->pdev->dev,
  1345. "Get LLDP MIB (remote) AQ command failed =0x%x\n",
  1346. pf->hw.aq.asq_last_status);
  1347. kfree(buff);
  1348. buff = NULL;
  1349. goto command_write_done;
  1350. }
  1351. dev_info(&pf->pdev->dev, "LLDP MIB (remote)\n");
  1352. print_hex_dump(KERN_INFO, "LLDP MIB (remote): ",
  1353. DUMP_PREFIX_OFFSET, 16, 1,
  1354. buff, I40E_LLDPDU_SIZE, true);
  1355. kfree(buff);
  1356. buff = NULL;
  1357. } else if (strncmp(&cmd_buf[5], "event on", 8) == 0) {
  1358. int ret;
  1359. ret = i40e_aq_cfg_lldp_mib_change_event(&pf->hw,
  1360. true, NULL);
  1361. if (ret) {
  1362. dev_info(&pf->pdev->dev,
  1363. "Config LLDP MIB Change Event (on) AQ command failed =0x%x\n",
  1364. pf->hw.aq.asq_last_status);
  1365. goto command_write_done;
  1366. }
  1367. } else if (strncmp(&cmd_buf[5], "event off", 9) == 0) {
  1368. int ret;
  1369. ret = i40e_aq_cfg_lldp_mib_change_event(&pf->hw,
  1370. false, NULL);
  1371. if (ret) {
  1372. dev_info(&pf->pdev->dev,
  1373. "Config LLDP MIB Change Event (off) AQ command failed =0x%x\n",
  1374. pf->hw.aq.asq_last_status);
  1375. goto command_write_done;
  1376. }
  1377. }
  1378. } else if (strncmp(cmd_buf, "nvm read", 8) == 0) {
  1379. u16 buffer_len, bytes;
  1380. u16 module;
  1381. u32 offset;
  1382. u16 *buff;
  1383. int ret;
  1384. cnt = sscanf(&cmd_buf[8], "%hx %x %hx",
  1385. &module, &offset, &buffer_len);
  1386. if (cnt == 0) {
  1387. module = 0;
  1388. offset = 0;
  1389. buffer_len = 0;
  1390. } else if (cnt == 1) {
  1391. offset = 0;
  1392. buffer_len = 0;
  1393. } else if (cnt == 2) {
  1394. buffer_len = 0;
  1395. } else if (cnt > 3) {
  1396. dev_info(&pf->pdev->dev,
  1397. "nvm read: bad command string, cnt=%d\n", cnt);
  1398. goto command_write_done;
  1399. }
  1400. /* set the max length */
  1401. buffer_len = min_t(u16, buffer_len, I40E_MAX_AQ_BUF_SIZE/2);
  1402. bytes = 2 * buffer_len;
  1403. /* read at least 1k bytes, no more than 4kB */
  1404. bytes = clamp(bytes, (u16)1024, (u16)I40E_MAX_AQ_BUF_SIZE);
  1405. buff = kzalloc(bytes, GFP_KERNEL);
  1406. if (!buff)
  1407. goto command_write_done;
  1408. ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
  1409. if (ret) {
  1410. dev_info(&pf->pdev->dev,
  1411. "Failed Acquiring NVM resource for read err=%d status=0x%x\n",
  1412. ret, pf->hw.aq.asq_last_status);
  1413. kfree(buff);
  1414. goto command_write_done;
  1415. }
  1416. ret = i40e_aq_read_nvm(&pf->hw, module, (2 * offset),
  1417. bytes, (u8 *)buff, true, NULL);
  1418. i40e_release_nvm(&pf->hw);
  1419. if (ret) {
  1420. dev_info(&pf->pdev->dev,
  1421. "Read NVM AQ failed err=%d status=0x%x\n",
  1422. ret, pf->hw.aq.asq_last_status);
  1423. } else {
  1424. dev_info(&pf->pdev->dev,
  1425. "Read NVM module=0x%x offset=0x%x words=%d\n",
  1426. module, offset, buffer_len);
  1427. if (bytes)
  1428. print_hex_dump(KERN_INFO, "NVM Dump: ",
  1429. DUMP_PREFIX_OFFSET, 16, 2,
  1430. buff, bytes, true);
  1431. }
  1432. kfree(buff);
  1433. buff = NULL;
  1434. } else {
  1435. dev_info(&pf->pdev->dev, "unknown command '%s'\n", cmd_buf);
  1436. dev_info(&pf->pdev->dev, "available commands\n");
  1437. dev_info(&pf->pdev->dev, " add vsi [relay_seid]\n");
  1438. dev_info(&pf->pdev->dev, " del vsi [vsi_seid]\n");
  1439. dev_info(&pf->pdev->dev, " add relay <uplink_seid> <vsi_seid>\n");
  1440. dev_info(&pf->pdev->dev, " del relay <relay_seid>\n");
  1441. dev_info(&pf->pdev->dev, " add pvid <vsi_seid> <vid>\n");
  1442. dev_info(&pf->pdev->dev, " del pvid <vsi_seid>\n");
  1443. dev_info(&pf->pdev->dev, " dump switch\n");
  1444. dev_info(&pf->pdev->dev, " dump vsi [seid]\n");
  1445. dev_info(&pf->pdev->dev, " dump desc tx <vsi_seid> <ring_id> [<desc_n>]\n");
  1446. dev_info(&pf->pdev->dev, " dump desc rx <vsi_seid> <ring_id> [<desc_n>]\n");
  1447. dev_info(&pf->pdev->dev, " dump desc xdp <vsi_seid> <ring_id> [<desc_n>]\n");
  1448. dev_info(&pf->pdev->dev, " dump desc aq\n");
  1449. dev_info(&pf->pdev->dev, " dump reset stats\n");
  1450. dev_info(&pf->pdev->dev, " dump debug fwdata <cluster_id> <table_id> <index>\n");
  1451. dev_info(&pf->pdev->dev, " read <reg>\n");
  1452. dev_info(&pf->pdev->dev, " write <reg> <value>\n");
  1453. dev_info(&pf->pdev->dev, " clear_stats vsi [seid]\n");
  1454. dev_info(&pf->pdev->dev, " clear_stats port\n");
  1455. dev_info(&pf->pdev->dev, " pfr\n");
  1456. dev_info(&pf->pdev->dev, " corer\n");
  1457. dev_info(&pf->pdev->dev, " globr\n");
  1458. dev_info(&pf->pdev->dev, " send aq_cmd <flags> <opcode> <datalen> <retval> <cookie_h> <cookie_l> <param0> <param1> <param2> <param3>\n");
  1459. dev_info(&pf->pdev->dev, " send indirect aq_cmd <flags> <opcode> <datalen> <retval> <cookie_h> <cookie_l> <param0> <param1> <param2> <param3> <buffer_len>\n");
  1460. dev_info(&pf->pdev->dev, " fd current cnt");
  1461. dev_info(&pf->pdev->dev, " lldp start\n");
  1462. dev_info(&pf->pdev->dev, " lldp stop\n");
  1463. dev_info(&pf->pdev->dev, " lldp get local\n");
  1464. dev_info(&pf->pdev->dev, " lldp get remote\n");
  1465. dev_info(&pf->pdev->dev, " lldp event on\n");
  1466. dev_info(&pf->pdev->dev, " lldp event off\n");
  1467. dev_info(&pf->pdev->dev, " nvm read [module] [word_offset] [word_count]\n");
  1468. }
  1469. command_write_done:
  1470. kfree(cmd_buf);
  1471. cmd_buf = NULL;
  1472. return count;
  1473. }
  1474. static const struct file_operations i40e_dbg_command_fops = {
  1475. .owner = THIS_MODULE,
  1476. .open = simple_open,
  1477. .write = i40e_dbg_command_write,
  1478. };
  1479. /**************************************************************
  1480. * netdev_ops
  1481. * The netdev_ops entry in debugfs is for giving the driver commands
  1482. * to be executed from the netdev operations.
  1483. **************************************************************/
  1484. /**
  1485. * i40e_dbg_netdev_ops_write - write into netdev_ops datum
  1486. * @filp: the opened file
  1487. * @buffer: where to find the user's data
  1488. * @count: the length of the user's data
  1489. * @ppos: file position offset
  1490. **/
  1491. static ssize_t i40e_dbg_netdev_ops_write(struct file *filp,
  1492. const char __user *buffer,
  1493. size_t count, loff_t *ppos)
  1494. {
  1495. struct i40e_pf *pf = filp->private_data;
  1496. char *cmd_buf, *buf_tmp;
  1497. int bytes_not_copied;
  1498. struct i40e_vsi *vsi;
  1499. int vsi_seid;
  1500. int i, cnt;
  1501. /* don't allow partial writes */
  1502. if (*ppos != 0)
  1503. return 0;
  1504. cmd_buf = kzalloc(count + 1, GFP_KERNEL);
  1505. if (!cmd_buf)
  1506. return count;
  1507. bytes_not_copied = copy_from_user(cmd_buf, buffer, count);
  1508. if (bytes_not_copied) {
  1509. kfree(cmd_buf);
  1510. return -EFAULT;
  1511. }
  1512. cmd_buf[count] = '\0';
  1513. buf_tmp = strchr(cmd_buf, '\n');
  1514. if (buf_tmp) {
  1515. *buf_tmp = '\0';
  1516. count = buf_tmp - cmd_buf + 1;
  1517. }
  1518. if (strncmp(cmd_buf, "change_mtu", 10) == 0) {
  1519. int mtu;
  1520. cnt = sscanf(&cmd_buf[11], "%i %i",
  1521. &vsi_seid, &mtu);
  1522. if (cnt != 2) {
  1523. dev_info(&pf->pdev->dev, "change_mtu <vsi_seid> <mtu>\n");
  1524. goto netdev_ops_write_done;
  1525. }
  1526. vsi = i40e_dbg_find_vsi(pf, vsi_seid);
  1527. if (!vsi) {
  1528. dev_info(&pf->pdev->dev,
  1529. "change_mtu: VSI %d not found\n", vsi_seid);
  1530. } else if (!vsi->netdev) {
  1531. dev_info(&pf->pdev->dev, "change_mtu: no netdev for VSI %d\n",
  1532. vsi_seid);
  1533. } else if (rtnl_trylock()) {
  1534. vsi->netdev->netdev_ops->ndo_change_mtu(vsi->netdev,
  1535. mtu);
  1536. rtnl_unlock();
  1537. dev_info(&pf->pdev->dev, "change_mtu called\n");
  1538. } else {
  1539. dev_info(&pf->pdev->dev, "Could not acquire RTNL - please try again\n");
  1540. }
  1541. } else if (strncmp(cmd_buf, "set_rx_mode", 11) == 0) {
  1542. cnt = sscanf(&cmd_buf[11], "%i", &vsi_seid);
  1543. if (cnt != 1) {
  1544. dev_info(&pf->pdev->dev, "set_rx_mode <vsi_seid>\n");
  1545. goto netdev_ops_write_done;
  1546. }
  1547. vsi = i40e_dbg_find_vsi(pf, vsi_seid);
  1548. if (!vsi) {
  1549. dev_info(&pf->pdev->dev,
  1550. "set_rx_mode: VSI %d not found\n", vsi_seid);
  1551. } else if (!vsi->netdev) {
  1552. dev_info(&pf->pdev->dev, "set_rx_mode: no netdev for VSI %d\n",
  1553. vsi_seid);
  1554. } else if (rtnl_trylock()) {
  1555. vsi->netdev->netdev_ops->ndo_set_rx_mode(vsi->netdev);
  1556. rtnl_unlock();
  1557. dev_info(&pf->pdev->dev, "set_rx_mode called\n");
  1558. } else {
  1559. dev_info(&pf->pdev->dev, "Could not acquire RTNL - please try again\n");
  1560. }
  1561. } else if (strncmp(cmd_buf, "napi", 4) == 0) {
  1562. cnt = sscanf(&cmd_buf[4], "%i", &vsi_seid);
  1563. if (cnt != 1) {
  1564. dev_info(&pf->pdev->dev, "napi <vsi_seid>\n");
  1565. goto netdev_ops_write_done;
  1566. }
  1567. vsi = i40e_dbg_find_vsi(pf, vsi_seid);
  1568. if (!vsi) {
  1569. dev_info(&pf->pdev->dev, "napi: VSI %d not found\n",
  1570. vsi_seid);
  1571. } else if (!vsi->netdev) {
  1572. dev_info(&pf->pdev->dev, "napi: no netdev for VSI %d\n",
  1573. vsi_seid);
  1574. } else {
  1575. for (i = 0; i < vsi->num_q_vectors; i++)
  1576. napi_schedule(&vsi->q_vectors[i]->napi);
  1577. dev_info(&pf->pdev->dev, "napi called\n");
  1578. }
  1579. } else {
  1580. dev_info(&pf->pdev->dev, "unknown command '%s'\n", cmd_buf);
  1581. dev_info(&pf->pdev->dev, "available commands\n");
  1582. dev_info(&pf->pdev->dev, " change_mtu <vsi_seid> <mtu>\n");
  1583. dev_info(&pf->pdev->dev, " set_rx_mode <vsi_seid>\n");
  1584. dev_info(&pf->pdev->dev, " napi <vsi_seid>\n");
  1585. }
  1586. netdev_ops_write_done:
  1587. kfree(cmd_buf);
  1588. return count;
  1589. }
  1590. static const struct file_operations i40e_dbg_netdev_ops_fops = {
  1591. .owner = THIS_MODULE,
  1592. .open = simple_open,
  1593. .write = i40e_dbg_netdev_ops_write,
  1594. };
  1595. /**
  1596. * i40e_dbg_pf_init - setup the debugfs directory for the PF
  1597. * @pf: the PF that is starting up
  1598. **/
  1599. void i40e_dbg_pf_init(struct i40e_pf *pf)
  1600. {
  1601. const char *name = pci_name(pf->pdev);
  1602. pf->i40e_dbg_pf = debugfs_create_dir(name, i40e_dbg_root);
  1603. debugfs_create_file("command", 0600, pf->i40e_dbg_pf, pf,
  1604. &i40e_dbg_command_fops);
  1605. debugfs_create_file("netdev_ops", 0600, pf->i40e_dbg_pf, pf,
  1606. &i40e_dbg_netdev_ops_fops);
  1607. }
  1608. /**
  1609. * i40e_dbg_pf_exit - clear out the PF's debugfs entries
  1610. * @pf: the PF that is stopping
  1611. **/
  1612. void i40e_dbg_pf_exit(struct i40e_pf *pf)
  1613. {
  1614. debugfs_remove_recursive(pf->i40e_dbg_pf);
  1615. pf->i40e_dbg_pf = NULL;
  1616. }
  1617. /**
  1618. * i40e_dbg_init - start up debugfs for the driver
  1619. **/
  1620. void i40e_dbg_init(void)
  1621. {
  1622. i40e_dbg_root = debugfs_create_dir(i40e_driver_name, NULL);
  1623. if (IS_ERR(i40e_dbg_root))
  1624. pr_info("init of debugfs failed\n");
  1625. }
  1626. /**
  1627. * i40e_dbg_exit - clean out the driver's debugfs entries
  1628. **/
  1629. void i40e_dbg_exit(void)
  1630. {
  1631. debugfs_remove_recursive(i40e_dbg_root);
  1632. i40e_dbg_root = NULL;
  1633. }
  1634. #endif /* CONFIG_DEBUG_FS */