i40e_ethtool.c 179 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright(c) 2013 - 2018 Intel Corporation. */
  3. /* ethtool support for i40e */
  4. #include "i40e_devids.h"
  5. #include "i40e_diag.h"
  6. #include "i40e_txrx_common.h"
  7. #include "i40e_virtchnl_pf.h"
  8. /* ethtool statistics helpers */
  9. /**
  10. * struct i40e_stats - definition for an ethtool statistic
  11. * @stat_string: statistic name to display in ethtool -S output
  12. * @sizeof_stat: the sizeof() the stat, must be no greater than sizeof(u64)
  13. * @stat_offset: offsetof() the stat from a base pointer
  14. *
  15. * This structure defines a statistic to be added to the ethtool stats buffer.
  16. * It defines a statistic as offset from a common base pointer. Stats should
  17. * be defined in constant arrays using the I40E_STAT macro, with every element
  18. * of the array using the same _type for calculating the sizeof_stat and
  19. * stat_offset.
  20. *
  21. * The @sizeof_stat is expected to be sizeof(u8), sizeof(u16), sizeof(u32) or
  22. * sizeof(u64). Other sizes are not expected and will produce a WARN_ONCE from
  23. * the i40e_add_ethtool_stat() helper function.
  24. *
  25. * The @stat_string is interpreted as a format string, allowing formatted
  26. * values to be inserted while looping over multiple structures for a given
  27. * statistics array. Thus, every statistic string in an array should have the
  28. * same type and number of format specifiers, to be formatted by variadic
  29. * arguments to the i40e_add_stat_string() helper function.
  30. **/
  31. struct i40e_stats {
  32. char stat_string[ETH_GSTRING_LEN];
  33. int sizeof_stat;
  34. int stat_offset;
  35. };
  36. /* Helper macro to define an i40e_stat structure with proper size and type.
  37. * Use this when defining constant statistics arrays. Note that @_type expects
  38. * only a type name and is used multiple times.
  39. */
  40. #define I40E_STAT(_type, _name, _stat) { \
  41. .stat_string = _name, \
  42. .sizeof_stat = sizeof_field(_type, _stat), \
  43. .stat_offset = offsetof(_type, _stat) \
  44. }
  45. /* Helper macro for defining some statistics directly copied from the netdev
  46. * stats structure.
  47. */
  48. #define I40E_NETDEV_STAT(_net_stat) \
  49. I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat)
  50. /* Helper macro for defining some statistics related to queues */
  51. #define I40E_QUEUE_STAT(_name, _stat) \
  52. I40E_STAT(struct i40e_ring, _name, _stat)
  53. /* Stats associated with a Tx or Rx ring */
  54. static const struct i40e_stats i40e_gstrings_queue_stats[] = {
  55. I40E_QUEUE_STAT("%s-%u.packets", stats.packets),
  56. I40E_QUEUE_STAT("%s-%u.bytes", stats.bytes),
  57. };
  58. /**
  59. * i40e_add_one_ethtool_stat - copy the stat into the supplied buffer
  60. * @data: location to store the stat value
  61. * @pointer: basis for where to copy from
  62. * @stat: the stat definition
  63. *
  64. * Copies the stat data defined by the pointer and stat structure pair into
  65. * the memory supplied as data. Used to implement i40e_add_ethtool_stats and
  66. * i40e_add_queue_stats. If the pointer is null, data will be zero'd.
  67. */
  68. static void
  69. i40e_add_one_ethtool_stat(u64 *data, void *pointer,
  70. const struct i40e_stats *stat)
  71. {
  72. char *p;
  73. if (!pointer) {
  74. /* ensure that the ethtool data buffer is zero'd for any stats
  75. * which don't have a valid pointer.
  76. */
  77. *data = 0;
  78. return;
  79. }
  80. p = (char *)pointer + stat->stat_offset;
  81. switch (stat->sizeof_stat) {
  82. case sizeof(u64):
  83. *data = *((u64 *)p);
  84. break;
  85. case sizeof(u32):
  86. *data = *((u32 *)p);
  87. break;
  88. case sizeof(u16):
  89. *data = *((u16 *)p);
  90. break;
  91. case sizeof(u8):
  92. *data = *((u8 *)p);
  93. break;
  94. default:
  95. WARN_ONCE(1, "unexpected stat size for %s",
  96. stat->stat_string);
  97. *data = 0;
  98. }
  99. }
  100. /**
  101. * __i40e_add_ethtool_stats - copy stats into the ethtool supplied buffer
  102. * @data: ethtool stats buffer
  103. * @pointer: location to copy stats from
  104. * @stats: array of stats to copy
  105. * @size: the size of the stats definition
  106. *
  107. * Copy the stats defined by the stats array using the pointer as a base into
  108. * the data buffer supplied by ethtool. Updates the data pointer to point to
  109. * the next empty location for successive calls to __i40e_add_ethtool_stats.
  110. * If pointer is null, set the data values to zero and update the pointer to
  111. * skip these stats.
  112. **/
  113. static void
  114. __i40e_add_ethtool_stats(u64 **data, void *pointer,
  115. const struct i40e_stats stats[],
  116. const unsigned int size)
  117. {
  118. unsigned int i;
  119. for (i = 0; i < size; i++)
  120. i40e_add_one_ethtool_stat((*data)++, pointer, &stats[i]);
  121. }
  122. /**
  123. * i40e_add_ethtool_stats - copy stats into ethtool supplied buffer
  124. * @data: ethtool stats buffer
  125. * @pointer: location where stats are stored
  126. * @stats: static const array of stat definitions
  127. *
  128. * Macro to ease the use of __i40e_add_ethtool_stats by taking a static
  129. * constant stats array and passing the ARRAY_SIZE(). This avoids typos by
  130. * ensuring that we pass the size associated with the given stats array.
  131. *
  132. * The parameter @stats is evaluated twice, so parameters with side effects
  133. * should be avoided.
  134. **/
  135. #define i40e_add_ethtool_stats(data, pointer, stats) \
  136. __i40e_add_ethtool_stats(data, pointer, stats, ARRAY_SIZE(stats))
  137. /**
  138. * i40e_add_queue_stats - copy queue statistics into supplied buffer
  139. * @data: ethtool stats buffer
  140. * @ring: the ring to copy
  141. *
  142. * Queue statistics must be copied while protected by
  143. * u64_stats_fetch_begin, so we can't directly use i40e_add_ethtool_stats.
  144. * Assumes that queue stats are defined in i40e_gstrings_queue_stats. If the
  145. * ring pointer is null, zero out the queue stat values and update the data
  146. * pointer. Otherwise safely copy the stats from the ring into the supplied
  147. * buffer and update the data pointer when finished.
  148. *
  149. * This function expects to be called while under rcu_read_lock().
  150. **/
  151. static void
  152. i40e_add_queue_stats(u64 **data, struct i40e_ring *ring)
  153. {
  154. const unsigned int size = ARRAY_SIZE(i40e_gstrings_queue_stats);
  155. const struct i40e_stats *stats = i40e_gstrings_queue_stats;
  156. unsigned int start;
  157. unsigned int i;
  158. /* To avoid invalid statistics values, ensure that we keep retrying
  159. * the copy until we get a consistent value according to
  160. * u64_stats_fetch_retry. But first, make sure our ring is
  161. * non-null before attempting to access its syncp.
  162. */
  163. do {
  164. start = !ring ? 0 : u64_stats_fetch_begin(&ring->syncp);
  165. for (i = 0; i < size; i++) {
  166. i40e_add_one_ethtool_stat(&(*data)[i], ring,
  167. &stats[i]);
  168. }
  169. } while (ring && u64_stats_fetch_retry(&ring->syncp, start));
  170. /* Once we successfully copy the stats in, update the data pointer */
  171. *data += size;
  172. }
  173. /**
  174. * __i40e_add_stat_strings - copy stat strings into ethtool buffer
  175. * @p: ethtool supplied buffer
  176. * @stats: stat definitions array
  177. * @size: size of the stats array
  178. *
  179. * Format and copy the strings described by stats into the buffer pointed at
  180. * by p.
  181. **/
  182. static void __i40e_add_stat_strings(u8 **p, const struct i40e_stats stats[],
  183. const unsigned int size, ...)
  184. {
  185. unsigned int i;
  186. for (i = 0; i < size; i++) {
  187. va_list args;
  188. va_start(args, size);
  189. vsnprintf(*p, ETH_GSTRING_LEN, stats[i].stat_string, args);
  190. *p += ETH_GSTRING_LEN;
  191. va_end(args);
  192. }
  193. }
  194. /**
  195. * i40e_add_stat_strings - copy stat strings into ethtool buffer
  196. * @p: ethtool supplied buffer
  197. * @stats: stat definitions array
  198. *
  199. * Format and copy the strings described by the const static stats value into
  200. * the buffer pointed at by p.
  201. *
  202. * The parameter @stats is evaluated twice, so parameters with side effects
  203. * should be avoided. Additionally, stats must be an array such that
  204. * ARRAY_SIZE can be called on it.
  205. **/
  206. #define i40e_add_stat_strings(p, stats, ...) \
  207. __i40e_add_stat_strings(p, stats, ARRAY_SIZE(stats), ## __VA_ARGS__)
  208. #define I40E_PF_STAT(_name, _stat) \
  209. I40E_STAT(struct i40e_pf, _name, _stat)
  210. #define I40E_VSI_STAT(_name, _stat) \
  211. I40E_STAT(struct i40e_vsi, _name, _stat)
  212. #define I40E_VEB_STAT(_name, _stat) \
  213. I40E_STAT(struct i40e_veb, _name, _stat)
  214. #define I40E_VEB_TC_STAT(_name, _stat) \
  215. I40E_STAT(struct i40e_cp_veb_tc_stats, _name, _stat)
  216. #define I40E_PFC_STAT(_name, _stat) \
  217. I40E_STAT(struct i40e_pfc_stats, _name, _stat)
  218. static const struct i40e_stats i40e_gstrings_net_stats[] = {
  219. I40E_NETDEV_STAT(rx_packets),
  220. I40E_NETDEV_STAT(tx_packets),
  221. I40E_NETDEV_STAT(rx_bytes),
  222. I40E_NETDEV_STAT(tx_bytes),
  223. I40E_NETDEV_STAT(rx_errors),
  224. I40E_NETDEV_STAT(tx_errors),
  225. I40E_NETDEV_STAT(rx_dropped),
  226. I40E_NETDEV_STAT(rx_missed_errors),
  227. I40E_NETDEV_STAT(tx_dropped),
  228. I40E_NETDEV_STAT(collisions),
  229. I40E_NETDEV_STAT(rx_length_errors),
  230. I40E_NETDEV_STAT(rx_crc_errors),
  231. };
  232. static const struct i40e_stats i40e_gstrings_veb_stats[] = {
  233. I40E_VEB_STAT("veb.rx_bytes", stats.rx_bytes),
  234. I40E_VEB_STAT("veb.tx_bytes", stats.tx_bytes),
  235. I40E_VEB_STAT("veb.rx_unicast", stats.rx_unicast),
  236. I40E_VEB_STAT("veb.tx_unicast", stats.tx_unicast),
  237. I40E_VEB_STAT("veb.rx_multicast", stats.rx_multicast),
  238. I40E_VEB_STAT("veb.tx_multicast", stats.tx_multicast),
  239. I40E_VEB_STAT("veb.rx_broadcast", stats.rx_broadcast),
  240. I40E_VEB_STAT("veb.tx_broadcast", stats.tx_broadcast),
  241. I40E_VEB_STAT("veb.rx_discards", stats.rx_discards),
  242. I40E_VEB_STAT("veb.tx_discards", stats.tx_discards),
  243. I40E_VEB_STAT("veb.tx_errors", stats.tx_errors),
  244. I40E_VEB_STAT("veb.rx_unknown_protocol", stats.rx_unknown_protocol),
  245. };
  246. struct i40e_cp_veb_tc_stats {
  247. u64 tc_rx_packets;
  248. u64 tc_rx_bytes;
  249. u64 tc_tx_packets;
  250. u64 tc_tx_bytes;
  251. };
  252. static const struct i40e_stats i40e_gstrings_veb_tc_stats[] = {
  253. I40E_VEB_TC_STAT("veb.tc_%u_tx_packets", tc_tx_packets),
  254. I40E_VEB_TC_STAT("veb.tc_%u_tx_bytes", tc_tx_bytes),
  255. I40E_VEB_TC_STAT("veb.tc_%u_rx_packets", tc_rx_packets),
  256. I40E_VEB_TC_STAT("veb.tc_%u_rx_bytes", tc_rx_bytes),
  257. };
  258. static const struct i40e_stats i40e_gstrings_misc_stats[] = {
  259. I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast),
  260. I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast),
  261. I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast),
  262. I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast),
  263. I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast),
  264. I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast),
  265. I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol),
  266. I40E_VSI_STAT("tx_linearize", tx_linearize),
  267. I40E_VSI_STAT("tx_force_wb", tx_force_wb),
  268. I40E_VSI_STAT("tx_busy", tx_busy),
  269. I40E_VSI_STAT("tx_stopped", tx_stopped),
  270. I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed),
  271. I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed),
  272. I40E_VSI_STAT("rx_cache_reuse", rx_page_reuse),
  273. I40E_VSI_STAT("rx_cache_alloc", rx_page_alloc),
  274. I40E_VSI_STAT("rx_cache_waive", rx_page_waive),
  275. I40E_VSI_STAT("rx_cache_busy", rx_page_busy),
  276. I40E_VSI_STAT("tx_restart", tx_restart),
  277. };
  278. /* These PF_STATs might look like duplicates of some NETDEV_STATs,
  279. * but they are separate. This device supports Virtualization, and
  280. * as such might have several netdevs supporting VMDq and FCoE going
  281. * through a single port. The NETDEV_STATs are for individual netdevs
  282. * seen at the top of the stack, and the PF_STATs are for the physical
  283. * function at the bottom of the stack hosting those netdevs.
  284. *
  285. * The PF_STATs are appended to the netdev stats only when ethtool -S
  286. * is queried on the base PF netdev, not on the VMDq or FCoE netdev.
  287. */
  288. static const struct i40e_stats i40e_gstrings_stats[] = {
  289. I40E_PF_STAT("port.rx_bytes", stats.eth.rx_bytes),
  290. I40E_PF_STAT("port.tx_bytes", stats.eth.tx_bytes),
  291. I40E_PF_STAT("port.rx_unicast", stats.eth.rx_unicast),
  292. I40E_PF_STAT("port.tx_unicast", stats.eth.tx_unicast),
  293. I40E_PF_STAT("port.rx_multicast", stats.eth.rx_multicast),
  294. I40E_PF_STAT("port.tx_multicast", stats.eth.tx_multicast),
  295. I40E_PF_STAT("port.rx_broadcast", stats.eth.rx_broadcast),
  296. I40E_PF_STAT("port.tx_broadcast", stats.eth.tx_broadcast),
  297. I40E_PF_STAT("port.tx_errors", stats.eth.tx_errors),
  298. I40E_PF_STAT("port.rx_discards", stats.eth.rx_discards),
  299. I40E_PF_STAT("port.tx_dropped_link_down", stats.tx_dropped_link_down),
  300. I40E_PF_STAT("port.rx_crc_errors", stats.crc_errors),
  301. I40E_PF_STAT("port.illegal_bytes", stats.illegal_bytes),
  302. I40E_PF_STAT("port.mac_local_faults", stats.mac_local_faults),
  303. I40E_PF_STAT("port.mac_remote_faults", stats.mac_remote_faults),
  304. I40E_PF_STAT("port.tx_timeout", tx_timeout_count),
  305. I40E_PF_STAT("port.rx_csum_bad", hw_csum_rx_error),
  306. I40E_PF_STAT("port.rx_length_errors", stats.rx_length_errors),
  307. I40E_PF_STAT("port.link_xon_rx", stats.link_xon_rx),
  308. I40E_PF_STAT("port.link_xoff_rx", stats.link_xoff_rx),
  309. I40E_PF_STAT("port.link_xon_tx", stats.link_xon_tx),
  310. I40E_PF_STAT("port.link_xoff_tx", stats.link_xoff_tx),
  311. I40E_PF_STAT("port.rx_size_64", stats.rx_size_64),
  312. I40E_PF_STAT("port.rx_size_127", stats.rx_size_127),
  313. I40E_PF_STAT("port.rx_size_255", stats.rx_size_255),
  314. I40E_PF_STAT("port.rx_size_511", stats.rx_size_511),
  315. I40E_PF_STAT("port.rx_size_1023", stats.rx_size_1023),
  316. I40E_PF_STAT("port.rx_size_1522", stats.rx_size_1522),
  317. I40E_PF_STAT("port.rx_size_big", stats.rx_size_big),
  318. I40E_PF_STAT("port.tx_size_64", stats.tx_size_64),
  319. I40E_PF_STAT("port.tx_size_127", stats.tx_size_127),
  320. I40E_PF_STAT("port.tx_size_255", stats.tx_size_255),
  321. I40E_PF_STAT("port.tx_size_511", stats.tx_size_511),
  322. I40E_PF_STAT("port.tx_size_1023", stats.tx_size_1023),
  323. I40E_PF_STAT("port.tx_size_1522", stats.tx_size_1522),
  324. I40E_PF_STAT("port.tx_size_big", stats.tx_size_big),
  325. I40E_PF_STAT("port.rx_undersize", stats.rx_undersize),
  326. I40E_PF_STAT("port.rx_fragments", stats.rx_fragments),
  327. I40E_PF_STAT("port.rx_oversize", stats.rx_oversize),
  328. I40E_PF_STAT("port.rx_jabber", stats.rx_jabber),
  329. I40E_PF_STAT("port.VF_admin_queue_requests", vf_aq_requests),
  330. I40E_PF_STAT("port.arq_overflows", arq_overflows),
  331. I40E_PF_STAT("port.tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
  332. I40E_PF_STAT("port.rx_hwtstamp_cleared", rx_hwtstamp_cleared),
  333. I40E_PF_STAT("port.tx_hwtstamp_skipped", tx_hwtstamp_skipped),
  334. I40E_PF_STAT("port.fdir_flush_cnt", fd_flush_cnt),
  335. I40E_PF_STAT("port.fdir_atr_match", stats.fd_atr_match),
  336. I40E_PF_STAT("port.fdir_atr_tunnel_match", stats.fd_atr_tunnel_match),
  337. I40E_PF_STAT("port.fdir_atr_status", stats.fd_atr_status),
  338. I40E_PF_STAT("port.fdir_sb_match", stats.fd_sb_match),
  339. I40E_PF_STAT("port.fdir_sb_status", stats.fd_sb_status),
  340. /* LPI stats */
  341. I40E_PF_STAT("port.tx_lpi_status", stats.tx_lpi_status),
  342. I40E_PF_STAT("port.rx_lpi_status", stats.rx_lpi_status),
  343. I40E_PF_STAT("port.tx_lpi_count", stats.tx_lpi_count),
  344. I40E_PF_STAT("port.rx_lpi_count", stats.rx_lpi_count),
  345. };
  346. struct i40e_pfc_stats {
  347. u64 priority_xon_rx;
  348. u64 priority_xoff_rx;
  349. u64 priority_xon_tx;
  350. u64 priority_xoff_tx;
  351. u64 priority_xon_2_xoff;
  352. };
  353. static const struct i40e_stats i40e_gstrings_pfc_stats[] = {
  354. I40E_PFC_STAT("port.tx_priority_%u_xon_tx", priority_xon_tx),
  355. I40E_PFC_STAT("port.tx_priority_%u_xoff_tx", priority_xoff_tx),
  356. I40E_PFC_STAT("port.rx_priority_%u_xon_rx", priority_xon_rx),
  357. I40E_PFC_STAT("port.rx_priority_%u_xoff_rx", priority_xoff_rx),
  358. I40E_PFC_STAT("port.rx_priority_%u_xon_2_xoff", priority_xon_2_xoff),
  359. };
  360. #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats)
  361. #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats)
  362. #define I40E_VSI_STATS_LEN (I40E_NETDEV_STATS_LEN + I40E_MISC_STATS_LEN)
  363. #define I40E_PFC_STATS_LEN (ARRAY_SIZE(i40e_gstrings_pfc_stats) * \
  364. I40E_MAX_USER_PRIORITY)
  365. #define I40E_VEB_STATS_LEN (ARRAY_SIZE(i40e_gstrings_veb_stats) + \
  366. (ARRAY_SIZE(i40e_gstrings_veb_tc_stats) * \
  367. I40E_MAX_TRAFFIC_CLASS))
  368. #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats)
  369. #define I40E_PF_STATS_LEN (I40E_GLOBAL_STATS_LEN + \
  370. I40E_PFC_STATS_LEN + \
  371. I40E_VEB_STATS_LEN + \
  372. I40E_VSI_STATS_LEN)
  373. /* Length of stats for a single queue */
  374. #define I40E_QUEUE_STATS_LEN ARRAY_SIZE(i40e_gstrings_queue_stats)
  375. enum i40e_ethtool_test_id {
  376. I40E_ETH_TEST_REG = 0,
  377. I40E_ETH_TEST_EEPROM,
  378. I40E_ETH_TEST_INTR,
  379. I40E_ETH_TEST_LINK,
  380. };
  381. static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = {
  382. "Register test (offline)",
  383. "Eeprom test (offline)",
  384. "Interrupt test (offline)",
  385. "Link test (on/offline)"
  386. };
  387. #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN)
  388. struct i40e_priv_flags {
  389. char flag_string[ETH_GSTRING_LEN];
  390. u8 bitno;
  391. bool read_only;
  392. };
  393. #define I40E_PRIV_FLAG(_name, _bitno, _read_only) { \
  394. .flag_string = _name, \
  395. .bitno = _bitno, \
  396. .read_only = _read_only, \
  397. }
  398. static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = {
  399. /* NOTE: MFP setting cannot be changed */
  400. I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENA, 1),
  401. I40E_PRIV_FLAG("total-port-shutdown",
  402. I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, 1),
  403. I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENA, 0),
  404. I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENA, 0),
  405. I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENA, 0),
  406. I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENA, 0),
  407. I40E_PRIV_FLAG("link-down-on-close",
  408. I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, 0),
  409. I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX_ENA, 0),
  410. I40E_PRIV_FLAG("disable-source-pruning",
  411. I40E_FLAG_SOURCE_PRUNING_DIS, 0),
  412. I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_FW_LLDP_DIS, 0),
  413. I40E_PRIV_FLAG("rs-fec", I40E_FLAG_RS_FEC, 0),
  414. I40E_PRIV_FLAG("base-r-fec", I40E_FLAG_BASE_R_FEC, 0),
  415. I40E_PRIV_FLAG("vf-vlan-pruning",
  416. I40E_FLAG_VF_VLAN_PRUNING_ENA, 0),
  417. };
  418. #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags)
  419. /* Private flags with a global effect, restricted to PF 0 */
  420. static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = {
  421. I40E_PRIV_FLAG("vf-true-promisc-support",
  422. I40E_FLAG_TRUE_PROMISC_ENA, 0),
  423. };
  424. #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags)
  425. /**
  426. * i40e_partition_setting_complaint - generic complaint for MFP restriction
  427. * @pf: the PF struct
  428. **/
  429. static void i40e_partition_setting_complaint(struct i40e_pf *pf)
  430. {
  431. dev_info(&pf->pdev->dev,
  432. "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n");
  433. }
  434. /**
  435. * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes
  436. * @pf: PF struct with phy_types
  437. * @ks: ethtool link ksettings struct to fill out
  438. *
  439. **/
  440. static void i40e_phy_type_to_ethtool(struct i40e_pf *pf,
  441. struct ethtool_link_ksettings *ks)
  442. {
  443. struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info;
  444. u64 phy_types = pf->hw.phy.phy_types;
  445. ethtool_link_ksettings_zero_link_mode(ks, supported);
  446. ethtool_link_ksettings_zero_link_mode(ks, advertising);
  447. if (phy_types & I40E_CAP_PHY_TYPE_SGMII) {
  448. ethtool_link_ksettings_add_link_mode(ks, supported,
  449. 1000baseT_Full);
  450. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
  451. ethtool_link_ksettings_add_link_mode(ks, advertising,
  452. 1000baseT_Full);
  453. if (test_bit(I40E_HW_CAP_100M_SGMII, pf->hw.caps)) {
  454. ethtool_link_ksettings_add_link_mode(ks, supported,
  455. 100baseT_Full);
  456. ethtool_link_ksettings_add_link_mode(ks, advertising,
  457. 100baseT_Full);
  458. }
  459. }
  460. if (phy_types & I40E_CAP_PHY_TYPE_XAUI ||
  461. phy_types & I40E_CAP_PHY_TYPE_XFI ||
  462. phy_types & I40E_CAP_PHY_TYPE_SFI ||
  463. phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU ||
  464. phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) {
  465. ethtool_link_ksettings_add_link_mode(ks, supported,
  466. 10000baseT_Full);
  467. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
  468. ethtool_link_ksettings_add_link_mode(ks, advertising,
  469. 10000baseT_Full);
  470. }
  471. if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) {
  472. ethtool_link_ksettings_add_link_mode(ks, supported,
  473. 10000baseT_Full);
  474. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
  475. ethtool_link_ksettings_add_link_mode(ks, advertising,
  476. 10000baseT_Full);
  477. }
  478. if (phy_types & I40E_CAP_PHY_TYPE_2_5GBASE_T) {
  479. ethtool_link_ksettings_add_link_mode(ks, supported,
  480. 2500baseT_Full);
  481. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_2_5GB)
  482. ethtool_link_ksettings_add_link_mode(ks, advertising,
  483. 2500baseT_Full);
  484. }
  485. if (phy_types & I40E_CAP_PHY_TYPE_5GBASE_T) {
  486. ethtool_link_ksettings_add_link_mode(ks, supported,
  487. 5000baseT_Full);
  488. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_5GB)
  489. ethtool_link_ksettings_add_link_mode(ks, advertising,
  490. 5000baseT_Full);
  491. }
  492. if (phy_types & I40E_CAP_PHY_TYPE_XLAUI ||
  493. phy_types & I40E_CAP_PHY_TYPE_XLPPI ||
  494. phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC)
  495. ethtool_link_ksettings_add_link_mode(ks, supported,
  496. 40000baseCR4_Full);
  497. if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
  498. phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) {
  499. ethtool_link_ksettings_add_link_mode(ks, supported,
  500. 40000baseCR4_Full);
  501. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB)
  502. ethtool_link_ksettings_add_link_mode(ks, advertising,
  503. 40000baseCR4_Full);
  504. }
  505. if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
  506. ethtool_link_ksettings_add_link_mode(ks, supported,
  507. 100baseT_Full);
  508. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
  509. ethtool_link_ksettings_add_link_mode(ks, advertising,
  510. 100baseT_Full);
  511. }
  512. if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) {
  513. ethtool_link_ksettings_add_link_mode(ks, supported,
  514. 1000baseT_Full);
  515. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
  516. ethtool_link_ksettings_add_link_mode(ks, advertising,
  517. 1000baseT_Full);
  518. }
  519. if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) {
  520. ethtool_link_ksettings_add_link_mode(ks, supported,
  521. 40000baseSR4_Full);
  522. ethtool_link_ksettings_add_link_mode(ks, advertising,
  523. 40000baseSR4_Full);
  524. }
  525. if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) {
  526. ethtool_link_ksettings_add_link_mode(ks, supported,
  527. 40000baseLR4_Full);
  528. ethtool_link_ksettings_add_link_mode(ks, advertising,
  529. 40000baseLR4_Full);
  530. }
  531. if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) {
  532. ethtool_link_ksettings_add_link_mode(ks, supported,
  533. 40000baseKR4_Full);
  534. ethtool_link_ksettings_add_link_mode(ks, advertising,
  535. 40000baseKR4_Full);
  536. }
  537. if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) {
  538. ethtool_link_ksettings_add_link_mode(ks, supported,
  539. 20000baseKR2_Full);
  540. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB)
  541. ethtool_link_ksettings_add_link_mode(ks, advertising,
  542. 20000baseKR2_Full);
  543. }
  544. if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) {
  545. ethtool_link_ksettings_add_link_mode(ks, supported,
  546. 10000baseKX4_Full);
  547. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
  548. ethtool_link_ksettings_add_link_mode(ks, advertising,
  549. 10000baseKX4_Full);
  550. }
  551. if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR &&
  552. !test_bit(I40E_HW_CAP_CRT_RETIMER, pf->hw.caps)) {
  553. ethtool_link_ksettings_add_link_mode(ks, supported,
  554. 10000baseKR_Full);
  555. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
  556. ethtool_link_ksettings_add_link_mode(ks, advertising,
  557. 10000baseKR_Full);
  558. }
  559. if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX &&
  560. !test_bit(I40E_HW_CAP_CRT_RETIMER, pf->hw.caps)) {
  561. ethtool_link_ksettings_add_link_mode(ks, supported,
  562. 1000baseKX_Full);
  563. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
  564. ethtool_link_ksettings_add_link_mode(ks, advertising,
  565. 1000baseKX_Full);
  566. }
  567. /* need to add 25G PHY types */
  568. if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) {
  569. ethtool_link_ksettings_add_link_mode(ks, supported,
  570. 25000baseKR_Full);
  571. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
  572. ethtool_link_ksettings_add_link_mode(ks, advertising,
  573. 25000baseKR_Full);
  574. }
  575. if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) {
  576. ethtool_link_ksettings_add_link_mode(ks, supported,
  577. 25000baseCR_Full);
  578. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
  579. ethtool_link_ksettings_add_link_mode(ks, advertising,
  580. 25000baseCR_Full);
  581. }
  582. if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
  583. phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) {
  584. ethtool_link_ksettings_add_link_mode(ks, supported,
  585. 25000baseSR_Full);
  586. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
  587. ethtool_link_ksettings_add_link_mode(ks, advertising,
  588. 25000baseSR_Full);
  589. }
  590. if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC ||
  591. phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) {
  592. ethtool_link_ksettings_add_link_mode(ks, supported,
  593. 25000baseCR_Full);
  594. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
  595. ethtool_link_ksettings_add_link_mode(ks, advertising,
  596. 25000baseCR_Full);
  597. }
  598. if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR ||
  599. phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR ||
  600. phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
  601. phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR ||
  602. phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC ||
  603. phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) {
  604. ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE);
  605. ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS);
  606. ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER);
  607. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) {
  608. ethtool_link_ksettings_add_link_mode(ks, advertising,
  609. FEC_NONE);
  610. ethtool_link_ksettings_add_link_mode(ks, advertising,
  611. FEC_RS);
  612. ethtool_link_ksettings_add_link_mode(ks, advertising,
  613. FEC_BASER);
  614. }
  615. }
  616. /* need to add new 10G PHY types */
  617. if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
  618. phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) {
  619. ethtool_link_ksettings_add_link_mode(ks, supported,
  620. 10000baseCR_Full);
  621. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
  622. ethtool_link_ksettings_add_link_mode(ks, advertising,
  623. 10000baseCR_Full);
  624. }
  625. if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) {
  626. ethtool_link_ksettings_add_link_mode(ks, supported,
  627. 10000baseSR_Full);
  628. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
  629. ethtool_link_ksettings_add_link_mode(ks, advertising,
  630. 10000baseSR_Full);
  631. }
  632. if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) {
  633. ethtool_link_ksettings_add_link_mode(ks, supported,
  634. 10000baseLR_Full);
  635. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
  636. ethtool_link_ksettings_add_link_mode(ks, advertising,
  637. 10000baseLR_Full);
  638. }
  639. if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
  640. phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
  641. phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) {
  642. ethtool_link_ksettings_add_link_mode(ks, supported,
  643. 1000baseX_Full);
  644. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
  645. ethtool_link_ksettings_add_link_mode(ks, advertising,
  646. 1000baseX_Full);
  647. }
  648. /* Autoneg PHY types */
  649. if (phy_types & I40E_CAP_PHY_TYPE_SGMII ||
  650. phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 ||
  651. phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
  652. phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 ||
  653. phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
  654. phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR ||
  655. phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR ||
  656. phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR ||
  657. phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 ||
  658. phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR ||
  659. phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR ||
  660. phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 ||
  661. phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR ||
  662. phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU ||
  663. phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
  664. phy_types & I40E_CAP_PHY_TYPE_10GBASE_T ||
  665. phy_types & I40E_CAP_PHY_TYPE_5GBASE_T ||
  666. phy_types & I40E_CAP_PHY_TYPE_2_5GBASE_T ||
  667. phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL ||
  668. phy_types & I40E_CAP_PHY_TYPE_1000BASE_T ||
  669. phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
  670. phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
  671. phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX ||
  672. phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
  673. ethtool_link_ksettings_add_link_mode(ks, supported,
  674. Autoneg);
  675. ethtool_link_ksettings_add_link_mode(ks, advertising,
  676. Autoneg);
  677. }
  678. }
  679. /**
  680. * i40e_get_settings_link_up_fec - Get the FEC mode encoding from mask
  681. * @req_fec_info: mask request FEC info
  682. * @ks: ethtool ksettings to fill in
  683. **/
  684. static void i40e_get_settings_link_up_fec(u8 req_fec_info,
  685. struct ethtool_link_ksettings *ks)
  686. {
  687. ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE);
  688. ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS);
  689. ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER);
  690. if ((I40E_AQ_SET_FEC_REQUEST_RS & req_fec_info) &&
  691. (I40E_AQ_SET_FEC_REQUEST_KR & req_fec_info)) {
  692. ethtool_link_ksettings_add_link_mode(ks, advertising,
  693. FEC_NONE);
  694. ethtool_link_ksettings_add_link_mode(ks, advertising,
  695. FEC_BASER);
  696. ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS);
  697. } else if (I40E_AQ_SET_FEC_REQUEST_RS & req_fec_info) {
  698. ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS);
  699. } else if (I40E_AQ_SET_FEC_REQUEST_KR & req_fec_info) {
  700. ethtool_link_ksettings_add_link_mode(ks, advertising,
  701. FEC_BASER);
  702. } else {
  703. ethtool_link_ksettings_add_link_mode(ks, advertising,
  704. FEC_NONE);
  705. }
  706. }
  707. /**
  708. * i40e_get_settings_link_up - Get the Link settings for when link is up
  709. * @hw: hw structure
  710. * @ks: ethtool ksettings to fill in
  711. * @netdev: network interface device structure
  712. * @pf: pointer to physical function struct
  713. **/
  714. static void i40e_get_settings_link_up(struct i40e_hw *hw,
  715. struct ethtool_link_ksettings *ks,
  716. struct net_device *netdev,
  717. struct i40e_pf *pf)
  718. {
  719. struct i40e_link_status *hw_link_info = &hw->phy.link_info;
  720. struct ethtool_link_ksettings cap_ksettings;
  721. u32 link_speed = hw_link_info->link_speed;
  722. /* Initialize supported and advertised settings based on phy settings */
  723. switch (hw_link_info->phy_type) {
  724. case I40E_PHY_TYPE_40GBASE_CR4:
  725. case I40E_PHY_TYPE_40GBASE_CR4_CU:
  726. ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
  727. ethtool_link_ksettings_add_link_mode(ks, supported,
  728. 40000baseCR4_Full);
  729. ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
  730. ethtool_link_ksettings_add_link_mode(ks, advertising,
  731. 40000baseCR4_Full);
  732. break;
  733. case I40E_PHY_TYPE_XLAUI:
  734. case I40E_PHY_TYPE_XLPPI:
  735. case I40E_PHY_TYPE_40GBASE_AOC:
  736. ethtool_link_ksettings_add_link_mode(ks, supported,
  737. 40000baseCR4_Full);
  738. ethtool_link_ksettings_add_link_mode(ks, advertising,
  739. 40000baseCR4_Full);
  740. break;
  741. case I40E_PHY_TYPE_40GBASE_SR4:
  742. ethtool_link_ksettings_add_link_mode(ks, supported,
  743. 40000baseSR4_Full);
  744. ethtool_link_ksettings_add_link_mode(ks, advertising,
  745. 40000baseSR4_Full);
  746. break;
  747. case I40E_PHY_TYPE_40GBASE_LR4:
  748. ethtool_link_ksettings_add_link_mode(ks, supported,
  749. 40000baseLR4_Full);
  750. ethtool_link_ksettings_add_link_mode(ks, advertising,
  751. 40000baseLR4_Full);
  752. break;
  753. case I40E_PHY_TYPE_25GBASE_SR:
  754. case I40E_PHY_TYPE_25GBASE_LR:
  755. case I40E_PHY_TYPE_10GBASE_SR:
  756. case I40E_PHY_TYPE_10GBASE_LR:
  757. case I40E_PHY_TYPE_1000BASE_SX:
  758. case I40E_PHY_TYPE_1000BASE_LX:
  759. ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
  760. ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
  761. ethtool_link_ksettings_add_link_mode(ks, supported,
  762. 25000baseSR_Full);
  763. ethtool_link_ksettings_add_link_mode(ks, advertising,
  764. 25000baseSR_Full);
  765. i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
  766. ethtool_link_ksettings_add_link_mode(ks, supported,
  767. 10000baseSR_Full);
  768. ethtool_link_ksettings_add_link_mode(ks, advertising,
  769. 10000baseSR_Full);
  770. ethtool_link_ksettings_add_link_mode(ks, supported,
  771. 10000baseLR_Full);
  772. ethtool_link_ksettings_add_link_mode(ks, advertising,
  773. 10000baseLR_Full);
  774. ethtool_link_ksettings_add_link_mode(ks, supported,
  775. 1000baseX_Full);
  776. ethtool_link_ksettings_add_link_mode(ks, advertising,
  777. 1000baseX_Full);
  778. ethtool_link_ksettings_add_link_mode(ks, supported,
  779. 10000baseT_Full);
  780. if (hw_link_info->module_type[2] &
  781. I40E_MODULE_TYPE_1000BASE_SX ||
  782. hw_link_info->module_type[2] &
  783. I40E_MODULE_TYPE_1000BASE_LX) {
  784. ethtool_link_ksettings_add_link_mode(ks, supported,
  785. 1000baseT_Full);
  786. if (hw_link_info->requested_speeds &
  787. I40E_LINK_SPEED_1GB)
  788. ethtool_link_ksettings_add_link_mode(
  789. ks, advertising, 1000baseT_Full);
  790. }
  791. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
  792. ethtool_link_ksettings_add_link_mode(ks, advertising,
  793. 10000baseT_Full);
  794. break;
  795. case I40E_PHY_TYPE_10GBASE_T:
  796. case I40E_PHY_TYPE_5GBASE_T_LINK_STATUS:
  797. case I40E_PHY_TYPE_2_5GBASE_T_LINK_STATUS:
  798. case I40E_PHY_TYPE_1000BASE_T:
  799. case I40E_PHY_TYPE_100BASE_TX:
  800. ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
  801. ethtool_link_ksettings_add_link_mode(ks, supported,
  802. 10000baseT_Full);
  803. ethtool_link_ksettings_add_link_mode(ks, supported,
  804. 5000baseT_Full);
  805. ethtool_link_ksettings_add_link_mode(ks, supported,
  806. 2500baseT_Full);
  807. ethtool_link_ksettings_add_link_mode(ks, supported,
  808. 1000baseT_Full);
  809. ethtool_link_ksettings_add_link_mode(ks, supported,
  810. 100baseT_Full);
  811. ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
  812. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
  813. ethtool_link_ksettings_add_link_mode(ks, advertising,
  814. 10000baseT_Full);
  815. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_5GB)
  816. ethtool_link_ksettings_add_link_mode(ks, advertising,
  817. 5000baseT_Full);
  818. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_2_5GB)
  819. ethtool_link_ksettings_add_link_mode(ks, advertising,
  820. 2500baseT_Full);
  821. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
  822. ethtool_link_ksettings_add_link_mode(ks, advertising,
  823. 1000baseT_Full);
  824. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
  825. ethtool_link_ksettings_add_link_mode(ks, advertising,
  826. 100baseT_Full);
  827. break;
  828. case I40E_PHY_TYPE_1000BASE_T_OPTICAL:
  829. ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
  830. ethtool_link_ksettings_add_link_mode(ks, supported,
  831. 1000baseT_Full);
  832. ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
  833. ethtool_link_ksettings_add_link_mode(ks, advertising,
  834. 1000baseT_Full);
  835. break;
  836. case I40E_PHY_TYPE_10GBASE_CR1_CU:
  837. case I40E_PHY_TYPE_10GBASE_CR1:
  838. ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
  839. ethtool_link_ksettings_add_link_mode(ks, supported,
  840. 10000baseT_Full);
  841. ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
  842. ethtool_link_ksettings_add_link_mode(ks, advertising,
  843. 10000baseT_Full);
  844. break;
  845. case I40E_PHY_TYPE_XAUI:
  846. case I40E_PHY_TYPE_XFI:
  847. case I40E_PHY_TYPE_SFI:
  848. case I40E_PHY_TYPE_10GBASE_SFPP_CU:
  849. case I40E_PHY_TYPE_10GBASE_AOC:
  850. ethtool_link_ksettings_add_link_mode(ks, supported,
  851. 10000baseT_Full);
  852. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
  853. ethtool_link_ksettings_add_link_mode(ks, advertising,
  854. 10000baseT_Full);
  855. i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
  856. break;
  857. case I40E_PHY_TYPE_SGMII:
  858. ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
  859. ethtool_link_ksettings_add_link_mode(ks, supported,
  860. 1000baseT_Full);
  861. if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
  862. ethtool_link_ksettings_add_link_mode(ks, advertising,
  863. 1000baseT_Full);
  864. if (test_bit(I40E_HW_CAP_100M_SGMII, pf->hw.caps)) {
  865. ethtool_link_ksettings_add_link_mode(ks, supported,
  866. 100baseT_Full);
  867. if (hw_link_info->requested_speeds &
  868. I40E_LINK_SPEED_100MB)
  869. ethtool_link_ksettings_add_link_mode(
  870. ks, advertising, 100baseT_Full);
  871. }
  872. break;
  873. case I40E_PHY_TYPE_40GBASE_KR4:
  874. case I40E_PHY_TYPE_25GBASE_KR:
  875. case I40E_PHY_TYPE_20GBASE_KR2:
  876. case I40E_PHY_TYPE_10GBASE_KR:
  877. case I40E_PHY_TYPE_10GBASE_KX4:
  878. case I40E_PHY_TYPE_1000BASE_KX:
  879. ethtool_link_ksettings_add_link_mode(ks, supported,
  880. 40000baseKR4_Full);
  881. ethtool_link_ksettings_add_link_mode(ks, supported,
  882. 25000baseKR_Full);
  883. ethtool_link_ksettings_add_link_mode(ks, supported,
  884. 20000baseKR2_Full);
  885. ethtool_link_ksettings_add_link_mode(ks, supported,
  886. 10000baseKR_Full);
  887. ethtool_link_ksettings_add_link_mode(ks, supported,
  888. 10000baseKX4_Full);
  889. ethtool_link_ksettings_add_link_mode(ks, supported,
  890. 1000baseKX_Full);
  891. ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
  892. ethtool_link_ksettings_add_link_mode(ks, advertising,
  893. 40000baseKR4_Full);
  894. ethtool_link_ksettings_add_link_mode(ks, advertising,
  895. 25000baseKR_Full);
  896. i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
  897. ethtool_link_ksettings_add_link_mode(ks, advertising,
  898. 20000baseKR2_Full);
  899. ethtool_link_ksettings_add_link_mode(ks, advertising,
  900. 10000baseKR_Full);
  901. ethtool_link_ksettings_add_link_mode(ks, advertising,
  902. 10000baseKX4_Full);
  903. ethtool_link_ksettings_add_link_mode(ks, advertising,
  904. 1000baseKX_Full);
  905. ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
  906. break;
  907. case I40E_PHY_TYPE_25GBASE_CR:
  908. ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
  909. ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
  910. ethtool_link_ksettings_add_link_mode(ks, supported,
  911. 25000baseCR_Full);
  912. ethtool_link_ksettings_add_link_mode(ks, advertising,
  913. 25000baseCR_Full);
  914. i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
  915. break;
  916. case I40E_PHY_TYPE_25GBASE_AOC:
  917. case I40E_PHY_TYPE_25GBASE_ACC:
  918. ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
  919. ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
  920. ethtool_link_ksettings_add_link_mode(ks, supported,
  921. 25000baseCR_Full);
  922. ethtool_link_ksettings_add_link_mode(ks, advertising,
  923. 25000baseCR_Full);
  924. i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
  925. ethtool_link_ksettings_add_link_mode(ks, supported,
  926. 10000baseCR_Full);
  927. ethtool_link_ksettings_add_link_mode(ks, advertising,
  928. 10000baseCR_Full);
  929. break;
  930. default:
  931. /* if we got here and link is up something bad is afoot */
  932. netdev_info(netdev,
  933. "WARNING: Link is up but PHY type 0x%x is not recognized, or incorrect cable is in use\n",
  934. hw_link_info->phy_type);
  935. }
  936. /* Now that we've worked out everything that could be supported by the
  937. * current PHY type, get what is supported by the NVM and intersect
  938. * them to get what is truly supported
  939. */
  940. memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings));
  941. i40e_phy_type_to_ethtool(pf, &cap_ksettings);
  942. ethtool_intersect_link_masks(ks, &cap_ksettings);
  943. /* Set speed and duplex */
  944. switch (link_speed) {
  945. case I40E_LINK_SPEED_40GB:
  946. ks->base.speed = SPEED_40000;
  947. break;
  948. case I40E_LINK_SPEED_25GB:
  949. ks->base.speed = SPEED_25000;
  950. break;
  951. case I40E_LINK_SPEED_20GB:
  952. ks->base.speed = SPEED_20000;
  953. break;
  954. case I40E_LINK_SPEED_10GB:
  955. ks->base.speed = SPEED_10000;
  956. break;
  957. case I40E_LINK_SPEED_5GB:
  958. ks->base.speed = SPEED_5000;
  959. break;
  960. case I40E_LINK_SPEED_2_5GB:
  961. ks->base.speed = SPEED_2500;
  962. break;
  963. case I40E_LINK_SPEED_1GB:
  964. ks->base.speed = SPEED_1000;
  965. break;
  966. case I40E_LINK_SPEED_100MB:
  967. ks->base.speed = SPEED_100;
  968. break;
  969. default:
  970. ks->base.speed = SPEED_UNKNOWN;
  971. break;
  972. }
  973. ks->base.duplex = DUPLEX_FULL;
  974. }
  975. /**
  976. * i40e_get_settings_link_down - Get the Link settings for when link is down
  977. * @hw: hw structure
  978. * @ks: ethtool ksettings to fill in
  979. * @pf: pointer to physical function struct
  980. *
  981. * Reports link settings that can be determined when link is down
  982. **/
  983. static void i40e_get_settings_link_down(struct i40e_hw *hw,
  984. struct ethtool_link_ksettings *ks,
  985. struct i40e_pf *pf)
  986. {
  987. /* link is down and the driver needs to fall back on
  988. * supported phy types to figure out what info to display
  989. */
  990. i40e_phy_type_to_ethtool(pf, ks);
  991. /* With no link speed and duplex are unknown */
  992. ks->base.speed = SPEED_UNKNOWN;
  993. ks->base.duplex = DUPLEX_UNKNOWN;
  994. }
  995. /**
  996. * i40e_get_link_ksettings - Get Link Speed and Duplex settings
  997. * @netdev: network interface device structure
  998. * @ks: ethtool ksettings
  999. *
  1000. * Reports speed/duplex settings based on media_type
  1001. **/
  1002. static int i40e_get_link_ksettings(struct net_device *netdev,
  1003. struct ethtool_link_ksettings *ks)
  1004. {
  1005. struct i40e_netdev_priv *np = netdev_priv(netdev);
  1006. struct i40e_pf *pf = np->vsi->back;
  1007. struct i40e_hw *hw = &pf->hw;
  1008. struct i40e_link_status *hw_link_info = &hw->phy.link_info;
  1009. bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
  1010. ethtool_link_ksettings_zero_link_mode(ks, supported);
  1011. ethtool_link_ksettings_zero_link_mode(ks, advertising);
  1012. if (link_up)
  1013. i40e_get_settings_link_up(hw, ks, netdev, pf);
  1014. else
  1015. i40e_get_settings_link_down(hw, ks, pf);
  1016. /* Now set the settings that don't rely on link being up/down */
  1017. /* Set autoneg settings */
  1018. ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
  1019. AUTONEG_ENABLE : AUTONEG_DISABLE);
  1020. /* Set media type settings */
  1021. switch (hw->phy.media_type) {
  1022. case I40E_MEDIA_TYPE_BACKPLANE:
  1023. ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
  1024. ethtool_link_ksettings_add_link_mode(ks, supported, Backplane);
  1025. ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
  1026. ethtool_link_ksettings_add_link_mode(ks, advertising,
  1027. Backplane);
  1028. ks->base.port = PORT_NONE;
  1029. break;
  1030. case I40E_MEDIA_TYPE_BASET:
  1031. ethtool_link_ksettings_add_link_mode(ks, supported, TP);
  1032. ethtool_link_ksettings_add_link_mode(ks, advertising, TP);
  1033. ks->base.port = PORT_TP;
  1034. break;
  1035. case I40E_MEDIA_TYPE_DA:
  1036. case I40E_MEDIA_TYPE_CX4:
  1037. ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
  1038. ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE);
  1039. ks->base.port = PORT_DA;
  1040. break;
  1041. case I40E_MEDIA_TYPE_FIBER:
  1042. ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
  1043. ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE);
  1044. ks->base.port = PORT_FIBRE;
  1045. break;
  1046. case I40E_MEDIA_TYPE_UNKNOWN:
  1047. default:
  1048. ks->base.port = PORT_OTHER;
  1049. break;
  1050. }
  1051. /* Set flow control settings */
  1052. ethtool_link_ksettings_add_link_mode(ks, supported, Pause);
  1053. ethtool_link_ksettings_add_link_mode(ks, supported, Asym_Pause);
  1054. switch (hw->fc.requested_mode) {
  1055. case I40E_FC_FULL:
  1056. ethtool_link_ksettings_add_link_mode(ks, advertising, Pause);
  1057. break;
  1058. case I40E_FC_TX_PAUSE:
  1059. ethtool_link_ksettings_add_link_mode(ks, advertising,
  1060. Asym_Pause);
  1061. break;
  1062. case I40E_FC_RX_PAUSE:
  1063. ethtool_link_ksettings_add_link_mode(ks, advertising, Pause);
  1064. ethtool_link_ksettings_add_link_mode(ks, advertising,
  1065. Asym_Pause);
  1066. break;
  1067. default:
  1068. ethtool_link_ksettings_del_link_mode(ks, advertising, Pause);
  1069. ethtool_link_ksettings_del_link_mode(ks, advertising,
  1070. Asym_Pause);
  1071. break;
  1072. }
  1073. return 0;
  1074. }
  1075. #define I40E_LBIT_SIZE 8
  1076. /**
  1077. * i40e_speed_to_link_speed - Translate decimal speed to i40e_aq_link_speed
  1078. * @speed: speed in decimal
  1079. * @ks: ethtool ksettings
  1080. *
  1081. * Return i40e_aq_link_speed based on speed
  1082. **/
  1083. static enum i40e_aq_link_speed
  1084. i40e_speed_to_link_speed(__u32 speed, const struct ethtool_link_ksettings *ks)
  1085. {
  1086. enum i40e_aq_link_speed link_speed = I40E_LINK_SPEED_UNKNOWN;
  1087. bool speed_changed = false;
  1088. int i, j;
  1089. static const struct {
  1090. __u32 speed;
  1091. enum i40e_aq_link_speed link_speed;
  1092. __u8 bit[I40E_LBIT_SIZE];
  1093. } i40e_speed_lut[] = {
  1094. #define I40E_LBIT(mode) ETHTOOL_LINK_MODE_ ## mode ##_Full_BIT
  1095. {SPEED_100, I40E_LINK_SPEED_100MB, {I40E_LBIT(100baseT)} },
  1096. {SPEED_1000, I40E_LINK_SPEED_1GB,
  1097. {I40E_LBIT(1000baseT), I40E_LBIT(1000baseX),
  1098. I40E_LBIT(1000baseKX)} },
  1099. {SPEED_10000, I40E_LINK_SPEED_10GB,
  1100. {I40E_LBIT(10000baseT), I40E_LBIT(10000baseKR),
  1101. I40E_LBIT(10000baseLR), I40E_LBIT(10000baseCR),
  1102. I40E_LBIT(10000baseSR), I40E_LBIT(10000baseKX4)} },
  1103. {SPEED_25000, I40E_LINK_SPEED_25GB,
  1104. {I40E_LBIT(25000baseCR), I40E_LBIT(25000baseKR),
  1105. I40E_LBIT(25000baseSR)} },
  1106. {SPEED_40000, I40E_LINK_SPEED_40GB,
  1107. {I40E_LBIT(40000baseKR4), I40E_LBIT(40000baseCR4),
  1108. I40E_LBIT(40000baseSR4), I40E_LBIT(40000baseLR4)} },
  1109. {SPEED_20000, I40E_LINK_SPEED_20GB,
  1110. {I40E_LBIT(20000baseKR2)} },
  1111. {SPEED_2500, I40E_LINK_SPEED_2_5GB, {I40E_LBIT(2500baseT)} },
  1112. {SPEED_5000, I40E_LINK_SPEED_5GB, {I40E_LBIT(2500baseT)} }
  1113. #undef I40E_LBIT
  1114. };
  1115. for (i = 0; i < ARRAY_SIZE(i40e_speed_lut); i++) {
  1116. if (i40e_speed_lut[i].speed == speed) {
  1117. for (j = 0; j < I40E_LBIT_SIZE; j++) {
  1118. if (test_bit(i40e_speed_lut[i].bit[j],
  1119. ks->link_modes.supported)) {
  1120. speed_changed = true;
  1121. break;
  1122. }
  1123. if (!i40e_speed_lut[i].bit[j])
  1124. break;
  1125. }
  1126. if (speed_changed) {
  1127. link_speed = i40e_speed_lut[i].link_speed;
  1128. break;
  1129. }
  1130. }
  1131. }
  1132. return link_speed;
  1133. }
  1134. #undef I40E_LBIT_SIZE
  1135. /**
  1136. * i40e_set_link_ksettings - Set Speed and Duplex
  1137. * @netdev: network interface device structure
  1138. * @ks: ethtool ksettings
  1139. *
  1140. * Set speed/duplex per media_types advertised/forced
  1141. **/
  1142. static int i40e_set_link_ksettings(struct net_device *netdev,
  1143. const struct ethtool_link_ksettings *ks)
  1144. {
  1145. struct i40e_netdev_priv *np = netdev_priv(netdev);
  1146. struct i40e_aq_get_phy_abilities_resp abilities;
  1147. struct ethtool_link_ksettings safe_ks;
  1148. struct ethtool_link_ksettings copy_ks;
  1149. struct i40e_aq_set_phy_config config;
  1150. struct i40e_pf *pf = np->vsi->back;
  1151. enum i40e_aq_link_speed link_speed;
  1152. struct i40e_vsi *vsi = np->vsi;
  1153. struct i40e_hw *hw = &pf->hw;
  1154. bool autoneg_changed = false;
  1155. int timeout = 50;
  1156. int status = 0;
  1157. int err = 0;
  1158. __u32 speed;
  1159. u8 autoneg;
  1160. /* Changing port settings is not supported if this isn't the
  1161. * port's controlling PF
  1162. */
  1163. if (hw->partition_id != 1) {
  1164. i40e_partition_setting_complaint(pf);
  1165. return -EOPNOTSUPP;
  1166. }
  1167. if (vsi->type != I40E_VSI_MAIN)
  1168. return -EOPNOTSUPP;
  1169. if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET &&
  1170. hw->phy.media_type != I40E_MEDIA_TYPE_FIBER &&
  1171. hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE &&
  1172. hw->phy.media_type != I40E_MEDIA_TYPE_DA &&
  1173. hw->phy.link_info.link_info & I40E_AQ_LINK_UP)
  1174. return -EOPNOTSUPP;
  1175. if (hw->device_id == I40E_DEV_ID_KX_B ||
  1176. hw->device_id == I40E_DEV_ID_KX_C ||
  1177. hw->device_id == I40E_DEV_ID_20G_KR2 ||
  1178. hw->device_id == I40E_DEV_ID_20G_KR2_A ||
  1179. hw->device_id == I40E_DEV_ID_25G_B ||
  1180. hw->device_id == I40E_DEV_ID_KX_X722) {
  1181. netdev_info(netdev, "Changing settings is not supported on backplane.\n");
  1182. return -EOPNOTSUPP;
  1183. }
  1184. /* copy the ksettings to copy_ks to avoid modifying the origin */
  1185. memcpy(&copy_ks, ks, sizeof(struct ethtool_link_ksettings));
  1186. /* save autoneg out of ksettings */
  1187. autoneg = copy_ks.base.autoneg;
  1188. speed = copy_ks.base.speed;
  1189. /* get our own copy of the bits to check against */
  1190. memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings));
  1191. safe_ks.base.cmd = copy_ks.base.cmd;
  1192. safe_ks.base.link_mode_masks_nwords =
  1193. copy_ks.base.link_mode_masks_nwords;
  1194. i40e_get_link_ksettings(netdev, &safe_ks);
  1195. /* Get link modes supported by hardware and check against modes
  1196. * requested by the user. Return an error if unsupported mode was set.
  1197. */
  1198. if (!bitmap_subset(copy_ks.link_modes.advertising,
  1199. safe_ks.link_modes.supported,
  1200. __ETHTOOL_LINK_MODE_MASK_NBITS))
  1201. return -EINVAL;
  1202. /* set autoneg back to what it currently is */
  1203. copy_ks.base.autoneg = safe_ks.base.autoneg;
  1204. copy_ks.base.speed = safe_ks.base.speed;
  1205. /* If copy_ks.base and safe_ks.base are not the same now, then they are
  1206. * trying to set something that we do not support.
  1207. */
  1208. if (memcmp(&copy_ks.base, &safe_ks.base,
  1209. sizeof(struct ethtool_link_settings))) {
  1210. netdev_err(netdev, "Only speed and autoneg are supported.\n");
  1211. return -EOPNOTSUPP;
  1212. }
  1213. while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
  1214. timeout--;
  1215. if (!timeout)
  1216. return -EBUSY;
  1217. usleep_range(1000, 2000);
  1218. }
  1219. /* Get the current phy config */
  1220. status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
  1221. NULL);
  1222. if (status) {
  1223. err = -EAGAIN;
  1224. goto done;
  1225. }
  1226. /* Copy abilities to config in case autoneg is not
  1227. * set below
  1228. */
  1229. memset(&config, 0, sizeof(struct i40e_aq_set_phy_config));
  1230. config.abilities = abilities.abilities;
  1231. /* Check autoneg */
  1232. if (autoneg == AUTONEG_ENABLE) {
  1233. /* If autoneg was not already enabled */
  1234. if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) {
  1235. /* If autoneg is not supported, return error */
  1236. if (!ethtool_link_ksettings_test_link_mode(&safe_ks,
  1237. supported,
  1238. Autoneg)) {
  1239. netdev_info(netdev, "Autoneg not supported on this phy\n");
  1240. err = -EINVAL;
  1241. goto done;
  1242. }
  1243. /* Autoneg is allowed to change */
  1244. config.abilities = abilities.abilities |
  1245. I40E_AQ_PHY_ENABLE_AN;
  1246. autoneg_changed = true;
  1247. }
  1248. } else {
  1249. /* If autoneg is currently enabled */
  1250. if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) {
  1251. /* If autoneg is supported 10GBASE_T is the only PHY
  1252. * that can disable it, so otherwise return error
  1253. */
  1254. if (ethtool_link_ksettings_test_link_mode(&safe_ks,
  1255. supported,
  1256. Autoneg) &&
  1257. hw->phy.media_type != I40E_MEDIA_TYPE_BASET) {
  1258. netdev_info(netdev, "Autoneg cannot be disabled on this phy\n");
  1259. err = -EINVAL;
  1260. goto done;
  1261. }
  1262. /* Autoneg is allowed to change */
  1263. config.abilities = abilities.abilities &
  1264. ~I40E_AQ_PHY_ENABLE_AN;
  1265. autoneg_changed = true;
  1266. }
  1267. }
  1268. if (ethtool_link_ksettings_test_link_mode(ks, advertising,
  1269. 100baseT_Full))
  1270. config.link_speed |= I40E_LINK_SPEED_100MB;
  1271. if (ethtool_link_ksettings_test_link_mode(ks, advertising,
  1272. 1000baseT_Full) ||
  1273. ethtool_link_ksettings_test_link_mode(ks, advertising,
  1274. 1000baseX_Full) ||
  1275. ethtool_link_ksettings_test_link_mode(ks, advertising,
  1276. 1000baseKX_Full))
  1277. config.link_speed |= I40E_LINK_SPEED_1GB;
  1278. if (ethtool_link_ksettings_test_link_mode(ks, advertising,
  1279. 10000baseT_Full) ||
  1280. ethtool_link_ksettings_test_link_mode(ks, advertising,
  1281. 10000baseKX4_Full) ||
  1282. ethtool_link_ksettings_test_link_mode(ks, advertising,
  1283. 10000baseKR_Full) ||
  1284. ethtool_link_ksettings_test_link_mode(ks, advertising,
  1285. 10000baseCR_Full) ||
  1286. ethtool_link_ksettings_test_link_mode(ks, advertising,
  1287. 10000baseSR_Full) ||
  1288. ethtool_link_ksettings_test_link_mode(ks, advertising,
  1289. 10000baseLR_Full))
  1290. config.link_speed |= I40E_LINK_SPEED_10GB;
  1291. if (ethtool_link_ksettings_test_link_mode(ks, advertising,
  1292. 2500baseT_Full))
  1293. config.link_speed |= I40E_LINK_SPEED_2_5GB;
  1294. if (ethtool_link_ksettings_test_link_mode(ks, advertising,
  1295. 5000baseT_Full))
  1296. config.link_speed |= I40E_LINK_SPEED_5GB;
  1297. if (ethtool_link_ksettings_test_link_mode(ks, advertising,
  1298. 20000baseKR2_Full))
  1299. config.link_speed |= I40E_LINK_SPEED_20GB;
  1300. if (ethtool_link_ksettings_test_link_mode(ks, advertising,
  1301. 25000baseCR_Full) ||
  1302. ethtool_link_ksettings_test_link_mode(ks, advertising,
  1303. 25000baseKR_Full) ||
  1304. ethtool_link_ksettings_test_link_mode(ks, advertising,
  1305. 25000baseSR_Full))
  1306. config.link_speed |= I40E_LINK_SPEED_25GB;
  1307. if (ethtool_link_ksettings_test_link_mode(ks, advertising,
  1308. 40000baseKR4_Full) ||
  1309. ethtool_link_ksettings_test_link_mode(ks, advertising,
  1310. 40000baseCR4_Full) ||
  1311. ethtool_link_ksettings_test_link_mode(ks, advertising,
  1312. 40000baseSR4_Full) ||
  1313. ethtool_link_ksettings_test_link_mode(ks, advertising,
  1314. 40000baseLR4_Full))
  1315. config.link_speed |= I40E_LINK_SPEED_40GB;
  1316. /* Autonegotiation must be disabled to change speed */
  1317. if ((speed != SPEED_UNKNOWN && safe_ks.base.speed != speed) &&
  1318. (autoneg == AUTONEG_DISABLE ||
  1319. (safe_ks.base.autoneg == AUTONEG_DISABLE && !autoneg_changed))) {
  1320. link_speed = i40e_speed_to_link_speed(speed, ks);
  1321. if (link_speed == I40E_LINK_SPEED_UNKNOWN) {
  1322. netdev_info(netdev, "Given speed is not supported\n");
  1323. err = -EOPNOTSUPP;
  1324. goto done;
  1325. } else {
  1326. config.link_speed = link_speed;
  1327. }
  1328. } else {
  1329. if (safe_ks.base.speed != speed) {
  1330. netdev_info(netdev,
  1331. "Unable to set speed, disable autoneg\n");
  1332. err = -EOPNOTSUPP;
  1333. goto done;
  1334. }
  1335. }
  1336. /* If speed didn't get set, set it to what it currently is.
  1337. * This is needed because if advertise is 0 (as it is when autoneg
  1338. * is disabled) then speed won't get set.
  1339. */
  1340. if (!config.link_speed)
  1341. config.link_speed = abilities.link_speed;
  1342. if (autoneg_changed || abilities.link_speed != config.link_speed) {
  1343. /* copy over the rest of the abilities */
  1344. config.phy_type = abilities.phy_type;
  1345. config.phy_type_ext = abilities.phy_type_ext;
  1346. config.eee_capability = abilities.eee_capability;
  1347. config.eeer = abilities.eeer_val;
  1348. config.low_power_ctrl = abilities.d3_lpan;
  1349. config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
  1350. I40E_AQ_PHY_FEC_CONFIG_MASK;
  1351. /* save the requested speeds */
  1352. hw->phy.link_info.requested_speeds = config.link_speed;
  1353. /* set link and auto negotiation so changes take effect */
  1354. config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
  1355. /* If link is up put link down */
  1356. if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) {
  1357. /* Tell the OS link is going down, the link will go
  1358. * back up when fw says it is ready asynchronously
  1359. */
  1360. i40e_print_link_message(vsi, false);
  1361. netif_carrier_off(netdev);
  1362. netif_tx_stop_all_queues(netdev);
  1363. }
  1364. /* make the aq call */
  1365. status = i40e_aq_set_phy_config(hw, &config, NULL);
  1366. if (status) {
  1367. netdev_info(netdev,
  1368. "Set phy config failed, err %pe aq_err %s\n",
  1369. ERR_PTR(status),
  1370. i40e_aq_str(hw, hw->aq.asq_last_status));
  1371. err = -EAGAIN;
  1372. goto done;
  1373. }
  1374. status = i40e_update_link_info(hw);
  1375. if (status)
  1376. netdev_dbg(netdev,
  1377. "Updating link info failed with err %pe aq_err %s\n",
  1378. ERR_PTR(status),
  1379. i40e_aq_str(hw, hw->aq.asq_last_status));
  1380. } else {
  1381. netdev_info(netdev, "Nothing changed, exiting without setting anything.\n");
  1382. }
  1383. done:
  1384. clear_bit(__I40E_CONFIG_BUSY, pf->state);
  1385. return err;
  1386. }
  1387. static int i40e_set_fec_cfg(struct net_device *netdev, u8 fec_cfg)
  1388. {
  1389. struct i40e_netdev_priv *np = netdev_priv(netdev);
  1390. struct i40e_aq_get_phy_abilities_resp abilities;
  1391. struct i40e_pf *pf = np->vsi->back;
  1392. struct i40e_hw *hw = &pf->hw;
  1393. int status = 0;
  1394. int err = 0;
  1395. /* Get the current phy config */
  1396. memset(&abilities, 0, sizeof(abilities));
  1397. status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
  1398. NULL);
  1399. if (status) {
  1400. err = -EAGAIN;
  1401. goto done;
  1402. }
  1403. if (abilities.fec_cfg_curr_mod_ext_info != fec_cfg) {
  1404. struct i40e_aq_set_phy_config config;
  1405. memset(&config, 0, sizeof(config));
  1406. config.phy_type = abilities.phy_type;
  1407. config.abilities = abilities.abilities |
  1408. I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
  1409. config.phy_type_ext = abilities.phy_type_ext;
  1410. config.link_speed = abilities.link_speed;
  1411. config.eee_capability = abilities.eee_capability;
  1412. config.eeer = abilities.eeer_val;
  1413. config.low_power_ctrl = abilities.d3_lpan;
  1414. config.fec_config = fec_cfg & I40E_AQ_PHY_FEC_CONFIG_MASK;
  1415. status = i40e_aq_set_phy_config(hw, &config, NULL);
  1416. if (status) {
  1417. netdev_info(netdev,
  1418. "Set phy config failed, err %pe aq_err %s\n",
  1419. ERR_PTR(status),
  1420. i40e_aq_str(hw, hw->aq.asq_last_status));
  1421. err = -EAGAIN;
  1422. goto done;
  1423. }
  1424. i40e_set_fec_in_flags(fec_cfg, pf->flags);
  1425. status = i40e_update_link_info(hw);
  1426. if (status)
  1427. /* debug level message only due to relation to the link
  1428. * itself rather than to the FEC settings
  1429. * (e.g. no physical connection etc.)
  1430. */
  1431. netdev_dbg(netdev,
  1432. "Updating link info failed with err %pe aq_err %s\n",
  1433. ERR_PTR(status),
  1434. i40e_aq_str(hw, hw->aq.asq_last_status));
  1435. }
  1436. done:
  1437. return err;
  1438. }
  1439. static int i40e_get_fec_param(struct net_device *netdev,
  1440. struct ethtool_fecparam *fecparam)
  1441. {
  1442. struct i40e_netdev_priv *np = netdev_priv(netdev);
  1443. struct i40e_aq_get_phy_abilities_resp abilities;
  1444. struct i40e_pf *pf = np->vsi->back;
  1445. struct i40e_hw *hw = &pf->hw;
  1446. int status = 0;
  1447. int err = 0;
  1448. u8 fec_cfg;
  1449. /* Get the current phy config */
  1450. memset(&abilities, 0, sizeof(abilities));
  1451. status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
  1452. NULL);
  1453. if (status) {
  1454. err = -EAGAIN;
  1455. goto done;
  1456. }
  1457. fecparam->fec = 0;
  1458. fec_cfg = abilities.fec_cfg_curr_mod_ext_info;
  1459. if (fec_cfg & I40E_AQ_SET_FEC_AUTO)
  1460. fecparam->fec |= ETHTOOL_FEC_AUTO;
  1461. else if (fec_cfg & (I40E_AQ_SET_FEC_REQUEST_RS |
  1462. I40E_AQ_SET_FEC_ABILITY_RS))
  1463. fecparam->fec |= ETHTOOL_FEC_RS;
  1464. else if (fec_cfg & (I40E_AQ_SET_FEC_REQUEST_KR |
  1465. I40E_AQ_SET_FEC_ABILITY_KR))
  1466. fecparam->fec |= ETHTOOL_FEC_BASER;
  1467. if (fec_cfg == 0)
  1468. fecparam->fec |= ETHTOOL_FEC_OFF;
  1469. if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_KR_ENA)
  1470. fecparam->active_fec = ETHTOOL_FEC_BASER;
  1471. else if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_RS_ENA)
  1472. fecparam->active_fec = ETHTOOL_FEC_RS;
  1473. else
  1474. fecparam->active_fec = ETHTOOL_FEC_OFF;
  1475. done:
  1476. return err;
  1477. }
  1478. static int i40e_set_fec_param(struct net_device *netdev,
  1479. struct ethtool_fecparam *fecparam)
  1480. {
  1481. struct i40e_netdev_priv *np = netdev_priv(netdev);
  1482. struct i40e_pf *pf = np->vsi->back;
  1483. struct i40e_hw *hw = &pf->hw;
  1484. u8 fec_cfg = 0;
  1485. if (hw->device_id != I40E_DEV_ID_25G_SFP28 &&
  1486. hw->device_id != I40E_DEV_ID_25G_B &&
  1487. hw->device_id != I40E_DEV_ID_KX_X722)
  1488. return -EPERM;
  1489. if (hw->mac.type == I40E_MAC_X722 &&
  1490. !test_bit(I40E_HW_CAP_X722_FEC_REQUEST, hw->caps)) {
  1491. netdev_err(netdev, "Setting FEC encoding not supported by firmware. Please update the NVM image.\n");
  1492. return -EOPNOTSUPP;
  1493. }
  1494. switch (fecparam->fec) {
  1495. case ETHTOOL_FEC_AUTO:
  1496. fec_cfg = I40E_AQ_SET_FEC_AUTO;
  1497. break;
  1498. case ETHTOOL_FEC_RS:
  1499. fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS |
  1500. I40E_AQ_SET_FEC_ABILITY_RS);
  1501. break;
  1502. case ETHTOOL_FEC_BASER:
  1503. fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR |
  1504. I40E_AQ_SET_FEC_ABILITY_KR);
  1505. break;
  1506. case ETHTOOL_FEC_OFF:
  1507. case ETHTOOL_FEC_NONE:
  1508. fec_cfg = 0;
  1509. break;
  1510. default:
  1511. dev_warn(&pf->pdev->dev, "Unsupported FEC mode: %d",
  1512. fecparam->fec);
  1513. return -EINVAL;
  1514. }
  1515. return i40e_set_fec_cfg(netdev, fec_cfg);
  1516. }
  1517. static int i40e_nway_reset(struct net_device *netdev)
  1518. {
  1519. /* restart autonegotiation */
  1520. struct i40e_netdev_priv *np = netdev_priv(netdev);
  1521. struct i40e_pf *pf = np->vsi->back;
  1522. struct i40e_hw *hw = &pf->hw;
  1523. bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
  1524. int ret = 0;
  1525. ret = i40e_aq_set_link_restart_an(hw, link_up, NULL);
  1526. if (ret) {
  1527. netdev_info(netdev, "link restart failed, err %pe aq_err %s\n",
  1528. ERR_PTR(ret),
  1529. i40e_aq_str(hw, hw->aq.asq_last_status));
  1530. return -EIO;
  1531. }
  1532. return 0;
  1533. }
  1534. /**
  1535. * i40e_get_pauseparam - Get Flow Control status
  1536. * @netdev: netdevice structure
  1537. * @pause: buffer to return pause parameters
  1538. *
  1539. * Return tx/rx-pause status
  1540. **/
  1541. static void i40e_get_pauseparam(struct net_device *netdev,
  1542. struct ethtool_pauseparam *pause)
  1543. {
  1544. struct i40e_netdev_priv *np = netdev_priv(netdev);
  1545. struct i40e_pf *pf = np->vsi->back;
  1546. struct i40e_hw *hw = &pf->hw;
  1547. struct i40e_link_status *hw_link_info = &hw->phy.link_info;
  1548. struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
  1549. pause->autoneg =
  1550. ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
  1551. AUTONEG_ENABLE : AUTONEG_DISABLE);
  1552. /* PFC enabled so report LFC as off */
  1553. if (dcbx_cfg->pfc.pfcenable) {
  1554. pause->rx_pause = 0;
  1555. pause->tx_pause = 0;
  1556. return;
  1557. }
  1558. if (hw->fc.current_mode == I40E_FC_RX_PAUSE) {
  1559. pause->rx_pause = 1;
  1560. } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) {
  1561. pause->tx_pause = 1;
  1562. } else if (hw->fc.current_mode == I40E_FC_FULL) {
  1563. pause->rx_pause = 1;
  1564. pause->tx_pause = 1;
  1565. }
  1566. }
  1567. /**
  1568. * i40e_set_pauseparam - Set Flow Control parameter
  1569. * @netdev: network interface device structure
  1570. * @pause: return tx/rx flow control status
  1571. **/
  1572. static int i40e_set_pauseparam(struct net_device *netdev,
  1573. struct ethtool_pauseparam *pause)
  1574. {
  1575. struct i40e_netdev_priv *np = netdev_priv(netdev);
  1576. struct i40e_pf *pf = np->vsi->back;
  1577. struct i40e_vsi *vsi = np->vsi;
  1578. struct i40e_hw *hw = &pf->hw;
  1579. struct i40e_link_status *hw_link_info = &hw->phy.link_info;
  1580. struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
  1581. bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
  1582. u8 aq_failures;
  1583. int err = 0;
  1584. int status;
  1585. u32 is_an;
  1586. /* Changing the port's flow control is not supported if this isn't the
  1587. * port's controlling PF
  1588. */
  1589. if (hw->partition_id != 1) {
  1590. i40e_partition_setting_complaint(pf);
  1591. return -EOPNOTSUPP;
  1592. }
  1593. if (vsi->type != I40E_VSI_MAIN)
  1594. return -EOPNOTSUPP;
  1595. is_an = hw_link_info->an_info & I40E_AQ_AN_COMPLETED;
  1596. if (pause->autoneg != is_an) {
  1597. netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n");
  1598. return -EOPNOTSUPP;
  1599. }
  1600. /* If we have link and don't have autoneg */
  1601. if (!test_bit(__I40E_DOWN, pf->state) && !is_an) {
  1602. /* Send message that it might not necessarily work*/
  1603. netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n");
  1604. }
  1605. if (dcbx_cfg->pfc.pfcenable) {
  1606. netdev_info(netdev,
  1607. "Priority flow control enabled. Cannot set link flow control.\n");
  1608. return -EOPNOTSUPP;
  1609. }
  1610. if (pause->rx_pause && pause->tx_pause)
  1611. hw->fc.requested_mode = I40E_FC_FULL;
  1612. else if (pause->rx_pause && !pause->tx_pause)
  1613. hw->fc.requested_mode = I40E_FC_RX_PAUSE;
  1614. else if (!pause->rx_pause && pause->tx_pause)
  1615. hw->fc.requested_mode = I40E_FC_TX_PAUSE;
  1616. else if (!pause->rx_pause && !pause->tx_pause)
  1617. hw->fc.requested_mode = I40E_FC_NONE;
  1618. else
  1619. return -EINVAL;
  1620. /* Tell the OS link is going down, the link will go back up when fw
  1621. * says it is ready asynchronously
  1622. */
  1623. i40e_print_link_message(vsi, false);
  1624. netif_carrier_off(netdev);
  1625. netif_tx_stop_all_queues(netdev);
  1626. /* Set the fc mode and only restart an if link is up*/
  1627. status = i40e_set_fc(hw, &aq_failures, link_up);
  1628. if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) {
  1629. netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %pe aq_err %s\n",
  1630. ERR_PTR(status),
  1631. i40e_aq_str(hw, hw->aq.asq_last_status));
  1632. err = -EAGAIN;
  1633. }
  1634. if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) {
  1635. netdev_info(netdev, "Set fc failed on the set_phy_config call with err %pe aq_err %s\n",
  1636. ERR_PTR(status),
  1637. i40e_aq_str(hw, hw->aq.asq_last_status));
  1638. err = -EAGAIN;
  1639. }
  1640. if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) {
  1641. netdev_info(netdev, "Set fc failed on the get_link_info call with err %pe aq_err %s\n",
  1642. ERR_PTR(status),
  1643. i40e_aq_str(hw, hw->aq.asq_last_status));
  1644. err = -EAGAIN;
  1645. }
  1646. if (!test_bit(__I40E_DOWN, pf->state) && is_an) {
  1647. /* Give it a little more time to try to come back */
  1648. msleep(75);
  1649. if (!test_bit(__I40E_DOWN, pf->state))
  1650. return i40e_nway_reset(netdev);
  1651. }
  1652. return err;
  1653. }
  1654. static u32 i40e_get_msglevel(struct net_device *netdev)
  1655. {
  1656. struct i40e_netdev_priv *np = netdev_priv(netdev);
  1657. struct i40e_pf *pf = np->vsi->back;
  1658. u32 debug_mask = pf->hw.debug_mask;
  1659. if (debug_mask)
  1660. netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask);
  1661. return pf->msg_enable;
  1662. }
  1663. static void i40e_set_msglevel(struct net_device *netdev, u32 data)
  1664. {
  1665. struct i40e_netdev_priv *np = netdev_priv(netdev);
  1666. struct i40e_pf *pf = np->vsi->back;
  1667. if (I40E_DEBUG_USER & data)
  1668. pf->hw.debug_mask = data;
  1669. else
  1670. pf->msg_enable = data;
  1671. }
  1672. static int i40e_get_regs_len(struct net_device *netdev)
  1673. {
  1674. int reg_count = 0;
  1675. int i;
  1676. for (i = 0; i40e_reg_list[i].offset != 0; i++)
  1677. reg_count += i40e_reg_list[i].elements;
  1678. return reg_count * sizeof(u32);
  1679. }
  1680. static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
  1681. void *p)
  1682. {
  1683. struct i40e_netdev_priv *np = netdev_priv(netdev);
  1684. struct i40e_pf *pf = np->vsi->back;
  1685. struct i40e_hw *hw = &pf->hw;
  1686. u32 *reg_buf = p;
  1687. unsigned int i, j, ri;
  1688. u32 reg;
  1689. /* Tell ethtool which driver-version-specific regs output we have.
  1690. *
  1691. * At some point, if we have ethtool doing special formatting of
  1692. * this data, it will rely on this version number to know how to
  1693. * interpret things. Hence, this needs to be updated if/when the
  1694. * diags register table is changed.
  1695. */
  1696. regs->version = 1;
  1697. /* loop through the diags reg table for what to print */
  1698. ri = 0;
  1699. for (i = 0; i40e_reg_list[i].offset != 0; i++) {
  1700. for (j = 0; j < i40e_reg_list[i].elements; j++) {
  1701. reg = i40e_reg_list[i].offset
  1702. + (j * i40e_reg_list[i].stride);
  1703. reg_buf[ri++] = rd32(hw, reg);
  1704. }
  1705. }
  1706. }
  1707. static int i40e_get_eeprom(struct net_device *netdev,
  1708. struct ethtool_eeprom *eeprom, u8 *bytes)
  1709. {
  1710. struct i40e_netdev_priv *np = netdev_priv(netdev);
  1711. struct i40e_hw *hw = &np->vsi->back->hw;
  1712. struct i40e_pf *pf = np->vsi->back;
  1713. int ret_val = 0, len, offset;
  1714. u8 *eeprom_buff;
  1715. u16 i, sectors;
  1716. bool last;
  1717. u32 magic;
  1718. #define I40E_NVM_SECTOR_SIZE 4096
  1719. if (eeprom->len == 0)
  1720. return -EINVAL;
  1721. /* check for NVMUpdate access method */
  1722. magic = hw->vendor_id | (hw->device_id << 16);
  1723. if (eeprom->magic && eeprom->magic != magic) {
  1724. struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
  1725. int errno = 0;
  1726. /* make sure it is the right magic for NVMUpdate */
  1727. if ((eeprom->magic >> 16) != hw->device_id)
  1728. errno = -EINVAL;
  1729. else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
  1730. test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
  1731. errno = -EBUSY;
  1732. else
  1733. ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
  1734. if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
  1735. dev_info(&pf->pdev->dev,
  1736. "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
  1737. ret_val, hw->aq.asq_last_status, errno,
  1738. (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
  1739. cmd->offset, cmd->data_size);
  1740. return errno;
  1741. }
  1742. /* normal ethtool get_eeprom support */
  1743. eeprom->magic = hw->vendor_id | (hw->device_id << 16);
  1744. eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL);
  1745. if (!eeprom_buff)
  1746. return -ENOMEM;
  1747. ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
  1748. if (ret_val) {
  1749. dev_info(&pf->pdev->dev,
  1750. "Failed Acquiring NVM resource for read err=%d status=0x%x\n",
  1751. ret_val, hw->aq.asq_last_status);
  1752. goto free_buff;
  1753. }
  1754. sectors = eeprom->len / I40E_NVM_SECTOR_SIZE;
  1755. sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0;
  1756. len = I40E_NVM_SECTOR_SIZE;
  1757. last = false;
  1758. for (i = 0; i < sectors; i++) {
  1759. if (i == (sectors - 1)) {
  1760. len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i);
  1761. last = true;
  1762. }
  1763. offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i);
  1764. ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len,
  1765. (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i),
  1766. last, NULL);
  1767. if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) {
  1768. dev_info(&pf->pdev->dev,
  1769. "read NVM failed, invalid offset 0x%x\n",
  1770. offset);
  1771. break;
  1772. } else if (ret_val &&
  1773. hw->aq.asq_last_status == I40E_AQ_RC_EACCES) {
  1774. dev_info(&pf->pdev->dev,
  1775. "read NVM failed, access, offset 0x%x\n",
  1776. offset);
  1777. break;
  1778. } else if (ret_val) {
  1779. dev_info(&pf->pdev->dev,
  1780. "read NVM failed offset %d err=%d status=0x%x\n",
  1781. offset, ret_val, hw->aq.asq_last_status);
  1782. break;
  1783. }
  1784. }
  1785. i40e_release_nvm(hw);
  1786. memcpy(bytes, (u8 *)eeprom_buff, eeprom->len);
  1787. free_buff:
  1788. kfree(eeprom_buff);
  1789. return ret_val;
  1790. }
  1791. static int i40e_get_eeprom_len(struct net_device *netdev)
  1792. {
  1793. struct i40e_netdev_priv *np = netdev_priv(netdev);
  1794. struct i40e_hw *hw = &np->vsi->back->hw;
  1795. u32 val;
  1796. #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF
  1797. if (hw->mac.type == I40E_MAC_X722) {
  1798. val = X722_EEPROM_SCOPE_LIMIT + 1;
  1799. return val;
  1800. }
  1801. val = FIELD_GET(I40E_GLPCI_LBARCTRL_FL_SIZE_MASK,
  1802. rd32(hw, I40E_GLPCI_LBARCTRL));
  1803. /* register returns value in power of 2, 64Kbyte chunks. */
  1804. val = (64 * 1024) * BIT(val);
  1805. return val;
  1806. }
  1807. static int i40e_set_eeprom(struct net_device *netdev,
  1808. struct ethtool_eeprom *eeprom, u8 *bytes)
  1809. {
  1810. struct i40e_netdev_priv *np = netdev_priv(netdev);
  1811. struct i40e_hw *hw = &np->vsi->back->hw;
  1812. struct i40e_pf *pf = np->vsi->back;
  1813. struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
  1814. int ret_val = 0;
  1815. int errno = 0;
  1816. u32 magic;
  1817. /* normal ethtool set_eeprom is not supported */
  1818. magic = hw->vendor_id | (hw->device_id << 16);
  1819. if (eeprom->magic == magic)
  1820. errno = -EOPNOTSUPP;
  1821. /* check for NVMUpdate access method */
  1822. else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id)
  1823. errno = -EINVAL;
  1824. else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
  1825. test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
  1826. errno = -EBUSY;
  1827. else
  1828. ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
  1829. if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
  1830. dev_info(&pf->pdev->dev,
  1831. "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
  1832. ret_val, hw->aq.asq_last_status, errno,
  1833. (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
  1834. cmd->offset, cmd->data_size);
  1835. return errno;
  1836. }
  1837. static void i40e_get_drvinfo(struct net_device *netdev,
  1838. struct ethtool_drvinfo *drvinfo)
  1839. {
  1840. struct i40e_netdev_priv *np = netdev_priv(netdev);
  1841. struct i40e_vsi *vsi = np->vsi;
  1842. struct i40e_pf *pf = vsi->back;
  1843. strscpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver));
  1844. i40e_nvm_version_str(&pf->hw, drvinfo->fw_version,
  1845. sizeof(drvinfo->fw_version));
  1846. strscpy(drvinfo->bus_info, pci_name(pf->pdev),
  1847. sizeof(drvinfo->bus_info));
  1848. drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN;
  1849. if (pf->hw.pf_id == 0)
  1850. drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN;
  1851. }
  1852. static u32 i40e_get_max_num_descriptors(struct i40e_pf *pf)
  1853. {
  1854. struct i40e_hw *hw = &pf->hw;
  1855. switch (hw->mac.type) {
  1856. case I40E_MAC_XL710:
  1857. return I40E_MAX_NUM_DESCRIPTORS_XL710;
  1858. default:
  1859. return I40E_MAX_NUM_DESCRIPTORS;
  1860. }
  1861. }
  1862. static void i40e_get_ringparam(struct net_device *netdev,
  1863. struct ethtool_ringparam *ring,
  1864. struct kernel_ethtool_ringparam *kernel_ring,
  1865. struct netlink_ext_ack *extack)
  1866. {
  1867. struct i40e_netdev_priv *np = netdev_priv(netdev);
  1868. struct i40e_pf *pf = np->vsi->back;
  1869. struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
  1870. ring->rx_max_pending = i40e_get_max_num_descriptors(pf);
  1871. ring->tx_max_pending = i40e_get_max_num_descriptors(pf);
  1872. ring->rx_mini_max_pending = 0;
  1873. ring->rx_jumbo_max_pending = 0;
  1874. ring->rx_pending = vsi->rx_rings[0]->count;
  1875. ring->tx_pending = vsi->tx_rings[0]->count;
  1876. ring->rx_mini_pending = 0;
  1877. ring->rx_jumbo_pending = 0;
  1878. }
  1879. static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index)
  1880. {
  1881. if (i40e_enabled_xdp_vsi(vsi)) {
  1882. return index < vsi->num_queue_pairs ||
  1883. (index >= vsi->alloc_queue_pairs &&
  1884. index < vsi->alloc_queue_pairs + vsi->num_queue_pairs);
  1885. }
  1886. return index < vsi->num_queue_pairs;
  1887. }
  1888. static int i40e_set_ringparam(struct net_device *netdev,
  1889. struct ethtool_ringparam *ring,
  1890. struct kernel_ethtool_ringparam *kernel_ring,
  1891. struct netlink_ext_ack *extack)
  1892. {
  1893. u32 new_rx_count, new_tx_count, max_num_descriptors;
  1894. struct i40e_ring *tx_rings = NULL, *rx_rings = NULL;
  1895. struct i40e_netdev_priv *np = netdev_priv(netdev);
  1896. struct i40e_hw *hw = &np->vsi->back->hw;
  1897. struct i40e_vsi *vsi = np->vsi;
  1898. struct i40e_pf *pf = vsi->back;
  1899. u16 tx_alloc_queue_pairs;
  1900. int timeout = 50;
  1901. int i, err = 0;
  1902. if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
  1903. return -EINVAL;
  1904. max_num_descriptors = i40e_get_max_num_descriptors(pf);
  1905. if (ring->tx_pending > max_num_descriptors ||
  1906. ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS ||
  1907. ring->rx_pending > max_num_descriptors ||
  1908. ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) {
  1909. netdev_info(netdev,
  1910. "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n",
  1911. ring->tx_pending, ring->rx_pending,
  1912. I40E_MIN_NUM_DESCRIPTORS, max_num_descriptors);
  1913. return -EINVAL;
  1914. }
  1915. new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
  1916. new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
  1917. /* if nothing to do return success */
  1918. if ((new_tx_count == vsi->tx_rings[0]->count) &&
  1919. (new_rx_count == vsi->rx_rings[0]->count))
  1920. return 0;
  1921. /* If there is a AF_XDP page pool attached to any of Rx rings,
  1922. * disallow changing the number of descriptors -- regardless
  1923. * if the netdev is running or not.
  1924. */
  1925. if (i40e_xsk_any_rx_ring_enabled(vsi))
  1926. return -EBUSY;
  1927. while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
  1928. timeout--;
  1929. if (!timeout)
  1930. return -EBUSY;
  1931. usleep_range(1000, 2000);
  1932. }
  1933. if (!netif_running(vsi->netdev)) {
  1934. /* simple case - set for the next time the netdev is started */
  1935. for (i = 0; i < vsi->num_queue_pairs; i++) {
  1936. vsi->tx_rings[i]->count = new_tx_count;
  1937. vsi->rx_rings[i]->count = new_rx_count;
  1938. if (i40e_enabled_xdp_vsi(vsi))
  1939. vsi->xdp_rings[i]->count = new_tx_count;
  1940. }
  1941. vsi->num_tx_desc = new_tx_count;
  1942. vsi->num_rx_desc = new_rx_count;
  1943. goto done;
  1944. }
  1945. /* We can't just free everything and then setup again,
  1946. * because the ISRs in MSI-X mode get passed pointers
  1947. * to the Tx and Rx ring structs.
  1948. */
  1949. /* alloc updated Tx and XDP Tx resources */
  1950. tx_alloc_queue_pairs = vsi->alloc_queue_pairs *
  1951. (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
  1952. if (new_tx_count != vsi->tx_rings[0]->count) {
  1953. netdev_info(netdev,
  1954. "Changing Tx descriptor count from %d to %d.\n",
  1955. vsi->tx_rings[0]->count, new_tx_count);
  1956. tx_rings = kcalloc(tx_alloc_queue_pairs,
  1957. sizeof(struct i40e_ring), GFP_KERNEL);
  1958. if (!tx_rings) {
  1959. err = -ENOMEM;
  1960. goto done;
  1961. }
  1962. for (i = 0; i < tx_alloc_queue_pairs; i++) {
  1963. if (!i40e_active_tx_ring_index(vsi, i))
  1964. continue;
  1965. tx_rings[i] = *vsi->tx_rings[i];
  1966. tx_rings[i].count = new_tx_count;
  1967. /* the desc and bi pointers will be reallocated in the
  1968. * setup call
  1969. */
  1970. tx_rings[i].desc = NULL;
  1971. tx_rings[i].rx_bi = NULL;
  1972. err = i40e_setup_tx_descriptors(&tx_rings[i]);
  1973. if (err) {
  1974. while (i) {
  1975. i--;
  1976. if (!i40e_active_tx_ring_index(vsi, i))
  1977. continue;
  1978. i40e_free_tx_resources(&tx_rings[i]);
  1979. }
  1980. kfree(tx_rings);
  1981. tx_rings = NULL;
  1982. goto done;
  1983. }
  1984. }
  1985. }
  1986. /* alloc updated Rx resources */
  1987. if (new_rx_count != vsi->rx_rings[0]->count) {
  1988. netdev_info(netdev,
  1989. "Changing Rx descriptor count from %d to %d\n",
  1990. vsi->rx_rings[0]->count, new_rx_count);
  1991. rx_rings = kcalloc(vsi->alloc_queue_pairs,
  1992. sizeof(struct i40e_ring), GFP_KERNEL);
  1993. if (!rx_rings) {
  1994. err = -ENOMEM;
  1995. goto free_tx;
  1996. }
  1997. for (i = 0; i < vsi->num_queue_pairs; i++) {
  1998. u16 unused;
  1999. /* clone ring and setup updated count */
  2000. rx_rings[i] = *vsi->rx_rings[i];
  2001. rx_rings[i].count = new_rx_count;
  2002. /* the desc and bi pointers will be reallocated in the
  2003. * setup call
  2004. */
  2005. rx_rings[i].desc = NULL;
  2006. rx_rings[i].rx_bi = NULL;
  2007. /* Clear cloned XDP RX-queue info before setup call */
  2008. memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq));
  2009. /* this is to allow wr32 to have something to write to
  2010. * during early allocation of Rx buffers
  2011. */
  2012. rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS;
  2013. err = i40e_setup_rx_descriptors(&rx_rings[i]);
  2014. if (err)
  2015. goto rx_unwind;
  2016. /* now allocate the Rx buffers to make sure the OS
  2017. * has enough memory, any failure here means abort
  2018. */
  2019. unused = I40E_DESC_UNUSED(&rx_rings[i]);
  2020. err = i40e_alloc_rx_buffers(&rx_rings[i], unused);
  2021. rx_unwind:
  2022. if (err) {
  2023. do {
  2024. i40e_free_rx_resources(&rx_rings[i]);
  2025. } while (i--);
  2026. kfree(rx_rings);
  2027. rx_rings = NULL;
  2028. goto free_tx;
  2029. }
  2030. }
  2031. }
  2032. /* Bring interface down, copy in the new ring info,
  2033. * then restore the interface
  2034. */
  2035. i40e_down(vsi);
  2036. if (tx_rings) {
  2037. for (i = 0; i < tx_alloc_queue_pairs; i++) {
  2038. if (i40e_active_tx_ring_index(vsi, i)) {
  2039. i40e_free_tx_resources(vsi->tx_rings[i]);
  2040. *vsi->tx_rings[i] = tx_rings[i];
  2041. }
  2042. }
  2043. kfree(tx_rings);
  2044. tx_rings = NULL;
  2045. }
  2046. if (rx_rings) {
  2047. for (i = 0; i < vsi->num_queue_pairs; i++) {
  2048. i40e_free_rx_resources(vsi->rx_rings[i]);
  2049. /* get the real tail offset */
  2050. rx_rings[i].tail = vsi->rx_rings[i]->tail;
  2051. /* this is to fake out the allocation routine
  2052. * into thinking it has to realloc everything
  2053. * but the recycling logic will let us re-use
  2054. * the buffers allocated above
  2055. */
  2056. rx_rings[i].next_to_use = 0;
  2057. rx_rings[i].next_to_clean = 0;
  2058. rx_rings[i].next_to_alloc = 0;
  2059. /* do a struct copy */
  2060. *vsi->rx_rings[i] = rx_rings[i];
  2061. }
  2062. kfree(rx_rings);
  2063. rx_rings = NULL;
  2064. }
  2065. vsi->num_tx_desc = new_tx_count;
  2066. vsi->num_rx_desc = new_rx_count;
  2067. i40e_up(vsi);
  2068. free_tx:
  2069. /* error cleanup if the Rx allocations failed after getting Tx */
  2070. if (tx_rings) {
  2071. for (i = 0; i < tx_alloc_queue_pairs; i++) {
  2072. if (i40e_active_tx_ring_index(vsi, i))
  2073. i40e_free_tx_resources(vsi->tx_rings[i]);
  2074. }
  2075. kfree(tx_rings);
  2076. tx_rings = NULL;
  2077. }
  2078. done:
  2079. clear_bit(__I40E_CONFIG_BUSY, pf->state);
  2080. return err;
  2081. }
  2082. /**
  2083. * i40e_get_stats_count - return the stats count for a device
  2084. * @netdev: the netdev to return the count for
  2085. *
  2086. * Returns the total number of statistics for this netdev. Note that even
  2087. * though this is a function, it is required that the count for a specific
  2088. * netdev must never change. Basing the count on static values such as the
  2089. * maximum number of queues or the device type is ok. However, the API for
  2090. * obtaining stats is *not* safe against changes based on non-static
  2091. * values such as the *current* number of queues, or runtime flags.
  2092. *
  2093. * If a statistic is not always enabled, return it as part of the count
  2094. * anyways, always return its string, and report its value as zero.
  2095. **/
  2096. static int i40e_get_stats_count(struct net_device *netdev)
  2097. {
  2098. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2099. struct i40e_vsi *vsi = np->vsi;
  2100. struct i40e_pf *pf = vsi->back;
  2101. int stats_len;
  2102. if (vsi->type == I40E_VSI_MAIN && pf->hw.partition_id == 1)
  2103. stats_len = I40E_PF_STATS_LEN;
  2104. else
  2105. stats_len = I40E_VSI_STATS_LEN;
  2106. /* The number of stats reported for a given net_device must remain
  2107. * constant throughout the life of that device.
  2108. *
  2109. * This is because the API for obtaining the size, strings, and stats
  2110. * is spread out over three separate ethtool ioctls. There is no safe
  2111. * way to lock the number of stats across these calls, so we must
  2112. * assume that they will never change.
  2113. *
  2114. * Due to this, we report the maximum number of queues, even if not
  2115. * every queue is currently configured. Since we always allocate
  2116. * queues in pairs, we'll just use netdev->num_tx_queues * 2. This
  2117. * works because the num_tx_queues is set at device creation and never
  2118. * changes.
  2119. */
  2120. stats_len += I40E_QUEUE_STATS_LEN * 2 * netdev->num_tx_queues;
  2121. return stats_len;
  2122. }
  2123. static int i40e_get_sset_count(struct net_device *netdev, int sset)
  2124. {
  2125. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2126. struct i40e_vsi *vsi = np->vsi;
  2127. struct i40e_pf *pf = vsi->back;
  2128. switch (sset) {
  2129. case ETH_SS_TEST:
  2130. return I40E_TEST_LEN;
  2131. case ETH_SS_STATS:
  2132. return i40e_get_stats_count(netdev);
  2133. case ETH_SS_PRIV_FLAGS:
  2134. return I40E_PRIV_FLAGS_STR_LEN +
  2135. (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0);
  2136. default:
  2137. return -EOPNOTSUPP;
  2138. }
  2139. }
  2140. /**
  2141. * i40e_get_veb_tc_stats - copy VEB TC statistics to formatted structure
  2142. * @tc: the TC statistics in VEB structure (veb->tc_stats)
  2143. * @i: the index of traffic class in (veb->tc_stats) structure to copy
  2144. *
  2145. * Copy VEB TC statistics from structure of arrays (veb->tc_stats) to
  2146. * one dimensional structure i40e_cp_veb_tc_stats.
  2147. * Produce formatted i40e_cp_veb_tc_stats structure of the VEB TC
  2148. * statistics for the given TC.
  2149. **/
  2150. static struct i40e_cp_veb_tc_stats
  2151. i40e_get_veb_tc_stats(struct i40e_veb_tc_stats *tc, unsigned int i)
  2152. {
  2153. struct i40e_cp_veb_tc_stats veb_tc = {
  2154. .tc_rx_packets = tc->tc_rx_packets[i],
  2155. .tc_rx_bytes = tc->tc_rx_bytes[i],
  2156. .tc_tx_packets = tc->tc_tx_packets[i],
  2157. .tc_tx_bytes = tc->tc_tx_bytes[i],
  2158. };
  2159. return veb_tc;
  2160. }
  2161. /**
  2162. * i40e_get_pfc_stats - copy HW PFC statistics to formatted structure
  2163. * @pf: the PF device structure
  2164. * @i: the priority value to copy
  2165. *
  2166. * The PFC stats are found as arrays in pf->stats, which is not easy to pass
  2167. * into i40e_add_ethtool_stats. Produce a formatted i40e_pfc_stats structure
  2168. * of the PFC stats for the given priority.
  2169. **/
  2170. static inline struct i40e_pfc_stats
  2171. i40e_get_pfc_stats(struct i40e_pf *pf, unsigned int i)
  2172. {
  2173. #define I40E_GET_PFC_STAT(stat, priority) \
  2174. .stat = pf->stats.stat[priority]
  2175. struct i40e_pfc_stats pfc = {
  2176. I40E_GET_PFC_STAT(priority_xon_rx, i),
  2177. I40E_GET_PFC_STAT(priority_xoff_rx, i),
  2178. I40E_GET_PFC_STAT(priority_xon_tx, i),
  2179. I40E_GET_PFC_STAT(priority_xoff_tx, i),
  2180. I40E_GET_PFC_STAT(priority_xon_2_xoff, i),
  2181. };
  2182. return pfc;
  2183. }
  2184. /**
  2185. * i40e_get_ethtool_stats - copy stat values into supplied buffer
  2186. * @netdev: the netdev to collect stats for
  2187. * @stats: ethtool stats command structure
  2188. * @data: ethtool supplied buffer
  2189. *
  2190. * Copy the stats values for this netdev into the buffer. Expects data to be
  2191. * pre-allocated to the size returned by i40e_get_stats_count.. Note that all
  2192. * statistics must be copied in a static order, and the count must not change
  2193. * for a given netdev. See i40e_get_stats_count for more details.
  2194. *
  2195. * If a statistic is not currently valid (such as a disabled queue), this
  2196. * function reports its value as zero.
  2197. **/
  2198. static void i40e_get_ethtool_stats(struct net_device *netdev,
  2199. struct ethtool_stats *stats, u64 *data)
  2200. {
  2201. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2202. struct i40e_vsi *vsi = np->vsi;
  2203. struct i40e_pf *pf = vsi->back;
  2204. struct i40e_veb *veb = NULL;
  2205. unsigned int i;
  2206. bool veb_stats;
  2207. u64 *p = data;
  2208. i40e_update_stats(vsi);
  2209. i40e_add_ethtool_stats(&data, i40e_get_vsi_stats_struct(vsi),
  2210. i40e_gstrings_net_stats);
  2211. i40e_add_ethtool_stats(&data, vsi, i40e_gstrings_misc_stats);
  2212. rcu_read_lock();
  2213. for (i = 0; i < netdev->num_tx_queues; i++) {
  2214. i40e_add_queue_stats(&data, READ_ONCE(vsi->tx_rings[i]));
  2215. i40e_add_queue_stats(&data, READ_ONCE(vsi->rx_rings[i]));
  2216. }
  2217. rcu_read_unlock();
  2218. if (vsi->type != I40E_VSI_MAIN || pf->hw.partition_id != 1)
  2219. goto check_data_pointer;
  2220. veb = i40e_pf_get_main_veb(pf);
  2221. veb_stats = veb && test_bit(I40E_FLAG_VEB_STATS_ENA, pf->flags);
  2222. if (veb_stats)
  2223. i40e_update_veb_stats(veb);
  2224. /* If veb stats aren't enabled, pass NULL instead of the veb so that
  2225. * we initialize stats to zero and update the data pointer
  2226. * intelligently
  2227. */
  2228. i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL,
  2229. i40e_gstrings_veb_stats);
  2230. for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
  2231. if (veb_stats) {
  2232. struct i40e_cp_veb_tc_stats veb_tc =
  2233. i40e_get_veb_tc_stats(&veb->tc_stats, i);
  2234. i40e_add_ethtool_stats(&data, &veb_tc,
  2235. i40e_gstrings_veb_tc_stats);
  2236. } else {
  2237. i40e_add_ethtool_stats(&data, NULL,
  2238. i40e_gstrings_veb_tc_stats);
  2239. }
  2240. i40e_add_ethtool_stats(&data, pf, i40e_gstrings_stats);
  2241. for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
  2242. struct i40e_pfc_stats pfc = i40e_get_pfc_stats(pf, i);
  2243. i40e_add_ethtool_stats(&data, &pfc, i40e_gstrings_pfc_stats);
  2244. }
  2245. check_data_pointer:
  2246. WARN_ONCE(data - p != i40e_get_stats_count(netdev),
  2247. "ethtool stats count mismatch!");
  2248. }
  2249. /**
  2250. * i40e_get_stat_strings - copy stat strings into supplied buffer
  2251. * @netdev: the netdev to collect strings for
  2252. * @data: supplied buffer to copy strings into
  2253. *
  2254. * Copy the strings related to stats for this netdev. Expects data to be
  2255. * pre-allocated with the size reported by i40e_get_stats_count. Note that the
  2256. * strings must be copied in a static order and the total count must not
  2257. * change for a given netdev. See i40e_get_stats_count for more details.
  2258. **/
  2259. static void i40e_get_stat_strings(struct net_device *netdev, u8 *data)
  2260. {
  2261. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2262. struct i40e_vsi *vsi = np->vsi;
  2263. struct i40e_pf *pf = vsi->back;
  2264. unsigned int i;
  2265. u8 *p = data;
  2266. i40e_add_stat_strings(&data, i40e_gstrings_net_stats);
  2267. i40e_add_stat_strings(&data, i40e_gstrings_misc_stats);
  2268. for (i = 0; i < netdev->num_tx_queues; i++) {
  2269. i40e_add_stat_strings(&data, i40e_gstrings_queue_stats,
  2270. "tx", i);
  2271. i40e_add_stat_strings(&data, i40e_gstrings_queue_stats,
  2272. "rx", i);
  2273. }
  2274. if (vsi->type != I40E_VSI_MAIN || pf->hw.partition_id != 1)
  2275. goto check_data_pointer;
  2276. i40e_add_stat_strings(&data, i40e_gstrings_veb_stats);
  2277. for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
  2278. i40e_add_stat_strings(&data, i40e_gstrings_veb_tc_stats, i);
  2279. i40e_add_stat_strings(&data, i40e_gstrings_stats);
  2280. for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
  2281. i40e_add_stat_strings(&data, i40e_gstrings_pfc_stats, i);
  2282. check_data_pointer:
  2283. WARN_ONCE(data - p != i40e_get_stats_count(netdev) * ETH_GSTRING_LEN,
  2284. "stat strings count mismatch!");
  2285. }
  2286. static void i40e_get_priv_flag_strings(struct net_device *netdev, u8 *data)
  2287. {
  2288. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2289. struct i40e_vsi *vsi = np->vsi;
  2290. struct i40e_pf *pf = vsi->back;
  2291. unsigned int i;
  2292. u8 *p = data;
  2293. for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++)
  2294. ethtool_puts(&p, i40e_gstrings_priv_flags[i].flag_string);
  2295. if (pf->hw.pf_id != 0)
  2296. return;
  2297. for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++)
  2298. ethtool_puts(&p, i40e_gl_gstrings_priv_flags[i].flag_string);
  2299. }
  2300. static void i40e_get_strings(struct net_device *netdev, u32 stringset,
  2301. u8 *data)
  2302. {
  2303. switch (stringset) {
  2304. case ETH_SS_TEST:
  2305. memcpy(data, i40e_gstrings_test,
  2306. I40E_TEST_LEN * ETH_GSTRING_LEN);
  2307. break;
  2308. case ETH_SS_STATS:
  2309. i40e_get_stat_strings(netdev, data);
  2310. break;
  2311. case ETH_SS_PRIV_FLAGS:
  2312. i40e_get_priv_flag_strings(netdev, data);
  2313. break;
  2314. default:
  2315. break;
  2316. }
  2317. }
  2318. static int i40e_get_ts_info(struct net_device *dev,
  2319. struct kernel_ethtool_ts_info *info)
  2320. {
  2321. struct i40e_pf *pf = i40e_netdev_to_pf(dev);
  2322. /* only report HW timestamping if PTP is enabled */
  2323. if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags))
  2324. return ethtool_op_get_ts_info(dev, info);
  2325. info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
  2326. SOF_TIMESTAMPING_TX_HARDWARE |
  2327. SOF_TIMESTAMPING_RX_HARDWARE |
  2328. SOF_TIMESTAMPING_RAW_HARDWARE;
  2329. if (pf->ptp_clock)
  2330. info->phc_index = ptp_clock_index(pf->ptp_clock);
  2331. info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
  2332. info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
  2333. BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
  2334. BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
  2335. BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
  2336. if (test_bit(I40E_HW_CAP_PTP_L4, pf->hw.caps))
  2337. info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
  2338. BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
  2339. BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
  2340. BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
  2341. BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) |
  2342. BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
  2343. BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
  2344. BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
  2345. return 0;
  2346. }
  2347. static u64 i40e_link_test(struct net_device *netdev, u64 *data)
  2348. {
  2349. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2350. struct i40e_pf *pf = np->vsi->back;
  2351. bool link_up = false;
  2352. int status;
  2353. netif_info(pf, hw, netdev, "link test\n");
  2354. status = i40e_get_link_status(&pf->hw, &link_up);
  2355. if (status) {
  2356. netif_err(pf, drv, netdev, "link query timed out, please retry test\n");
  2357. *data = 1;
  2358. return *data;
  2359. }
  2360. if (link_up)
  2361. *data = 0;
  2362. else
  2363. *data = 1;
  2364. return *data;
  2365. }
  2366. static u64 i40e_reg_test(struct net_device *netdev, u64 *data)
  2367. {
  2368. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2369. struct i40e_pf *pf = np->vsi->back;
  2370. netif_info(pf, hw, netdev, "register test\n");
  2371. *data = i40e_diag_reg_test(&pf->hw);
  2372. return *data;
  2373. }
  2374. static u64 i40e_eeprom_test(struct net_device *netdev, u64 *data)
  2375. {
  2376. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2377. struct i40e_pf *pf = np->vsi->back;
  2378. netif_info(pf, hw, netdev, "eeprom test\n");
  2379. *data = i40e_diag_eeprom_test(&pf->hw);
  2380. /* forcebly clear the NVM Update state machine */
  2381. pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT;
  2382. return *data;
  2383. }
  2384. static u64 i40e_intr_test(struct net_device *netdev, u64 *data)
  2385. {
  2386. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2387. struct i40e_pf *pf = np->vsi->back;
  2388. u16 swc_old = pf->sw_int_count;
  2389. netif_info(pf, hw, netdev, "interrupt test\n");
  2390. wr32(&pf->hw, I40E_PFINT_DYN_CTL0,
  2391. (I40E_PFINT_DYN_CTL0_INTENA_MASK |
  2392. I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK |
  2393. I40E_PFINT_DYN_CTL0_ITR_INDX_MASK |
  2394. I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK |
  2395. I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK));
  2396. usleep_range(1000, 2000);
  2397. *data = (swc_old == pf->sw_int_count);
  2398. return *data;
  2399. }
  2400. static inline bool i40e_active_vfs(struct i40e_pf *pf)
  2401. {
  2402. struct i40e_vf *vfs = pf->vf;
  2403. int i;
  2404. for (i = 0; i < pf->num_alloc_vfs; i++)
  2405. if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states))
  2406. return true;
  2407. return false;
  2408. }
  2409. static inline bool i40e_active_vmdqs(struct i40e_pf *pf)
  2410. {
  2411. return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2);
  2412. }
  2413. static void i40e_diag_test(struct net_device *netdev,
  2414. struct ethtool_test *eth_test, u64 *data)
  2415. {
  2416. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2417. bool if_running = netif_running(netdev);
  2418. struct i40e_pf *pf = np->vsi->back;
  2419. if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
  2420. /* Offline tests */
  2421. netif_info(pf, drv, netdev, "offline testing starting\n");
  2422. set_bit(__I40E_TESTING, pf->state);
  2423. if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
  2424. test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
  2425. dev_warn(&pf->pdev->dev,
  2426. "Cannot start offline testing when PF is in reset state.\n");
  2427. goto skip_ol_tests;
  2428. }
  2429. if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) {
  2430. dev_warn(&pf->pdev->dev,
  2431. "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n");
  2432. goto skip_ol_tests;
  2433. }
  2434. /* If the device is online then take it offline */
  2435. if (if_running)
  2436. /* indicate we're in test mode */
  2437. i40e_close(netdev);
  2438. else
  2439. /* This reset does not affect link - if it is
  2440. * changed to a type of reset that does affect
  2441. * link then the following link test would have
  2442. * to be moved to before the reset
  2443. */
  2444. i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
  2445. if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
  2446. eth_test->flags |= ETH_TEST_FL_FAILED;
  2447. if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM]))
  2448. eth_test->flags |= ETH_TEST_FL_FAILED;
  2449. if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR]))
  2450. eth_test->flags |= ETH_TEST_FL_FAILED;
  2451. /* run reg test last, a reset is required after it */
  2452. if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG]))
  2453. eth_test->flags |= ETH_TEST_FL_FAILED;
  2454. clear_bit(__I40E_TESTING, pf->state);
  2455. i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
  2456. if (if_running)
  2457. i40e_open(netdev);
  2458. } else {
  2459. /* Online tests */
  2460. netif_info(pf, drv, netdev, "online testing starting\n");
  2461. if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
  2462. eth_test->flags |= ETH_TEST_FL_FAILED;
  2463. /* Offline only tests, not run in online; pass by default */
  2464. data[I40E_ETH_TEST_REG] = 0;
  2465. data[I40E_ETH_TEST_EEPROM] = 0;
  2466. data[I40E_ETH_TEST_INTR] = 0;
  2467. }
  2468. netif_info(pf, drv, netdev, "testing finished\n");
  2469. return;
  2470. skip_ol_tests:
  2471. data[I40E_ETH_TEST_REG] = 1;
  2472. data[I40E_ETH_TEST_EEPROM] = 1;
  2473. data[I40E_ETH_TEST_INTR] = 1;
  2474. data[I40E_ETH_TEST_LINK] = 1;
  2475. eth_test->flags |= ETH_TEST_FL_FAILED;
  2476. clear_bit(__I40E_TESTING, pf->state);
  2477. netif_info(pf, drv, netdev, "testing failed\n");
  2478. }
  2479. static void i40e_get_wol(struct net_device *netdev,
  2480. struct ethtool_wolinfo *wol)
  2481. {
  2482. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2483. struct i40e_pf *pf = np->vsi->back;
  2484. struct i40e_hw *hw = &pf->hw;
  2485. u16 wol_nvm_bits;
  2486. /* NVM bit on means WoL disabled for the port */
  2487. i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
  2488. if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) {
  2489. wol->supported = 0;
  2490. wol->wolopts = 0;
  2491. } else {
  2492. wol->supported = WAKE_MAGIC;
  2493. wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0);
  2494. }
  2495. }
  2496. /**
  2497. * i40e_set_wol - set the WakeOnLAN configuration
  2498. * @netdev: the netdev in question
  2499. * @wol: the ethtool WoL setting data
  2500. **/
  2501. static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
  2502. {
  2503. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2504. struct i40e_pf *pf = np->vsi->back;
  2505. struct i40e_vsi *vsi = np->vsi;
  2506. struct i40e_hw *hw = &pf->hw;
  2507. u16 wol_nvm_bits;
  2508. /* WoL not supported if this isn't the controlling PF on the port */
  2509. if (hw->partition_id != 1) {
  2510. i40e_partition_setting_complaint(pf);
  2511. return -EOPNOTSUPP;
  2512. }
  2513. if (vsi->type != I40E_VSI_MAIN)
  2514. return -EOPNOTSUPP;
  2515. /* NVM bit on means WoL disabled for the port */
  2516. i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
  2517. if (BIT(hw->port) & wol_nvm_bits)
  2518. return -EOPNOTSUPP;
  2519. /* only magic packet is supported */
  2520. if (wol->wolopts & ~WAKE_MAGIC)
  2521. return -EOPNOTSUPP;
  2522. /* is this a new value? */
  2523. if (pf->wol_en != !!wol->wolopts) {
  2524. pf->wol_en = !!wol->wolopts;
  2525. device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
  2526. }
  2527. return 0;
  2528. }
  2529. static int i40e_set_phys_id(struct net_device *netdev,
  2530. enum ethtool_phys_id_state state)
  2531. {
  2532. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2533. struct i40e_pf *pf = np->vsi->back;
  2534. struct i40e_hw *hw = &pf->hw;
  2535. int blink_freq = 2;
  2536. u16 temp_status;
  2537. int ret = 0;
  2538. switch (state) {
  2539. case ETHTOOL_ID_ACTIVE:
  2540. if (!test_bit(I40E_HW_CAP_PHY_CONTROLS_LEDS, pf->hw.caps)) {
  2541. pf->led_status = i40e_led_get(hw);
  2542. } else {
  2543. if (!test_bit(I40E_HW_CAP_AQ_PHY_ACCESS, hw->caps))
  2544. i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL,
  2545. NULL);
  2546. ret = i40e_led_get_phy(hw, &temp_status,
  2547. &pf->phy_led_val);
  2548. pf->led_status = temp_status;
  2549. }
  2550. return blink_freq;
  2551. case ETHTOOL_ID_ON:
  2552. if (!test_bit(I40E_HW_CAP_PHY_CONTROLS_LEDS, pf->hw.caps))
  2553. i40e_led_set(hw, 0xf, false);
  2554. else
  2555. ret = i40e_led_set_phy(hw, true, pf->led_status, 0);
  2556. break;
  2557. case ETHTOOL_ID_OFF:
  2558. if (!test_bit(I40E_HW_CAP_PHY_CONTROLS_LEDS, pf->hw.caps))
  2559. i40e_led_set(hw, 0x0, false);
  2560. else
  2561. ret = i40e_led_set_phy(hw, false, pf->led_status, 0);
  2562. break;
  2563. case ETHTOOL_ID_INACTIVE:
  2564. if (!test_bit(I40E_HW_CAP_PHY_CONTROLS_LEDS, pf->hw.caps)) {
  2565. i40e_led_set(hw, pf->led_status, false);
  2566. } else {
  2567. ret = i40e_led_set_phy(hw, false, pf->led_status,
  2568. (pf->phy_led_val |
  2569. I40E_PHY_LED_MODE_ORIG));
  2570. if (!test_bit(I40E_HW_CAP_AQ_PHY_ACCESS, hw->caps))
  2571. i40e_aq_set_phy_debug(hw, 0, NULL);
  2572. }
  2573. break;
  2574. default:
  2575. break;
  2576. }
  2577. if (ret)
  2578. return -ENOENT;
  2579. else
  2580. return 0;
  2581. }
  2582. /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt
  2583. * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also
  2584. * 125us (8000 interrupts per second) == ITR(62)
  2585. */
  2586. /**
  2587. * __i40e_get_coalesce - get per-queue coalesce settings
  2588. * @netdev: the netdev to check
  2589. * @ec: ethtool coalesce data structure
  2590. * @queue: which queue to pick
  2591. *
  2592. * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs
  2593. * are per queue. If queue is <0 then we default to queue 0 as the
  2594. * representative value.
  2595. **/
  2596. static int __i40e_get_coalesce(struct net_device *netdev,
  2597. struct ethtool_coalesce *ec,
  2598. int queue)
  2599. {
  2600. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2601. struct i40e_ring *rx_ring, *tx_ring;
  2602. struct i40e_vsi *vsi = np->vsi;
  2603. ec->tx_max_coalesced_frames_irq = vsi->work_limit;
  2604. /* rx and tx usecs has per queue value. If user doesn't specify the
  2605. * queue, return queue 0's value to represent.
  2606. */
  2607. if (queue < 0)
  2608. queue = 0;
  2609. else if (queue >= vsi->num_queue_pairs)
  2610. return -EINVAL;
  2611. rx_ring = vsi->rx_rings[queue];
  2612. tx_ring = vsi->tx_rings[queue];
  2613. if (ITR_IS_DYNAMIC(rx_ring->itr_setting))
  2614. ec->use_adaptive_rx_coalesce = 1;
  2615. if (ITR_IS_DYNAMIC(tx_ring->itr_setting))
  2616. ec->use_adaptive_tx_coalesce = 1;
  2617. ec->rx_coalesce_usecs = rx_ring->itr_setting & ~I40E_ITR_DYNAMIC;
  2618. ec->tx_coalesce_usecs = tx_ring->itr_setting & ~I40E_ITR_DYNAMIC;
  2619. /* we use the _usecs_high to store/set the interrupt rate limit
  2620. * that the hardware supports, that almost but not quite
  2621. * fits the original intent of the ethtool variable,
  2622. * the rx_coalesce_usecs_high limits total interrupts
  2623. * per second from both tx/rx sources.
  2624. */
  2625. ec->rx_coalesce_usecs_high = vsi->int_rate_limit;
  2626. ec->tx_coalesce_usecs_high = vsi->int_rate_limit;
  2627. return 0;
  2628. }
  2629. /**
  2630. * i40e_get_coalesce - get a netdev's coalesce settings
  2631. * @netdev: the netdev to check
  2632. * @ec: ethtool coalesce data structure
  2633. * @kernel_coal: ethtool CQE mode setting structure
  2634. * @extack: extack for reporting error messages
  2635. *
  2636. * Gets the coalesce settings for a particular netdev. Note that if user has
  2637. * modified per-queue settings, this only guarantees to represent queue 0. See
  2638. * __i40e_get_coalesce for more details.
  2639. **/
  2640. static int i40e_get_coalesce(struct net_device *netdev,
  2641. struct ethtool_coalesce *ec,
  2642. struct kernel_ethtool_coalesce *kernel_coal,
  2643. struct netlink_ext_ack *extack)
  2644. {
  2645. return __i40e_get_coalesce(netdev, ec, -1);
  2646. }
  2647. /**
  2648. * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue
  2649. * @netdev: netdev structure
  2650. * @ec: ethtool's coalesce settings
  2651. * @queue: the particular queue to read
  2652. *
  2653. * Will read a specific queue's coalesce settings
  2654. **/
  2655. static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue,
  2656. struct ethtool_coalesce *ec)
  2657. {
  2658. return __i40e_get_coalesce(netdev, ec, queue);
  2659. }
  2660. /**
  2661. * i40e_set_itr_per_queue - set ITR values for specific queue
  2662. * @vsi: the VSI to set values for
  2663. * @ec: coalesce settings from ethtool
  2664. * @queue: the queue to modify
  2665. *
  2666. * Change the ITR settings for a specific queue.
  2667. **/
  2668. static void i40e_set_itr_per_queue(struct i40e_vsi *vsi,
  2669. struct ethtool_coalesce *ec,
  2670. int queue)
  2671. {
  2672. struct i40e_ring *rx_ring = vsi->rx_rings[queue];
  2673. struct i40e_ring *tx_ring = vsi->tx_rings[queue];
  2674. struct i40e_pf *pf = vsi->back;
  2675. struct i40e_hw *hw = &pf->hw;
  2676. struct i40e_q_vector *q_vector;
  2677. u16 intrl;
  2678. intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit);
  2679. rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs);
  2680. tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs);
  2681. if (ec->use_adaptive_rx_coalesce)
  2682. rx_ring->itr_setting |= I40E_ITR_DYNAMIC;
  2683. else
  2684. rx_ring->itr_setting &= ~I40E_ITR_DYNAMIC;
  2685. if (ec->use_adaptive_tx_coalesce)
  2686. tx_ring->itr_setting |= I40E_ITR_DYNAMIC;
  2687. else
  2688. tx_ring->itr_setting &= ~I40E_ITR_DYNAMIC;
  2689. q_vector = rx_ring->q_vector;
  2690. q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting);
  2691. q_vector = tx_ring->q_vector;
  2692. q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting);
  2693. /* The interrupt handler itself will take care of programming
  2694. * the Tx and Rx ITR values based on the values we have entered
  2695. * into the q_vector, no need to write the values now.
  2696. */
  2697. wr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl);
  2698. i40e_flush(hw);
  2699. }
  2700. /**
  2701. * __i40e_set_coalesce - set coalesce settings for particular queue
  2702. * @netdev: the netdev to change
  2703. * @ec: ethtool coalesce settings
  2704. * @queue: the queue to change
  2705. *
  2706. * Sets the coalesce settings for a particular queue.
  2707. **/
  2708. static int __i40e_set_coalesce(struct net_device *netdev,
  2709. struct ethtool_coalesce *ec,
  2710. int queue)
  2711. {
  2712. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2713. u16 intrl_reg, cur_rx_itr, cur_tx_itr;
  2714. struct i40e_vsi *vsi = np->vsi;
  2715. struct i40e_pf *pf = vsi->back;
  2716. int i;
  2717. if (ec->tx_max_coalesced_frames_irq)
  2718. vsi->work_limit = ec->tx_max_coalesced_frames_irq;
  2719. if (queue < 0) {
  2720. cur_rx_itr = vsi->rx_rings[0]->itr_setting;
  2721. cur_tx_itr = vsi->tx_rings[0]->itr_setting;
  2722. } else if (queue < vsi->num_queue_pairs) {
  2723. cur_rx_itr = vsi->rx_rings[queue]->itr_setting;
  2724. cur_tx_itr = vsi->tx_rings[queue]->itr_setting;
  2725. } else {
  2726. netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n",
  2727. vsi->num_queue_pairs - 1);
  2728. return -EINVAL;
  2729. }
  2730. cur_tx_itr &= ~I40E_ITR_DYNAMIC;
  2731. cur_rx_itr &= ~I40E_ITR_DYNAMIC;
  2732. /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */
  2733. if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) {
  2734. netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n");
  2735. return -EINVAL;
  2736. }
  2737. if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) {
  2738. netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n",
  2739. INTRL_REG_TO_USEC(I40E_MAX_INTRL));
  2740. return -EINVAL;
  2741. }
  2742. if (ec->rx_coalesce_usecs != cur_rx_itr &&
  2743. ec->use_adaptive_rx_coalesce) {
  2744. netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n");
  2745. return -EINVAL;
  2746. }
  2747. if (ec->rx_coalesce_usecs > I40E_MAX_ITR) {
  2748. netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n");
  2749. return -EINVAL;
  2750. }
  2751. if (ec->tx_coalesce_usecs != cur_tx_itr &&
  2752. ec->use_adaptive_tx_coalesce) {
  2753. netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n");
  2754. return -EINVAL;
  2755. }
  2756. if (ec->tx_coalesce_usecs > I40E_MAX_ITR) {
  2757. netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n");
  2758. return -EINVAL;
  2759. }
  2760. if (ec->use_adaptive_rx_coalesce && !cur_rx_itr)
  2761. ec->rx_coalesce_usecs = I40E_MIN_ITR;
  2762. if (ec->use_adaptive_tx_coalesce && !cur_tx_itr)
  2763. ec->tx_coalesce_usecs = I40E_MIN_ITR;
  2764. intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high);
  2765. vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg);
  2766. if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) {
  2767. netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n",
  2768. vsi->int_rate_limit);
  2769. }
  2770. /* rx and tx usecs has per queue value. If user doesn't specify the
  2771. * queue, apply to all queues.
  2772. */
  2773. if (queue < 0) {
  2774. for (i = 0; i < vsi->num_queue_pairs; i++)
  2775. i40e_set_itr_per_queue(vsi, ec, i);
  2776. } else {
  2777. i40e_set_itr_per_queue(vsi, ec, queue);
  2778. }
  2779. return 0;
  2780. }
  2781. /**
  2782. * i40e_set_coalesce - set coalesce settings for every queue on the netdev
  2783. * @netdev: the netdev to change
  2784. * @ec: ethtool coalesce settings
  2785. * @kernel_coal: ethtool CQE mode setting structure
  2786. * @extack: extack for reporting error messages
  2787. *
  2788. * This will set each queue to the same coalesce settings.
  2789. **/
  2790. static int i40e_set_coalesce(struct net_device *netdev,
  2791. struct ethtool_coalesce *ec,
  2792. struct kernel_ethtool_coalesce *kernel_coal,
  2793. struct netlink_ext_ack *extack)
  2794. {
  2795. return __i40e_set_coalesce(netdev, ec, -1);
  2796. }
  2797. /**
  2798. * i40e_set_per_queue_coalesce - set specific queue's coalesce settings
  2799. * @netdev: the netdev to change
  2800. * @ec: ethtool's coalesce settings
  2801. * @queue: the queue to change
  2802. *
  2803. * Sets the specified queue's coalesce settings.
  2804. **/
  2805. static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue,
  2806. struct ethtool_coalesce *ec)
  2807. {
  2808. return __i40e_set_coalesce(netdev, ec, queue);
  2809. }
  2810. /**
  2811. * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type
  2812. * @pf: pointer to the physical function struct
  2813. * @cmd: ethtool rxnfc command
  2814. *
  2815. * Returns Success if the flow is supported, else Invalid Input.
  2816. **/
  2817. static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd)
  2818. {
  2819. struct i40e_hw *hw = &pf->hw;
  2820. u8 flow_pctype = 0;
  2821. u64 i_set = 0;
  2822. cmd->data = 0;
  2823. switch (cmd->flow_type) {
  2824. case TCP_V4_FLOW:
  2825. flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
  2826. break;
  2827. case UDP_V4_FLOW:
  2828. flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
  2829. break;
  2830. case TCP_V6_FLOW:
  2831. flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
  2832. break;
  2833. case UDP_V6_FLOW:
  2834. flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
  2835. break;
  2836. case SCTP_V4_FLOW:
  2837. case AH_ESP_V4_FLOW:
  2838. case AH_V4_FLOW:
  2839. case ESP_V4_FLOW:
  2840. case IPV4_FLOW:
  2841. case SCTP_V6_FLOW:
  2842. case AH_ESP_V6_FLOW:
  2843. case AH_V6_FLOW:
  2844. case ESP_V6_FLOW:
  2845. case IPV6_FLOW:
  2846. /* Default is src/dest for IP, no matter the L4 hashing */
  2847. cmd->data |= RXH_IP_SRC | RXH_IP_DST;
  2848. break;
  2849. default:
  2850. return -EINVAL;
  2851. }
  2852. /* Read flow based hash input set register */
  2853. if (flow_pctype) {
  2854. i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,
  2855. flow_pctype)) |
  2856. ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
  2857. flow_pctype)) << 32);
  2858. }
  2859. /* Process bits of hash input set */
  2860. if (i_set) {
  2861. if (i_set & I40E_L4_SRC_MASK)
  2862. cmd->data |= RXH_L4_B_0_1;
  2863. if (i_set & I40E_L4_DST_MASK)
  2864. cmd->data |= RXH_L4_B_2_3;
  2865. if (cmd->flow_type == TCP_V4_FLOW ||
  2866. cmd->flow_type == UDP_V4_FLOW) {
  2867. if (hw->mac.type == I40E_MAC_X722) {
  2868. if (i_set & I40E_X722_L3_SRC_MASK)
  2869. cmd->data |= RXH_IP_SRC;
  2870. if (i_set & I40E_X722_L3_DST_MASK)
  2871. cmd->data |= RXH_IP_DST;
  2872. } else {
  2873. if (i_set & I40E_L3_SRC_MASK)
  2874. cmd->data |= RXH_IP_SRC;
  2875. if (i_set & I40E_L3_DST_MASK)
  2876. cmd->data |= RXH_IP_DST;
  2877. }
  2878. } else if (cmd->flow_type == TCP_V6_FLOW ||
  2879. cmd->flow_type == UDP_V6_FLOW) {
  2880. if (i_set & I40E_L3_V6_SRC_MASK)
  2881. cmd->data |= RXH_IP_SRC;
  2882. if (i_set & I40E_L3_V6_DST_MASK)
  2883. cmd->data |= RXH_IP_DST;
  2884. }
  2885. }
  2886. return 0;
  2887. }
  2888. /**
  2889. * i40e_check_mask - Check whether a mask field is set
  2890. * @mask: the full mask value
  2891. * @field: mask of the field to check
  2892. *
  2893. * If the given mask is fully set, return positive value. If the mask for the
  2894. * field is fully unset, return zero. Otherwise return a negative error code.
  2895. **/
  2896. static int i40e_check_mask(u64 mask, u64 field)
  2897. {
  2898. u64 value = mask & field;
  2899. if (value == field)
  2900. return 1;
  2901. else if (!value)
  2902. return 0;
  2903. else
  2904. return -1;
  2905. }
  2906. /**
  2907. * i40e_parse_rx_flow_user_data - Deconstruct user-defined data
  2908. * @fsp: pointer to rx flow specification
  2909. * @data: pointer to userdef data structure for storage
  2910. *
  2911. * Read the user-defined data and deconstruct the value into a structure. No
  2912. * other code should read the user-defined data, so as to ensure that every
  2913. * place consistently reads the value correctly.
  2914. *
  2915. * The user-defined field is a 64bit Big Endian format value, which we
  2916. * deconstruct by reading bits or bit fields from it. Single bit flags shall
  2917. * be defined starting from the highest bits, while small bit field values
  2918. * shall be defined starting from the lowest bits.
  2919. *
  2920. * Returns 0 if the data is valid, and non-zero if the userdef data is invalid
  2921. * and the filter should be rejected. The data structure will always be
  2922. * modified even if FLOW_EXT is not set.
  2923. *
  2924. **/
  2925. static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
  2926. struct i40e_rx_flow_userdef *data)
  2927. {
  2928. u64 value, mask;
  2929. int valid;
  2930. /* Zero memory first so it's always consistent. */
  2931. memset(data, 0, sizeof(*data));
  2932. if (!(fsp->flow_type & FLOW_EXT))
  2933. return 0;
  2934. value = be64_to_cpu(*((__be64 *)fsp->h_ext.data));
  2935. mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data));
  2936. #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0)
  2937. #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16)
  2938. #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0)
  2939. valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER);
  2940. if (valid < 0) {
  2941. return -EINVAL;
  2942. } else if (valid) {
  2943. data->flex_word = value & I40E_USERDEF_FLEX_WORD;
  2944. data->flex_offset =
  2945. FIELD_GET(I40E_USERDEF_FLEX_OFFSET, value);
  2946. data->flex_filter = true;
  2947. }
  2948. return 0;
  2949. }
  2950. /**
  2951. * i40e_fill_rx_flow_user_data - Fill in user-defined data field
  2952. * @fsp: pointer to rx_flow specification
  2953. * @data: pointer to return userdef data
  2954. *
  2955. * Reads the userdef data structure and properly fills in the user defined
  2956. * fields of the rx_flow_spec.
  2957. **/
  2958. static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
  2959. struct i40e_rx_flow_userdef *data)
  2960. {
  2961. u64 value = 0, mask = 0;
  2962. if (data->flex_filter) {
  2963. value |= data->flex_word;
  2964. value |= (u64)data->flex_offset << 16;
  2965. mask |= I40E_USERDEF_FLEX_FILTER;
  2966. }
  2967. if (value || mask)
  2968. fsp->flow_type |= FLOW_EXT;
  2969. *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value);
  2970. *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask);
  2971. }
  2972. /**
  2973. * i40e_get_ethtool_fdir_all - Populates the rule count of a command
  2974. * @pf: Pointer to the physical function struct
  2975. * @cmd: The command to get or set Rx flow classification rules
  2976. * @rule_locs: Array of used rule locations
  2977. *
  2978. * This function populates both the total and actual rule count of
  2979. * the ethtool flow classification command
  2980. *
  2981. * Returns 0 on success or -EMSGSIZE if entry not found
  2982. **/
  2983. static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf,
  2984. struct ethtool_rxnfc *cmd,
  2985. u32 *rule_locs)
  2986. {
  2987. struct i40e_fdir_filter *rule;
  2988. struct hlist_node *node2;
  2989. int cnt = 0;
  2990. /* report total rule count */
  2991. cmd->data = i40e_get_fd_cnt_all(pf);
  2992. hlist_for_each_entry_safe(rule, node2,
  2993. &pf->fdir_filter_list, fdir_node) {
  2994. if (cnt == cmd->rule_cnt)
  2995. return -EMSGSIZE;
  2996. rule_locs[cnt] = rule->fd_id;
  2997. cnt++;
  2998. }
  2999. cmd->rule_cnt = cnt;
  3000. return 0;
  3001. }
  3002. /**
  3003. * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow
  3004. * @pf: Pointer to the physical function struct
  3005. * @cmd: The command to get or set Rx flow classification rules
  3006. *
  3007. * This function looks up a filter based on the Rx flow classification
  3008. * command and fills the flow spec info for it if found
  3009. *
  3010. * Returns 0 on success or -EINVAL if filter not found
  3011. **/
  3012. static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf,
  3013. struct ethtool_rxnfc *cmd)
  3014. {
  3015. struct ethtool_rx_flow_spec *fsp =
  3016. (struct ethtool_rx_flow_spec *)&cmd->fs;
  3017. struct i40e_rx_flow_userdef userdef = {0};
  3018. struct i40e_fdir_filter *rule = NULL;
  3019. struct hlist_node *node2;
  3020. struct i40e_vsi *vsi;
  3021. u64 input_set;
  3022. u16 index;
  3023. hlist_for_each_entry_safe(rule, node2,
  3024. &pf->fdir_filter_list, fdir_node) {
  3025. if (fsp->location <= rule->fd_id)
  3026. break;
  3027. }
  3028. if (!rule || fsp->location != rule->fd_id)
  3029. return -EINVAL;
  3030. fsp->flow_type = rule->flow_type;
  3031. if (fsp->flow_type == IP_USER_FLOW) {
  3032. fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
  3033. fsp->h_u.usr_ip4_spec.proto = 0;
  3034. fsp->m_u.usr_ip4_spec.proto = 0;
  3035. }
  3036. if (fsp->flow_type == IPV6_USER_FLOW ||
  3037. fsp->flow_type == UDP_V6_FLOW ||
  3038. fsp->flow_type == TCP_V6_FLOW ||
  3039. fsp->flow_type == SCTP_V6_FLOW) {
  3040. /* Reverse the src and dest notion, since the HW views them
  3041. * from Tx perspective where as the user expects it from
  3042. * Rx filter view.
  3043. */
  3044. fsp->h_u.tcp_ip6_spec.psrc = rule->dst_port;
  3045. fsp->h_u.tcp_ip6_spec.pdst = rule->src_port;
  3046. memcpy(fsp->h_u.tcp_ip6_spec.ip6dst, rule->src_ip6,
  3047. sizeof(__be32) * 4);
  3048. memcpy(fsp->h_u.tcp_ip6_spec.ip6src, rule->dst_ip6,
  3049. sizeof(__be32) * 4);
  3050. } else {
  3051. /* Reverse the src and dest notion, since the HW views them
  3052. * from Tx perspective where as the user expects it from
  3053. * Rx filter view.
  3054. */
  3055. fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port;
  3056. fsp->h_u.tcp_ip4_spec.pdst = rule->src_port;
  3057. fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip;
  3058. fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip;
  3059. }
  3060. switch (rule->flow_type) {
  3061. case SCTP_V4_FLOW:
  3062. index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
  3063. break;
  3064. case TCP_V4_FLOW:
  3065. index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
  3066. break;
  3067. case UDP_V4_FLOW:
  3068. index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
  3069. break;
  3070. case SCTP_V6_FLOW:
  3071. index = I40E_FILTER_PCTYPE_NONF_IPV6_SCTP;
  3072. break;
  3073. case TCP_V6_FLOW:
  3074. index = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
  3075. break;
  3076. case UDP_V6_FLOW:
  3077. index = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
  3078. break;
  3079. case IP_USER_FLOW:
  3080. index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
  3081. break;
  3082. case IPV6_USER_FLOW:
  3083. index = I40E_FILTER_PCTYPE_NONF_IPV6_OTHER;
  3084. break;
  3085. default:
  3086. /* If we have stored a filter with a flow type not listed here
  3087. * it is almost certainly a driver bug. WARN(), and then
  3088. * assign the input_set as if all fields are enabled to avoid
  3089. * reading unassigned memory.
  3090. */
  3091. WARN(1, "Missing input set index for flow_type %d\n",
  3092. rule->flow_type);
  3093. input_set = 0xFFFFFFFFFFFFFFFFULL;
  3094. goto no_input_set;
  3095. }
  3096. input_set = i40e_read_fd_input_set(pf, index);
  3097. no_input_set:
  3098. if (input_set & I40E_L3_V6_SRC_MASK) {
  3099. fsp->m_u.tcp_ip6_spec.ip6src[0] = htonl(0xFFFFFFFF);
  3100. fsp->m_u.tcp_ip6_spec.ip6src[1] = htonl(0xFFFFFFFF);
  3101. fsp->m_u.tcp_ip6_spec.ip6src[2] = htonl(0xFFFFFFFF);
  3102. fsp->m_u.tcp_ip6_spec.ip6src[3] = htonl(0xFFFFFFFF);
  3103. }
  3104. if (input_set & I40E_L3_V6_DST_MASK) {
  3105. fsp->m_u.tcp_ip6_spec.ip6dst[0] = htonl(0xFFFFFFFF);
  3106. fsp->m_u.tcp_ip6_spec.ip6dst[1] = htonl(0xFFFFFFFF);
  3107. fsp->m_u.tcp_ip6_spec.ip6dst[2] = htonl(0xFFFFFFFF);
  3108. fsp->m_u.tcp_ip6_spec.ip6dst[3] = htonl(0xFFFFFFFF);
  3109. }
  3110. if (input_set & I40E_L3_SRC_MASK)
  3111. fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF);
  3112. if (input_set & I40E_L3_DST_MASK)
  3113. fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF);
  3114. if (input_set & I40E_L4_SRC_MASK)
  3115. fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF);
  3116. if (input_set & I40E_L4_DST_MASK)
  3117. fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF);
  3118. if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET)
  3119. fsp->ring_cookie = RX_CLS_FLOW_DISC;
  3120. else
  3121. fsp->ring_cookie = rule->q_index;
  3122. if (rule->vlan_tag) {
  3123. fsp->h_ext.vlan_etype = rule->vlan_etype;
  3124. fsp->m_ext.vlan_etype = htons(0xFFFF);
  3125. fsp->h_ext.vlan_tci = rule->vlan_tag;
  3126. fsp->m_ext.vlan_tci = htons(0xFFFF);
  3127. fsp->flow_type |= FLOW_EXT;
  3128. }
  3129. vsi = i40e_pf_get_main_vsi(pf);
  3130. if (rule->dest_vsi != vsi->id) {
  3131. vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi);
  3132. if (vsi && vsi->type == I40E_VSI_SRIOV) {
  3133. /* VFs are zero-indexed by the driver, but ethtool
  3134. * expects them to be one-indexed, so add one here
  3135. */
  3136. u64 ring_vf = vsi->vf_id + 1;
  3137. ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
  3138. fsp->ring_cookie |= ring_vf;
  3139. }
  3140. }
  3141. if (rule->flex_filter) {
  3142. userdef.flex_filter = true;
  3143. userdef.flex_word = be16_to_cpu(rule->flex_word);
  3144. userdef.flex_offset = rule->flex_offset;
  3145. }
  3146. i40e_fill_rx_flow_user_data(fsp, &userdef);
  3147. return 0;
  3148. }
  3149. /**
  3150. * i40e_get_rxnfc - command to get RX flow classification rules
  3151. * @netdev: network interface device structure
  3152. * @cmd: ethtool rxnfc command
  3153. * @rule_locs: pointer to store rule data
  3154. *
  3155. * Returns Success if the command is supported.
  3156. **/
  3157. static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,
  3158. u32 *rule_locs)
  3159. {
  3160. struct i40e_netdev_priv *np = netdev_priv(netdev);
  3161. struct i40e_vsi *vsi = np->vsi;
  3162. struct i40e_pf *pf = vsi->back;
  3163. int ret = -EOPNOTSUPP;
  3164. switch (cmd->cmd) {
  3165. case ETHTOOL_GRXRINGS:
  3166. cmd->data = vsi->rss_size;
  3167. ret = 0;
  3168. break;
  3169. case ETHTOOL_GRXFH:
  3170. ret = i40e_get_rss_hash_opts(pf, cmd);
  3171. break;
  3172. case ETHTOOL_GRXCLSRLCNT:
  3173. cmd->rule_cnt = pf->fdir_pf_active_filters;
  3174. /* report total rule count */
  3175. cmd->data = i40e_get_fd_cnt_all(pf);
  3176. ret = 0;
  3177. break;
  3178. case ETHTOOL_GRXCLSRULE:
  3179. ret = i40e_get_ethtool_fdir_entry(pf, cmd);
  3180. break;
  3181. case ETHTOOL_GRXCLSRLALL:
  3182. ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs);
  3183. break;
  3184. default:
  3185. break;
  3186. }
  3187. return ret;
  3188. }
  3189. /**
  3190. * i40e_get_rss_hash_bits - Read RSS Hash bits from register
  3191. * @hw: hw structure
  3192. * @nfc: pointer to user request
  3193. * @i_setc: bits currently set
  3194. *
  3195. * Returns value of bits to be set per user request
  3196. **/
  3197. static u64 i40e_get_rss_hash_bits(struct i40e_hw *hw,
  3198. struct ethtool_rxnfc *nfc,
  3199. u64 i_setc)
  3200. {
  3201. u64 i_set = i_setc;
  3202. u64 src_l3 = 0, dst_l3 = 0;
  3203. if (nfc->data & RXH_L4_B_0_1)
  3204. i_set |= I40E_L4_SRC_MASK;
  3205. else
  3206. i_set &= ~I40E_L4_SRC_MASK;
  3207. if (nfc->data & RXH_L4_B_2_3)
  3208. i_set |= I40E_L4_DST_MASK;
  3209. else
  3210. i_set &= ~I40E_L4_DST_MASK;
  3211. if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) {
  3212. src_l3 = I40E_L3_V6_SRC_MASK;
  3213. dst_l3 = I40E_L3_V6_DST_MASK;
  3214. } else if (nfc->flow_type == TCP_V4_FLOW ||
  3215. nfc->flow_type == UDP_V4_FLOW) {
  3216. if (hw->mac.type == I40E_MAC_X722) {
  3217. src_l3 = I40E_X722_L3_SRC_MASK;
  3218. dst_l3 = I40E_X722_L3_DST_MASK;
  3219. } else {
  3220. src_l3 = I40E_L3_SRC_MASK;
  3221. dst_l3 = I40E_L3_DST_MASK;
  3222. }
  3223. } else {
  3224. /* Any other flow type are not supported here */
  3225. return i_set;
  3226. }
  3227. if (nfc->data & RXH_IP_SRC)
  3228. i_set |= src_l3;
  3229. else
  3230. i_set &= ~src_l3;
  3231. if (nfc->data & RXH_IP_DST)
  3232. i_set |= dst_l3;
  3233. else
  3234. i_set &= ~dst_l3;
  3235. return i_set;
  3236. }
  3237. #define FLOW_PCTYPES_SIZE 64
  3238. /**
  3239. * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash
  3240. * @pf: pointer to the physical function struct
  3241. * @nfc: ethtool rxnfc command
  3242. *
  3243. * Returns Success if the flow input set is supported.
  3244. **/
  3245. static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
  3246. {
  3247. struct i40e_hw *hw = &pf->hw;
  3248. u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
  3249. ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
  3250. DECLARE_BITMAP(flow_pctypes, FLOW_PCTYPES_SIZE);
  3251. u64 i_set, i_setc;
  3252. bitmap_zero(flow_pctypes, FLOW_PCTYPES_SIZE);
  3253. if (test_bit(I40E_FLAG_MFP_ENA, pf->flags)) {
  3254. dev_err(&pf->pdev->dev,
  3255. "Change of RSS hash input set is not supported when MFP mode is enabled\n");
  3256. return -EOPNOTSUPP;
  3257. }
  3258. /* RSS does not support anything other than hashing
  3259. * to queues on src and dst IPs and ports
  3260. */
  3261. if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
  3262. RXH_L4_B_0_1 | RXH_L4_B_2_3))
  3263. return -EINVAL;
  3264. switch (nfc->flow_type) {
  3265. case TCP_V4_FLOW:
  3266. set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_TCP, flow_pctypes);
  3267. if (test_bit(I40E_HW_CAP_MULTI_TCP_UDP_RSS_PCTYPE,
  3268. pf->hw.caps))
  3269. set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK,
  3270. flow_pctypes);
  3271. break;
  3272. case TCP_V6_FLOW:
  3273. set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_TCP, flow_pctypes);
  3274. if (test_bit(I40E_HW_CAP_MULTI_TCP_UDP_RSS_PCTYPE,
  3275. pf->hw.caps))
  3276. set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK,
  3277. flow_pctypes);
  3278. break;
  3279. case UDP_V4_FLOW:
  3280. set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_UDP, flow_pctypes);
  3281. if (test_bit(I40E_HW_CAP_MULTI_TCP_UDP_RSS_PCTYPE,
  3282. pf->hw.caps)) {
  3283. set_bit(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP,
  3284. flow_pctypes);
  3285. set_bit(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP,
  3286. flow_pctypes);
  3287. }
  3288. hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
  3289. break;
  3290. case UDP_V6_FLOW:
  3291. set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_UDP, flow_pctypes);
  3292. if (test_bit(I40E_HW_CAP_MULTI_TCP_UDP_RSS_PCTYPE,
  3293. pf->hw.caps)) {
  3294. set_bit(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP,
  3295. flow_pctypes);
  3296. set_bit(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP,
  3297. flow_pctypes);
  3298. }
  3299. hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
  3300. break;
  3301. case AH_ESP_V4_FLOW:
  3302. case AH_V4_FLOW:
  3303. case ESP_V4_FLOW:
  3304. case SCTP_V4_FLOW:
  3305. if ((nfc->data & RXH_L4_B_0_1) ||
  3306. (nfc->data & RXH_L4_B_2_3))
  3307. return -EINVAL;
  3308. hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER);
  3309. break;
  3310. case AH_ESP_V6_FLOW:
  3311. case AH_V6_FLOW:
  3312. case ESP_V6_FLOW:
  3313. case SCTP_V6_FLOW:
  3314. if ((nfc->data & RXH_L4_B_0_1) ||
  3315. (nfc->data & RXH_L4_B_2_3))
  3316. return -EINVAL;
  3317. hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER);
  3318. break;
  3319. case IPV4_FLOW:
  3320. hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) |
  3321. BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
  3322. break;
  3323. case IPV6_FLOW:
  3324. hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) |
  3325. BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
  3326. break;
  3327. default:
  3328. return -EINVAL;
  3329. }
  3330. if (bitmap_weight(flow_pctypes, FLOW_PCTYPES_SIZE)) {
  3331. u8 flow_id;
  3332. for_each_set_bit(flow_id, flow_pctypes, FLOW_PCTYPES_SIZE) {
  3333. i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_id)) |
  3334. ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_id)) << 32);
  3335. i_set = i40e_get_rss_hash_bits(&pf->hw, nfc, i_setc);
  3336. i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_id),
  3337. (u32)i_set);
  3338. i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_id),
  3339. (u32)(i_set >> 32));
  3340. hena |= BIT_ULL(flow_id);
  3341. }
  3342. }
  3343. i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
  3344. i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
  3345. i40e_flush(hw);
  3346. return 0;
  3347. }
  3348. /**
  3349. * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry
  3350. * @vsi: Pointer to the targeted VSI
  3351. * @input: The filter to update or NULL to indicate deletion
  3352. * @sw_idx: Software index to the filter
  3353. * @cmd: The command to get or set Rx flow classification rules
  3354. *
  3355. * This function updates (or deletes) a Flow Director entry from
  3356. * the hlist of the corresponding PF
  3357. *
  3358. * Returns 0 on success
  3359. **/
  3360. static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi,
  3361. struct i40e_fdir_filter *input,
  3362. u16 sw_idx,
  3363. struct ethtool_rxnfc *cmd)
  3364. {
  3365. struct i40e_fdir_filter *rule, *parent;
  3366. struct i40e_pf *pf = vsi->back;
  3367. struct hlist_node *node2;
  3368. int err = -EINVAL;
  3369. parent = NULL;
  3370. rule = NULL;
  3371. hlist_for_each_entry_safe(rule, node2,
  3372. &pf->fdir_filter_list, fdir_node) {
  3373. /* hash found, or no matching entry */
  3374. if (rule->fd_id >= sw_idx)
  3375. break;
  3376. parent = rule;
  3377. }
  3378. /* if there is an old rule occupying our place remove it */
  3379. if (rule && (rule->fd_id == sw_idx)) {
  3380. /* Remove this rule, since we're either deleting it, or
  3381. * replacing it.
  3382. */
  3383. err = i40e_add_del_fdir(vsi, rule, false);
  3384. hlist_del(&rule->fdir_node);
  3385. kfree(rule);
  3386. pf->fdir_pf_active_filters--;
  3387. }
  3388. /* If we weren't given an input, this is a delete, so just return the
  3389. * error code indicating if there was an entry at the requested slot
  3390. */
  3391. if (!input)
  3392. return err;
  3393. /* Otherwise, install the new rule as requested */
  3394. INIT_HLIST_NODE(&input->fdir_node);
  3395. /* add filter to the list */
  3396. if (parent)
  3397. hlist_add_behind(&input->fdir_node, &parent->fdir_node);
  3398. else
  3399. hlist_add_head(&input->fdir_node,
  3400. &pf->fdir_filter_list);
  3401. /* update counts */
  3402. pf->fdir_pf_active_filters++;
  3403. return 0;
  3404. }
  3405. /**
  3406. * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table
  3407. * @pf: pointer to PF structure
  3408. *
  3409. * This function searches the list of filters and determines which FLX_PIT
  3410. * entries are still required. It will prune any entries which are no longer
  3411. * in use after the deletion.
  3412. **/
  3413. static void i40e_prune_flex_pit_list(struct i40e_pf *pf)
  3414. {
  3415. struct i40e_flex_pit *entry, *tmp;
  3416. struct i40e_fdir_filter *rule;
  3417. /* First, we'll check the l3 table */
  3418. list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) {
  3419. bool found = false;
  3420. hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
  3421. if (rule->flow_type != IP_USER_FLOW)
  3422. continue;
  3423. if (rule->flex_filter &&
  3424. rule->flex_offset == entry->src_offset) {
  3425. found = true;
  3426. break;
  3427. }
  3428. }
  3429. /* If we didn't find the filter, then we can prune this entry
  3430. * from the list.
  3431. */
  3432. if (!found) {
  3433. list_del(&entry->list);
  3434. kfree(entry);
  3435. }
  3436. }
  3437. /* Followed by the L4 table */
  3438. list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) {
  3439. bool found = false;
  3440. hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
  3441. /* Skip this filter if it's L3, since we already
  3442. * checked those in the above loop
  3443. */
  3444. if (rule->flow_type == IP_USER_FLOW)
  3445. continue;
  3446. if (rule->flex_filter &&
  3447. rule->flex_offset == entry->src_offset) {
  3448. found = true;
  3449. break;
  3450. }
  3451. }
  3452. /* If we didn't find the filter, then we can prune this entry
  3453. * from the list.
  3454. */
  3455. if (!found) {
  3456. list_del(&entry->list);
  3457. kfree(entry);
  3458. }
  3459. }
  3460. }
  3461. /**
  3462. * i40e_del_fdir_entry - Deletes a Flow Director filter entry
  3463. * @vsi: Pointer to the targeted VSI
  3464. * @cmd: The command to get or set Rx flow classification rules
  3465. *
  3466. * The function removes a Flow Director filter entry from the
  3467. * hlist of the corresponding PF
  3468. *
  3469. * Returns 0 on success
  3470. */
  3471. static int i40e_del_fdir_entry(struct i40e_vsi *vsi,
  3472. struct ethtool_rxnfc *cmd)
  3473. {
  3474. struct ethtool_rx_flow_spec *fsp =
  3475. (struct ethtool_rx_flow_spec *)&cmd->fs;
  3476. struct i40e_pf *pf = vsi->back;
  3477. int ret = 0;
  3478. if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
  3479. test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
  3480. return -EBUSY;
  3481. if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
  3482. return -EBUSY;
  3483. ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd);
  3484. i40e_prune_flex_pit_list(pf);
  3485. i40e_fdir_check_and_reenable(pf);
  3486. return ret;
  3487. }
  3488. /**
  3489. * i40e_unused_pit_index - Find an unused PIT index for given list
  3490. * @pf: the PF data structure
  3491. *
  3492. * Find the first unused flexible PIT index entry. We search both the L3 and
  3493. * L4 flexible PIT lists so that the returned index is unique and unused by
  3494. * either currently programmed L3 or L4 filters. We use a bit field as storage
  3495. * to track which indexes are already used.
  3496. **/
  3497. static u8 i40e_unused_pit_index(struct i40e_pf *pf)
  3498. {
  3499. unsigned long available_index = 0xFF;
  3500. struct i40e_flex_pit *entry;
  3501. /* We need to make sure that the new index isn't in use by either L3
  3502. * or L4 filters so that IP_USER_FLOW filters can program both L3 and
  3503. * L4 to use the same index.
  3504. */
  3505. list_for_each_entry(entry, &pf->l4_flex_pit_list, list)
  3506. clear_bit(entry->pit_index, &available_index);
  3507. list_for_each_entry(entry, &pf->l3_flex_pit_list, list)
  3508. clear_bit(entry->pit_index, &available_index);
  3509. return find_first_bit(&available_index, 8);
  3510. }
  3511. /**
  3512. * i40e_find_flex_offset - Find an existing flex src_offset
  3513. * @flex_pit_list: L3 or L4 flex PIT list
  3514. * @src_offset: new src_offset to find
  3515. *
  3516. * Searches the flex_pit_list for an existing offset. If no offset is
  3517. * currently programmed, then this will return an ERR_PTR if there is no space
  3518. * to add a new offset, otherwise it returns NULL.
  3519. **/
  3520. static
  3521. struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list,
  3522. u16 src_offset)
  3523. {
  3524. struct i40e_flex_pit *entry;
  3525. int size = 0;
  3526. /* Search for the src_offset first. If we find a matching entry
  3527. * already programmed, we can simply re-use it.
  3528. */
  3529. list_for_each_entry(entry, flex_pit_list, list) {
  3530. size++;
  3531. if (entry->src_offset == src_offset)
  3532. return entry;
  3533. }
  3534. /* If we haven't found an entry yet, then the provided src offset has
  3535. * not yet been programmed. We will program the src offset later on,
  3536. * but we need to indicate whether there is enough space to do so
  3537. * here. We'll make use of ERR_PTR for this purpose.
  3538. */
  3539. if (size >= I40E_FLEX_PIT_TABLE_SIZE)
  3540. return ERR_PTR(-ENOSPC);
  3541. return NULL;
  3542. }
  3543. /**
  3544. * i40e_add_flex_offset - Add src_offset to flex PIT table list
  3545. * @flex_pit_list: L3 or L4 flex PIT list
  3546. * @src_offset: new src_offset to add
  3547. * @pit_index: the PIT index to program
  3548. *
  3549. * This function programs the new src_offset to the list. It is expected that
  3550. * i40e_find_flex_offset has already been tried and returned NULL, indicating
  3551. * that this offset is not programmed, and that the list has enough space to
  3552. * store another offset.
  3553. *
  3554. * Returns 0 on success, and negative value on error.
  3555. **/
  3556. static int i40e_add_flex_offset(struct list_head *flex_pit_list,
  3557. u16 src_offset,
  3558. u8 pit_index)
  3559. {
  3560. struct i40e_flex_pit *new_pit, *entry;
  3561. new_pit = kzalloc(sizeof(*entry), GFP_KERNEL);
  3562. if (!new_pit)
  3563. return -ENOMEM;
  3564. new_pit->src_offset = src_offset;
  3565. new_pit->pit_index = pit_index;
  3566. /* We need to insert this item such that the list is sorted by
  3567. * src_offset in ascending order.
  3568. */
  3569. list_for_each_entry(entry, flex_pit_list, list) {
  3570. if (new_pit->src_offset < entry->src_offset) {
  3571. list_add_tail(&new_pit->list, &entry->list);
  3572. return 0;
  3573. }
  3574. /* If we found an entry with our offset already programmed we
  3575. * can simply return here, after freeing the memory. However,
  3576. * if the pit_index does not match we need to report an error.
  3577. */
  3578. if (new_pit->src_offset == entry->src_offset) {
  3579. int err = 0;
  3580. /* If the PIT index is not the same we can't re-use
  3581. * the entry, so we must report an error.
  3582. */
  3583. if (new_pit->pit_index != entry->pit_index)
  3584. err = -EINVAL;
  3585. kfree(new_pit);
  3586. return err;
  3587. }
  3588. }
  3589. /* If we reached here, then we haven't yet added the item. This means
  3590. * that we should add the item at the end of the list.
  3591. */
  3592. list_add_tail(&new_pit->list, flex_pit_list);
  3593. return 0;
  3594. }
  3595. /**
  3596. * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table
  3597. * @pf: Pointer to the PF structure
  3598. * @flex_pit_list: list of flexible src offsets in use
  3599. * @flex_pit_start: index to first entry for this section of the table
  3600. *
  3601. * In order to handle flexible data, the hardware uses a table of values
  3602. * called the FLX_PIT table. This table is used to indicate which sections of
  3603. * the input correspond to what PIT index values. Unfortunately, hardware is
  3604. * very restrictive about programming this table. Entries must be ordered by
  3605. * src_offset in ascending order, without duplicates. Additionally, unused
  3606. * entries must be set to the unused index value, and must have valid size and
  3607. * length according to the src_offset ordering.
  3608. *
  3609. * This function will reprogram the FLX_PIT register from a book-keeping
  3610. * structure that we guarantee is already ordered correctly, and has no more
  3611. * than 3 entries.
  3612. *
  3613. * To make things easier, we only support flexible values of one word length,
  3614. * rather than allowing variable length flexible values.
  3615. **/
  3616. static void __i40e_reprogram_flex_pit(struct i40e_pf *pf,
  3617. struct list_head *flex_pit_list,
  3618. int flex_pit_start)
  3619. {
  3620. struct i40e_flex_pit *entry = NULL;
  3621. u16 last_offset = 0;
  3622. int i = 0, j = 0;
  3623. /* First, loop over the list of flex PIT entries, and reprogram the
  3624. * registers.
  3625. */
  3626. list_for_each_entry(entry, flex_pit_list, list) {
  3627. /* We have to be careful when programming values for the
  3628. * largest SRC_OFFSET value. It is possible that adding
  3629. * additional empty values at the end would overflow the space
  3630. * for the SRC_OFFSET in the FLX_PIT register. To avoid this,
  3631. * we check here and add the empty values prior to adding the
  3632. * largest value.
  3633. *
  3634. * To determine this, we will use a loop from i+1 to 3, which
  3635. * will determine whether the unused entries would have valid
  3636. * SRC_OFFSET. Note that there cannot be extra entries past
  3637. * this value, because the only valid values would have been
  3638. * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not
  3639. * have been added to the list in the first place.
  3640. */
  3641. for (j = i + 1; j < 3; j++) {
  3642. u16 offset = entry->src_offset + j;
  3643. int index = flex_pit_start + i;
  3644. u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
  3645. 1,
  3646. offset - 3);
  3647. if (offset > I40E_MAX_FLEX_SRC_OFFSET) {
  3648. i40e_write_rx_ctl(&pf->hw,
  3649. I40E_PRTQF_FLX_PIT(index),
  3650. value);
  3651. i++;
  3652. }
  3653. }
  3654. /* Now, we can program the actual value into the table */
  3655. i40e_write_rx_ctl(&pf->hw,
  3656. I40E_PRTQF_FLX_PIT(flex_pit_start + i),
  3657. I40E_FLEX_PREP_VAL(entry->pit_index + 50,
  3658. 1,
  3659. entry->src_offset));
  3660. i++;
  3661. }
  3662. /* In order to program the last entries in the table, we need to
  3663. * determine the valid offset. If the list is empty, we'll just start
  3664. * with 0. Otherwise, we'll start with the last item offset and add 1.
  3665. * This ensures that all entries have valid sizes. If we don't do this
  3666. * correctly, the hardware will disable flexible field parsing.
  3667. */
  3668. if (!list_empty(flex_pit_list))
  3669. last_offset = list_prev_entry(entry, list)->src_offset + 1;
  3670. for (; i < 3; i++, last_offset++) {
  3671. i40e_write_rx_ctl(&pf->hw,
  3672. I40E_PRTQF_FLX_PIT(flex_pit_start + i),
  3673. I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
  3674. 1,
  3675. last_offset));
  3676. }
  3677. }
  3678. /**
  3679. * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change
  3680. * @pf: pointer to the PF structure
  3681. *
  3682. * This function reprograms both the L3 and L4 FLX_PIT tables. See the
  3683. * internal helper function for implementation details.
  3684. **/
  3685. static void i40e_reprogram_flex_pit(struct i40e_pf *pf)
  3686. {
  3687. __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list,
  3688. I40E_FLEX_PIT_IDX_START_L3);
  3689. __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list,
  3690. I40E_FLEX_PIT_IDX_START_L4);
  3691. /* We also need to program the L3 and L4 GLQF ORT register */
  3692. i40e_write_rx_ctl(&pf->hw,
  3693. I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX),
  3694. I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3,
  3695. 3, 1));
  3696. i40e_write_rx_ctl(&pf->hw,
  3697. I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX),
  3698. I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4,
  3699. 3, 1));
  3700. }
  3701. /**
  3702. * i40e_flow_str - Converts a flow_type into a human readable string
  3703. * @fsp: the flow specification
  3704. *
  3705. * Currently only flow types we support are included here, and the string
  3706. * value attempts to match what ethtool would use to configure this flow type.
  3707. **/
  3708. static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp)
  3709. {
  3710. switch (fsp->flow_type & ~FLOW_EXT) {
  3711. case TCP_V4_FLOW:
  3712. return "tcp4";
  3713. case UDP_V4_FLOW:
  3714. return "udp4";
  3715. case SCTP_V4_FLOW:
  3716. return "sctp4";
  3717. case IP_USER_FLOW:
  3718. return "ip4";
  3719. case TCP_V6_FLOW:
  3720. return "tcp6";
  3721. case UDP_V6_FLOW:
  3722. return "udp6";
  3723. case SCTP_V6_FLOW:
  3724. return "sctp6";
  3725. case IPV6_USER_FLOW:
  3726. return "ip6";
  3727. default:
  3728. return "unknown";
  3729. }
  3730. }
  3731. /**
  3732. * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index
  3733. * @pit_index: PIT index to convert
  3734. *
  3735. * Returns the mask for a given PIT index. Will return 0 if the pit_index is
  3736. * of range.
  3737. **/
  3738. static u64 i40e_pit_index_to_mask(int pit_index)
  3739. {
  3740. switch (pit_index) {
  3741. case 0:
  3742. return I40E_FLEX_50_MASK;
  3743. case 1:
  3744. return I40E_FLEX_51_MASK;
  3745. case 2:
  3746. return I40E_FLEX_52_MASK;
  3747. case 3:
  3748. return I40E_FLEX_53_MASK;
  3749. case 4:
  3750. return I40E_FLEX_54_MASK;
  3751. case 5:
  3752. return I40E_FLEX_55_MASK;
  3753. case 6:
  3754. return I40E_FLEX_56_MASK;
  3755. case 7:
  3756. return I40E_FLEX_57_MASK;
  3757. default:
  3758. return 0;
  3759. }
  3760. }
  3761. /**
  3762. * i40e_print_input_set - Show changes between two input sets
  3763. * @vsi: the vsi being configured
  3764. * @old: the old input set
  3765. * @new: the new input set
  3766. *
  3767. * Print the difference between old and new input sets by showing which series
  3768. * of words are toggled on or off. Only displays the bits we actually support
  3769. * changing.
  3770. **/
  3771. static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new)
  3772. {
  3773. struct i40e_pf *pf = vsi->back;
  3774. bool old_value, new_value;
  3775. int i;
  3776. old_value = !!(old & I40E_L3_SRC_MASK);
  3777. new_value = !!(new & I40E_L3_SRC_MASK);
  3778. if (old_value != new_value)
  3779. netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n",
  3780. old_value ? "ON" : "OFF",
  3781. new_value ? "ON" : "OFF");
  3782. old_value = !!(old & I40E_L3_DST_MASK);
  3783. new_value = !!(new & I40E_L3_DST_MASK);
  3784. if (old_value != new_value)
  3785. netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n",
  3786. old_value ? "ON" : "OFF",
  3787. new_value ? "ON" : "OFF");
  3788. old_value = !!(old & I40E_L4_SRC_MASK);
  3789. new_value = !!(new & I40E_L4_SRC_MASK);
  3790. if (old_value != new_value)
  3791. netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n",
  3792. old_value ? "ON" : "OFF",
  3793. new_value ? "ON" : "OFF");
  3794. old_value = !!(old & I40E_L4_DST_MASK);
  3795. new_value = !!(new & I40E_L4_DST_MASK);
  3796. if (old_value != new_value)
  3797. netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n",
  3798. old_value ? "ON" : "OFF",
  3799. new_value ? "ON" : "OFF");
  3800. old_value = !!(old & I40E_VERIFY_TAG_MASK);
  3801. new_value = !!(new & I40E_VERIFY_TAG_MASK);
  3802. if (old_value != new_value)
  3803. netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n",
  3804. old_value ? "ON" : "OFF",
  3805. new_value ? "ON" : "OFF");
  3806. /* Show change of flexible filter entries */
  3807. for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) {
  3808. u64 flex_mask = i40e_pit_index_to_mask(i);
  3809. old_value = !!(old & flex_mask);
  3810. new_value = !!(new & flex_mask);
  3811. if (old_value != new_value)
  3812. netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n",
  3813. i,
  3814. old_value ? "ON" : "OFF",
  3815. new_value ? "ON" : "OFF");
  3816. }
  3817. netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n",
  3818. old);
  3819. netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n",
  3820. new);
  3821. }
  3822. /**
  3823. * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid
  3824. * @vsi: pointer to the targeted VSI
  3825. * @fsp: pointer to Rx flow specification
  3826. * @userdef: userdefined data from flow specification
  3827. *
  3828. * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support
  3829. * for partial matches exists with a few limitations. First, hardware only
  3830. * supports masking by word boundary (2 bytes) and not per individual bit.
  3831. * Second, hardware is limited to using one mask for a flow type and cannot
  3832. * use a separate mask for each filter.
  3833. *
  3834. * To support these limitations, if we already have a configured filter for
  3835. * the specified type, this function enforces that new filters of the type
  3836. * match the configured input set. Otherwise, if we do not have a filter of
  3837. * the specified type, we allow the input set to be updated to match the
  3838. * desired filter.
  3839. *
  3840. * To help ensure that administrators understand why filters weren't displayed
  3841. * as supported, we print a diagnostic message displaying how the input set
  3842. * would change and warning to delete the preexisting filters if required.
  3843. *
  3844. * Returns 0 on successful input set match, and a negative return code on
  3845. * failure.
  3846. **/
  3847. static int i40e_check_fdir_input_set(struct i40e_vsi *vsi,
  3848. struct ethtool_rx_flow_spec *fsp,
  3849. struct i40e_rx_flow_userdef *userdef)
  3850. {
  3851. static const __be32 ipv6_full_mask[4] = {cpu_to_be32(0xffffffff),
  3852. cpu_to_be32(0xffffffff), cpu_to_be32(0xffffffff),
  3853. cpu_to_be32(0xffffffff)};
  3854. struct ethtool_tcpip6_spec *tcp_ip6_spec;
  3855. struct ethtool_usrip6_spec *usr_ip6_spec;
  3856. struct ethtool_tcpip4_spec *tcp_ip4_spec;
  3857. struct ethtool_usrip4_spec *usr_ip4_spec;
  3858. struct i40e_pf *pf = vsi->back;
  3859. u64 current_mask, new_mask;
  3860. bool new_flex_offset = false;
  3861. bool flex_l3 = false;
  3862. u16 *fdir_filter_count;
  3863. u16 index, src_offset = 0;
  3864. u8 pit_index = 0;
  3865. int err;
  3866. switch (fsp->flow_type & ~FLOW_EXT) {
  3867. case SCTP_V4_FLOW:
  3868. index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
  3869. fdir_filter_count = &pf->fd_sctp4_filter_cnt;
  3870. break;
  3871. case TCP_V4_FLOW:
  3872. index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
  3873. fdir_filter_count = &pf->fd_tcp4_filter_cnt;
  3874. break;
  3875. case UDP_V4_FLOW:
  3876. index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
  3877. fdir_filter_count = &pf->fd_udp4_filter_cnt;
  3878. break;
  3879. case SCTP_V6_FLOW:
  3880. index = I40E_FILTER_PCTYPE_NONF_IPV6_SCTP;
  3881. fdir_filter_count = &pf->fd_sctp6_filter_cnt;
  3882. break;
  3883. case TCP_V6_FLOW:
  3884. index = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
  3885. fdir_filter_count = &pf->fd_tcp6_filter_cnt;
  3886. break;
  3887. case UDP_V6_FLOW:
  3888. index = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
  3889. fdir_filter_count = &pf->fd_udp6_filter_cnt;
  3890. break;
  3891. case IP_USER_FLOW:
  3892. index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
  3893. fdir_filter_count = &pf->fd_ip4_filter_cnt;
  3894. flex_l3 = true;
  3895. break;
  3896. case IPV6_USER_FLOW:
  3897. index = I40E_FILTER_PCTYPE_NONF_IPV6_OTHER;
  3898. fdir_filter_count = &pf->fd_ip6_filter_cnt;
  3899. flex_l3 = true;
  3900. break;
  3901. default:
  3902. return -EOPNOTSUPP;
  3903. }
  3904. /* Read the current input set from register memory. */
  3905. current_mask = i40e_read_fd_input_set(pf, index);
  3906. new_mask = current_mask;
  3907. /* Determine, if any, the required changes to the input set in order
  3908. * to support the provided mask.
  3909. *
  3910. * Hardware only supports masking at word (2 byte) granularity and does
  3911. * not support full bitwise masking. This implementation simplifies
  3912. * even further and only supports fully enabled or fully disabled
  3913. * masks for each field, even though we could split the ip4src and
  3914. * ip4dst fields.
  3915. */
  3916. switch (fsp->flow_type & ~FLOW_EXT) {
  3917. case SCTP_V4_FLOW:
  3918. new_mask &= ~I40E_VERIFY_TAG_MASK;
  3919. fallthrough;
  3920. case TCP_V4_FLOW:
  3921. case UDP_V4_FLOW:
  3922. tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec;
  3923. /* IPv4 source address */
  3924. if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF))
  3925. new_mask |= I40E_L3_SRC_MASK;
  3926. else if (!tcp_ip4_spec->ip4src)
  3927. new_mask &= ~I40E_L3_SRC_MASK;
  3928. else
  3929. return -EOPNOTSUPP;
  3930. /* IPv4 destination address */
  3931. if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
  3932. new_mask |= I40E_L3_DST_MASK;
  3933. else if (!tcp_ip4_spec->ip4dst)
  3934. new_mask &= ~I40E_L3_DST_MASK;
  3935. else
  3936. return -EOPNOTSUPP;
  3937. /* L4 source port */
  3938. if (tcp_ip4_spec->psrc == htons(0xFFFF))
  3939. new_mask |= I40E_L4_SRC_MASK;
  3940. else if (!tcp_ip4_spec->psrc)
  3941. new_mask &= ~I40E_L4_SRC_MASK;
  3942. else
  3943. return -EOPNOTSUPP;
  3944. /* L4 destination port */
  3945. if (tcp_ip4_spec->pdst == htons(0xFFFF))
  3946. new_mask |= I40E_L4_DST_MASK;
  3947. else if (!tcp_ip4_spec->pdst)
  3948. new_mask &= ~I40E_L4_DST_MASK;
  3949. else
  3950. return -EOPNOTSUPP;
  3951. /* Filtering on Type of Service is not supported. */
  3952. if (tcp_ip4_spec->tos)
  3953. return -EOPNOTSUPP;
  3954. break;
  3955. case SCTP_V6_FLOW:
  3956. new_mask &= ~I40E_VERIFY_TAG_MASK;
  3957. fallthrough;
  3958. case TCP_V6_FLOW:
  3959. case UDP_V6_FLOW:
  3960. tcp_ip6_spec = &fsp->m_u.tcp_ip6_spec;
  3961. /* Check if user provided IPv6 source address. */
  3962. if (ipv6_addr_equal((struct in6_addr *)&tcp_ip6_spec->ip6src,
  3963. (struct in6_addr *)&ipv6_full_mask))
  3964. new_mask |= I40E_L3_V6_SRC_MASK;
  3965. else if (ipv6_addr_any((struct in6_addr *)
  3966. &tcp_ip6_spec->ip6src))
  3967. new_mask &= ~I40E_L3_V6_SRC_MASK;
  3968. else
  3969. return -EOPNOTSUPP;
  3970. /* Check if user provided destination address. */
  3971. if (ipv6_addr_equal((struct in6_addr *)&tcp_ip6_spec->ip6dst,
  3972. (struct in6_addr *)&ipv6_full_mask))
  3973. new_mask |= I40E_L3_V6_DST_MASK;
  3974. else if (ipv6_addr_any((struct in6_addr *)
  3975. &tcp_ip6_spec->ip6dst))
  3976. new_mask &= ~I40E_L3_V6_DST_MASK;
  3977. else
  3978. return -EOPNOTSUPP;
  3979. /* L4 source port */
  3980. if (tcp_ip6_spec->psrc == htons(0xFFFF))
  3981. new_mask |= I40E_L4_SRC_MASK;
  3982. else if (!tcp_ip6_spec->psrc)
  3983. new_mask &= ~I40E_L4_SRC_MASK;
  3984. else
  3985. return -EOPNOTSUPP;
  3986. /* L4 destination port */
  3987. if (tcp_ip6_spec->pdst == htons(0xFFFF))
  3988. new_mask |= I40E_L4_DST_MASK;
  3989. else if (!tcp_ip6_spec->pdst)
  3990. new_mask &= ~I40E_L4_DST_MASK;
  3991. else
  3992. return -EOPNOTSUPP;
  3993. /* Filtering on Traffic Classes is not supported. */
  3994. if (tcp_ip6_spec->tclass)
  3995. return -EOPNOTSUPP;
  3996. break;
  3997. case IP_USER_FLOW:
  3998. usr_ip4_spec = &fsp->m_u.usr_ip4_spec;
  3999. /* IPv4 source address */
  4000. if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF))
  4001. new_mask |= I40E_L3_SRC_MASK;
  4002. else if (!usr_ip4_spec->ip4src)
  4003. new_mask &= ~I40E_L3_SRC_MASK;
  4004. else
  4005. return -EOPNOTSUPP;
  4006. /* IPv4 destination address */
  4007. if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
  4008. new_mask |= I40E_L3_DST_MASK;
  4009. else if (!usr_ip4_spec->ip4dst)
  4010. new_mask &= ~I40E_L3_DST_MASK;
  4011. else
  4012. return -EOPNOTSUPP;
  4013. /* First 4 bytes of L4 header */
  4014. if (usr_ip4_spec->l4_4_bytes)
  4015. return -EOPNOTSUPP;
  4016. /* Filtering on Type of Service is not supported. */
  4017. if (usr_ip4_spec->tos)
  4018. return -EOPNOTSUPP;
  4019. /* Filtering on IP version is not supported */
  4020. if (usr_ip4_spec->ip_ver)
  4021. return -EINVAL;
  4022. /* Filtering on L4 protocol is not supported */
  4023. if (usr_ip4_spec->proto)
  4024. return -EINVAL;
  4025. break;
  4026. case IPV6_USER_FLOW:
  4027. usr_ip6_spec = &fsp->m_u.usr_ip6_spec;
  4028. /* Check if user provided IPv6 source address. */
  4029. if (ipv6_addr_equal((struct in6_addr *)&usr_ip6_spec->ip6src,
  4030. (struct in6_addr *)&ipv6_full_mask))
  4031. new_mask |= I40E_L3_V6_SRC_MASK;
  4032. else if (ipv6_addr_any((struct in6_addr *)
  4033. &usr_ip6_spec->ip6src))
  4034. new_mask &= ~I40E_L3_V6_SRC_MASK;
  4035. else
  4036. return -EOPNOTSUPP;
  4037. /* Check if user provided destination address. */
  4038. if (ipv6_addr_equal((struct in6_addr *)&usr_ip6_spec->ip6dst,
  4039. (struct in6_addr *)&ipv6_full_mask))
  4040. new_mask |= I40E_L3_V6_DST_MASK;
  4041. else if (ipv6_addr_any((struct in6_addr *)
  4042. &usr_ip6_spec->ip6dst))
  4043. new_mask &= ~I40E_L3_V6_DST_MASK;
  4044. else
  4045. return -EOPNOTSUPP;
  4046. if (usr_ip6_spec->l4_4_bytes)
  4047. return -EOPNOTSUPP;
  4048. /* Filtering on Traffic class is not supported. */
  4049. if (usr_ip6_spec->tclass)
  4050. return -EOPNOTSUPP;
  4051. /* Filtering on L4 protocol is not supported */
  4052. if (usr_ip6_spec->l4_proto)
  4053. return -EINVAL;
  4054. break;
  4055. default:
  4056. return -EOPNOTSUPP;
  4057. }
  4058. if (fsp->flow_type & FLOW_EXT) {
  4059. /* Allow only 802.1Q and no etype defined, as
  4060. * later it's modified to 0x8100
  4061. */
  4062. if (fsp->h_ext.vlan_etype != htons(ETH_P_8021Q) &&
  4063. fsp->h_ext.vlan_etype != 0)
  4064. return -EOPNOTSUPP;
  4065. if (fsp->m_ext.vlan_tci == htons(0xFFFF))
  4066. new_mask |= I40E_VLAN_SRC_MASK;
  4067. else
  4068. new_mask &= ~I40E_VLAN_SRC_MASK;
  4069. }
  4070. /* First, clear all flexible filter entries */
  4071. new_mask &= ~I40E_FLEX_INPUT_MASK;
  4072. /* If we have a flexible filter, try to add this offset to the correct
  4073. * flexible filter PIT list. Once finished, we can update the mask.
  4074. * If the src_offset changed, we will get a new mask value which will
  4075. * trigger an input set change.
  4076. */
  4077. if (userdef->flex_filter) {
  4078. struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL;
  4079. /* Flexible offset must be even, since the flexible payload
  4080. * must be aligned on 2-byte boundary.
  4081. */
  4082. if (userdef->flex_offset & 0x1) {
  4083. dev_warn(&pf->pdev->dev,
  4084. "Flexible data offset must be 2-byte aligned\n");
  4085. return -EINVAL;
  4086. }
  4087. src_offset = userdef->flex_offset >> 1;
  4088. /* FLX_PIT source offset value is only so large */
  4089. if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) {
  4090. dev_warn(&pf->pdev->dev,
  4091. "Flexible data must reside within first 64 bytes of the packet payload\n");
  4092. return -EINVAL;
  4093. }
  4094. /* See if this offset has already been programmed. If we get
  4095. * an ERR_PTR, then the filter is not safe to add. Otherwise,
  4096. * if we get a NULL pointer, this means we will need to add
  4097. * the offset.
  4098. */
  4099. flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list,
  4100. src_offset);
  4101. if (IS_ERR(flex_pit))
  4102. return PTR_ERR(flex_pit);
  4103. /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown)
  4104. * packet types, and thus we need to program both L3 and L4
  4105. * flexible values. These must have identical flexible index,
  4106. * as otherwise we can't correctly program the input set. So
  4107. * we'll find both an L3 and L4 index and make sure they are
  4108. * the same.
  4109. */
  4110. if (flex_l3) {
  4111. l3_flex_pit =
  4112. i40e_find_flex_offset(&pf->l3_flex_pit_list,
  4113. src_offset);
  4114. if (IS_ERR(l3_flex_pit))
  4115. return PTR_ERR(l3_flex_pit);
  4116. if (flex_pit) {
  4117. /* If we already had a matching L4 entry, we
  4118. * need to make sure that the L3 entry we
  4119. * obtained uses the same index.
  4120. */
  4121. if (l3_flex_pit) {
  4122. if (l3_flex_pit->pit_index !=
  4123. flex_pit->pit_index) {
  4124. return -EINVAL;
  4125. }
  4126. } else {
  4127. new_flex_offset = true;
  4128. }
  4129. } else {
  4130. flex_pit = l3_flex_pit;
  4131. }
  4132. }
  4133. /* If we didn't find an existing flex offset, we need to
  4134. * program a new one. However, we don't immediately program it
  4135. * here because we will wait to program until after we check
  4136. * that it is safe to change the input set.
  4137. */
  4138. if (!flex_pit) {
  4139. new_flex_offset = true;
  4140. pit_index = i40e_unused_pit_index(pf);
  4141. } else {
  4142. pit_index = flex_pit->pit_index;
  4143. }
  4144. /* Update the mask with the new offset */
  4145. new_mask |= i40e_pit_index_to_mask(pit_index);
  4146. }
  4147. /* If the mask and flexible filter offsets for this filter match the
  4148. * currently programmed values we don't need any input set change, so
  4149. * this filter is safe to install.
  4150. */
  4151. if (new_mask == current_mask && !new_flex_offset)
  4152. return 0;
  4153. netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n",
  4154. i40e_flow_str(fsp));
  4155. i40e_print_input_set(vsi, current_mask, new_mask);
  4156. if (new_flex_offset) {
  4157. netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d",
  4158. pit_index, src_offset);
  4159. }
  4160. /* Hardware input sets are global across multiple ports, so even the
  4161. * main port cannot change them when in MFP mode as this would impact
  4162. * any filters on the other ports.
  4163. */
  4164. if (test_bit(I40E_FLAG_MFP_ENA, pf->flags)) {
  4165. netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n");
  4166. return -EOPNOTSUPP;
  4167. }
  4168. /* This filter requires us to update the input set. However, hardware
  4169. * only supports one input set per flow type, and does not support
  4170. * separate masks for each filter. This means that we can only support
  4171. * a single mask for all filters of a specific type.
  4172. *
  4173. * If we have preexisting filters, they obviously depend on the
  4174. * current programmed input set. Display a diagnostic message in this
  4175. * case explaining why the filter could not be accepted.
  4176. */
  4177. if (*fdir_filter_count) {
  4178. netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n",
  4179. i40e_flow_str(fsp),
  4180. *fdir_filter_count);
  4181. return -EOPNOTSUPP;
  4182. }
  4183. i40e_write_fd_input_set(pf, index, new_mask);
  4184. /* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented
  4185. * frames. If we're programming the input set for IPv4/Other, we also
  4186. * need to program the IPv4/Fragmented input set. Since we don't have
  4187. * separate support, we'll always assume and enforce that the two flow
  4188. * types must have matching input sets.
  4189. */
  4190. if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER)
  4191. i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
  4192. new_mask);
  4193. /* Add the new offset and update table, if necessary */
  4194. if (new_flex_offset) {
  4195. err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset,
  4196. pit_index);
  4197. if (err)
  4198. return err;
  4199. if (flex_l3) {
  4200. err = i40e_add_flex_offset(&pf->l3_flex_pit_list,
  4201. src_offset,
  4202. pit_index);
  4203. if (err)
  4204. return err;
  4205. }
  4206. i40e_reprogram_flex_pit(pf);
  4207. }
  4208. return 0;
  4209. }
  4210. /**
  4211. * i40e_match_fdir_filter - Return true of two filters match
  4212. * @a: pointer to filter struct
  4213. * @b: pointer to filter struct
  4214. *
  4215. * Returns true if the two filters match exactly the same criteria. I.e. they
  4216. * match the same flow type and have the same parameters. We don't need to
  4217. * check any input-set since all filters of the same flow type must use the
  4218. * same input set.
  4219. **/
  4220. static bool i40e_match_fdir_filter(struct i40e_fdir_filter *a,
  4221. struct i40e_fdir_filter *b)
  4222. {
  4223. /* The filters do not much if any of these criteria differ. */
  4224. if (a->dst_ip != b->dst_ip ||
  4225. a->src_ip != b->src_ip ||
  4226. a->dst_port != b->dst_port ||
  4227. a->src_port != b->src_port ||
  4228. a->flow_type != b->flow_type ||
  4229. a->ipl4_proto != b->ipl4_proto ||
  4230. a->vlan_tag != b->vlan_tag ||
  4231. a->vlan_etype != b->vlan_etype)
  4232. return false;
  4233. return true;
  4234. }
  4235. /**
  4236. * i40e_disallow_matching_filters - Check that new filters differ
  4237. * @vsi: pointer to the targeted VSI
  4238. * @input: new filter to check
  4239. *
  4240. * Due to hardware limitations, it is not possible for two filters that match
  4241. * similar criteria to be programmed at the same time. This is true for a few
  4242. * reasons:
  4243. *
  4244. * (a) all filters matching a particular flow type must use the same input
  4245. * set, that is they must match the same criteria.
  4246. * (b) different flow types will never match the same packet, as the flow type
  4247. * is decided by hardware before checking which rules apply.
  4248. * (c) hardware has no way to distinguish which order filters apply in.
  4249. *
  4250. * Due to this, we can't really support using the location data to order
  4251. * filters in the hardware parsing. It is technically possible for the user to
  4252. * request two filters matching the same criteria but which select different
  4253. * queues. In this case, rather than keep both filters in the list, we reject
  4254. * the 2nd filter when the user requests adding it.
  4255. *
  4256. * This avoids needing to track location for programming the filter to
  4257. * hardware, and ensures that we avoid some strange scenarios involving
  4258. * deleting filters which match the same criteria.
  4259. **/
  4260. static int i40e_disallow_matching_filters(struct i40e_vsi *vsi,
  4261. struct i40e_fdir_filter *input)
  4262. {
  4263. struct i40e_pf *pf = vsi->back;
  4264. struct i40e_fdir_filter *rule;
  4265. struct hlist_node *node2;
  4266. /* Loop through every filter, and check that it doesn't match */
  4267. hlist_for_each_entry_safe(rule, node2,
  4268. &pf->fdir_filter_list, fdir_node) {
  4269. /* Don't check the filters match if they share the same fd_id,
  4270. * since the new filter is actually just updating the target
  4271. * of the old filter.
  4272. */
  4273. if (rule->fd_id == input->fd_id)
  4274. continue;
  4275. /* If any filters match, then print a warning message to the
  4276. * kernel message buffer and bail out.
  4277. */
  4278. if (i40e_match_fdir_filter(rule, input)) {
  4279. dev_warn(&pf->pdev->dev,
  4280. "Existing user defined filter %d already matches this flow.\n",
  4281. rule->fd_id);
  4282. return -EINVAL;
  4283. }
  4284. }
  4285. return 0;
  4286. }
  4287. /**
  4288. * i40e_add_fdir_ethtool - Add/Remove Flow Director filters
  4289. * @vsi: pointer to the targeted VSI
  4290. * @cmd: command to get or set RX flow classification rules
  4291. *
  4292. * Add Flow Director filters for a specific flow spec based on their
  4293. * protocol. Returns 0 if the filters were successfully added.
  4294. **/
  4295. static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
  4296. struct ethtool_rxnfc *cmd)
  4297. {
  4298. struct i40e_rx_flow_userdef userdef;
  4299. struct ethtool_rx_flow_spec *fsp;
  4300. struct i40e_fdir_filter *input;
  4301. u16 dest_vsi = 0, q_index = 0;
  4302. struct i40e_pf *pf;
  4303. int ret = -EINVAL;
  4304. u8 dest_ctl;
  4305. if (!vsi)
  4306. return -EINVAL;
  4307. pf = vsi->back;
  4308. if (!test_bit(I40E_FLAG_FD_SB_ENA, pf->flags))
  4309. return -EOPNOTSUPP;
  4310. if (test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
  4311. return -ENOSPC;
  4312. if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
  4313. test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
  4314. return -EBUSY;
  4315. if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
  4316. return -EBUSY;
  4317. fsp = (struct ethtool_rx_flow_spec *)&cmd->fs;
  4318. /* Parse the user-defined field */
  4319. if (i40e_parse_rx_flow_user_data(fsp, &userdef))
  4320. return -EINVAL;
  4321. /* Extended MAC field is not supported */
  4322. if (fsp->flow_type & FLOW_MAC_EXT)
  4323. return -EINVAL;
  4324. ret = i40e_check_fdir_input_set(vsi, fsp, &userdef);
  4325. if (ret)
  4326. return ret;
  4327. if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort +
  4328. pf->hw.func_caps.fd_filters_guaranteed)) {
  4329. return -EINVAL;
  4330. }
  4331. /* ring_cookie is either the drop index, or is a mask of the queue
  4332. * index and VF id we wish to target.
  4333. */
  4334. if (fsp->ring_cookie == RX_CLS_FLOW_DISC) {
  4335. dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
  4336. } else {
  4337. u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie);
  4338. u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie);
  4339. if (!vf) {
  4340. if (ring >= vsi->num_queue_pairs)
  4341. return -EINVAL;
  4342. dest_vsi = vsi->id;
  4343. } else {
  4344. /* VFs are zero-indexed, so we subtract one here */
  4345. vf--;
  4346. if (vf >= pf->num_alloc_vfs)
  4347. return -EINVAL;
  4348. if (ring >= pf->vf[vf].num_queue_pairs)
  4349. return -EINVAL;
  4350. dest_vsi = pf->vf[vf].lan_vsi_id;
  4351. }
  4352. dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX;
  4353. q_index = ring;
  4354. }
  4355. input = kzalloc(sizeof(*input), GFP_KERNEL);
  4356. if (!input)
  4357. return -ENOMEM;
  4358. input->fd_id = fsp->location;
  4359. input->q_index = q_index;
  4360. input->dest_vsi = dest_vsi;
  4361. input->dest_ctl = dest_ctl;
  4362. input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID;
  4363. input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
  4364. input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
  4365. input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
  4366. input->flow_type = fsp->flow_type & ~FLOW_EXT;
  4367. input->vlan_etype = fsp->h_ext.vlan_etype;
  4368. if (!fsp->m_ext.vlan_etype && fsp->h_ext.vlan_tci)
  4369. input->vlan_etype = cpu_to_be16(ETH_P_8021Q);
  4370. if (fsp->m_ext.vlan_tci && input->vlan_etype)
  4371. input->vlan_tag = fsp->h_ext.vlan_tci;
  4372. if (input->flow_type == IPV6_USER_FLOW ||
  4373. input->flow_type == UDP_V6_FLOW ||
  4374. input->flow_type == TCP_V6_FLOW ||
  4375. input->flow_type == SCTP_V6_FLOW) {
  4376. /* Reverse the src and dest notion, since the HW expects them
  4377. * to be from Tx perspective where as the input from user is
  4378. * from Rx filter view.
  4379. */
  4380. input->ipl4_proto = fsp->h_u.usr_ip6_spec.l4_proto;
  4381. input->dst_port = fsp->h_u.tcp_ip6_spec.psrc;
  4382. input->src_port = fsp->h_u.tcp_ip6_spec.pdst;
  4383. memcpy(input->dst_ip6, fsp->h_u.ah_ip6_spec.ip6src,
  4384. sizeof(__be32) * 4);
  4385. memcpy(input->src_ip6, fsp->h_u.ah_ip6_spec.ip6dst,
  4386. sizeof(__be32) * 4);
  4387. } else {
  4388. /* Reverse the src and dest notion, since the HW expects them
  4389. * to be from Tx perspective where as the input from user is
  4390. * from Rx filter view.
  4391. */
  4392. input->ipl4_proto = fsp->h_u.usr_ip4_spec.proto;
  4393. input->dst_port = fsp->h_u.tcp_ip4_spec.psrc;
  4394. input->src_port = fsp->h_u.tcp_ip4_spec.pdst;
  4395. input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
  4396. input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
  4397. }
  4398. if (userdef.flex_filter) {
  4399. input->flex_filter = true;
  4400. input->flex_word = cpu_to_be16(userdef.flex_word);
  4401. input->flex_offset = userdef.flex_offset;
  4402. }
  4403. /* Avoid programming two filters with identical match criteria. */
  4404. ret = i40e_disallow_matching_filters(vsi, input);
  4405. if (ret)
  4406. goto free_filter_memory;
  4407. /* Add the input filter to the fdir_input_list, possibly replacing
  4408. * a previous filter. Do not free the input structure after adding it
  4409. * to the list as this would cause a use-after-free bug.
  4410. */
  4411. i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL);
  4412. ret = i40e_add_del_fdir(vsi, input, true);
  4413. if (ret)
  4414. goto remove_sw_rule;
  4415. return 0;
  4416. remove_sw_rule:
  4417. hlist_del(&input->fdir_node);
  4418. pf->fdir_pf_active_filters--;
  4419. free_filter_memory:
  4420. kfree(input);
  4421. return ret;
  4422. }
  4423. /**
  4424. * i40e_set_rxnfc - command to set RX flow classification rules
  4425. * @netdev: network interface device structure
  4426. * @cmd: ethtool rxnfc command
  4427. *
  4428. * Returns Success if the command is supported.
  4429. **/
  4430. static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)
  4431. {
  4432. struct i40e_netdev_priv *np = netdev_priv(netdev);
  4433. struct i40e_vsi *vsi = np->vsi;
  4434. struct i40e_pf *pf = vsi->back;
  4435. int ret = -EOPNOTSUPP;
  4436. switch (cmd->cmd) {
  4437. case ETHTOOL_SRXFH:
  4438. ret = i40e_set_rss_hash_opt(pf, cmd);
  4439. break;
  4440. case ETHTOOL_SRXCLSRLINS:
  4441. ret = i40e_add_fdir_ethtool(vsi, cmd);
  4442. break;
  4443. case ETHTOOL_SRXCLSRLDEL:
  4444. ret = i40e_del_fdir_entry(vsi, cmd);
  4445. break;
  4446. default:
  4447. break;
  4448. }
  4449. return ret;
  4450. }
  4451. /**
  4452. * i40e_max_channels - get Max number of combined channels supported
  4453. * @vsi: vsi pointer
  4454. **/
  4455. static unsigned int i40e_max_channels(struct i40e_vsi *vsi)
  4456. {
  4457. /* TODO: This code assumes DCB and FD is disabled for now. */
  4458. return vsi->alloc_queue_pairs;
  4459. }
  4460. /**
  4461. * i40e_get_channels - Get the current channels enabled and max supported etc.
  4462. * @dev: network interface device structure
  4463. * @ch: ethtool channels structure
  4464. *
  4465. * We don't support separate tx and rx queues as channels. The other count
  4466. * represents how many queues are being used for control. max_combined counts
  4467. * how many queue pairs we can support. They may not be mapped 1 to 1 with
  4468. * q_vectors since we support a lot more queue pairs than q_vectors.
  4469. **/
  4470. static void i40e_get_channels(struct net_device *dev,
  4471. struct ethtool_channels *ch)
  4472. {
  4473. struct i40e_netdev_priv *np = netdev_priv(dev);
  4474. struct i40e_vsi *vsi = np->vsi;
  4475. struct i40e_pf *pf = vsi->back;
  4476. /* report maximum channels */
  4477. ch->max_combined = i40e_max_channels(vsi);
  4478. /* report info for other vector */
  4479. ch->other_count = test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) ? 1 : 0;
  4480. ch->max_other = ch->other_count;
  4481. /* Note: This code assumes DCB is disabled for now. */
  4482. ch->combined_count = vsi->num_queue_pairs;
  4483. }
  4484. /**
  4485. * i40e_set_channels - Set the new channels count.
  4486. * @dev: network interface device structure
  4487. * @ch: ethtool channels structure
  4488. *
  4489. * The new channels count may not be the same as requested by the user
  4490. * since it gets rounded down to a power of 2 value.
  4491. **/
  4492. static int i40e_set_channels(struct net_device *dev,
  4493. struct ethtool_channels *ch)
  4494. {
  4495. const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
  4496. struct i40e_netdev_priv *np = netdev_priv(dev);
  4497. unsigned int count = ch->combined_count;
  4498. struct i40e_vsi *vsi = np->vsi;
  4499. struct i40e_pf *pf = vsi->back;
  4500. struct i40e_fdir_filter *rule;
  4501. struct hlist_node *node2;
  4502. int new_count;
  4503. int err = 0;
  4504. /* We do not support setting channels for any other VSI at present */
  4505. if (vsi->type != I40E_VSI_MAIN)
  4506. return -EINVAL;
  4507. /* We do not support setting channels via ethtool when TCs are
  4508. * configured through mqprio
  4509. */
  4510. if (i40e_is_tc_mqprio_enabled(pf))
  4511. return -EINVAL;
  4512. /* verify they are not requesting separate vectors */
  4513. if (!count || ch->rx_count || ch->tx_count)
  4514. return -EINVAL;
  4515. /* verify other_count has not changed */
  4516. if (ch->other_count != (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) ? 1 : 0))
  4517. return -EINVAL;
  4518. /* verify the number of channels does not exceed hardware limits */
  4519. if (count > i40e_max_channels(vsi))
  4520. return -EINVAL;
  4521. /* verify that the number of channels does not invalidate any current
  4522. * flow director rules
  4523. */
  4524. hlist_for_each_entry_safe(rule, node2,
  4525. &pf->fdir_filter_list, fdir_node) {
  4526. if (rule->dest_ctl != drop && count <= rule->q_index) {
  4527. dev_warn(&pf->pdev->dev,
  4528. "Existing user defined filter %d assigns flow to queue %d\n",
  4529. rule->fd_id, rule->q_index);
  4530. err = -EINVAL;
  4531. }
  4532. }
  4533. if (err) {
  4534. dev_err(&pf->pdev->dev,
  4535. "Existing filter rules must be deleted to reduce combined channel count to %d\n",
  4536. count);
  4537. return err;
  4538. }
  4539. /* update feature limits from largest to smallest supported values */
  4540. /* TODO: Flow director limit, DCB etc */
  4541. /* use rss_reconfig to rebuild with new queue count and update traffic
  4542. * class queue mapping
  4543. */
  4544. new_count = i40e_reconfig_rss_queues(pf, count);
  4545. if (new_count > 0)
  4546. return 0;
  4547. else
  4548. return -EINVAL;
  4549. }
  4550. /**
  4551. * i40e_get_rxfh_key_size - get the RSS hash key size
  4552. * @netdev: network interface device structure
  4553. *
  4554. * Returns the table size.
  4555. **/
  4556. static u32 i40e_get_rxfh_key_size(struct net_device *netdev)
  4557. {
  4558. return I40E_HKEY_ARRAY_SIZE;
  4559. }
  4560. /**
  4561. * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size
  4562. * @netdev: network interface device structure
  4563. *
  4564. * Returns the table size.
  4565. **/
  4566. static u32 i40e_get_rxfh_indir_size(struct net_device *netdev)
  4567. {
  4568. return I40E_HLUT_ARRAY_SIZE;
  4569. }
  4570. /**
  4571. * i40e_get_rxfh - get the rx flow hash indirection table
  4572. * @netdev: network interface device structure
  4573. * @rxfh: pointer to param struct (indir, key, hfunc)
  4574. *
  4575. * Reads the indirection table directly from the hardware. Returns 0 on
  4576. * success.
  4577. **/
  4578. static int i40e_get_rxfh(struct net_device *netdev,
  4579. struct ethtool_rxfh_param *rxfh)
  4580. {
  4581. struct i40e_netdev_priv *np = netdev_priv(netdev);
  4582. struct i40e_vsi *vsi = np->vsi;
  4583. u8 *lut, *seed = NULL;
  4584. int ret;
  4585. u16 i;
  4586. rxfh->hfunc = ETH_RSS_HASH_TOP;
  4587. if (!rxfh->indir)
  4588. return 0;
  4589. seed = rxfh->key;
  4590. lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
  4591. if (!lut)
  4592. return -ENOMEM;
  4593. ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE);
  4594. if (ret)
  4595. goto out;
  4596. for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
  4597. rxfh->indir[i] = (u32)(lut[i]);
  4598. out:
  4599. kfree(lut);
  4600. return ret;
  4601. }
  4602. /**
  4603. * i40e_set_rxfh - set the rx flow hash indirection table
  4604. * @netdev: network interface device structure
  4605. * @rxfh: pointer to param struct (indir, key, hfunc)
  4606. * @extack: extended ACK from the Netlink message
  4607. *
  4608. * Returns -EINVAL if the table specifies an invalid queue id, otherwise
  4609. * returns 0 after programming the table.
  4610. **/
  4611. static int i40e_set_rxfh(struct net_device *netdev,
  4612. struct ethtool_rxfh_param *rxfh,
  4613. struct netlink_ext_ack *extack)
  4614. {
  4615. struct i40e_netdev_priv *np = netdev_priv(netdev);
  4616. struct i40e_vsi *vsi = np->vsi;
  4617. struct i40e_pf *pf = vsi->back;
  4618. u8 *seed = NULL;
  4619. u16 i;
  4620. if (rxfh->hfunc != ETH_RSS_HASH_NO_CHANGE &&
  4621. rxfh->hfunc != ETH_RSS_HASH_TOP)
  4622. return -EOPNOTSUPP;
  4623. if (rxfh->key) {
  4624. if (!vsi->rss_hkey_user) {
  4625. vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE,
  4626. GFP_KERNEL);
  4627. if (!vsi->rss_hkey_user)
  4628. return -ENOMEM;
  4629. }
  4630. memcpy(vsi->rss_hkey_user, rxfh->key, I40E_HKEY_ARRAY_SIZE);
  4631. seed = vsi->rss_hkey_user;
  4632. }
  4633. if (!vsi->rss_lut_user) {
  4634. vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
  4635. if (!vsi->rss_lut_user)
  4636. return -ENOMEM;
  4637. }
  4638. /* Each 32 bits pointed by 'indir' is stored with a lut entry */
  4639. if (rxfh->indir)
  4640. for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
  4641. vsi->rss_lut_user[i] = (u8)(rxfh->indir[i]);
  4642. else
  4643. i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE,
  4644. vsi->rss_size);
  4645. return i40e_config_rss(vsi, seed, vsi->rss_lut_user,
  4646. I40E_HLUT_ARRAY_SIZE);
  4647. }
  4648. /**
  4649. * i40e_get_priv_flags - report device private flags
  4650. * @dev: network interface device structure
  4651. *
  4652. * The get string set count and the string set should be matched for each
  4653. * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags
  4654. * array.
  4655. *
  4656. * Returns a u32 bitmap of flags.
  4657. **/
  4658. static u32 i40e_get_priv_flags(struct net_device *dev)
  4659. {
  4660. struct i40e_netdev_priv *np = netdev_priv(dev);
  4661. struct i40e_vsi *vsi = np->vsi;
  4662. struct i40e_pf *pf = vsi->back;
  4663. u32 i, j, ret_flags = 0;
  4664. for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
  4665. const struct i40e_priv_flags *priv_flag;
  4666. priv_flag = &i40e_gstrings_priv_flags[i];
  4667. if (test_bit(priv_flag->bitno, pf->flags))
  4668. ret_flags |= BIT(i);
  4669. }
  4670. if (pf->hw.pf_id != 0)
  4671. return ret_flags;
  4672. for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
  4673. const struct i40e_priv_flags *priv_flag;
  4674. priv_flag = &i40e_gl_gstrings_priv_flags[j];
  4675. if (test_bit(priv_flag->bitno, pf->flags))
  4676. ret_flags |= BIT(i + j);
  4677. }
  4678. return ret_flags;
  4679. }
  4680. /**
  4681. * i40e_set_priv_flags - set private flags
  4682. * @dev: network interface device structure
  4683. * @flags: bit flags to be set
  4684. **/
  4685. static int i40e_set_priv_flags(struct net_device *dev, u32 flags)
  4686. {
  4687. DECLARE_BITMAP(changed_flags, I40E_PF_FLAGS_NBITS);
  4688. DECLARE_BITMAP(orig_flags, I40E_PF_FLAGS_NBITS);
  4689. DECLARE_BITMAP(new_flags, I40E_PF_FLAGS_NBITS);
  4690. struct i40e_netdev_priv *np = netdev_priv(dev);
  4691. enum i40e_admin_queue_err adq_err;
  4692. struct i40e_vsi *vsi = np->vsi;
  4693. struct i40e_pf *pf = vsi->back;
  4694. u32 reset_needed = 0;
  4695. int status;
  4696. u32 i, j;
  4697. bitmap_copy(orig_flags, pf->flags, I40E_PF_FLAGS_NBITS);
  4698. bitmap_copy(new_flags, pf->flags, I40E_PF_FLAGS_NBITS);
  4699. for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
  4700. const struct i40e_priv_flags *priv_flag;
  4701. bool new_val;
  4702. priv_flag = &i40e_gstrings_priv_flags[i];
  4703. new_val = (flags & BIT(i)) ? true : false;
  4704. /* If this is a read-only flag, it can't be changed */
  4705. if (priv_flag->read_only &&
  4706. test_bit(priv_flag->bitno, orig_flags) != new_val)
  4707. return -EOPNOTSUPP;
  4708. if (new_val)
  4709. set_bit(priv_flag->bitno, new_flags);
  4710. else
  4711. clear_bit(priv_flag->bitno, new_flags);
  4712. }
  4713. if (pf->hw.pf_id != 0)
  4714. goto flags_complete;
  4715. for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
  4716. const struct i40e_priv_flags *priv_flag;
  4717. bool new_val;
  4718. priv_flag = &i40e_gl_gstrings_priv_flags[j];
  4719. new_val = (flags & BIT(i + j)) ? true : false;
  4720. /* If this is a read-only flag, it can't be changed */
  4721. if (priv_flag->read_only &&
  4722. test_bit(priv_flag->bitno, orig_flags) != new_val)
  4723. return -EOPNOTSUPP;
  4724. if (new_val)
  4725. set_bit(priv_flag->bitno, new_flags);
  4726. else
  4727. clear_bit(priv_flag->bitno, new_flags);
  4728. }
  4729. flags_complete:
  4730. bitmap_xor(changed_flags, new_flags, orig_flags, I40E_PF_FLAGS_NBITS);
  4731. if (test_bit(I40E_FLAG_FW_LLDP_DIS, changed_flags))
  4732. reset_needed = I40E_PF_RESET_AND_REBUILD_FLAG;
  4733. if (test_bit(I40E_FLAG_VEB_STATS_ENA, changed_flags) ||
  4734. test_bit(I40E_FLAG_LEGACY_RX_ENA, changed_flags) ||
  4735. test_bit(I40E_FLAG_SOURCE_PRUNING_DIS, changed_flags))
  4736. reset_needed = BIT(__I40E_PF_RESET_REQUESTED);
  4737. /* Before we finalize any flag changes, we need to perform some
  4738. * checks to ensure that the changes are supported and safe.
  4739. */
  4740. /* ATR eviction is not supported on all devices */
  4741. if (test_bit(I40E_FLAG_HW_ATR_EVICT_ENA, new_flags) &&
  4742. !test_bit(I40E_HW_CAP_ATR_EVICT, pf->hw.caps))
  4743. return -EOPNOTSUPP;
  4744. /* If the driver detected FW LLDP was disabled on init, this flag could
  4745. * be set, however we do not support _changing_ the flag:
  4746. * - on XL710 if NPAR is enabled or FW API version < 1.7
  4747. * - on X722 with FW API version < 1.6
  4748. * There are situations where older FW versions/NPAR enabled PFs could
  4749. * disable LLDP, however we _must_ not allow the user to enable/disable
  4750. * LLDP with this flag on unsupported FW versions.
  4751. */
  4752. if (test_bit(I40E_FLAG_FW_LLDP_DIS, changed_flags) &&
  4753. !test_bit(I40E_HW_CAP_FW_LLDP_STOPPABLE, pf->hw.caps)) {
  4754. dev_warn(&pf->pdev->dev,
  4755. "Device does not support changing FW LLDP\n");
  4756. return -EOPNOTSUPP;
  4757. }
  4758. if (test_bit(I40E_FLAG_RS_FEC, changed_flags) &&
  4759. pf->hw.device_id != I40E_DEV_ID_25G_SFP28 &&
  4760. pf->hw.device_id != I40E_DEV_ID_25G_B) {
  4761. dev_warn(&pf->pdev->dev,
  4762. "Device does not support changing FEC configuration\n");
  4763. return -EOPNOTSUPP;
  4764. }
  4765. if (test_bit(I40E_FLAG_BASE_R_FEC, changed_flags) &&
  4766. pf->hw.device_id != I40E_DEV_ID_25G_SFP28 &&
  4767. pf->hw.device_id != I40E_DEV_ID_25G_B &&
  4768. pf->hw.device_id != I40E_DEV_ID_KX_X722) {
  4769. dev_warn(&pf->pdev->dev,
  4770. "Device does not support changing FEC configuration\n");
  4771. return -EOPNOTSUPP;
  4772. }
  4773. /* Process any additional changes needed as a result of flag changes.
  4774. * The changed_flags value reflects the list of bits that were
  4775. * changed in the code above.
  4776. */
  4777. /* Flush current ATR settings if ATR was disabled */
  4778. if (test_bit(I40E_FLAG_FD_ATR_ENA, changed_flags) &&
  4779. !test_bit(I40E_FLAG_FD_ATR_ENA, new_flags)) {
  4780. set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
  4781. set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
  4782. }
  4783. if (test_bit(I40E_FLAG_TRUE_PROMISC_ENA, changed_flags)) {
  4784. u16 sw_flags = 0, valid_flags = 0;
  4785. int ret;
  4786. if (!test_bit(I40E_FLAG_TRUE_PROMISC_ENA, new_flags))
  4787. sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
  4788. valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
  4789. ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags,
  4790. 0, NULL);
  4791. if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
  4792. dev_info(&pf->pdev->dev,
  4793. "couldn't set switch config bits, err %pe aq_err %s\n",
  4794. ERR_PTR(ret),
  4795. i40e_aq_str(&pf->hw,
  4796. pf->hw.aq.asq_last_status));
  4797. /* not a fatal problem, just keep going */
  4798. }
  4799. }
  4800. if (test_bit(I40E_FLAG_RS_FEC, changed_flags) ||
  4801. test_bit(I40E_FLAG_BASE_R_FEC, changed_flags)) {
  4802. u8 fec_cfg = 0;
  4803. if (test_bit(I40E_FLAG_RS_FEC, new_flags) &&
  4804. test_bit(I40E_FLAG_BASE_R_FEC, new_flags)) {
  4805. fec_cfg = I40E_AQ_SET_FEC_AUTO;
  4806. } else if (test_bit(I40E_FLAG_RS_FEC, new_flags)) {
  4807. fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS |
  4808. I40E_AQ_SET_FEC_ABILITY_RS);
  4809. } else if (test_bit(I40E_FLAG_BASE_R_FEC, new_flags)) {
  4810. fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR |
  4811. I40E_AQ_SET_FEC_ABILITY_KR);
  4812. }
  4813. if (i40e_set_fec_cfg(dev, fec_cfg))
  4814. dev_warn(&pf->pdev->dev, "Cannot change FEC config\n");
  4815. }
  4816. if (test_bit(I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, changed_flags) &&
  4817. test_bit(I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, orig_flags)) {
  4818. dev_err(&pf->pdev->dev,
  4819. "Setting link-down-on-close not supported on this port (because total-port-shutdown is enabled)\n");
  4820. return -EOPNOTSUPP;
  4821. }
  4822. if (test_bit(I40E_FLAG_VF_VLAN_PRUNING_ENA, changed_flags) &&
  4823. pf->num_alloc_vfs) {
  4824. dev_warn(&pf->pdev->dev,
  4825. "Changing vf-vlan-pruning flag while VF(s) are active is not supported\n");
  4826. return -EOPNOTSUPP;
  4827. }
  4828. if (test_bit(I40E_FLAG_LEGACY_RX_ENA, changed_flags) &&
  4829. I40E_2K_TOO_SMALL_WITH_PADDING) {
  4830. dev_warn(&pf->pdev->dev,
  4831. "2k Rx buffer is too small to fit standard MTU and skb_shared_info\n");
  4832. return -EOPNOTSUPP;
  4833. }
  4834. if (test_bit(I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, changed_flags) &&
  4835. test_bit(I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, new_flags) &&
  4836. test_bit(I40E_FLAG_MFP_ENA, new_flags))
  4837. dev_warn(&pf->pdev->dev,
  4838. "Turning on link-down-on-close flag may affect other partitions\n");
  4839. if (test_bit(I40E_FLAG_FW_LLDP_DIS, changed_flags)) {
  4840. if (test_bit(I40E_FLAG_FW_LLDP_DIS, new_flags)) {
  4841. #ifdef CONFIG_I40E_DCB
  4842. i40e_dcb_sw_default_config(pf);
  4843. #endif /* CONFIG_I40E_DCB */
  4844. i40e_aq_cfg_lldp_mib_change_event(&pf->hw, false, NULL);
  4845. i40e_aq_stop_lldp(&pf->hw, true, false, NULL);
  4846. } else {
  4847. status = i40e_aq_start_lldp(&pf->hw, false, NULL);
  4848. if (status) {
  4849. adq_err = pf->hw.aq.asq_last_status;
  4850. switch (adq_err) {
  4851. case I40E_AQ_RC_EEXIST:
  4852. dev_warn(&pf->pdev->dev,
  4853. "FW LLDP agent is already running\n");
  4854. reset_needed = 0;
  4855. break;
  4856. case I40E_AQ_RC_EPERM:
  4857. dev_warn(&pf->pdev->dev,
  4858. "Device configuration forbids SW from starting the LLDP agent.\n");
  4859. return -EINVAL;
  4860. case I40E_AQ_RC_EAGAIN:
  4861. dev_warn(&pf->pdev->dev,
  4862. "Stop FW LLDP agent command is still being processed, please try again in a second.\n");
  4863. return -EBUSY;
  4864. default:
  4865. dev_warn(&pf->pdev->dev,
  4866. "Starting FW LLDP agent failed: error: %pe, %s\n",
  4867. ERR_PTR(status),
  4868. i40e_aq_str(&pf->hw,
  4869. adq_err));
  4870. return -EINVAL;
  4871. }
  4872. }
  4873. }
  4874. }
  4875. /* Now that we've checked to ensure that the new flags are valid, load
  4876. * them into place. Since we only modify flags either (a) during
  4877. * initialization or (b) while holding the RTNL lock, we don't need
  4878. * anything fancy here.
  4879. */
  4880. bitmap_copy(pf->flags, new_flags, I40E_PF_FLAGS_NBITS);
  4881. /* Issue reset to cause things to take effect, as additional bits
  4882. * are added we will need to create a mask of bits requiring reset
  4883. */
  4884. if (reset_needed)
  4885. i40e_do_reset(pf, reset_needed, true);
  4886. return 0;
  4887. }
  4888. /**
  4889. * i40e_get_module_info - get (Q)SFP+ module type info
  4890. * @netdev: network interface device structure
  4891. * @modinfo: module EEPROM size and layout information structure
  4892. **/
  4893. static int i40e_get_module_info(struct net_device *netdev,
  4894. struct ethtool_modinfo *modinfo)
  4895. {
  4896. struct i40e_netdev_priv *np = netdev_priv(netdev);
  4897. struct i40e_vsi *vsi = np->vsi;
  4898. struct i40e_pf *pf = vsi->back;
  4899. struct i40e_hw *hw = &pf->hw;
  4900. u32 sff8472_comp = 0;
  4901. u32 sff8472_swap = 0;
  4902. u32 sff8636_rev = 0;
  4903. u32 type = 0;
  4904. int status;
  4905. /* Check if firmware supports reading module EEPROM. */
  4906. if (!test_bit(I40E_HW_CAP_AQ_PHY_ACCESS, hw->caps)) {
  4907. netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n");
  4908. return -EINVAL;
  4909. }
  4910. status = i40e_update_link_info(hw);
  4911. if (status)
  4912. return -EIO;
  4913. if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) {
  4914. netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n");
  4915. return -EINVAL;
  4916. }
  4917. type = hw->phy.link_info.module_type[0];
  4918. switch (type) {
  4919. case I40E_MODULE_TYPE_SFP:
  4920. status = i40e_aq_get_phy_register(hw,
  4921. I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
  4922. I40E_I2C_EEPROM_DEV_ADDR, true,
  4923. I40E_MODULE_SFF_8472_COMP,
  4924. &sff8472_comp, NULL);
  4925. if (status)
  4926. return -EIO;
  4927. status = i40e_aq_get_phy_register(hw,
  4928. I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
  4929. I40E_I2C_EEPROM_DEV_ADDR, true,
  4930. I40E_MODULE_SFF_8472_SWAP,
  4931. &sff8472_swap, NULL);
  4932. if (status)
  4933. return -EIO;
  4934. /* Check if the module requires address swap to access
  4935. * the other EEPROM memory page.
  4936. */
  4937. if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) {
  4938. netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n");
  4939. modinfo->type = ETH_MODULE_SFF_8079;
  4940. modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
  4941. } else if (sff8472_comp == 0x00) {
  4942. /* Module is not SFF-8472 compliant */
  4943. modinfo->type = ETH_MODULE_SFF_8079;
  4944. modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
  4945. } else if (!(sff8472_swap & I40E_MODULE_SFF_DDM_IMPLEMENTED)) {
  4946. /* Module is SFF-8472 compliant but doesn't implement
  4947. * Digital Diagnostic Monitoring (DDM).
  4948. */
  4949. modinfo->type = ETH_MODULE_SFF_8079;
  4950. modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
  4951. } else {
  4952. modinfo->type = ETH_MODULE_SFF_8472;
  4953. modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
  4954. }
  4955. break;
  4956. case I40E_MODULE_TYPE_QSFP_PLUS:
  4957. /* Read from memory page 0. */
  4958. status = i40e_aq_get_phy_register(hw,
  4959. I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
  4960. 0, true,
  4961. I40E_MODULE_REVISION_ADDR,
  4962. &sff8636_rev, NULL);
  4963. if (status)
  4964. return -EIO;
  4965. /* Determine revision compliance byte */
  4966. if (sff8636_rev > 0x02) {
  4967. /* Module is SFF-8636 compliant */
  4968. modinfo->type = ETH_MODULE_SFF_8636;
  4969. modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
  4970. } else {
  4971. modinfo->type = ETH_MODULE_SFF_8436;
  4972. modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
  4973. }
  4974. break;
  4975. case I40E_MODULE_TYPE_QSFP28:
  4976. modinfo->type = ETH_MODULE_SFF_8636;
  4977. modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
  4978. break;
  4979. default:
  4980. netdev_dbg(vsi->netdev, "SFP module type unrecognized or no SFP connector used.\n");
  4981. return -EOPNOTSUPP;
  4982. }
  4983. return 0;
  4984. }
  4985. /**
  4986. * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents
  4987. * @netdev: network interface device structure
  4988. * @ee: EEPROM dump request structure
  4989. * @data: buffer to be filled with EEPROM contents
  4990. **/
  4991. static int i40e_get_module_eeprom(struct net_device *netdev,
  4992. struct ethtool_eeprom *ee,
  4993. u8 *data)
  4994. {
  4995. struct i40e_netdev_priv *np = netdev_priv(netdev);
  4996. struct i40e_vsi *vsi = np->vsi;
  4997. struct i40e_pf *pf = vsi->back;
  4998. struct i40e_hw *hw = &pf->hw;
  4999. bool is_sfp = false;
  5000. u32 value = 0;
  5001. int status;
  5002. int i;
  5003. if (!ee || !ee->len || !data)
  5004. return -EINVAL;
  5005. if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP)
  5006. is_sfp = true;
  5007. for (i = 0; i < ee->len; i++) {
  5008. u32 offset = i + ee->offset;
  5009. u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0;
  5010. /* Check if we need to access the other memory page */
  5011. if (is_sfp) {
  5012. if (offset >= ETH_MODULE_SFF_8079_LEN) {
  5013. offset -= ETH_MODULE_SFF_8079_LEN;
  5014. addr = I40E_I2C_EEPROM_DEV_ADDR2;
  5015. }
  5016. } else {
  5017. while (offset >= ETH_MODULE_SFF_8436_LEN) {
  5018. /* Compute memory page number and offset. */
  5019. offset -= ETH_MODULE_SFF_8436_LEN / 2;
  5020. addr++;
  5021. }
  5022. }
  5023. status = i40e_aq_get_phy_register(hw,
  5024. I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
  5025. addr, true, offset, &value, NULL);
  5026. if (status)
  5027. return -EIO;
  5028. data[i] = value;
  5029. }
  5030. return 0;
  5031. }
  5032. static void i40e_eee_capability_to_kedata_supported(__le16 eee_capability_,
  5033. unsigned long *supported)
  5034. {
  5035. const int eee_capability = le16_to_cpu(eee_capability_);
  5036. static const int lut[] = {
  5037. ETHTOOL_LINK_MODE_100baseT_Full_BIT,
  5038. ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
  5039. ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
  5040. ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
  5041. ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
  5042. ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
  5043. ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
  5044. };
  5045. linkmode_zero(supported);
  5046. for (unsigned int i = ARRAY_SIZE(lut); i--; )
  5047. if (eee_capability & BIT(i + 1))
  5048. linkmode_set_bit(lut[i], supported);
  5049. }
  5050. static int i40e_get_eee(struct net_device *netdev, struct ethtool_keee *edata)
  5051. {
  5052. struct i40e_netdev_priv *np = netdev_priv(netdev);
  5053. struct i40e_aq_get_phy_abilities_resp phy_cfg;
  5054. struct i40e_vsi *vsi = np->vsi;
  5055. struct i40e_pf *pf = vsi->back;
  5056. struct i40e_hw *hw = &pf->hw;
  5057. int status;
  5058. /* Get initial PHY capabilities */
  5059. status = i40e_aq_get_phy_capabilities(hw, false, true, &phy_cfg, NULL);
  5060. if (status)
  5061. return -EAGAIN;
  5062. /* Check whether NIC configuration is compatible with Energy Efficient
  5063. * Ethernet (EEE) mode.
  5064. */
  5065. if (phy_cfg.eee_capability == 0)
  5066. return -EOPNOTSUPP;
  5067. i40e_eee_capability_to_kedata_supported(phy_cfg.eee_capability,
  5068. edata->supported);
  5069. linkmode_copy(edata->lp_advertised, edata->supported);
  5070. /* Get current configuration */
  5071. status = i40e_aq_get_phy_capabilities(hw, false, false, &phy_cfg, NULL);
  5072. if (status)
  5073. return -EAGAIN;
  5074. linkmode_zero(edata->advertised);
  5075. if (phy_cfg.eee_capability)
  5076. linkmode_copy(edata->advertised, edata->supported);
  5077. edata->eee_enabled = !!phy_cfg.eee_capability;
  5078. edata->tx_lpi_enabled = pf->stats.tx_lpi_status;
  5079. edata->eee_active = pf->stats.tx_lpi_status && pf->stats.rx_lpi_status;
  5080. return 0;
  5081. }
  5082. static int i40e_is_eee_param_supported(struct net_device *netdev,
  5083. struct ethtool_keee *edata)
  5084. {
  5085. struct i40e_netdev_priv *np = netdev_priv(netdev);
  5086. struct i40e_vsi *vsi = np->vsi;
  5087. struct i40e_pf *pf = vsi->back;
  5088. struct i40e_ethtool_not_used {
  5089. bool value;
  5090. const char *name;
  5091. } param[] = {
  5092. {!!(edata->advertised[0] & ~edata->supported[0]), "advertise"},
  5093. {!!edata->tx_lpi_timer, "tx-timer"},
  5094. {edata->tx_lpi_enabled != pf->stats.tx_lpi_status, "tx-lpi"}
  5095. };
  5096. int i;
  5097. for (i = 0; i < ARRAY_SIZE(param); i++) {
  5098. if (param[i].value) {
  5099. netdev_info(netdev,
  5100. "EEE setting %s not supported\n",
  5101. param[i].name);
  5102. return -EOPNOTSUPP;
  5103. }
  5104. }
  5105. return 0;
  5106. }
  5107. static int i40e_set_eee(struct net_device *netdev, struct ethtool_keee *edata)
  5108. {
  5109. struct i40e_netdev_priv *np = netdev_priv(netdev);
  5110. struct i40e_aq_get_phy_abilities_resp abilities;
  5111. struct i40e_aq_set_phy_config config;
  5112. struct i40e_vsi *vsi = np->vsi;
  5113. struct i40e_pf *pf = vsi->back;
  5114. struct i40e_hw *hw = &pf->hw;
  5115. __le16 eee_capability;
  5116. int status;
  5117. /* Deny parameters we don't support */
  5118. if (i40e_is_eee_param_supported(netdev, edata))
  5119. return -EOPNOTSUPP;
  5120. /* Get initial PHY capabilities */
  5121. status = i40e_aq_get_phy_capabilities(hw, false, true, &abilities,
  5122. NULL);
  5123. if (status)
  5124. return -EAGAIN;
  5125. /* Check whether NIC configuration is compatible with Energy Efficient
  5126. * Ethernet (EEE) mode.
  5127. */
  5128. if (abilities.eee_capability == 0)
  5129. return -EOPNOTSUPP;
  5130. /* Cache initial EEE capability */
  5131. eee_capability = abilities.eee_capability;
  5132. /* Get current PHY configuration */
  5133. status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
  5134. NULL);
  5135. if (status)
  5136. return -EAGAIN;
  5137. /* Cache current PHY configuration */
  5138. config.phy_type = abilities.phy_type;
  5139. config.phy_type_ext = abilities.phy_type_ext;
  5140. config.link_speed = abilities.link_speed;
  5141. config.abilities = abilities.abilities |
  5142. I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
  5143. config.eeer = abilities.eeer_val;
  5144. config.low_power_ctrl = abilities.d3_lpan;
  5145. config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
  5146. I40E_AQ_PHY_FEC_CONFIG_MASK;
  5147. /* Set desired EEE state */
  5148. if (edata->eee_enabled) {
  5149. config.eee_capability = eee_capability;
  5150. config.eeer |= cpu_to_le32(I40E_PRTPM_EEER_TX_LPI_EN_MASK);
  5151. } else {
  5152. config.eee_capability = 0;
  5153. config.eeer &= cpu_to_le32(~I40E_PRTPM_EEER_TX_LPI_EN_MASK);
  5154. }
  5155. /* Apply modified PHY configuration */
  5156. status = i40e_aq_set_phy_config(hw, &config, NULL);
  5157. if (status)
  5158. return -EAGAIN;
  5159. return 0;
  5160. }
  5161. static const struct ethtool_ops i40e_ethtool_recovery_mode_ops = {
  5162. .get_drvinfo = i40e_get_drvinfo,
  5163. .set_eeprom = i40e_set_eeprom,
  5164. .get_eeprom_len = i40e_get_eeprom_len,
  5165. .get_eeprom = i40e_get_eeprom,
  5166. };
  5167. static const struct ethtool_ops i40e_ethtool_ops = {
  5168. .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
  5169. ETHTOOL_COALESCE_TX_MAX_FRAMES_IRQ |
  5170. ETHTOOL_COALESCE_USE_ADAPTIVE |
  5171. ETHTOOL_COALESCE_RX_USECS_HIGH |
  5172. ETHTOOL_COALESCE_TX_USECS_HIGH,
  5173. .get_drvinfo = i40e_get_drvinfo,
  5174. .get_regs_len = i40e_get_regs_len,
  5175. .get_regs = i40e_get_regs,
  5176. .nway_reset = i40e_nway_reset,
  5177. .get_link = ethtool_op_get_link,
  5178. .get_wol = i40e_get_wol,
  5179. .set_wol = i40e_set_wol,
  5180. .set_eeprom = i40e_set_eeprom,
  5181. .get_eeprom_len = i40e_get_eeprom_len,
  5182. .get_eeprom = i40e_get_eeprom,
  5183. .get_ringparam = i40e_get_ringparam,
  5184. .set_ringparam = i40e_set_ringparam,
  5185. .get_pauseparam = i40e_get_pauseparam,
  5186. .set_pauseparam = i40e_set_pauseparam,
  5187. .get_msglevel = i40e_get_msglevel,
  5188. .set_msglevel = i40e_set_msglevel,
  5189. .get_rxnfc = i40e_get_rxnfc,
  5190. .set_rxnfc = i40e_set_rxnfc,
  5191. .self_test = i40e_diag_test,
  5192. .get_strings = i40e_get_strings,
  5193. .get_eee = i40e_get_eee,
  5194. .set_eee = i40e_set_eee,
  5195. .set_phys_id = i40e_set_phys_id,
  5196. .get_sset_count = i40e_get_sset_count,
  5197. .get_ethtool_stats = i40e_get_ethtool_stats,
  5198. .get_coalesce = i40e_get_coalesce,
  5199. .set_coalesce = i40e_set_coalesce,
  5200. .get_rxfh_key_size = i40e_get_rxfh_key_size,
  5201. .get_rxfh_indir_size = i40e_get_rxfh_indir_size,
  5202. .get_rxfh = i40e_get_rxfh,
  5203. .set_rxfh = i40e_set_rxfh,
  5204. .get_channels = i40e_get_channels,
  5205. .set_channels = i40e_set_channels,
  5206. .get_module_info = i40e_get_module_info,
  5207. .get_module_eeprom = i40e_get_module_eeprom,
  5208. .get_ts_info = i40e_get_ts_info,
  5209. .get_priv_flags = i40e_get_priv_flags,
  5210. .set_priv_flags = i40e_set_priv_flags,
  5211. .get_per_queue_coalesce = i40e_get_per_queue_coalesce,
  5212. .set_per_queue_coalesce = i40e_set_per_queue_coalesce,
  5213. .get_link_ksettings = i40e_get_link_ksettings,
  5214. .set_link_ksettings = i40e_set_link_ksettings,
  5215. .get_fecparam = i40e_get_fec_param,
  5216. .set_fecparam = i40e_set_fec_param,
  5217. .flash_device = i40e_ddp_flash,
  5218. };
  5219. void i40e_set_ethtool_ops(struct net_device *netdev)
  5220. {
  5221. struct i40e_netdev_priv *np = netdev_priv(netdev);
  5222. struct i40e_pf *pf = np->vsi->back;
  5223. if (!test_bit(__I40E_RECOVERY_MODE, pf->state))
  5224. netdev->ethtool_ops = &i40e_ethtool_ops;
  5225. else
  5226. netdev->ethtool_ops = &i40e_ethtool_recovery_mode_ops;
  5227. }