idpf_controlq_setup.c 4.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /* Copyright (C) 2023 Intel Corporation */
  3. #include "idpf_controlq.h"
  4. /**
  5. * idpf_ctlq_alloc_desc_ring - Allocate Control Queue (CQ) rings
  6. * @hw: pointer to hw struct
  7. * @cq: pointer to the specific Control queue
  8. */
  9. static int idpf_ctlq_alloc_desc_ring(struct idpf_hw *hw,
  10. struct idpf_ctlq_info *cq)
  11. {
  12. size_t size = cq->ring_size * sizeof(struct idpf_ctlq_desc);
  13. cq->desc_ring.va = idpf_alloc_dma_mem(hw, &cq->desc_ring, size);
  14. if (!cq->desc_ring.va)
  15. return -ENOMEM;
  16. return 0;
  17. }
  18. /**
  19. * idpf_ctlq_alloc_bufs - Allocate Control Queue (CQ) buffers
  20. * @hw: pointer to hw struct
  21. * @cq: pointer to the specific Control queue
  22. *
  23. * Allocate the buffer head for all control queues, and if it's a receive
  24. * queue, allocate DMA buffers
  25. */
  26. static int idpf_ctlq_alloc_bufs(struct idpf_hw *hw,
  27. struct idpf_ctlq_info *cq)
  28. {
  29. int i;
  30. /* Do not allocate DMA buffers for transmit queues */
  31. if (cq->cq_type == IDPF_CTLQ_TYPE_MAILBOX_TX)
  32. return 0;
  33. /* We'll be allocating the buffer info memory first, then we can
  34. * allocate the mapped buffers for the event processing
  35. */
  36. cq->bi.rx_buff = kcalloc(cq->ring_size, sizeof(struct idpf_dma_mem *),
  37. GFP_KERNEL);
  38. if (!cq->bi.rx_buff)
  39. return -ENOMEM;
  40. /* allocate the mapped buffers (except for the last one) */
  41. for (i = 0; i < cq->ring_size - 1; i++) {
  42. struct idpf_dma_mem *bi;
  43. int num = 1; /* number of idpf_dma_mem to be allocated */
  44. cq->bi.rx_buff[i] = kcalloc(num, sizeof(struct idpf_dma_mem),
  45. GFP_KERNEL);
  46. if (!cq->bi.rx_buff[i])
  47. goto unwind_alloc_cq_bufs;
  48. bi = cq->bi.rx_buff[i];
  49. bi->va = idpf_alloc_dma_mem(hw, bi, cq->buf_size);
  50. if (!bi->va) {
  51. /* unwind will not free the failed entry */
  52. kfree(cq->bi.rx_buff[i]);
  53. goto unwind_alloc_cq_bufs;
  54. }
  55. }
  56. return 0;
  57. unwind_alloc_cq_bufs:
  58. /* don't try to free the one that failed... */
  59. i--;
  60. for (; i >= 0; i--) {
  61. idpf_free_dma_mem(hw, cq->bi.rx_buff[i]);
  62. kfree(cq->bi.rx_buff[i]);
  63. }
  64. kfree(cq->bi.rx_buff);
  65. return -ENOMEM;
  66. }
  67. /**
  68. * idpf_ctlq_free_desc_ring - Free Control Queue (CQ) rings
  69. * @hw: pointer to hw struct
  70. * @cq: pointer to the specific Control queue
  71. *
  72. * This assumes the posted send buffers have already been cleaned
  73. * and de-allocated
  74. */
  75. static void idpf_ctlq_free_desc_ring(struct idpf_hw *hw,
  76. struct idpf_ctlq_info *cq)
  77. {
  78. idpf_free_dma_mem(hw, &cq->desc_ring);
  79. }
  80. /**
  81. * idpf_ctlq_free_bufs - Free CQ buffer info elements
  82. * @hw: pointer to hw struct
  83. * @cq: pointer to the specific Control queue
  84. *
  85. * Free the DMA buffers for RX queues, and DMA buffer header for both RX and TX
  86. * queues. The upper layers are expected to manage freeing of TX DMA buffers
  87. */
  88. static void idpf_ctlq_free_bufs(struct idpf_hw *hw, struct idpf_ctlq_info *cq)
  89. {
  90. void *bi;
  91. if (cq->cq_type == IDPF_CTLQ_TYPE_MAILBOX_RX) {
  92. int i;
  93. /* free DMA buffers for rx queues*/
  94. for (i = 0; i < cq->ring_size; i++) {
  95. if (cq->bi.rx_buff[i]) {
  96. idpf_free_dma_mem(hw, cq->bi.rx_buff[i]);
  97. kfree(cq->bi.rx_buff[i]);
  98. }
  99. }
  100. bi = (void *)cq->bi.rx_buff;
  101. } else {
  102. bi = (void *)cq->bi.tx_msg;
  103. }
  104. /* free the buffer header */
  105. kfree(bi);
  106. }
  107. /**
  108. * idpf_ctlq_dealloc_ring_res - Free memory allocated for control queue
  109. * @hw: pointer to hw struct
  110. * @cq: pointer to the specific Control queue
  111. *
  112. * Free the memory used by the ring, buffers and other related structures
  113. */
  114. void idpf_ctlq_dealloc_ring_res(struct idpf_hw *hw, struct idpf_ctlq_info *cq)
  115. {
  116. /* free ring buffers and the ring itself */
  117. idpf_ctlq_free_bufs(hw, cq);
  118. idpf_ctlq_free_desc_ring(hw, cq);
  119. }
  120. /**
  121. * idpf_ctlq_alloc_ring_res - allocate memory for descriptor ring and bufs
  122. * @hw: pointer to hw struct
  123. * @cq: pointer to control queue struct
  124. *
  125. * Do *NOT* hold cq_lock when calling this as the memory allocation routines
  126. * called are not going to be atomic context safe
  127. */
  128. int idpf_ctlq_alloc_ring_res(struct idpf_hw *hw, struct idpf_ctlq_info *cq)
  129. {
  130. int err;
  131. /* allocate the ring memory */
  132. err = idpf_ctlq_alloc_desc_ring(hw, cq);
  133. if (err)
  134. return err;
  135. /* allocate buffers in the rings */
  136. err = idpf_ctlq_alloc_bufs(hw, cq);
  137. if (err)
  138. goto idpf_init_cq_free_ring;
  139. /* success! */
  140. return 0;
  141. idpf_init_cq_free_ring:
  142. idpf_free_dma_mem(hw, &cq->desc_ring);
  143. return err;
  144. }