ixgbe_common.h 8.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /* Copyright(c) 1999 - 2018 Intel Corporation. */
  3. #ifndef _IXGBE_COMMON_H_
  4. #define _IXGBE_COMMON_H_
  5. #include "ixgbe_type.h"
  6. #include "ixgbe.h"
  7. u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);
  8. int ixgbe_init_hw_generic(struct ixgbe_hw *hw);
  9. int ixgbe_start_hw_generic(struct ixgbe_hw *hw);
  10. int ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
  11. int ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
  12. int ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
  13. u32 pba_num_size);
  14. int ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr);
  15. enum ixgbe_bus_width ixgbe_convert_bus_width(u16 link_status);
  16. enum ixgbe_bus_speed ixgbe_convert_bus_speed(u16 link_status);
  17. int ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);
  18. void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw);
  19. int ixgbe_stop_adapter_generic(struct ixgbe_hw *hw);
  20. int ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index);
  21. int ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index);
  22. int ixgbe_init_led_link_act_generic(struct ixgbe_hw *hw);
  23. int ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw);
  24. int ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
  25. int ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
  26. u16 words, u16 *data);
  27. int ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data);
  28. int ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset,
  29. u16 words, u16 *data);
  30. int ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
  31. int ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset,
  32. u16 words, u16 *data);
  33. int ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
  34. u16 *data);
  35. int ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
  36. u16 words, u16 *data);
  37. int ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw);
  38. int ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,
  39. u16 *checksum_val);
  40. int ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw);
  41. int ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
  42. u32 enable_addr);
  43. int ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index);
  44. int ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw);
  45. int ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw,
  46. struct net_device *netdev);
  47. int ixgbe_enable_mc_generic(struct ixgbe_hw *hw);
  48. int ixgbe_disable_mc_generic(struct ixgbe_hw *hw);
  49. int ixgbe_disable_rx_buff_generic(struct ixgbe_hw *hw);
  50. int ixgbe_enable_rx_buff_generic(struct ixgbe_hw *hw);
  51. int ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);
  52. int ixgbe_fc_enable_generic(struct ixgbe_hw *hw);
  53. int ixgbe_setup_fc_generic(struct ixgbe_hw *);
  54. bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw);
  55. void ixgbe_fc_autoneg(struct ixgbe_hw *hw);
  56. int ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask);
  57. void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask);
  58. int ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr);
  59. int ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
  60. int ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq);
  61. int ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
  62. int ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw);
  63. int ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan,
  64. u32 vind, bool vlan_on, bool vlvf_bypass);
  65. int ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);
  66. int ixgbe_check_mac_link_generic(struct ixgbe_hw *hw,
  67. ixgbe_link_speed *speed,
  68. bool *link_up, bool link_up_wait_to_complete);
  69. int ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,
  70. u16 *wwpn_prefix);
  71. int prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val);
  72. int prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked);
  73. int ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index);
  74. int ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index);
  75. void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
  76. void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
  77. int ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps);
  78. int ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,
  79. u8 build, u8 ver, u16 len, const char *str);
  80. u8 ixgbe_calculate_checksum(u8 *buffer, u32 length);
  81. int ixgbe_host_interface_command(struct ixgbe_hw *hw, void *, u32 length,
  82. u32 timeout, bool return_data);
  83. int ixgbe_hic_unlocked(struct ixgbe_hw *hw, u32 *buffer, u32 len, u32 timeout);
  84. int ixgbe_fw_phy_activity(struct ixgbe_hw *hw, u16 activity,
  85. u32 (*data)[FW_PHY_ACT_DATA_COUNT]);
  86. void ixgbe_clear_tx_pending(struct ixgbe_hw *hw);
  87. bool ixgbe_mng_present(struct ixgbe_hw *hw);
  88. bool ixgbe_mng_enabled(struct ixgbe_hw *hw);
  89. void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb,
  90. u32 headroom, int strategy);
  91. extern const u32 ixgbe_mvals_8259X[IXGBE_MVALS_IDX_LIMIT];
  92. #define IXGBE_I2C_THERMAL_SENSOR_ADDR 0xF8
  93. #define IXGBE_EMC_INTERNAL_DATA 0x00
  94. #define IXGBE_EMC_INTERNAL_THERM_LIMIT 0x20
  95. #define IXGBE_EMC_DIODE1_DATA 0x01
  96. #define IXGBE_EMC_DIODE1_THERM_LIMIT 0x19
  97. #define IXGBE_EMC_DIODE2_DATA 0x23
  98. #define IXGBE_EMC_DIODE2_THERM_LIMIT 0x1A
  99. #define IXGBE_EMC_DIODE3_DATA 0x2A
  100. #define IXGBE_EMC_DIODE3_THERM_LIMIT 0x30
  101. int ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw);
  102. int ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw);
  103. void ixgbe_get_etk_id(struct ixgbe_hw *hw,
  104. struct ixgbe_nvm_version *nvm_ver);
  105. void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw,
  106. struct ixgbe_nvm_version *nvm_ver);
  107. void ixgbe_get_orom_version(struct ixgbe_hw *hw,
  108. struct ixgbe_nvm_version *nvm_ver);
  109. void ixgbe_disable_rx_generic(struct ixgbe_hw *hw);
  110. void ixgbe_enable_rx_generic(struct ixgbe_hw *hw);
  111. int ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
  112. ixgbe_link_speed speed,
  113. bool autoneg_wait_to_complete);
  114. void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw,
  115. ixgbe_link_speed speed);
  116. #define IXGBE_FAILED_READ_RETRIES 5
  117. #define IXGBE_FAILED_READ_REG 0xffffffffU
  118. #define IXGBE_FAILED_READ_CFG_DWORD 0xffffffffU
  119. #define IXGBE_FAILED_READ_CFG_WORD 0xffffU
  120. u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg);
  121. void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value);
  122. static inline bool ixgbe_removed(void __iomem *addr)
  123. {
  124. return unlikely(!addr);
  125. }
  126. static inline void ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 value)
  127. {
  128. u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
  129. if (ixgbe_removed(reg_addr))
  130. return;
  131. writel(value, reg_addr + reg);
  132. }
  133. #define IXGBE_WRITE_REG(a, reg, value) ixgbe_write_reg((a), (reg), (value))
  134. #ifndef writeq
  135. #define writeq writeq
  136. static inline void writeq(u64 val, void __iomem *addr)
  137. {
  138. writel((u32)val, addr);
  139. writel((u32)(val >> 32), addr + 4);
  140. }
  141. #endif
  142. static inline void ixgbe_write_reg64(struct ixgbe_hw *hw, u32 reg, u64 value)
  143. {
  144. u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
  145. if (ixgbe_removed(reg_addr))
  146. return;
  147. writeq(value, reg_addr + reg);
  148. }
  149. #define IXGBE_WRITE_REG64(a, reg, value) ixgbe_write_reg64((a), (reg), (value))
  150. u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg);
  151. #define IXGBE_READ_REG(a, reg) ixgbe_read_reg((a), (reg))
  152. #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) \
  153. ixgbe_write_reg((a), (reg) + ((offset) << 2), (value))
  154. #define IXGBE_READ_REG_ARRAY(a, reg, offset) \
  155. ixgbe_read_reg((a), (reg) + ((offset) << 2))
  156. #define IXGBE_WRITE_FLUSH(a) ixgbe_read_reg((a), IXGBE_STATUS)
  157. #define ixgbe_hw_to_netdev(hw) (((struct ixgbe_adapter *)(hw)->back)->netdev)
  158. #define hw_dbg(hw, format, arg...) \
  159. netdev_dbg(ixgbe_hw_to_netdev(hw), format, ## arg)
  160. #define hw_err(hw, format, arg...) \
  161. netdev_err(ixgbe_hw_to_netdev(hw), format, ## arg)
  162. #define e_dev_info(format, arg...) \
  163. dev_info(&adapter->pdev->dev, format, ## arg)
  164. #define e_dev_warn(format, arg...) \
  165. dev_warn(&adapter->pdev->dev, format, ## arg)
  166. #define e_dev_err(format, arg...) \
  167. dev_err(&adapter->pdev->dev, format, ## arg)
  168. #define e_dev_notice(format, arg...) \
  169. dev_notice(&adapter->pdev->dev, format, ## arg)
  170. #define e_dbg(msglvl, format, arg...) \
  171. netif_dbg(adapter, msglvl, adapter->netdev, format, ## arg)
  172. #define e_info(msglvl, format, arg...) \
  173. netif_info(adapter, msglvl, adapter->netdev, format, ## arg)
  174. #define e_err(msglvl, format, arg...) \
  175. netif_err(adapter, msglvl, adapter->netdev, format, ## arg)
  176. #define e_warn(msglvl, format, arg...) \
  177. netif_warn(adapter, msglvl, adapter->netdev, format, ## arg)
  178. #define e_crit(msglvl, format, arg...) \
  179. netif_crit(adapter, msglvl, adapter->netdev, format, ## arg)
  180. #endif /* IXGBE_COMMON */