mtk_eth_path.c 6.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (c) 2018-2019 MediaTek Inc.
  3. /* A library for configuring path from GMAC/GDM to target PHY
  4. *
  5. * Author: Sean Wang <sean.wang@mediatek.com>
  6. *
  7. */
  8. #include <linux/phy.h>
  9. #include <linux/regmap.h>
  10. #include "mtk_eth_soc.h"
  11. struct mtk_eth_muxc {
  12. const char *name;
  13. int cap_bit;
  14. int (*set_path)(struct mtk_eth *eth, u64 path);
  15. };
  16. static const char *mtk_eth_path_name(u64 path)
  17. {
  18. switch (path) {
  19. case MTK_ETH_PATH_GMAC1_RGMII:
  20. return "gmac1_rgmii";
  21. case MTK_ETH_PATH_GMAC1_TRGMII:
  22. return "gmac1_trgmii";
  23. case MTK_ETH_PATH_GMAC1_SGMII:
  24. return "gmac1_sgmii";
  25. case MTK_ETH_PATH_GMAC2_RGMII:
  26. return "gmac2_rgmii";
  27. case MTK_ETH_PATH_GMAC2_SGMII:
  28. return "gmac2_sgmii";
  29. case MTK_ETH_PATH_GMAC2_GEPHY:
  30. return "gmac2_gephy";
  31. case MTK_ETH_PATH_GDM1_ESW:
  32. return "gdm1_esw";
  33. default:
  34. return "unknown path";
  35. }
  36. }
  37. static int set_mux_gdm1_to_gmac1_esw(struct mtk_eth *eth, u64 path)
  38. {
  39. bool updated = true;
  40. u32 mask, set, reg;
  41. switch (path) {
  42. case MTK_ETH_PATH_GMAC1_SGMII:
  43. mask = ~(u32)MTK_MUX_TO_ESW;
  44. set = 0;
  45. break;
  46. case MTK_ETH_PATH_GDM1_ESW:
  47. mask = ~(u32)MTK_MUX_TO_ESW;
  48. set = MTK_MUX_TO_ESW;
  49. break;
  50. default:
  51. updated = false;
  52. break;
  53. }
  54. if (mtk_is_netsys_v3_or_greater(eth))
  55. reg = MTK_MAC_MISC_V3;
  56. else
  57. reg = MTK_MAC_MISC;
  58. if (updated)
  59. mtk_m32(eth, mask, set, reg);
  60. dev_dbg(eth->dev, "path %s in %s updated = %d\n",
  61. mtk_eth_path_name(path), __func__, updated);
  62. return 0;
  63. }
  64. static int set_mux_gmac2_gmac0_to_gephy(struct mtk_eth *eth, u64 path)
  65. {
  66. unsigned int val = 0;
  67. bool updated = true;
  68. switch (path) {
  69. case MTK_ETH_PATH_GMAC2_GEPHY:
  70. val = ~(u32)GEPHY_MAC_SEL;
  71. break;
  72. default:
  73. updated = false;
  74. break;
  75. }
  76. if (updated)
  77. regmap_update_bits(eth->infra, INFRA_MISC2, GEPHY_MAC_SEL, val);
  78. dev_dbg(eth->dev, "path %s in %s updated = %d\n",
  79. mtk_eth_path_name(path), __func__, updated);
  80. return 0;
  81. }
  82. static int set_mux_u3_gmac2_to_qphy(struct mtk_eth *eth, u64 path)
  83. {
  84. unsigned int val = 0, mask = 0, reg = 0;
  85. bool updated = true;
  86. switch (path) {
  87. case MTK_ETH_PATH_GMAC2_SGMII:
  88. if (MTK_HAS_CAPS(eth->soc->caps, MTK_U3_COPHY_V2)) {
  89. reg = USB_PHY_SWITCH_REG;
  90. val = SGMII_QPHY_SEL;
  91. mask = QPHY_SEL_MASK;
  92. } else {
  93. reg = INFRA_MISC2;
  94. val = CO_QPHY_SEL;
  95. mask = val;
  96. }
  97. break;
  98. default:
  99. updated = false;
  100. break;
  101. }
  102. if (updated)
  103. regmap_update_bits(eth->infra, reg, mask, val);
  104. dev_dbg(eth->dev, "path %s in %s updated = %d\n",
  105. mtk_eth_path_name(path), __func__, updated);
  106. return 0;
  107. }
  108. static int set_mux_gmac1_gmac2_to_sgmii_rgmii(struct mtk_eth *eth, u64 path)
  109. {
  110. unsigned int val = 0;
  111. bool updated = true;
  112. switch (path) {
  113. case MTK_ETH_PATH_GMAC1_SGMII:
  114. val = SYSCFG0_SGMII_GMAC1;
  115. break;
  116. case MTK_ETH_PATH_GMAC2_SGMII:
  117. val = SYSCFG0_SGMII_GMAC2;
  118. break;
  119. case MTK_ETH_PATH_GMAC1_RGMII:
  120. case MTK_ETH_PATH_GMAC2_RGMII:
  121. regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val);
  122. val &= SYSCFG0_SGMII_MASK;
  123. if ((path == MTK_GMAC1_RGMII && val == SYSCFG0_SGMII_GMAC1) ||
  124. (path == MTK_GMAC2_RGMII && val == SYSCFG0_SGMII_GMAC2))
  125. val = 0;
  126. else
  127. updated = false;
  128. break;
  129. default:
  130. updated = false;
  131. break;
  132. }
  133. if (updated)
  134. regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0,
  135. SYSCFG0_SGMII_MASK, val);
  136. dev_dbg(eth->dev, "path %s in %s updated = %d\n",
  137. mtk_eth_path_name(path), __func__, updated);
  138. return 0;
  139. }
  140. static int set_mux_gmac12_to_gephy_sgmii(struct mtk_eth *eth, u64 path)
  141. {
  142. unsigned int val = 0;
  143. bool updated = true;
  144. regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val);
  145. switch (path) {
  146. case MTK_ETH_PATH_GMAC1_SGMII:
  147. val |= SYSCFG0_SGMII_GMAC1_V2;
  148. break;
  149. case MTK_ETH_PATH_GMAC2_GEPHY:
  150. val &= ~(u32)SYSCFG0_SGMII_GMAC2_V2;
  151. break;
  152. case MTK_ETH_PATH_GMAC2_SGMII:
  153. val |= SYSCFG0_SGMII_GMAC2_V2;
  154. break;
  155. default:
  156. updated = false;
  157. }
  158. if (updated)
  159. regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0,
  160. SYSCFG0_SGMII_MASK, val);
  161. dev_dbg(eth->dev, "path %s in %s updated = %d\n",
  162. mtk_eth_path_name(path), __func__, updated);
  163. return 0;
  164. }
  165. static const struct mtk_eth_muxc mtk_eth_muxc[] = {
  166. {
  167. .name = "mux_gdm1_to_gmac1_esw",
  168. .cap_bit = MTK_ETH_MUX_GDM1_TO_GMAC1_ESW,
  169. .set_path = set_mux_gdm1_to_gmac1_esw,
  170. }, {
  171. .name = "mux_gmac2_gmac0_to_gephy",
  172. .cap_bit = MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY,
  173. .set_path = set_mux_gmac2_gmac0_to_gephy,
  174. }, {
  175. .name = "mux_u3_gmac2_to_qphy",
  176. .cap_bit = MTK_ETH_MUX_U3_GMAC2_TO_QPHY,
  177. .set_path = set_mux_u3_gmac2_to_qphy,
  178. }, {
  179. .name = "mux_gmac1_gmac2_to_sgmii_rgmii",
  180. .cap_bit = MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII,
  181. .set_path = set_mux_gmac1_gmac2_to_sgmii_rgmii,
  182. }, {
  183. .name = "mux_gmac12_to_gephy_sgmii",
  184. .cap_bit = MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII,
  185. .set_path = set_mux_gmac12_to_gephy_sgmii,
  186. },
  187. };
  188. static int mtk_eth_mux_setup(struct mtk_eth *eth, u64 path)
  189. {
  190. int i, err = 0;
  191. if (!MTK_HAS_CAPS(eth->soc->caps, path)) {
  192. dev_err(eth->dev, "path %s isn't support on the SoC\n",
  193. mtk_eth_path_name(path));
  194. return -EINVAL;
  195. }
  196. if (!MTK_HAS_CAPS(eth->soc->caps, MTK_MUX))
  197. return 0;
  198. /* Setup MUX in path fabric */
  199. for (i = 0; i < ARRAY_SIZE(mtk_eth_muxc); i++) {
  200. if (MTK_HAS_CAPS(eth->soc->caps, mtk_eth_muxc[i].cap_bit)) {
  201. err = mtk_eth_muxc[i].set_path(eth, path);
  202. if (err)
  203. goto out;
  204. } else {
  205. dev_dbg(eth->dev, "mux %s isn't present on the SoC\n",
  206. mtk_eth_muxc[i].name);
  207. }
  208. }
  209. out:
  210. return err;
  211. }
  212. int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id)
  213. {
  214. u64 path;
  215. path = (mac_id == 0) ? MTK_ETH_PATH_GMAC1_SGMII :
  216. MTK_ETH_PATH_GMAC2_SGMII;
  217. /* Setup proper MUXes along the path */
  218. return mtk_eth_mux_setup(eth, path);
  219. }
  220. int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id)
  221. {
  222. u64 path = 0;
  223. if (mac_id == 1)
  224. path = MTK_ETH_PATH_GMAC2_GEPHY;
  225. if (!path)
  226. return -EINVAL;
  227. /* Setup proper MUXes along the path */
  228. return mtk_eth_mux_setup(eth, path);
  229. }
  230. int mtk_gmac_rgmii_path_setup(struct mtk_eth *eth, int mac_id)
  231. {
  232. u64 path;
  233. path = (mac_id == 0) ? MTK_ETH_PATH_GMAC1_RGMII :
  234. MTK_ETH_PATH_GMAC2_RGMII;
  235. /* Setup proper MUXes along the path */
  236. return mtk_eth_mux_setup(eth, path);
  237. }