lan966x_main.c 34 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330
  1. // SPDX-License-Identifier: GPL-2.0+
  2. #include <linux/module.h>
  3. #include <linux/if_bridge.h>
  4. #include <linux/if_vlan.h>
  5. #include <linux/iopoll.h>
  6. #include <linux/ip.h>
  7. #include <linux/of.h>
  8. #include <linux/of_net.h>
  9. #include <linux/phy/phy.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/reset.h>
  12. #include <net/addrconf.h>
  13. #include "lan966x_main.h"
  14. #define XTR_EOF_0 0x00000080U
  15. #define XTR_EOF_1 0x01000080U
  16. #define XTR_EOF_2 0x02000080U
  17. #define XTR_EOF_3 0x03000080U
  18. #define XTR_PRUNED 0x04000080U
  19. #define XTR_ABORT 0x05000080U
  20. #define XTR_ESCAPE 0x06000080U
  21. #define XTR_NOT_READY 0x07000080U
  22. #define XTR_VALID_BYTES(x) (4 - (((x) >> 24) & 3))
  23. #define IO_RANGES 2
  24. static const struct of_device_id lan966x_match[] = {
  25. { .compatible = "microchip,lan966x-switch" },
  26. { }
  27. };
  28. MODULE_DEVICE_TABLE(of, lan966x_match);
  29. struct lan966x_main_io_resource {
  30. enum lan966x_target id;
  31. phys_addr_t offset;
  32. int range;
  33. };
  34. static const struct lan966x_main_io_resource lan966x_main_iomap[] = {
  35. { TARGET_CPU, 0xc0000, 0 }, /* 0xe00c0000 */
  36. { TARGET_FDMA, 0xc0400, 0 }, /* 0xe00c0400 */
  37. { TARGET_ORG, 0, 1 }, /* 0xe2000000 */
  38. { TARGET_GCB, 0x4000, 1 }, /* 0xe2004000 */
  39. { TARGET_QS, 0x8000, 1 }, /* 0xe2008000 */
  40. { TARGET_PTP, 0xc000, 1 }, /* 0xe200c000 */
  41. { TARGET_CHIP_TOP, 0x10000, 1 }, /* 0xe2010000 */
  42. { TARGET_REW, 0x14000, 1 }, /* 0xe2014000 */
  43. { TARGET_VCAP, 0x18000, 1 }, /* 0xe2018000 */
  44. { TARGET_VCAP + 1, 0x20000, 1 }, /* 0xe2020000 */
  45. { TARGET_VCAP + 2, 0x24000, 1 }, /* 0xe2024000 */
  46. { TARGET_SYS, 0x28000, 1 }, /* 0xe2028000 */
  47. { TARGET_DEV, 0x34000, 1 }, /* 0xe2034000 */
  48. { TARGET_DEV + 1, 0x38000, 1 }, /* 0xe2038000 */
  49. { TARGET_DEV + 2, 0x3c000, 1 }, /* 0xe203c000 */
  50. { TARGET_DEV + 3, 0x40000, 1 }, /* 0xe2040000 */
  51. { TARGET_DEV + 4, 0x44000, 1 }, /* 0xe2044000 */
  52. { TARGET_DEV + 5, 0x48000, 1 }, /* 0xe2048000 */
  53. { TARGET_DEV + 6, 0x4c000, 1 }, /* 0xe204c000 */
  54. { TARGET_DEV + 7, 0x50000, 1 }, /* 0xe2050000 */
  55. { TARGET_QSYS, 0x100000, 1 }, /* 0xe2100000 */
  56. { TARGET_AFI, 0x120000, 1 }, /* 0xe2120000 */
  57. { TARGET_ANA, 0x140000, 1 }, /* 0xe2140000 */
  58. };
  59. static int lan966x_create_targets(struct platform_device *pdev,
  60. struct lan966x *lan966x)
  61. {
  62. struct resource *iores[IO_RANGES];
  63. void __iomem *begin[IO_RANGES];
  64. int idx;
  65. /* Initially map the entire range and after that update each target to
  66. * point inside the region at the correct offset. It is possible that
  67. * other devices access the same region so don't add any checks about
  68. * this.
  69. */
  70. for (idx = 0; idx < IO_RANGES; idx++) {
  71. iores[idx] = platform_get_resource(pdev, IORESOURCE_MEM,
  72. idx);
  73. if (!iores[idx]) {
  74. dev_err(&pdev->dev, "Invalid resource\n");
  75. return -EINVAL;
  76. }
  77. begin[idx] = devm_ioremap(&pdev->dev,
  78. iores[idx]->start,
  79. resource_size(iores[idx]));
  80. if (!begin[idx]) {
  81. dev_err(&pdev->dev, "Unable to get registers: %s\n",
  82. iores[idx]->name);
  83. return -ENOMEM;
  84. }
  85. }
  86. for (idx = 0; idx < ARRAY_SIZE(lan966x_main_iomap); idx++) {
  87. const struct lan966x_main_io_resource *iomap =
  88. &lan966x_main_iomap[idx];
  89. lan966x->regs[iomap->id] = begin[iomap->range] + iomap->offset;
  90. }
  91. return 0;
  92. }
  93. static bool lan966x_port_unique_address(struct net_device *dev)
  94. {
  95. struct lan966x_port *port = netdev_priv(dev);
  96. struct lan966x *lan966x = port->lan966x;
  97. int p;
  98. for (p = 0; p < lan966x->num_phys_ports; ++p) {
  99. port = lan966x->ports[p];
  100. if (!port || port->dev == dev)
  101. continue;
  102. if (ether_addr_equal(dev->dev_addr, port->dev->dev_addr))
  103. return false;
  104. }
  105. return true;
  106. }
  107. static int lan966x_port_set_mac_address(struct net_device *dev, void *p)
  108. {
  109. struct lan966x_port *port = netdev_priv(dev);
  110. struct lan966x *lan966x = port->lan966x;
  111. const struct sockaddr *addr = p;
  112. int ret;
  113. if (ether_addr_equal(addr->sa_data, dev->dev_addr))
  114. return 0;
  115. /* Learn the new net device MAC address in the mac table. */
  116. ret = lan966x_mac_cpu_learn(lan966x, addr->sa_data, HOST_PVID);
  117. if (ret)
  118. return ret;
  119. /* If there is another port with the same address as the dev, then don't
  120. * delete it from the MAC table
  121. */
  122. if (!lan966x_port_unique_address(dev))
  123. goto out;
  124. /* Then forget the previous one. */
  125. ret = lan966x_mac_cpu_forget(lan966x, dev->dev_addr, HOST_PVID);
  126. if (ret)
  127. return ret;
  128. out:
  129. eth_hw_addr_set(dev, addr->sa_data);
  130. return ret;
  131. }
  132. static int lan966x_port_get_phys_port_name(struct net_device *dev,
  133. char *buf, size_t len)
  134. {
  135. struct lan966x_port *port = netdev_priv(dev);
  136. int ret;
  137. ret = snprintf(buf, len, "p%d", port->chip_port);
  138. if (ret >= len)
  139. return -EINVAL;
  140. return 0;
  141. }
  142. static int lan966x_port_open(struct net_device *dev)
  143. {
  144. struct lan966x_port *port = netdev_priv(dev);
  145. struct lan966x *lan966x = port->lan966x;
  146. int err;
  147. /* Enable receiving frames on the port, and activate auto-learning of
  148. * MAC addresses.
  149. */
  150. lan_rmw(ANA_PORT_CFG_LEARNAUTO_SET(1) |
  151. ANA_PORT_CFG_RECV_ENA_SET(1) |
  152. ANA_PORT_CFG_PORTID_VAL_SET(port->chip_port),
  153. ANA_PORT_CFG_LEARNAUTO |
  154. ANA_PORT_CFG_RECV_ENA |
  155. ANA_PORT_CFG_PORTID_VAL,
  156. lan966x, ANA_PORT_CFG(port->chip_port));
  157. err = phylink_fwnode_phy_connect(port->phylink, port->fwnode, 0);
  158. if (err) {
  159. netdev_err(dev, "Could not attach to PHY\n");
  160. return err;
  161. }
  162. phylink_start(port->phylink);
  163. return 0;
  164. }
  165. static int lan966x_port_stop(struct net_device *dev)
  166. {
  167. struct lan966x_port *port = netdev_priv(dev);
  168. lan966x_port_config_down(port);
  169. phylink_stop(port->phylink);
  170. phylink_disconnect_phy(port->phylink);
  171. return 0;
  172. }
  173. static int lan966x_port_inj_status(struct lan966x *lan966x)
  174. {
  175. return lan_rd(lan966x, QS_INJ_STATUS);
  176. }
  177. static int lan966x_port_inj_ready(struct lan966x *lan966x, u8 grp)
  178. {
  179. u32 val;
  180. if (lan_rd(lan966x, QS_INJ_STATUS) & QS_INJ_STATUS_FIFO_RDY_SET(BIT(grp)))
  181. return 0;
  182. return readx_poll_timeout_atomic(lan966x_port_inj_status, lan966x, val,
  183. QS_INJ_STATUS_FIFO_RDY_GET(val) & BIT(grp),
  184. READL_SLEEP_US, READL_TIMEOUT_US);
  185. }
  186. static int lan966x_port_ifh_xmit(struct sk_buff *skb,
  187. __be32 *ifh,
  188. struct net_device *dev)
  189. {
  190. struct lan966x_port *port = netdev_priv(dev);
  191. struct lan966x *lan966x = port->lan966x;
  192. u32 i, count, last;
  193. u8 grp = 0;
  194. u32 val;
  195. int err;
  196. val = lan_rd(lan966x, QS_INJ_STATUS);
  197. if (!(QS_INJ_STATUS_FIFO_RDY_GET(val) & BIT(grp)) ||
  198. (QS_INJ_STATUS_WMARK_REACHED_GET(val) & BIT(grp)))
  199. goto err;
  200. /* Write start of frame */
  201. lan_wr(QS_INJ_CTRL_GAP_SIZE_SET(1) |
  202. QS_INJ_CTRL_SOF_SET(1),
  203. lan966x, QS_INJ_CTRL(grp));
  204. /* Write IFH header */
  205. for (i = 0; i < IFH_LEN; ++i) {
  206. /* Wait until the fifo is ready */
  207. err = lan966x_port_inj_ready(lan966x, grp);
  208. if (err)
  209. goto err;
  210. lan_wr((__force u32)ifh[i], lan966x, QS_INJ_WR(grp));
  211. }
  212. /* Write frame */
  213. count = DIV_ROUND_UP(skb->len, 4);
  214. last = skb->len % 4;
  215. for (i = 0; i < count; ++i) {
  216. /* Wait until the fifo is ready */
  217. err = lan966x_port_inj_ready(lan966x, grp);
  218. if (err)
  219. goto err;
  220. lan_wr(((u32 *)skb->data)[i], lan966x, QS_INJ_WR(grp));
  221. }
  222. /* Add padding */
  223. while (i < (LAN966X_BUFFER_MIN_SZ / 4)) {
  224. /* Wait until the fifo is ready */
  225. err = lan966x_port_inj_ready(lan966x, grp);
  226. if (err)
  227. goto err;
  228. lan_wr(0, lan966x, QS_INJ_WR(grp));
  229. ++i;
  230. }
  231. /* Indicate EOF and valid bytes in the last word */
  232. lan_wr(QS_INJ_CTRL_GAP_SIZE_SET(1) |
  233. QS_INJ_CTRL_VLD_BYTES_SET(skb->len < LAN966X_BUFFER_MIN_SZ ?
  234. 0 : last) |
  235. QS_INJ_CTRL_EOF_SET(1),
  236. lan966x, QS_INJ_CTRL(grp));
  237. /* Add dummy CRC */
  238. lan_wr(0, lan966x, QS_INJ_WR(grp));
  239. skb_tx_timestamp(skb);
  240. dev->stats.tx_packets++;
  241. dev->stats.tx_bytes += skb->len;
  242. if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
  243. LAN966X_SKB_CB(skb)->rew_op == IFH_REW_OP_TWO_STEP_PTP)
  244. return NETDEV_TX_OK;
  245. dev_consume_skb_any(skb);
  246. return NETDEV_TX_OK;
  247. err:
  248. if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
  249. LAN966X_SKB_CB(skb)->rew_op == IFH_REW_OP_TWO_STEP_PTP)
  250. lan966x_ptp_txtstamp_release(port, skb);
  251. return NETDEV_TX_BUSY;
  252. }
  253. static void lan966x_ifh_set(u8 *ifh, size_t val, size_t pos, size_t length)
  254. {
  255. int i = 0;
  256. do {
  257. u8 p = IFH_LEN_BYTES - (pos + i) / 8 - 1;
  258. u8 v = val >> i & 0xff;
  259. /* There is no need to check for limits of the array, as these
  260. * will never be written
  261. */
  262. ifh[p] |= v << ((pos + i) % 8);
  263. ifh[p - 1] |= v >> (8 - (pos + i) % 8);
  264. i += 8;
  265. } while (i < length);
  266. }
  267. void lan966x_ifh_set_bypass(void *ifh, u64 bypass)
  268. {
  269. lan966x_ifh_set(ifh, bypass, IFH_POS_BYPASS, IFH_WID_BYPASS);
  270. }
  271. void lan966x_ifh_set_port(void *ifh, u64 port)
  272. {
  273. lan966x_ifh_set(ifh, port, IFH_POS_DSTS, IFH_WID_DSTS);
  274. }
  275. static void lan966x_ifh_set_qos_class(void *ifh, u64 qos)
  276. {
  277. lan966x_ifh_set(ifh, qos, IFH_POS_QOS_CLASS, IFH_WID_QOS_CLASS);
  278. }
  279. static void lan966x_ifh_set_ipv(void *ifh, u64 ipv)
  280. {
  281. lan966x_ifh_set(ifh, ipv, IFH_POS_IPV, IFH_WID_IPV);
  282. }
  283. static void lan966x_ifh_set_vid(void *ifh, u64 vid)
  284. {
  285. lan966x_ifh_set(ifh, vid, IFH_POS_TCI, IFH_WID_TCI);
  286. }
  287. static void lan966x_ifh_set_rew_op(void *ifh, u64 rew_op)
  288. {
  289. lan966x_ifh_set(ifh, rew_op, IFH_POS_REW_CMD, IFH_WID_REW_CMD);
  290. }
  291. static void lan966x_ifh_set_oam_type(void *ifh, u64 oam_type)
  292. {
  293. lan966x_ifh_set(ifh, oam_type, IFH_POS_PDU_TYPE, IFH_WID_PDU_TYPE);
  294. }
  295. static void lan966x_ifh_set_timestamp(void *ifh, u64 timestamp)
  296. {
  297. lan966x_ifh_set(ifh, timestamp, IFH_POS_TIMESTAMP, IFH_WID_TIMESTAMP);
  298. }
  299. static netdev_tx_t lan966x_port_xmit(struct sk_buff *skb,
  300. struct net_device *dev)
  301. {
  302. struct lan966x_port *port = netdev_priv(dev);
  303. struct lan966x *lan966x = port->lan966x;
  304. __be32 ifh[IFH_LEN];
  305. int err;
  306. memset(ifh, 0x0, sizeof(__be32) * IFH_LEN);
  307. lan966x_ifh_set_bypass(ifh, 1);
  308. lan966x_ifh_set_port(ifh, BIT_ULL(port->chip_port));
  309. lan966x_ifh_set_qos_class(ifh, skb->priority >= 7 ? 0x7 : skb->priority);
  310. lan966x_ifh_set_ipv(ifh, skb->priority >= 7 ? 0x7 : skb->priority);
  311. lan966x_ifh_set_vid(ifh, skb_vlan_tag_get(skb));
  312. if (port->lan966x->ptp && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {
  313. err = lan966x_ptp_txtstamp_request(port, skb);
  314. if (err)
  315. return err;
  316. lan966x_ifh_set_rew_op(ifh, LAN966X_SKB_CB(skb)->rew_op);
  317. lan966x_ifh_set_oam_type(ifh, LAN966X_SKB_CB(skb)->pdu_type);
  318. lan966x_ifh_set_timestamp(ifh, LAN966X_SKB_CB(skb)->ts_id);
  319. }
  320. spin_lock(&lan966x->tx_lock);
  321. if (port->lan966x->fdma)
  322. err = lan966x_fdma_xmit(skb, ifh, dev);
  323. else
  324. err = lan966x_port_ifh_xmit(skb, ifh, dev);
  325. spin_unlock(&lan966x->tx_lock);
  326. return err;
  327. }
  328. static int lan966x_port_change_mtu(struct net_device *dev, int new_mtu)
  329. {
  330. struct lan966x_port *port = netdev_priv(dev);
  331. struct lan966x *lan966x = port->lan966x;
  332. int old_mtu = dev->mtu;
  333. int err;
  334. lan_wr(DEV_MAC_MAXLEN_CFG_MAX_LEN_SET(LAN966X_HW_MTU(new_mtu)),
  335. lan966x, DEV_MAC_MAXLEN_CFG(port->chip_port));
  336. WRITE_ONCE(dev->mtu, new_mtu);
  337. if (!lan966x->fdma)
  338. return 0;
  339. err = lan966x_fdma_change_mtu(lan966x);
  340. if (err) {
  341. lan_wr(DEV_MAC_MAXLEN_CFG_MAX_LEN_SET(LAN966X_HW_MTU(old_mtu)),
  342. lan966x, DEV_MAC_MAXLEN_CFG(port->chip_port));
  343. dev->mtu = old_mtu;
  344. }
  345. return err;
  346. }
  347. static int lan966x_mc_unsync(struct net_device *dev, const unsigned char *addr)
  348. {
  349. struct lan966x_port *port = netdev_priv(dev);
  350. struct lan966x *lan966x = port->lan966x;
  351. return lan966x_mac_forget(lan966x, addr, HOST_PVID, ENTRYTYPE_LOCKED);
  352. }
  353. static int lan966x_mc_sync(struct net_device *dev, const unsigned char *addr)
  354. {
  355. struct lan966x_port *port = netdev_priv(dev);
  356. struct lan966x *lan966x = port->lan966x;
  357. return lan966x_mac_cpu_learn(lan966x, addr, HOST_PVID);
  358. }
  359. static void lan966x_port_set_rx_mode(struct net_device *dev)
  360. {
  361. __dev_mc_sync(dev, lan966x_mc_sync, lan966x_mc_unsync);
  362. }
  363. static int lan966x_port_get_parent_id(struct net_device *dev,
  364. struct netdev_phys_item_id *ppid)
  365. {
  366. struct lan966x_port *port = netdev_priv(dev);
  367. struct lan966x *lan966x = port->lan966x;
  368. ppid->id_len = sizeof(lan966x->base_mac);
  369. memcpy(&ppid->id, &lan966x->base_mac, ppid->id_len);
  370. return 0;
  371. }
  372. static int lan966x_port_hwtstamp_get(struct net_device *dev,
  373. struct kernel_hwtstamp_config *cfg)
  374. {
  375. struct lan966x_port *port = netdev_priv(dev);
  376. if (!port->lan966x->ptp)
  377. return -EOPNOTSUPP;
  378. lan966x_ptp_hwtstamp_get(port, cfg);
  379. return 0;
  380. }
  381. static int lan966x_port_hwtstamp_set(struct net_device *dev,
  382. struct kernel_hwtstamp_config *cfg,
  383. struct netlink_ext_ack *extack)
  384. {
  385. struct lan966x_port *port = netdev_priv(dev);
  386. int err;
  387. if (cfg->source != HWTSTAMP_SOURCE_NETDEV &&
  388. cfg->source != HWTSTAMP_SOURCE_PHYLIB)
  389. return -EOPNOTSUPP;
  390. if (cfg->source == HWTSTAMP_SOURCE_NETDEV && !port->lan966x->ptp)
  391. return -EOPNOTSUPP;
  392. err = lan966x_ptp_setup_traps(port, cfg);
  393. if (err)
  394. return err;
  395. if (cfg->source == HWTSTAMP_SOURCE_NETDEV) {
  396. err = lan966x_ptp_hwtstamp_set(port, cfg, extack);
  397. if (err) {
  398. lan966x_ptp_del_traps(port);
  399. return err;
  400. }
  401. }
  402. return 0;
  403. }
  404. static const struct net_device_ops lan966x_port_netdev_ops = {
  405. .ndo_open = lan966x_port_open,
  406. .ndo_stop = lan966x_port_stop,
  407. .ndo_start_xmit = lan966x_port_xmit,
  408. .ndo_change_mtu = lan966x_port_change_mtu,
  409. .ndo_set_rx_mode = lan966x_port_set_rx_mode,
  410. .ndo_get_phys_port_name = lan966x_port_get_phys_port_name,
  411. .ndo_get_stats64 = lan966x_stats_get,
  412. .ndo_set_mac_address = lan966x_port_set_mac_address,
  413. .ndo_get_port_parent_id = lan966x_port_get_parent_id,
  414. .ndo_eth_ioctl = phy_do_ioctl,
  415. .ndo_setup_tc = lan966x_tc_setup,
  416. .ndo_bpf = lan966x_xdp,
  417. .ndo_xdp_xmit = lan966x_xdp_xmit,
  418. .ndo_hwtstamp_get = lan966x_port_hwtstamp_get,
  419. .ndo_hwtstamp_set = lan966x_port_hwtstamp_set,
  420. };
  421. bool lan966x_netdevice_check(const struct net_device *dev)
  422. {
  423. return dev->netdev_ops == &lan966x_port_netdev_ops;
  424. }
  425. bool lan966x_hw_offload(struct lan966x *lan966x, u32 port, struct sk_buff *skb)
  426. {
  427. u32 val;
  428. /* The IGMP and MLD frames are not forward by the HW if
  429. * multicast snooping is enabled, therefore don't mark as
  430. * offload to allow the SW to forward the frames accordingly.
  431. */
  432. val = lan_rd(lan966x, ANA_CPU_FWD_CFG(port));
  433. if (!(val & (ANA_CPU_FWD_CFG_IGMP_REDIR_ENA |
  434. ANA_CPU_FWD_CFG_MLD_REDIR_ENA)))
  435. return true;
  436. if (eth_type_vlan(skb->protocol)) {
  437. skb = skb_vlan_untag(skb);
  438. if (unlikely(!skb))
  439. return false;
  440. }
  441. if (skb->protocol == htons(ETH_P_IP) &&
  442. ip_hdr(skb)->protocol == IPPROTO_IGMP)
  443. return false;
  444. if (IS_ENABLED(CONFIG_IPV6) &&
  445. skb->protocol == htons(ETH_P_IPV6) &&
  446. ipv6_addr_is_multicast(&ipv6_hdr(skb)->daddr) &&
  447. !ipv6_mc_check_mld(skb))
  448. return false;
  449. return true;
  450. }
  451. static int lan966x_port_xtr_status(struct lan966x *lan966x, u8 grp)
  452. {
  453. return lan_rd(lan966x, QS_XTR_RD(grp));
  454. }
  455. static int lan966x_port_xtr_ready(struct lan966x *lan966x, u8 grp)
  456. {
  457. u32 val;
  458. return read_poll_timeout(lan966x_port_xtr_status, val,
  459. val != XTR_NOT_READY,
  460. READL_SLEEP_US, READL_TIMEOUT_US, false,
  461. lan966x, grp);
  462. }
  463. static int lan966x_rx_frame_word(struct lan966x *lan966x, u8 grp, u32 *rval)
  464. {
  465. u32 bytes_valid;
  466. u32 val;
  467. int err;
  468. val = lan_rd(lan966x, QS_XTR_RD(grp));
  469. if (val == XTR_NOT_READY) {
  470. err = lan966x_port_xtr_ready(lan966x, grp);
  471. if (err)
  472. return -EIO;
  473. }
  474. switch (val) {
  475. case XTR_ABORT:
  476. return -EIO;
  477. case XTR_EOF_0:
  478. case XTR_EOF_1:
  479. case XTR_EOF_2:
  480. case XTR_EOF_3:
  481. case XTR_PRUNED:
  482. bytes_valid = XTR_VALID_BYTES(val);
  483. val = lan_rd(lan966x, QS_XTR_RD(grp));
  484. if (val == XTR_ESCAPE)
  485. *rval = lan_rd(lan966x, QS_XTR_RD(grp));
  486. else
  487. *rval = val;
  488. return bytes_valid;
  489. case XTR_ESCAPE:
  490. *rval = lan_rd(lan966x, QS_XTR_RD(grp));
  491. return 4;
  492. default:
  493. *rval = val;
  494. return 4;
  495. }
  496. }
  497. static u64 lan966x_ifh_get(u8 *ifh, size_t pos, size_t length)
  498. {
  499. u64 val = 0;
  500. u8 v;
  501. for (int i = 0; i < length ; i++) {
  502. int j = pos + i;
  503. int k = j % 8;
  504. if (i == 0 || k == 0)
  505. v = ifh[IFH_LEN_BYTES - (j / 8) - 1];
  506. if (v & (1 << k))
  507. val |= (1ULL << i);
  508. }
  509. return val;
  510. }
  511. void lan966x_ifh_get_src_port(void *ifh, u64 *src_port)
  512. {
  513. *src_port = lan966x_ifh_get(ifh, IFH_POS_SRCPORT, IFH_WID_SRCPORT);
  514. }
  515. static void lan966x_ifh_get_len(void *ifh, u64 *len)
  516. {
  517. *len = lan966x_ifh_get(ifh, IFH_POS_LEN, IFH_WID_LEN);
  518. }
  519. void lan966x_ifh_get_timestamp(void *ifh, u64 *timestamp)
  520. {
  521. *timestamp = lan966x_ifh_get(ifh, IFH_POS_TIMESTAMP, IFH_WID_TIMESTAMP);
  522. }
  523. static irqreturn_t lan966x_xtr_irq_handler(int irq, void *args)
  524. {
  525. struct lan966x *lan966x = args;
  526. int i, grp = 0, err = 0;
  527. if (!(lan_rd(lan966x, QS_XTR_DATA_PRESENT) & BIT(grp)))
  528. return IRQ_NONE;
  529. do {
  530. u64 src_port, len, timestamp;
  531. struct net_device *dev;
  532. struct sk_buff *skb;
  533. int sz = 0, buf_len;
  534. u32 ifh[IFH_LEN];
  535. u32 *buf;
  536. u32 val;
  537. for (i = 0; i < IFH_LEN; i++) {
  538. err = lan966x_rx_frame_word(lan966x, grp, &ifh[i]);
  539. if (err != 4)
  540. goto recover;
  541. }
  542. err = 0;
  543. lan966x_ifh_get_src_port(ifh, &src_port);
  544. lan966x_ifh_get_len(ifh, &len);
  545. lan966x_ifh_get_timestamp(ifh, &timestamp);
  546. WARN_ON(src_port >= lan966x->num_phys_ports);
  547. dev = lan966x->ports[src_port]->dev;
  548. skb = netdev_alloc_skb(dev, len);
  549. if (unlikely(!skb)) {
  550. netdev_err(dev, "Unable to allocate sk_buff\n");
  551. break;
  552. }
  553. buf_len = len - ETH_FCS_LEN;
  554. buf = (u32 *)skb_put(skb, buf_len);
  555. len = 0;
  556. do {
  557. sz = lan966x_rx_frame_word(lan966x, grp, &val);
  558. if (sz < 0) {
  559. kfree_skb(skb);
  560. goto recover;
  561. }
  562. *buf++ = val;
  563. len += sz;
  564. } while (len < buf_len);
  565. /* Read the FCS */
  566. sz = lan966x_rx_frame_word(lan966x, grp, &val);
  567. if (sz < 0) {
  568. kfree_skb(skb);
  569. goto recover;
  570. }
  571. /* Update the statistics if part of the FCS was read before */
  572. len -= ETH_FCS_LEN - sz;
  573. if (unlikely(dev->features & NETIF_F_RXFCS)) {
  574. buf = (u32 *)skb_put(skb, ETH_FCS_LEN);
  575. *buf = val;
  576. }
  577. lan966x_ptp_rxtstamp(lan966x, skb, src_port, timestamp);
  578. skb->protocol = eth_type_trans(skb, dev);
  579. if (lan966x->bridge_mask & BIT(src_port)) {
  580. skb->offload_fwd_mark = 1;
  581. skb_reset_network_header(skb);
  582. if (!lan966x_hw_offload(lan966x, src_port, skb))
  583. skb->offload_fwd_mark = 0;
  584. }
  585. if (!skb_defer_rx_timestamp(skb))
  586. netif_rx(skb);
  587. dev->stats.rx_bytes += len;
  588. dev->stats.rx_packets++;
  589. recover:
  590. if (sz < 0 || err)
  591. lan_rd(lan966x, QS_XTR_RD(grp));
  592. } while (lan_rd(lan966x, QS_XTR_DATA_PRESENT) & BIT(grp));
  593. return IRQ_HANDLED;
  594. }
  595. static irqreturn_t lan966x_ana_irq_handler(int irq, void *args)
  596. {
  597. struct lan966x *lan966x = args;
  598. return lan966x_mac_irq_handler(lan966x);
  599. }
  600. static void lan966x_cleanup_ports(struct lan966x *lan966x)
  601. {
  602. struct lan966x_port *port;
  603. int p;
  604. for (p = 0; p < lan966x->num_phys_ports; p++) {
  605. port = lan966x->ports[p];
  606. if (!port)
  607. continue;
  608. if (port->dev)
  609. unregister_netdev(port->dev);
  610. lan966x_xdp_port_deinit(port);
  611. if (lan966x->fdma && lan966x->fdma_ndev == port->dev)
  612. lan966x_fdma_netdev_deinit(lan966x, port->dev);
  613. if (port->phylink) {
  614. rtnl_lock();
  615. lan966x_port_stop(port->dev);
  616. rtnl_unlock();
  617. phylink_destroy(port->phylink);
  618. port->phylink = NULL;
  619. }
  620. if (port->fwnode)
  621. fwnode_handle_put(port->fwnode);
  622. }
  623. disable_irq(lan966x->xtr_irq);
  624. lan966x->xtr_irq = -ENXIO;
  625. if (lan966x->ana_irq > 0) {
  626. disable_irq(lan966x->ana_irq);
  627. lan966x->ana_irq = -ENXIO;
  628. }
  629. if (lan966x->fdma)
  630. devm_free_irq(lan966x->dev, lan966x->fdma_irq, lan966x);
  631. if (lan966x->ptp_irq > 0)
  632. devm_free_irq(lan966x->dev, lan966x->ptp_irq, lan966x);
  633. if (lan966x->ptp_ext_irq > 0)
  634. devm_free_irq(lan966x->dev, lan966x->ptp_ext_irq, lan966x);
  635. }
  636. static int lan966x_probe_port(struct lan966x *lan966x, u32 p,
  637. phy_interface_t phy_mode,
  638. struct fwnode_handle *portnp)
  639. {
  640. struct lan966x_port *port;
  641. struct phylink *phylink;
  642. struct net_device *dev;
  643. int err;
  644. if (p >= lan966x->num_phys_ports)
  645. return -EINVAL;
  646. dev = devm_alloc_etherdev_mqs(lan966x->dev,
  647. sizeof(struct lan966x_port),
  648. NUM_PRIO_QUEUES, 1);
  649. if (!dev)
  650. return -ENOMEM;
  651. SET_NETDEV_DEV(dev, lan966x->dev);
  652. port = netdev_priv(dev);
  653. port->dev = dev;
  654. port->lan966x = lan966x;
  655. port->chip_port = p;
  656. lan966x->ports[p] = port;
  657. dev->max_mtu = ETH_MAX_MTU;
  658. dev->netdev_ops = &lan966x_port_netdev_ops;
  659. dev->ethtool_ops = &lan966x_ethtool_ops;
  660. dev->features |= NETIF_F_HW_VLAN_CTAG_TX |
  661. NETIF_F_HW_VLAN_STAG_TX |
  662. NETIF_F_HW_TC;
  663. dev->hw_features |= NETIF_F_HW_TC;
  664. dev->see_all_hwtstamp_requests = true;
  665. dev->needed_headroom = IFH_LEN_BYTES;
  666. eth_hw_addr_gen(dev, lan966x->base_mac, p + 1);
  667. lan966x_mac_learn(lan966x, PGID_CPU, dev->dev_addr, HOST_PVID,
  668. ENTRYTYPE_LOCKED);
  669. port->phylink_config.dev = &port->dev->dev;
  670. port->phylink_config.type = PHYLINK_NETDEV;
  671. port->phylink_pcs.poll = true;
  672. port->phylink_pcs.ops = &lan966x_phylink_pcs_ops;
  673. port->phylink_pcs.neg_mode = true;
  674. port->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
  675. MAC_10 | MAC_100 | MAC_1000FD | MAC_2500FD;
  676. phy_interface_set_rgmii(port->phylink_config.supported_interfaces);
  677. __set_bit(PHY_INTERFACE_MODE_MII,
  678. port->phylink_config.supported_interfaces);
  679. __set_bit(PHY_INTERFACE_MODE_GMII,
  680. port->phylink_config.supported_interfaces);
  681. __set_bit(PHY_INTERFACE_MODE_SGMII,
  682. port->phylink_config.supported_interfaces);
  683. __set_bit(PHY_INTERFACE_MODE_QSGMII,
  684. port->phylink_config.supported_interfaces);
  685. __set_bit(PHY_INTERFACE_MODE_QUSGMII,
  686. port->phylink_config.supported_interfaces);
  687. __set_bit(PHY_INTERFACE_MODE_1000BASEX,
  688. port->phylink_config.supported_interfaces);
  689. __set_bit(PHY_INTERFACE_MODE_2500BASEX,
  690. port->phylink_config.supported_interfaces);
  691. phylink = phylink_create(&port->phylink_config,
  692. portnp,
  693. phy_mode,
  694. &lan966x_phylink_mac_ops);
  695. if (IS_ERR(phylink)) {
  696. port->dev = NULL;
  697. return PTR_ERR(phylink);
  698. }
  699. port->phylink = phylink;
  700. if (lan966x->fdma)
  701. dev->xdp_features = NETDEV_XDP_ACT_BASIC |
  702. NETDEV_XDP_ACT_REDIRECT |
  703. NETDEV_XDP_ACT_NDO_XMIT;
  704. err = register_netdev(dev);
  705. if (err) {
  706. dev_err(lan966x->dev, "register_netdev failed\n");
  707. return err;
  708. }
  709. lan966x_vlan_port_set_vlan_aware(port, 0);
  710. lan966x_vlan_port_set_vid(port, HOST_PVID, false, false);
  711. lan966x_vlan_port_apply(port);
  712. lan966x_vlan_port_rew_host(port);
  713. return 0;
  714. }
  715. static void lan966x_init(struct lan966x *lan966x)
  716. {
  717. u32 p, i;
  718. /* MAC table initialization */
  719. lan966x_mac_init(lan966x);
  720. lan966x_vlan_init(lan966x);
  721. /* Flush queues */
  722. lan_wr(lan_rd(lan966x, QS_XTR_FLUSH) |
  723. GENMASK(1, 0),
  724. lan966x, QS_XTR_FLUSH);
  725. /* Allow to drain */
  726. mdelay(1);
  727. /* All Queues normal */
  728. lan_wr(lan_rd(lan966x, QS_XTR_FLUSH) &
  729. ~(GENMASK(1, 0)),
  730. lan966x, QS_XTR_FLUSH);
  731. /* Set MAC age time to default value, the entry is aged after
  732. * 2 * AGE_PERIOD
  733. */
  734. lan_wr(ANA_AUTOAGE_AGE_PERIOD_SET(BR_DEFAULT_AGEING_TIME / 2 / HZ),
  735. lan966x, ANA_AUTOAGE);
  736. /* Disable learning for frames discarded by VLAN ingress filtering */
  737. lan_rmw(ANA_ADVLEARN_VLAN_CHK_SET(1),
  738. ANA_ADVLEARN_VLAN_CHK,
  739. lan966x, ANA_ADVLEARN);
  740. /* Setup frame ageing - "2 sec" - The unit is 6.5 us on lan966x */
  741. lan_wr(SYS_FRM_AGING_AGE_TX_ENA_SET(1) |
  742. (20000000 / 65),
  743. lan966x, SYS_FRM_AGING);
  744. /* Map the 8 CPU extraction queues to CPU port */
  745. lan_wr(0, lan966x, QSYS_CPU_GROUP_MAP);
  746. /* Do byte-swap and expect status after last data word
  747. * Extraction: Mode: manual extraction) | Byte_swap
  748. */
  749. lan_wr(QS_XTR_GRP_CFG_MODE_SET(lan966x->fdma ? 2 : 1) |
  750. QS_XTR_GRP_CFG_BYTE_SWAP_SET(1),
  751. lan966x, QS_XTR_GRP_CFG(0));
  752. /* Injection: Mode: manual injection | Byte_swap */
  753. lan_wr(QS_INJ_GRP_CFG_MODE_SET(lan966x->fdma ? 2 : 1) |
  754. QS_INJ_GRP_CFG_BYTE_SWAP_SET(1),
  755. lan966x, QS_INJ_GRP_CFG(0));
  756. lan_rmw(QS_INJ_CTRL_GAP_SIZE_SET(0),
  757. QS_INJ_CTRL_GAP_SIZE,
  758. lan966x, QS_INJ_CTRL(0));
  759. /* Enable IFH insertion/parsing on CPU ports */
  760. lan_wr(SYS_PORT_MODE_INCL_INJ_HDR_SET(1) |
  761. SYS_PORT_MODE_INCL_XTR_HDR_SET(1),
  762. lan966x, SYS_PORT_MODE(CPU_PORT));
  763. /* Setup flooding PGIDs */
  764. lan_wr(ANA_FLOODING_IPMC_FLD_MC4_DATA_SET(PGID_MCIPV4) |
  765. ANA_FLOODING_IPMC_FLD_MC4_CTRL_SET(PGID_MC) |
  766. ANA_FLOODING_IPMC_FLD_MC6_DATA_SET(PGID_MCIPV6) |
  767. ANA_FLOODING_IPMC_FLD_MC6_CTRL_SET(PGID_MC),
  768. lan966x, ANA_FLOODING_IPMC);
  769. /* There are 8 priorities */
  770. for (i = 0; i < 8; ++i)
  771. lan_rmw(ANA_FLOODING_FLD_MULTICAST_SET(PGID_MC) |
  772. ANA_FLOODING_FLD_UNICAST_SET(PGID_UC) |
  773. ANA_FLOODING_FLD_BROADCAST_SET(PGID_BC),
  774. ANA_FLOODING_FLD_MULTICAST |
  775. ANA_FLOODING_FLD_UNICAST |
  776. ANA_FLOODING_FLD_BROADCAST,
  777. lan966x, ANA_FLOODING(i));
  778. for (i = 0; i < PGID_ENTRIES; ++i)
  779. /* Set all the entries to obey VLAN_VLAN */
  780. lan_rmw(ANA_PGID_CFG_OBEY_VLAN_SET(1),
  781. ANA_PGID_CFG_OBEY_VLAN,
  782. lan966x, ANA_PGID_CFG(i));
  783. for (p = 0; p < lan966x->num_phys_ports; p++) {
  784. /* Disable bridging by default */
  785. lan_rmw(ANA_PGID_PGID_SET(0x0),
  786. ANA_PGID_PGID,
  787. lan966x, ANA_PGID(p + PGID_SRC));
  788. /* Do not forward BPDU frames to the front ports and copy them
  789. * to CPU
  790. */
  791. lan_wr(0xffff, lan966x, ANA_CPU_FWD_BPDU_CFG(p));
  792. }
  793. /* Set source buffer size for each priority and each port to 1500 bytes */
  794. for (i = 0; i <= QSYS_Q_RSRV; ++i) {
  795. lan_wr(1500 / 64, lan966x, QSYS_RES_CFG(i));
  796. lan_wr(1500 / 64, lan966x, QSYS_RES_CFG(512 + i));
  797. }
  798. /* Enable switching to/from cpu port */
  799. lan_wr(QSYS_SW_PORT_MODE_PORT_ENA_SET(1) |
  800. QSYS_SW_PORT_MODE_SCH_NEXT_CFG_SET(1) |
  801. QSYS_SW_PORT_MODE_INGRESS_DROP_MODE_SET(1),
  802. lan966x, QSYS_SW_PORT_MODE(CPU_PORT));
  803. /* Configure and enable the CPU port */
  804. lan_rmw(ANA_PGID_PGID_SET(0),
  805. ANA_PGID_PGID,
  806. lan966x, ANA_PGID(CPU_PORT));
  807. lan_rmw(ANA_PGID_PGID_SET(BIT(CPU_PORT)),
  808. ANA_PGID_PGID,
  809. lan966x, ANA_PGID(PGID_CPU));
  810. /* Multicast to all other ports */
  811. lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0),
  812. ANA_PGID_PGID,
  813. lan966x, ANA_PGID(PGID_MC));
  814. /* This will be controlled by mrouter ports */
  815. lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0),
  816. ANA_PGID_PGID,
  817. lan966x, ANA_PGID(PGID_MCIPV4));
  818. lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0),
  819. ANA_PGID_PGID,
  820. lan966x, ANA_PGID(PGID_MCIPV6));
  821. /* Unicast to all other ports */
  822. lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0),
  823. ANA_PGID_PGID,
  824. lan966x, ANA_PGID(PGID_UC));
  825. /* Broadcast to the CPU port and to other ports */
  826. lan_rmw(ANA_PGID_PGID_SET(BIT(CPU_PORT) | GENMASK(lan966x->num_phys_ports - 1, 0)),
  827. ANA_PGID_PGID,
  828. lan966x, ANA_PGID(PGID_BC));
  829. lan_wr(REW_PORT_CFG_NO_REWRITE_SET(1),
  830. lan966x, REW_PORT_CFG(CPU_PORT));
  831. lan_rmw(ANA_ANAINTR_INTR_ENA_SET(1),
  832. ANA_ANAINTR_INTR_ENA,
  833. lan966x, ANA_ANAINTR);
  834. spin_lock_init(&lan966x->tx_lock);
  835. lan966x_taprio_init(lan966x);
  836. }
  837. static int lan966x_ram_init(struct lan966x *lan966x)
  838. {
  839. return lan_rd(lan966x, SYS_RAM_INIT);
  840. }
  841. static int lan966x_reset_switch(struct lan966x *lan966x)
  842. {
  843. struct reset_control *switch_reset;
  844. int val = 0;
  845. int ret;
  846. switch_reset = devm_reset_control_get_optional_shared(lan966x->dev,
  847. "switch");
  848. if (IS_ERR(switch_reset))
  849. return dev_err_probe(lan966x->dev, PTR_ERR(switch_reset),
  850. "Could not obtain switch reset");
  851. reset_control_reset(switch_reset);
  852. /* Don't reinitialize the switch core, if it is already initialized. In
  853. * case it is initialized twice, some pointers inside the queue system
  854. * in HW will get corrupted and then after a while the queue system gets
  855. * full and no traffic is passing through the switch. The issue is seen
  856. * when loading and unloading the driver and sending traffic through the
  857. * switch.
  858. */
  859. if (lan_rd(lan966x, SYS_RESET_CFG) & SYS_RESET_CFG_CORE_ENA)
  860. return 0;
  861. lan_wr(SYS_RESET_CFG_CORE_ENA_SET(0), lan966x, SYS_RESET_CFG);
  862. lan_wr(SYS_RAM_INIT_RAM_INIT_SET(1), lan966x, SYS_RAM_INIT);
  863. ret = readx_poll_timeout(lan966x_ram_init, lan966x,
  864. val, (val & BIT(1)) == 0, READL_SLEEP_US,
  865. READL_TIMEOUT_US);
  866. if (ret)
  867. return ret;
  868. lan_wr(SYS_RESET_CFG_CORE_ENA_SET(1), lan966x, SYS_RESET_CFG);
  869. return 0;
  870. }
  871. static int lan966x_probe(struct platform_device *pdev)
  872. {
  873. struct fwnode_handle *ports, *portnp;
  874. struct lan966x *lan966x;
  875. u8 mac_addr[ETH_ALEN];
  876. int err;
  877. lan966x = devm_kzalloc(&pdev->dev, sizeof(*lan966x), GFP_KERNEL);
  878. if (!lan966x)
  879. return -ENOMEM;
  880. platform_set_drvdata(pdev, lan966x);
  881. lan966x->dev = &pdev->dev;
  882. if (!device_get_mac_address(&pdev->dev, mac_addr)) {
  883. ether_addr_copy(lan966x->base_mac, mac_addr);
  884. } else {
  885. pr_info("MAC addr was not set, use random MAC\n");
  886. eth_random_addr(lan966x->base_mac);
  887. lan966x->base_mac[5] &= 0xf0;
  888. }
  889. err = lan966x_create_targets(pdev, lan966x);
  890. if (err)
  891. return dev_err_probe(&pdev->dev, err,
  892. "Failed to create targets");
  893. err = lan966x_reset_switch(lan966x);
  894. if (err)
  895. return dev_err_probe(&pdev->dev, err, "Reset failed");
  896. lan966x->num_phys_ports = NUM_PHYS_PORTS;
  897. lan966x->ports = devm_kcalloc(&pdev->dev, lan966x->num_phys_ports,
  898. sizeof(struct lan966x_port *),
  899. GFP_KERNEL);
  900. if (!lan966x->ports)
  901. return -ENOMEM;
  902. /* There QS system has 32KB of memory */
  903. lan966x->shared_queue_sz = LAN966X_BUFFER_MEMORY;
  904. /* set irq */
  905. lan966x->xtr_irq = platform_get_irq_byname(pdev, "xtr");
  906. if (lan966x->xtr_irq < 0)
  907. return lan966x->xtr_irq;
  908. err = devm_request_threaded_irq(&pdev->dev, lan966x->xtr_irq, NULL,
  909. lan966x_xtr_irq_handler, IRQF_ONESHOT,
  910. "frame extraction", lan966x);
  911. if (err) {
  912. pr_err("Unable to use xtr irq");
  913. return -ENODEV;
  914. }
  915. lan966x->ana_irq = platform_get_irq_byname(pdev, "ana");
  916. if (lan966x->ana_irq > 0) {
  917. err = devm_request_threaded_irq(&pdev->dev, lan966x->ana_irq, NULL,
  918. lan966x_ana_irq_handler, IRQF_ONESHOT,
  919. "ana irq", lan966x);
  920. if (err)
  921. return dev_err_probe(&pdev->dev, err, "Unable to use ana irq");
  922. }
  923. lan966x->ptp_irq = platform_get_irq_byname(pdev, "ptp");
  924. if (lan966x->ptp_irq > 0) {
  925. err = devm_request_threaded_irq(&pdev->dev, lan966x->ptp_irq, NULL,
  926. lan966x_ptp_irq_handler, IRQF_ONESHOT,
  927. "ptp irq", lan966x);
  928. if (err)
  929. return dev_err_probe(&pdev->dev, err, "Unable to use ptp irq");
  930. lan966x->ptp = 1;
  931. }
  932. lan966x->fdma_irq = platform_get_irq_byname(pdev, "fdma");
  933. if (lan966x->fdma_irq > 0) {
  934. err = devm_request_irq(&pdev->dev, lan966x->fdma_irq,
  935. lan966x_fdma_irq_handler, 0,
  936. "fdma irq", lan966x);
  937. if (err)
  938. return dev_err_probe(&pdev->dev, err, "Unable to use fdma irq");
  939. lan966x->fdma = true;
  940. }
  941. if (lan966x->ptp) {
  942. lan966x->ptp_ext_irq = platform_get_irq_byname(pdev, "ptp-ext");
  943. if (lan966x->ptp_ext_irq > 0) {
  944. err = devm_request_threaded_irq(&pdev->dev,
  945. lan966x->ptp_ext_irq, NULL,
  946. lan966x_ptp_ext_irq_handler,
  947. IRQF_ONESHOT,
  948. "ptp-ext irq", lan966x);
  949. if (err)
  950. return dev_err_probe(&pdev->dev, err,
  951. "Unable to use ptp-ext irq");
  952. }
  953. }
  954. ports = device_get_named_child_node(&pdev->dev, "ethernet-ports");
  955. if (!ports)
  956. return dev_err_probe(&pdev->dev, -ENODEV,
  957. "no ethernet-ports child found\n");
  958. lan966x->debugfs_root = debugfs_create_dir("lan966x", NULL);
  959. /* init switch */
  960. lan966x_init(lan966x);
  961. lan966x_stats_init(lan966x);
  962. /* go over the child nodes */
  963. fwnode_for_each_available_child_node(ports, portnp) {
  964. phy_interface_t phy_mode;
  965. struct phy *serdes;
  966. u32 p;
  967. if (fwnode_property_read_u32(portnp, "reg", &p))
  968. continue;
  969. phy_mode = fwnode_get_phy_mode(portnp);
  970. err = lan966x_probe_port(lan966x, p, phy_mode, portnp);
  971. if (err)
  972. goto cleanup_ports;
  973. /* Read needed configuration */
  974. lan966x->ports[p]->config.portmode = phy_mode;
  975. lan966x->ports[p]->fwnode = fwnode_handle_get(portnp);
  976. serdes = devm_of_phy_optional_get(lan966x->dev,
  977. to_of_node(portnp), NULL);
  978. if (IS_ERR(serdes)) {
  979. err = PTR_ERR(serdes);
  980. goto cleanup_ports;
  981. }
  982. lan966x->ports[p]->serdes = serdes;
  983. lan966x_port_init(lan966x->ports[p]);
  984. err = lan966x_xdp_port_init(lan966x->ports[p]);
  985. if (err)
  986. goto cleanup_ports;
  987. }
  988. fwnode_handle_put(ports);
  989. lan966x_mdb_init(lan966x);
  990. err = lan966x_fdb_init(lan966x);
  991. if (err)
  992. goto cleanup_ports;
  993. err = lan966x_ptp_init(lan966x);
  994. if (err)
  995. goto cleanup_fdb;
  996. err = lan966x_fdma_init(lan966x);
  997. if (err)
  998. goto cleanup_ptp;
  999. err = lan966x_vcap_init(lan966x);
  1000. if (err)
  1001. goto cleanup_fdma;
  1002. lan966x_dcb_init(lan966x);
  1003. return 0;
  1004. cleanup_fdma:
  1005. lan966x_fdma_deinit(lan966x);
  1006. cleanup_ptp:
  1007. lan966x_ptp_deinit(lan966x);
  1008. cleanup_fdb:
  1009. lan966x_fdb_deinit(lan966x);
  1010. cleanup_ports:
  1011. fwnode_handle_put(ports);
  1012. fwnode_handle_put(portnp);
  1013. lan966x_cleanup_ports(lan966x);
  1014. cancel_delayed_work_sync(&lan966x->stats_work);
  1015. destroy_workqueue(lan966x->stats_queue);
  1016. mutex_destroy(&lan966x->stats_lock);
  1017. debugfs_remove_recursive(lan966x->debugfs_root);
  1018. return err;
  1019. }
  1020. static void lan966x_remove(struct platform_device *pdev)
  1021. {
  1022. struct lan966x *lan966x = platform_get_drvdata(pdev);
  1023. lan966x_taprio_deinit(lan966x);
  1024. lan966x_vcap_deinit(lan966x);
  1025. lan966x_fdma_deinit(lan966x);
  1026. lan966x_cleanup_ports(lan966x);
  1027. cancel_delayed_work_sync(&lan966x->stats_work);
  1028. destroy_workqueue(lan966x->stats_queue);
  1029. mutex_destroy(&lan966x->stats_lock);
  1030. lan966x_mac_purge_entries(lan966x);
  1031. lan966x_mdb_deinit(lan966x);
  1032. lan966x_fdb_deinit(lan966x);
  1033. lan966x_ptp_deinit(lan966x);
  1034. debugfs_remove_recursive(lan966x->debugfs_root);
  1035. }
  1036. static struct platform_driver lan966x_driver = {
  1037. .probe = lan966x_probe,
  1038. .remove_new = lan966x_remove,
  1039. .driver = {
  1040. .name = "lan966x-switch",
  1041. .of_match_table = lan966x_match,
  1042. },
  1043. };
  1044. static int __init lan966x_switch_driver_init(void)
  1045. {
  1046. int ret;
  1047. lan966x_register_notifier_blocks();
  1048. ret = platform_driver_register(&lan966x_driver);
  1049. if (ret)
  1050. goto err;
  1051. return 0;
  1052. err:
  1053. lan966x_unregister_notifier_blocks();
  1054. return ret;
  1055. }
  1056. static void __exit lan966x_switch_driver_exit(void)
  1057. {
  1058. platform_driver_unregister(&lan966x_driver);
  1059. lan966x_unregister_notifier_blocks();
  1060. }
  1061. module_init(lan966x_switch_driver_init);
  1062. module_exit(lan966x_switch_driver_exit);
  1063. MODULE_DESCRIPTION("Microchip LAN966X switch driver");
  1064. MODULE_AUTHOR("Horatiu Vultur <horatiu.vultur@microchip.com>");
  1065. MODULE_LICENSE("Dual MIT/GPL");