ipa_data-v4.5.c 10 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright (C) 2021-2024 Linaro Ltd. */
  3. #include <linux/array_size.h>
  4. #include <linux/log2.h>
  5. #include "../ipa_data.h"
  6. #include "../ipa_endpoint.h"
  7. #include "../ipa_mem.h"
  8. #include "../ipa_version.h"
  9. /** enum ipa_resource_type - IPA resource types for an SoC having IPA v4.5 */
  10. enum ipa_resource_type {
  11. /* Source resource types; first must have value 0 */
  12. IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS = 0,
  13. IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS,
  14. IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF,
  15. IPA_RESOURCE_TYPE_SRC_HPS_DMARS,
  16. IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES,
  17. /* Destination resource types; first must have value 0 */
  18. IPA_RESOURCE_TYPE_DST_DATA_SECTORS = 0,
  19. IPA_RESOURCE_TYPE_DST_DPS_DMARS,
  20. };
  21. /* Resource groups used for an SoC having IPA v4.5 */
  22. enum ipa_rsrc_group_id {
  23. /* Source resource group identifiers */
  24. IPA_RSRC_GROUP_SRC_UNUSED_0 = 0,
  25. IPA_RSRC_GROUP_SRC_UL_DL,
  26. IPA_RSRC_GROUP_SRC_UNUSED_2,
  27. IPA_RSRC_GROUP_SRC_UNUSED_3,
  28. IPA_RSRC_GROUP_SRC_UC_RX_Q,
  29. IPA_RSRC_GROUP_SRC_COUNT, /* Last in set; not a source group */
  30. /* Destination resource group identifiers */
  31. IPA_RSRC_GROUP_DST_UNUSED_0 = 0,
  32. IPA_RSRC_GROUP_DST_UL_DL_DPL,
  33. IPA_RSRC_GROUP_DST_UNUSED_2,
  34. IPA_RSRC_GROUP_DST_UNUSED_3,
  35. IPA_RSRC_GROUP_DST_UC,
  36. IPA_RSRC_GROUP_DST_COUNT, /* Last; not a destination group */
  37. };
  38. /* QSB configuration data for an SoC having IPA v4.5 */
  39. static const struct ipa_qsb_data ipa_qsb_data[] = {
  40. [IPA_QSB_MASTER_DDR] = {
  41. .max_writes = 8,
  42. .max_reads = 0, /* no limit (hardware max) */
  43. .max_reads_beats = 120,
  44. },
  45. [IPA_QSB_MASTER_PCIE] = {
  46. .max_writes = 8,
  47. .max_reads = 12,
  48. /* no outstanding read byte (beat) limit */
  49. },
  50. };
  51. /* Endpoint configuration data for an SoC having IPA v4.5 */
  52. static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
  53. [IPA_ENDPOINT_AP_COMMAND_TX] = {
  54. .ee_id = GSI_EE_AP,
  55. .channel_id = 9,
  56. .endpoint_id = 7,
  57. .toward_ipa = true,
  58. .channel = {
  59. .tre_count = 256,
  60. .event_count = 256,
  61. .tlv_count = 20,
  62. },
  63. .endpoint = {
  64. .config = {
  65. .resource_group = IPA_RSRC_GROUP_SRC_UL_DL,
  66. .dma_mode = true,
  67. .dma_endpoint = IPA_ENDPOINT_AP_LAN_RX,
  68. .tx = {
  69. .seq_type = IPA_SEQ_DMA,
  70. },
  71. },
  72. },
  73. },
  74. [IPA_ENDPOINT_AP_LAN_RX] = {
  75. .ee_id = GSI_EE_AP,
  76. .channel_id = 10,
  77. .endpoint_id = 16,
  78. .toward_ipa = false,
  79. .channel = {
  80. .tre_count = 256,
  81. .event_count = 256,
  82. .tlv_count = 9,
  83. },
  84. .endpoint = {
  85. .config = {
  86. .resource_group = IPA_RSRC_GROUP_DST_UL_DL_DPL,
  87. .aggregation = true,
  88. .status_enable = true,
  89. .rx = {
  90. .buffer_size = 8192,
  91. .pad_align = ilog2(sizeof(u32)),
  92. .aggr_time_limit = 500,
  93. },
  94. },
  95. },
  96. },
  97. [IPA_ENDPOINT_AP_MODEM_TX] = {
  98. .ee_id = GSI_EE_AP,
  99. .channel_id = 7,
  100. .endpoint_id = 2,
  101. .toward_ipa = true,
  102. .channel = {
  103. .tre_count = 512,
  104. .event_count = 512,
  105. .tlv_count = 16,
  106. },
  107. .endpoint = {
  108. .filter_support = true,
  109. .config = {
  110. .resource_group = IPA_RSRC_GROUP_SRC_UL_DL,
  111. .checksum = true,
  112. .qmap = true,
  113. .status_enable = true,
  114. .tx = {
  115. .seq_type = IPA_SEQ_2_PASS_SKIP_LAST_UC,
  116. .status_endpoint =
  117. IPA_ENDPOINT_MODEM_AP_RX,
  118. },
  119. },
  120. },
  121. },
  122. [IPA_ENDPOINT_AP_MODEM_RX] = {
  123. .ee_id = GSI_EE_AP,
  124. .channel_id = 1,
  125. .endpoint_id = 14,
  126. .toward_ipa = false,
  127. .channel = {
  128. .tre_count = 256,
  129. .event_count = 256,
  130. .tlv_count = 9,
  131. },
  132. .endpoint = {
  133. .config = {
  134. .resource_group = IPA_RSRC_GROUP_DST_UL_DL_DPL,
  135. .checksum = true,
  136. .qmap = true,
  137. .aggregation = true,
  138. .rx = {
  139. .buffer_size = 8192,
  140. .aggr_time_limit = 500,
  141. .aggr_close_eof = true,
  142. },
  143. },
  144. },
  145. },
  146. [IPA_ENDPOINT_MODEM_AP_TX] = {
  147. .ee_id = GSI_EE_MODEM,
  148. .channel_id = 0,
  149. .endpoint_id = 5,
  150. .toward_ipa = true,
  151. .endpoint = {
  152. .filter_support = true,
  153. },
  154. },
  155. [IPA_ENDPOINT_MODEM_AP_RX] = {
  156. .ee_id = GSI_EE_MODEM,
  157. .channel_id = 7,
  158. .endpoint_id = 21,
  159. .toward_ipa = false,
  160. },
  161. [IPA_ENDPOINT_MODEM_DL_NLO_TX] = {
  162. .ee_id = GSI_EE_MODEM,
  163. .channel_id = 2,
  164. .endpoint_id = 8,
  165. .toward_ipa = true,
  166. .endpoint = {
  167. .filter_support = true,
  168. },
  169. },
  170. };
  171. /* Source resource configuration data for an SoC having IPA v4.5 */
  172. static const struct ipa_resource ipa_resource_src[] = {
  173. [IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS] = {
  174. .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
  175. .min = 1, .max = 11,
  176. },
  177. .limits[IPA_RSRC_GROUP_SRC_UC_RX_Q] = {
  178. .min = 1, .max = 63,
  179. },
  180. },
  181. [IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS] = {
  182. .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
  183. .min = 14, .max = 14,
  184. },
  185. .limits[IPA_RSRC_GROUP_SRC_UC_RX_Q] = {
  186. .min = 3, .max = 3,
  187. },
  188. },
  189. [IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF] = {
  190. .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
  191. .min = 18, .max = 18,
  192. },
  193. .limits[IPA_RSRC_GROUP_SRC_UC_RX_Q] = {
  194. .min = 8, .max = 8,
  195. },
  196. },
  197. [IPA_RESOURCE_TYPE_SRC_HPS_DMARS] = {
  198. .limits[IPA_RSRC_GROUP_SRC_UNUSED_0] = {
  199. .min = 0, .max = 63,
  200. },
  201. .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
  202. .min = 0, .max = 63,
  203. },
  204. .limits[IPA_RSRC_GROUP_SRC_UNUSED_2] = {
  205. .min = 0, .max = 63,
  206. },
  207. .limits[IPA_RSRC_GROUP_SRC_UNUSED_3] = {
  208. .min = 0, .max = 63,
  209. },
  210. .limits[IPA_RSRC_GROUP_SRC_UC_RX_Q] = {
  211. .min = 0, .max = 63,
  212. },
  213. },
  214. [IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES] = {
  215. .limits[IPA_RSRC_GROUP_SRC_UL_DL] = {
  216. .min = 24, .max = 24,
  217. },
  218. .limits[IPA_RSRC_GROUP_SRC_UC_RX_Q] = {
  219. .min = 8, .max = 8,
  220. },
  221. },
  222. };
  223. /* Destination resource configuration data for an SoC having IPA v4.5 */
  224. static const struct ipa_resource ipa_resource_dst[] = {
  225. [IPA_RESOURCE_TYPE_DST_DATA_SECTORS] = {
  226. .limits[IPA_RSRC_GROUP_DST_UL_DL_DPL] = {
  227. .min = 16, .max = 16,
  228. },
  229. .limits[IPA_RSRC_GROUP_DST_UNUSED_2] = {
  230. .min = 2, .max = 2,
  231. },
  232. .limits[IPA_RSRC_GROUP_DST_UNUSED_3] = {
  233. .min = 2, .max = 2,
  234. },
  235. },
  236. [IPA_RESOURCE_TYPE_DST_DPS_DMARS] = {
  237. .limits[IPA_RSRC_GROUP_DST_UL_DL_DPL] = {
  238. .min = 2, .max = 63,
  239. },
  240. .limits[IPA_RSRC_GROUP_DST_UNUSED_2] = {
  241. .min = 1, .max = 2,
  242. },
  243. .limits[IPA_RSRC_GROUP_DST_UNUSED_3] = {
  244. .min = 1, .max = 2,
  245. },
  246. .limits[IPA_RSRC_GROUP_DST_UC] = {
  247. .min = 0, .max = 2,
  248. },
  249. },
  250. };
  251. /* Resource configuration data for an SoC having IPA v4.5 */
  252. static const struct ipa_resource_data ipa_resource_data = {
  253. .rsrc_group_src_count = IPA_RSRC_GROUP_SRC_COUNT,
  254. .rsrc_group_dst_count = IPA_RSRC_GROUP_DST_COUNT,
  255. .resource_src_count = ARRAY_SIZE(ipa_resource_src),
  256. .resource_src = ipa_resource_src,
  257. .resource_dst_count = ARRAY_SIZE(ipa_resource_dst),
  258. .resource_dst = ipa_resource_dst,
  259. };
  260. /* IPA-resident memory region data for an SoC having IPA v4.5 */
  261. static const struct ipa_mem ipa_mem_local_data[] = {
  262. {
  263. .id = IPA_MEM_UC_SHARED,
  264. .offset = 0x0000,
  265. .size = 0x0080,
  266. .canary_count = 0,
  267. },
  268. {
  269. .id = IPA_MEM_UC_INFO,
  270. .offset = 0x0080,
  271. .size = 0x0200,
  272. .canary_count = 0,
  273. },
  274. {
  275. .id = IPA_MEM_V4_FILTER_HASHED,
  276. .offset = 0x0288,
  277. .size = 0x0078,
  278. .canary_count = 2,
  279. },
  280. {
  281. .id = IPA_MEM_V4_FILTER,
  282. .offset = 0x0308,
  283. .size = 0x0078,
  284. .canary_count = 2,
  285. },
  286. {
  287. .id = IPA_MEM_V6_FILTER_HASHED,
  288. .offset = 0x0388,
  289. .size = 0x0078,
  290. .canary_count = 2,
  291. },
  292. {
  293. .id = IPA_MEM_V6_FILTER,
  294. .offset = 0x0408,
  295. .size = 0x0078,
  296. .canary_count = 2,
  297. },
  298. {
  299. .id = IPA_MEM_V4_ROUTE_HASHED,
  300. .offset = 0x0488,
  301. .size = 0x0078,
  302. .canary_count = 2,
  303. },
  304. {
  305. .id = IPA_MEM_V4_ROUTE,
  306. .offset = 0x0508,
  307. .size = 0x0078,
  308. .canary_count = 2,
  309. },
  310. {
  311. .id = IPA_MEM_V6_ROUTE_HASHED,
  312. .offset = 0x0588,
  313. .size = 0x0078,
  314. .canary_count = 2,
  315. },
  316. {
  317. .id = IPA_MEM_V6_ROUTE,
  318. .offset = 0x0608,
  319. .size = 0x0078,
  320. .canary_count = 2,
  321. },
  322. {
  323. .id = IPA_MEM_MODEM_HEADER,
  324. .offset = 0x0688,
  325. .size = 0x0240,
  326. .canary_count = 2,
  327. },
  328. {
  329. .id = IPA_MEM_AP_HEADER,
  330. .offset = 0x08c8,
  331. .size = 0x0200,
  332. .canary_count = 0,
  333. },
  334. {
  335. .id = IPA_MEM_MODEM_PROC_CTX,
  336. .offset = 0x0ad0,
  337. .size = 0x0b20,
  338. .canary_count = 2,
  339. },
  340. {
  341. .id = IPA_MEM_AP_PROC_CTX,
  342. .offset = 0x15f0,
  343. .size = 0x0200,
  344. .canary_count = 0,
  345. },
  346. {
  347. .id = IPA_MEM_NAT_TABLE,
  348. .offset = 0x1800,
  349. .size = 0x0d00,
  350. .canary_count = 4,
  351. },
  352. {
  353. .id = IPA_MEM_STATS_QUOTA_MODEM,
  354. .offset = 0x2510,
  355. .size = 0x0030,
  356. .canary_count = 4,
  357. },
  358. {
  359. .id = IPA_MEM_STATS_QUOTA_AP,
  360. .offset = 0x2540,
  361. .size = 0x0048,
  362. .canary_count = 0,
  363. },
  364. {
  365. .id = IPA_MEM_STATS_TETHERING,
  366. .offset = 0x2588,
  367. .size = 0x0238,
  368. .canary_count = 0,
  369. },
  370. {
  371. .id = IPA_MEM_STATS_FILTER_ROUTE,
  372. .offset = 0x27c0,
  373. .size = 0x0800,
  374. .canary_count = 0,
  375. },
  376. {
  377. .id = IPA_MEM_STATS_DROP,
  378. .offset = 0x2fc0,
  379. .size = 0x0020,
  380. .canary_count = 0,
  381. },
  382. {
  383. .id = IPA_MEM_MODEM,
  384. .offset = 0x2fe8,
  385. .size = 0x0800,
  386. .canary_count = 2,
  387. },
  388. {
  389. .id = IPA_MEM_UC_EVENT_RING,
  390. .offset = 0x3800,
  391. .size = 0x1000,
  392. .canary_count = 1,
  393. },
  394. {
  395. .id = IPA_MEM_PDN_CONFIG,
  396. .offset = 0x4800,
  397. .size = 0x0050,
  398. .canary_count = 0,
  399. },
  400. };
  401. /* Memory configuration data for an SoC having IPA v4.5 */
  402. static const struct ipa_mem_data ipa_mem_data = {
  403. .local_count = ARRAY_SIZE(ipa_mem_local_data),
  404. .local = ipa_mem_local_data,
  405. .imem_addr = 0x14688000,
  406. .imem_size = 0x00003000,
  407. .smem_id = 497,
  408. .smem_size = 0x00009000,
  409. };
  410. /* Interconnect rates are in 1000 byte/second units */
  411. static const struct ipa_interconnect_data ipa_interconnect_data[] = {
  412. {
  413. .name = "memory",
  414. .peak_bandwidth = 600000, /* 600 MBps */
  415. .average_bandwidth = 150000, /* 150 MBps */
  416. },
  417. /* Average rate is unused for the next two interconnects */
  418. {
  419. .name = "imem",
  420. .peak_bandwidth = 450000, /* 450 MBps */
  421. .average_bandwidth = 75000, /* 75 MBps (unused?) */
  422. },
  423. {
  424. .name = "config",
  425. .peak_bandwidth = 171400, /* 171.4 MBps */
  426. .average_bandwidth = 0, /* unused */
  427. },
  428. };
  429. /* Clock and interconnect configuration data for an SoC having IPA v4.5 */
  430. static const struct ipa_power_data ipa_power_data = {
  431. .core_clock_rate = 150 * 1000 * 1000, /* Hz (150? 60?) */
  432. .interconnect_count = ARRAY_SIZE(ipa_interconnect_data),
  433. .interconnect_data = ipa_interconnect_data,
  434. };
  435. /* Configuration data for an SoC having IPA v4.5 */
  436. const struct ipa_data ipa_data_v4_5 = {
  437. .version = IPA_VERSION_4_5,
  438. .qsb_count = ARRAY_SIZE(ipa_qsb_data),
  439. .qsb_data = ipa_qsb_data,
  440. .modem_route_count = 8,
  441. .endpoint_count = ARRAY_SIZE(ipa_gsi_endpoint_data),
  442. .endpoint_data = ipa_gsi_endpoint_data,
  443. .resource_data = &ipa_resource_data,
  444. .mem_data = &ipa_mem_data,
  445. .power_data = &ipa_power_data,
  446. };