mdio-aspeed.c 5.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /* Copyright (C) 2019 IBM Corp. */
  3. #include <linux/bitfield.h>
  4. #include <linux/delay.h>
  5. #include <linux/reset.h>
  6. #include <linux/iopoll.h>
  7. #include <linux/mdio.h>
  8. #include <linux/module.h>
  9. #include <linux/of.h>
  10. #include <linux/of_mdio.h>
  11. #include <linux/phy.h>
  12. #include <linux/platform_device.h>
  13. #define DRV_NAME "mdio-aspeed"
  14. #define ASPEED_MDIO_CTRL 0x0
  15. #define ASPEED_MDIO_CTRL_FIRE BIT(31)
  16. #define ASPEED_MDIO_CTRL_ST BIT(28)
  17. #define ASPEED_MDIO_CTRL_ST_C45 0
  18. #define ASPEED_MDIO_CTRL_ST_C22 1
  19. #define ASPEED_MDIO_CTRL_OP GENMASK(27, 26)
  20. #define MDIO_C22_OP_WRITE 0b01
  21. #define MDIO_C22_OP_READ 0b10
  22. #define MDIO_C45_OP_ADDR 0b00
  23. #define MDIO_C45_OP_WRITE 0b01
  24. #define MDIO_C45_OP_PREAD 0b10
  25. #define MDIO_C45_OP_READ 0b11
  26. #define ASPEED_MDIO_CTRL_PHYAD GENMASK(25, 21)
  27. #define ASPEED_MDIO_CTRL_REGAD GENMASK(20, 16)
  28. #define ASPEED_MDIO_CTRL_MIIWDATA GENMASK(15, 0)
  29. #define ASPEED_MDIO_DATA 0x4
  30. #define ASPEED_MDIO_DATA_MDC_THRES GENMASK(31, 24)
  31. #define ASPEED_MDIO_DATA_MDIO_EDGE BIT(23)
  32. #define ASPEED_MDIO_DATA_MDIO_LATCH GENMASK(22, 20)
  33. #define ASPEED_MDIO_DATA_IDLE BIT(16)
  34. #define ASPEED_MDIO_DATA_MIIRDATA GENMASK(15, 0)
  35. #define ASPEED_MDIO_INTERVAL_US 100
  36. #define ASPEED_MDIO_TIMEOUT_US (ASPEED_MDIO_INTERVAL_US * 10)
  37. struct aspeed_mdio {
  38. void __iomem *base;
  39. struct reset_control *reset;
  40. };
  41. static int aspeed_mdio_op(struct mii_bus *bus, u8 st, u8 op, u8 phyad, u8 regad,
  42. u16 data)
  43. {
  44. struct aspeed_mdio *ctx = bus->priv;
  45. u32 ctrl;
  46. dev_dbg(&bus->dev, "%s: st: %u op: %u, phyad: %u, regad: %u, data: %u\n",
  47. __func__, st, op, phyad, regad, data);
  48. ctrl = ASPEED_MDIO_CTRL_FIRE
  49. | FIELD_PREP(ASPEED_MDIO_CTRL_ST, st)
  50. | FIELD_PREP(ASPEED_MDIO_CTRL_OP, op)
  51. | FIELD_PREP(ASPEED_MDIO_CTRL_PHYAD, phyad)
  52. | FIELD_PREP(ASPEED_MDIO_CTRL_REGAD, regad)
  53. | FIELD_PREP(ASPEED_MDIO_DATA_MIIRDATA, data);
  54. iowrite32(ctrl, ctx->base + ASPEED_MDIO_CTRL);
  55. return readl_poll_timeout(ctx->base + ASPEED_MDIO_CTRL, ctrl,
  56. !(ctrl & ASPEED_MDIO_CTRL_FIRE),
  57. ASPEED_MDIO_INTERVAL_US,
  58. ASPEED_MDIO_TIMEOUT_US);
  59. }
  60. static int aspeed_mdio_get_data(struct mii_bus *bus)
  61. {
  62. struct aspeed_mdio *ctx = bus->priv;
  63. u32 data;
  64. int rc;
  65. rc = readl_poll_timeout(ctx->base + ASPEED_MDIO_DATA, data,
  66. data & ASPEED_MDIO_DATA_IDLE,
  67. ASPEED_MDIO_INTERVAL_US,
  68. ASPEED_MDIO_TIMEOUT_US);
  69. if (rc < 0)
  70. return rc;
  71. return FIELD_GET(ASPEED_MDIO_DATA_MIIRDATA, data);
  72. }
  73. static int aspeed_mdio_read_c22(struct mii_bus *bus, int addr, int regnum)
  74. {
  75. int rc;
  76. rc = aspeed_mdio_op(bus, ASPEED_MDIO_CTRL_ST_C22, MDIO_C22_OP_READ,
  77. addr, regnum, 0);
  78. if (rc < 0)
  79. return rc;
  80. return aspeed_mdio_get_data(bus);
  81. }
  82. static int aspeed_mdio_write_c22(struct mii_bus *bus, int addr, int regnum,
  83. u16 val)
  84. {
  85. return aspeed_mdio_op(bus, ASPEED_MDIO_CTRL_ST_C22, MDIO_C22_OP_WRITE,
  86. addr, regnum, val);
  87. }
  88. static int aspeed_mdio_read_c45(struct mii_bus *bus, int addr, int devad,
  89. int regnum)
  90. {
  91. int rc;
  92. rc = aspeed_mdio_op(bus, ASPEED_MDIO_CTRL_ST_C45, MDIO_C45_OP_ADDR,
  93. addr, devad, regnum);
  94. if (rc < 0)
  95. return rc;
  96. rc = aspeed_mdio_op(bus, ASPEED_MDIO_CTRL_ST_C45, MDIO_C45_OP_READ,
  97. addr, devad, 0);
  98. if (rc < 0)
  99. return rc;
  100. return aspeed_mdio_get_data(bus);
  101. }
  102. static int aspeed_mdio_write_c45(struct mii_bus *bus, int addr, int devad,
  103. int regnum, u16 val)
  104. {
  105. int rc;
  106. rc = aspeed_mdio_op(bus, ASPEED_MDIO_CTRL_ST_C45, MDIO_C45_OP_ADDR,
  107. addr, devad, regnum);
  108. if (rc < 0)
  109. return rc;
  110. return aspeed_mdio_op(bus, ASPEED_MDIO_CTRL_ST_C45, MDIO_C45_OP_WRITE,
  111. addr, devad, val);
  112. }
  113. static int aspeed_mdio_probe(struct platform_device *pdev)
  114. {
  115. struct aspeed_mdio *ctx;
  116. struct mii_bus *bus;
  117. int rc;
  118. bus = devm_mdiobus_alloc_size(&pdev->dev, sizeof(*ctx));
  119. if (!bus)
  120. return -ENOMEM;
  121. ctx = bus->priv;
  122. ctx->base = devm_platform_ioremap_resource(pdev, 0);
  123. if (IS_ERR(ctx->base))
  124. return PTR_ERR(ctx->base);
  125. ctx->reset = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
  126. if (IS_ERR(ctx->reset))
  127. return PTR_ERR(ctx->reset);
  128. reset_control_deassert(ctx->reset);
  129. bus->name = DRV_NAME;
  130. snprintf(bus->id, MII_BUS_ID_SIZE, "%s%d", pdev->name, pdev->id);
  131. bus->parent = &pdev->dev;
  132. bus->read = aspeed_mdio_read_c22;
  133. bus->write = aspeed_mdio_write_c22;
  134. bus->read_c45 = aspeed_mdio_read_c45;
  135. bus->write_c45 = aspeed_mdio_write_c45;
  136. rc = of_mdiobus_register(bus, pdev->dev.of_node);
  137. if (rc) {
  138. dev_err(&pdev->dev, "Cannot register MDIO bus!\n");
  139. reset_control_assert(ctx->reset);
  140. return rc;
  141. }
  142. platform_set_drvdata(pdev, bus);
  143. return 0;
  144. }
  145. static void aspeed_mdio_remove(struct platform_device *pdev)
  146. {
  147. struct mii_bus *bus = (struct mii_bus *)platform_get_drvdata(pdev);
  148. struct aspeed_mdio *ctx = bus->priv;
  149. reset_control_assert(ctx->reset);
  150. mdiobus_unregister(bus);
  151. }
  152. static const struct of_device_id aspeed_mdio_of_match[] = {
  153. { .compatible = "aspeed,ast2600-mdio", },
  154. { },
  155. };
  156. MODULE_DEVICE_TABLE(of, aspeed_mdio_of_match);
  157. static struct platform_driver aspeed_mdio_driver = {
  158. .driver = {
  159. .name = DRV_NAME,
  160. .of_match_table = aspeed_mdio_of_match,
  161. },
  162. .probe = aspeed_mdio_probe,
  163. .remove_new = aspeed_mdio_remove,
  164. };
  165. module_platform_driver(aspeed_mdio_driver);
  166. MODULE_AUTHOR("Andrew Jeffery <andrew@aj.id.au>");
  167. MODULE_LICENSE("GPL");
  168. MODULE_DESCRIPTION("ASPEED MDIO bus controller");