marvell.c 104 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * drivers/net/phy/marvell.c
  4. *
  5. * Driver for Marvell PHYs
  6. *
  7. * Author: Andy Fleming
  8. *
  9. * Copyright (c) 2004 Freescale Semiconductor, Inc.
  10. *
  11. * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/string.h>
  15. #include <linux/ctype.h>
  16. #include <linux/errno.h>
  17. #include <linux/unistd.h>
  18. #include <linux/hwmon.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/init.h>
  21. #include <linux/delay.h>
  22. #include <linux/netdevice.h>
  23. #include <linux/etherdevice.h>
  24. #include <linux/skbuff.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/mm.h>
  27. #include <linux/module.h>
  28. #include <linux/mii.h>
  29. #include <linux/ethtool.h>
  30. #include <linux/ethtool_netlink.h>
  31. #include <linux/phy.h>
  32. #include <linux/marvell_phy.h>
  33. #include <linux/bitfield.h>
  34. #include <linux/of.h>
  35. #include <linux/sfp.h>
  36. #include <linux/io.h>
  37. #include <asm/irq.h>
  38. #include <linux/uaccess.h>
  39. #define MII_MARVELL_PHY_PAGE 22
  40. #define MII_MARVELL_COPPER_PAGE 0x00
  41. #define MII_MARVELL_FIBER_PAGE 0x01
  42. #define MII_MARVELL_MSCR_PAGE 0x02
  43. #define MII_MARVELL_LED_PAGE 0x03
  44. #define MII_MARVELL_VCT5_PAGE 0x05
  45. #define MII_MARVELL_MISC_TEST_PAGE 0x06
  46. #define MII_MARVELL_VCT7_PAGE 0x07
  47. #define MII_MARVELL_WOL_PAGE 0x11
  48. #define MII_MARVELL_MODE_PAGE 0x12
  49. #define MII_M1011_IEVENT 0x13
  50. #define MII_M1011_IEVENT_CLEAR 0x0000
  51. #define MII_M1011_IMASK 0x12
  52. #define MII_M1011_IMASK_INIT 0x6400
  53. #define MII_M1011_IMASK_CLEAR 0x0000
  54. #define MII_M1011_PHY_SCR 0x10
  55. #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
  56. #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12)
  57. #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8
  58. #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
  59. #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
  60. #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
  61. #define MII_M1011_PHY_SSR 0x11
  62. #define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5)
  63. #define MII_M1111_PHY_LED_CONTROL 0x18
  64. #define MII_M1111_PHY_LED_DIRECT 0x4100
  65. #define MII_M1111_PHY_LED_COMBINE 0x411c
  66. #define MII_M1111_PHY_EXT_CR 0x14
  67. #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9)
  68. #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8
  69. #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8)
  70. #define MII_M1111_RGMII_RX_DELAY BIT(7)
  71. #define MII_M1111_RGMII_TX_DELAY BIT(1)
  72. #define MII_M1111_PHY_EXT_SR 0x1b
  73. #define MII_M1111_HWCFG_MODE_MASK 0xf
  74. #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
  75. #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
  76. #define MII_M1111_HWCFG_MODE_RTBI 0x7
  77. #define MII_M1111_HWCFG_MODE_COPPER_1000X_AN 0x8
  78. #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
  79. #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
  80. #define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN 0xc
  81. #define MII_M1111_HWCFG_SERIAL_AN_BYPASS BIT(12)
  82. #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
  83. #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
  84. #define MII_88E1121_PHY_MSCR_REG 21
  85. #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
  86. #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
  87. #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
  88. #define MII_88E1121_MISC_TEST 0x1a
  89. #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
  90. #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
  91. #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
  92. #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
  93. #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
  94. #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
  95. #define MII_88E1510_TEMP_SENSOR 0x1b
  96. #define MII_88E1510_TEMP_SENSOR_MASK 0xff
  97. #define MII_88E1540_COPPER_CTRL3 0x1a
  98. #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10)
  99. #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0
  100. #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1
  101. #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2
  102. #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3
  103. #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9)
  104. #define MII_88E6390_MISC_TEST 0x1b
  105. #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S (0x0 << 14)
  106. #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE (0x1 << 14)
  107. #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT (0x2 << 14)
  108. #define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE (0x3 << 14)
  109. #define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK (0x3 << 14)
  110. #define MII_88E6393_MISC_TEST_SAMPLES_2048 (0x0 << 11)
  111. #define MII_88E6393_MISC_TEST_SAMPLES_4096 (0x1 << 11)
  112. #define MII_88E6393_MISC_TEST_SAMPLES_8192 (0x2 << 11)
  113. #define MII_88E6393_MISC_TEST_SAMPLES_16384 (0x3 << 11)
  114. #define MII_88E6393_MISC_TEST_SAMPLES_MASK (0x3 << 11)
  115. #define MII_88E6393_MISC_TEST_RATE_2_3MS (0x5 << 8)
  116. #define MII_88E6393_MISC_TEST_RATE_6_4MS (0x6 << 8)
  117. #define MII_88E6393_MISC_TEST_RATE_11_9MS (0x7 << 8)
  118. #define MII_88E6393_MISC_TEST_RATE_MASK (0x7 << 8)
  119. #define MII_88E6390_TEMP_SENSOR 0x1c
  120. #define MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK 0xff00
  121. #define MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT 8
  122. #define MII_88E6390_TEMP_SENSOR_MASK 0xff
  123. #define MII_88E6390_TEMP_SENSOR_SAMPLES 10
  124. #define MII_88E1318S_PHY_MSCR1_REG 16
  125. #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
  126. /* Copper Specific Interrupt Enable Register */
  127. #define MII_88E1318S_PHY_CSIER 0x12
  128. /* WOL Event Interrupt Enable */
  129. #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
  130. #define MII_88E1318S_PHY_LED_FUNC 0x10
  131. #define MII_88E1318S_PHY_LED_FUNC_OFF (0x8)
  132. #define MII_88E1318S_PHY_LED_FUNC_ON (0x9)
  133. #define MII_88E1318S_PHY_LED_FUNC_HI_Z (0xa)
  134. #define MII_88E1318S_PHY_LED_FUNC_BLINK (0xb)
  135. #define MII_88E1318S_PHY_LED_TCR 0x12
  136. #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
  137. #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
  138. #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
  139. /* Magic Packet MAC address registers */
  140. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
  141. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
  142. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
  143. #define MII_88E1318S_PHY_WOL_CTRL 0x10
  144. #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
  145. #define MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE BIT(13)
  146. #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
  147. #define MII_PHY_LED_CTRL 16
  148. #define MII_88E1121_PHY_LED_DEF 0x0030
  149. #define MII_88E1510_PHY_LED_DEF 0x1177
  150. #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040
  151. #define MII_M1011_PHY_STATUS 0x11
  152. #define MII_M1011_PHY_STATUS_1000 0x8000
  153. #define MII_M1011_PHY_STATUS_100 0x4000
  154. #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
  155. #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
  156. #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
  157. #define MII_M1011_PHY_STATUS_LINK 0x0400
  158. #define MII_88E3016_PHY_SPEC_CTRL 0x10
  159. #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
  160. #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
  161. #define MII_88E1510_GEN_CTRL_REG_1 0x14
  162. #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
  163. #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII 0x0 /* RGMII to copper */
  164. #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
  165. /* RGMII to 1000BASE-X */
  166. #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X 0x2
  167. /* RGMII to 100BASE-FX */
  168. #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX 0x3
  169. /* RGMII to SGMII */
  170. #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII 0x4
  171. #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
  172. #define MII_88E1510_MSCR_2 0x15
  173. #define MII_VCT5_TX_RX_MDI0_COUPLING 0x10
  174. #define MII_VCT5_TX_RX_MDI1_COUPLING 0x11
  175. #define MII_VCT5_TX_RX_MDI2_COUPLING 0x12
  176. #define MII_VCT5_TX_RX_MDI3_COUPLING 0x13
  177. #define MII_VCT5_TX_RX_AMPLITUDE_MASK 0x7f00
  178. #define MII_VCT5_TX_RX_AMPLITUDE_SHIFT 8
  179. #define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION BIT(15)
  180. #define MII_VCT5_CTRL 0x17
  181. #define MII_VCT5_CTRL_ENABLE BIT(15)
  182. #define MII_VCT5_CTRL_COMPLETE BIT(14)
  183. #define MII_VCT5_CTRL_TX_SAME_CHANNEL (0x0 << 11)
  184. #define MII_VCT5_CTRL_TX0_CHANNEL (0x4 << 11)
  185. #define MII_VCT5_CTRL_TX1_CHANNEL (0x5 << 11)
  186. #define MII_VCT5_CTRL_TX2_CHANNEL (0x6 << 11)
  187. #define MII_VCT5_CTRL_TX3_CHANNEL (0x7 << 11)
  188. #define MII_VCT5_CTRL_SAMPLES_2 (0x0 << 8)
  189. #define MII_VCT5_CTRL_SAMPLES_4 (0x1 << 8)
  190. #define MII_VCT5_CTRL_SAMPLES_8 (0x2 << 8)
  191. #define MII_VCT5_CTRL_SAMPLES_16 (0x3 << 8)
  192. #define MII_VCT5_CTRL_SAMPLES_32 (0x4 << 8)
  193. #define MII_VCT5_CTRL_SAMPLES_64 (0x5 << 8)
  194. #define MII_VCT5_CTRL_SAMPLES_128 (0x6 << 8)
  195. #define MII_VCT5_CTRL_SAMPLES_DEFAULT (0x6 << 8)
  196. #define MII_VCT5_CTRL_SAMPLES_256 (0x7 << 8)
  197. #define MII_VCT5_CTRL_SAMPLES_SHIFT 8
  198. #define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK (0x0 << 6)
  199. #define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK (0x1 << 6)
  200. #define MII_VCT5_CTRL_MODE_OFFSET (0x2 << 6)
  201. #define MII_VCT5_CTRL_SAMPLE_POINT (0x3 << 6)
  202. #define MII_VCT5_CTRL_PEEK_HYST_DEFAULT 3
  203. #define MII_VCT5_SAMPLE_POINT_DISTANCE 0x18
  204. #define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX 511
  205. #define MII_VCT5_TX_PULSE_CTRL 0x1c
  206. #define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN BIT(12)
  207. #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS (0x0 << 10)
  208. #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS (0x1 << 10)
  209. #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS (0x2 << 10)
  210. #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS (0x3 << 10)
  211. #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT 10
  212. #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV (0x0 << 8)
  213. #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV (0x1 << 8)
  214. #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV (0x2 << 8)
  215. #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV (0x3 << 8)
  216. #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT 8
  217. #define MII_VCT5_TX_PULSE_CTRL_MAX_AMP BIT(7)
  218. #define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV (0x6 << 0)
  219. /* For TDR measurements less than 11 meters, a short pulse should be
  220. * used.
  221. */
  222. #define TDR_SHORT_CABLE_LENGTH 11
  223. #define MII_VCT7_PAIR_0_DISTANCE 0x10
  224. #define MII_VCT7_PAIR_1_DISTANCE 0x11
  225. #define MII_VCT7_PAIR_2_DISTANCE 0x12
  226. #define MII_VCT7_PAIR_3_DISTANCE 0x13
  227. #define MII_VCT7_RESULTS 0x14
  228. #define MII_VCT7_RESULTS_PAIR3_MASK 0xf000
  229. #define MII_VCT7_RESULTS_PAIR2_MASK 0x0f00
  230. #define MII_VCT7_RESULTS_PAIR1_MASK 0x00f0
  231. #define MII_VCT7_RESULTS_PAIR0_MASK 0x000f
  232. #define MII_VCT7_RESULTS_PAIR3_SHIFT 12
  233. #define MII_VCT7_RESULTS_PAIR2_SHIFT 8
  234. #define MII_VCT7_RESULTS_PAIR1_SHIFT 4
  235. #define MII_VCT7_RESULTS_PAIR0_SHIFT 0
  236. #define MII_VCT7_RESULTS_INVALID 0
  237. #define MII_VCT7_RESULTS_OK 1
  238. #define MII_VCT7_RESULTS_OPEN 2
  239. #define MII_VCT7_RESULTS_SAME_SHORT 3
  240. #define MII_VCT7_RESULTS_CROSS_SHORT 4
  241. #define MII_VCT7_RESULTS_BUSY 9
  242. #define MII_VCT7_CTRL 0x15
  243. #define MII_VCT7_CTRL_RUN_NOW BIT(15)
  244. #define MII_VCT7_CTRL_RUN_ANEG BIT(14)
  245. #define MII_VCT7_CTRL_DISABLE_CROSS BIT(13)
  246. #define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK BIT(12)
  247. #define MII_VCT7_CTRL_IN_PROGRESS BIT(11)
  248. #define MII_VCT7_CTRL_METERS BIT(10)
  249. #define MII_VCT7_CTRL_CENTIMETERS 0
  250. #define MII_VCT_TXPINS 0x1A
  251. #define MII_VCT_RXPINS 0x1B
  252. #define MII_VCT_SR 0x1C
  253. #define MII_VCT_TXPINS_ENVCT BIT(15)
  254. #define MII_VCT_TXRXPINS_VCTTST GENMASK(14, 13)
  255. #define MII_VCT_TXRXPINS_VCTTST_SHIFT 13
  256. #define MII_VCT_TXRXPINS_VCTTST_OK 0
  257. #define MII_VCT_TXRXPINS_VCTTST_SHORT 1
  258. #define MII_VCT_TXRXPINS_VCTTST_OPEN 2
  259. #define MII_VCT_TXRXPINS_VCTTST_FAIL 3
  260. #define MII_VCT_TXRXPINS_AMPRFLN GENMASK(12, 8)
  261. #define MII_VCT_TXRXPINS_AMPRFLN_SHIFT 8
  262. #define MII_VCT_TXRXPINS_DISTRFLN GENMASK(7, 0)
  263. #define MII_VCT_TXRXPINS_DISTRFLN_MAX 0xff
  264. #define M88E3082_PAIR_A BIT(0)
  265. #define M88E3082_PAIR_B BIT(1)
  266. #define LPA_PAUSE_FIBER 0x180
  267. #define LPA_PAUSE_ASYM_FIBER 0x100
  268. #define NB_FIBER_STATS 1
  269. #define NB_STAT_MAX 3
  270. MODULE_DESCRIPTION("Marvell PHY driver");
  271. MODULE_AUTHOR("Andy Fleming");
  272. MODULE_LICENSE("GPL");
  273. struct marvell_hw_stat {
  274. const char *string;
  275. u8 page;
  276. u8 reg;
  277. u8 bits;
  278. };
  279. static const struct marvell_hw_stat marvell_hw_stats[] = {
  280. { "phy_receive_errors_copper", 0, 21, 16},
  281. { "phy_idle_errors", 0, 10, 8 },
  282. { "phy_receive_errors_fiber", 1, 21, 16},
  283. };
  284. static_assert(ARRAY_SIZE(marvell_hw_stats) <= NB_STAT_MAX);
  285. /* "simple" stat list + corresponding marvell_get_*_simple functions are used
  286. * on PHYs without a page register
  287. */
  288. struct marvell_hw_stat_simple {
  289. const char *string;
  290. u8 reg;
  291. u8 bits;
  292. };
  293. static const struct marvell_hw_stat_simple marvell_hw_stats_simple[] = {
  294. { "phy_receive_errors", 21, 16},
  295. };
  296. static_assert(ARRAY_SIZE(marvell_hw_stats_simple) <= NB_STAT_MAX);
  297. enum {
  298. M88E3082_VCT_OFF,
  299. M88E3082_VCT_PHASE1,
  300. M88E3082_VCT_PHASE2,
  301. };
  302. struct marvell_priv {
  303. u64 stats[NB_STAT_MAX];
  304. char *hwmon_name;
  305. struct device *hwmon_dev;
  306. bool cable_test_tdr;
  307. u32 first;
  308. u32 last;
  309. u32 step;
  310. s8 pair;
  311. u8 vct_phase;
  312. };
  313. static int marvell_read_page(struct phy_device *phydev)
  314. {
  315. return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
  316. }
  317. static int marvell_write_page(struct phy_device *phydev, int page)
  318. {
  319. return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
  320. }
  321. static int marvell_set_page(struct phy_device *phydev, int page)
  322. {
  323. return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
  324. }
  325. static int marvell_ack_interrupt(struct phy_device *phydev)
  326. {
  327. int err;
  328. /* Clear the interrupts by reading the reg */
  329. err = phy_read(phydev, MII_M1011_IEVENT);
  330. if (err < 0)
  331. return err;
  332. return 0;
  333. }
  334. static int marvell_config_intr(struct phy_device *phydev)
  335. {
  336. int err;
  337. if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
  338. err = marvell_ack_interrupt(phydev);
  339. if (err)
  340. return err;
  341. err = phy_write(phydev, MII_M1011_IMASK,
  342. MII_M1011_IMASK_INIT);
  343. } else {
  344. err = phy_write(phydev, MII_M1011_IMASK,
  345. MII_M1011_IMASK_CLEAR);
  346. if (err)
  347. return err;
  348. err = marvell_ack_interrupt(phydev);
  349. }
  350. return err;
  351. }
  352. static irqreturn_t marvell_handle_interrupt(struct phy_device *phydev)
  353. {
  354. int irq_status;
  355. irq_status = phy_read(phydev, MII_M1011_IEVENT);
  356. if (irq_status < 0) {
  357. phy_error(phydev);
  358. return IRQ_NONE;
  359. }
  360. if (!(irq_status & MII_M1011_IMASK_INIT))
  361. return IRQ_NONE;
  362. phy_trigger_machine(phydev);
  363. return IRQ_HANDLED;
  364. }
  365. static int marvell_set_polarity(struct phy_device *phydev, int polarity)
  366. {
  367. u16 val;
  368. switch (polarity) {
  369. case ETH_TP_MDI:
  370. val = MII_M1011_PHY_SCR_MDI;
  371. break;
  372. case ETH_TP_MDI_X:
  373. val = MII_M1011_PHY_SCR_MDI_X;
  374. break;
  375. case ETH_TP_MDI_AUTO:
  376. case ETH_TP_MDI_INVALID:
  377. default:
  378. val = MII_M1011_PHY_SCR_AUTO_CROSS;
  379. break;
  380. }
  381. return phy_modify_changed(phydev, MII_M1011_PHY_SCR,
  382. MII_M1011_PHY_SCR_AUTO_CROSS, val);
  383. }
  384. static int marvell_config_aneg(struct phy_device *phydev)
  385. {
  386. int changed = 0;
  387. int err;
  388. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  389. if (err < 0)
  390. return err;
  391. changed = err;
  392. err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
  393. MII_M1111_PHY_LED_DIRECT);
  394. if (err < 0)
  395. return err;
  396. err = genphy_config_aneg(phydev);
  397. if (err < 0)
  398. return err;
  399. if (phydev->autoneg != AUTONEG_ENABLE || changed) {
  400. /* A write to speed/duplex bits (that is performed by
  401. * genphy_config_aneg() call above) must be followed by
  402. * a software reset. Otherwise, the write has no effect.
  403. */
  404. err = genphy_soft_reset(phydev);
  405. if (err < 0)
  406. return err;
  407. }
  408. return 0;
  409. }
  410. static int m88e1101_config_aneg(struct phy_device *phydev)
  411. {
  412. int err;
  413. /* This Marvell PHY has an errata which requires
  414. * that certain registers get written in order
  415. * to restart autonegotiation
  416. */
  417. err = genphy_soft_reset(phydev);
  418. if (err < 0)
  419. return err;
  420. err = phy_write(phydev, 0x1d, 0x1f);
  421. if (err < 0)
  422. return err;
  423. err = phy_write(phydev, 0x1e, 0x200c);
  424. if (err < 0)
  425. return err;
  426. err = phy_write(phydev, 0x1d, 0x5);
  427. if (err < 0)
  428. return err;
  429. err = phy_write(phydev, 0x1e, 0);
  430. if (err < 0)
  431. return err;
  432. err = phy_write(phydev, 0x1e, 0x100);
  433. if (err < 0)
  434. return err;
  435. return marvell_config_aneg(phydev);
  436. }
  437. #if IS_ENABLED(CONFIG_OF_MDIO)
  438. /* Set and/or override some configuration registers based on the
  439. * marvell,reg-init property stored in the of_node for the phydev.
  440. *
  441. * marvell,reg-init = <reg-page reg mask value>,...;
  442. *
  443. * There may be one or more sets of <reg-page reg mask value>:
  444. *
  445. * reg-page: which register bank to use.
  446. * reg: the register.
  447. * mask: if non-zero, ANDed with existing register value.
  448. * value: ORed with the masked value and written to the regiser.
  449. *
  450. */
  451. static int marvell_of_reg_init(struct phy_device *phydev)
  452. {
  453. const __be32 *paddr;
  454. int len, i, saved_page, current_page, ret = 0;
  455. if (!phydev->mdio.dev.of_node)
  456. return 0;
  457. paddr = of_get_property(phydev->mdio.dev.of_node,
  458. "marvell,reg-init", &len);
  459. if (!paddr || len < (4 * sizeof(*paddr)))
  460. return 0;
  461. saved_page = phy_save_page(phydev);
  462. if (saved_page < 0)
  463. goto err;
  464. current_page = saved_page;
  465. len /= sizeof(*paddr);
  466. for (i = 0; i < len - 3; i += 4) {
  467. u16 page = be32_to_cpup(paddr + i);
  468. u16 reg = be32_to_cpup(paddr + i + 1);
  469. u16 mask = be32_to_cpup(paddr + i + 2);
  470. u16 val_bits = be32_to_cpup(paddr + i + 3);
  471. int val;
  472. if (page != current_page) {
  473. current_page = page;
  474. ret = marvell_write_page(phydev, page);
  475. if (ret < 0)
  476. goto err;
  477. }
  478. val = 0;
  479. if (mask) {
  480. val = __phy_read(phydev, reg);
  481. if (val < 0) {
  482. ret = val;
  483. goto err;
  484. }
  485. val &= mask;
  486. }
  487. val |= val_bits;
  488. ret = __phy_write(phydev, reg, val);
  489. if (ret < 0)
  490. goto err;
  491. }
  492. err:
  493. return phy_restore_page(phydev, saved_page, ret);
  494. }
  495. #else
  496. static int marvell_of_reg_init(struct phy_device *phydev)
  497. {
  498. return 0;
  499. }
  500. #endif /* CONFIG_OF_MDIO */
  501. static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
  502. {
  503. int mscr;
  504. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
  505. mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
  506. MII_88E1121_PHY_MSCR_TX_DELAY;
  507. else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
  508. mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
  509. else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
  510. mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
  511. else
  512. mscr = 0;
  513. return phy_modify_paged_changed(phydev, MII_MARVELL_MSCR_PAGE,
  514. MII_88E1121_PHY_MSCR_REG,
  515. MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
  516. }
  517. static int m88e1121_config_aneg(struct phy_device *phydev)
  518. {
  519. int changed = 0;
  520. int err = 0;
  521. if (phy_interface_is_rgmii(phydev)) {
  522. err = m88e1121_config_aneg_rgmii_delays(phydev);
  523. if (err < 0)
  524. return err;
  525. }
  526. changed = err;
  527. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  528. if (err < 0)
  529. return err;
  530. changed |= err;
  531. err = genphy_config_aneg(phydev);
  532. if (err < 0)
  533. return err;
  534. if (phydev->autoneg != AUTONEG_ENABLE || changed) {
  535. /* A software reset is used to ensure a "commit" of the
  536. * changes is done.
  537. */
  538. err = genphy_soft_reset(phydev);
  539. if (err < 0)
  540. return err;
  541. }
  542. return 0;
  543. }
  544. static int m88e1318_config_aneg(struct phy_device *phydev)
  545. {
  546. int err;
  547. err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
  548. MII_88E1318S_PHY_MSCR1_REG,
  549. 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
  550. if (err < 0)
  551. return err;
  552. return m88e1121_config_aneg(phydev);
  553. }
  554. /**
  555. * linkmode_adv_to_fiber_adv_t
  556. * @advertise: the linkmode advertisement settings
  557. *
  558. * A small helper function that translates linkmode advertisement
  559. * settings to phy autonegotiation advertisements for the MII_ADV
  560. * register for fiber link.
  561. */
  562. static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
  563. {
  564. u32 result = 0;
  565. if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
  566. result |= ADVERTISE_1000XHALF;
  567. if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
  568. result |= ADVERTISE_1000XFULL;
  569. if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
  570. linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
  571. result |= ADVERTISE_1000XPSE_ASYM;
  572. else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
  573. result |= ADVERTISE_1000XPAUSE;
  574. return result;
  575. }
  576. /**
  577. * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
  578. * @phydev: target phy_device struct
  579. *
  580. * Description: If auto-negotiation is enabled, we configure the
  581. * advertising, and then restart auto-negotiation. If it is not
  582. * enabled, then we write the BMCR. Adapted for fiber link in
  583. * some Marvell's devices.
  584. */
  585. static int marvell_config_aneg_fiber(struct phy_device *phydev)
  586. {
  587. int changed = 0;
  588. int err;
  589. u16 adv;
  590. if (phydev->autoneg != AUTONEG_ENABLE)
  591. return genphy_setup_forced(phydev);
  592. /* Only allow advertising what this PHY supports */
  593. linkmode_and(phydev->advertising, phydev->advertising,
  594. phydev->supported);
  595. adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
  596. /* Setup fiber advertisement */
  597. err = phy_modify_changed(phydev, MII_ADVERTISE,
  598. ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
  599. ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
  600. adv);
  601. if (err < 0)
  602. return err;
  603. if (err > 0)
  604. changed = 1;
  605. return genphy_check_and_restart_aneg(phydev, changed);
  606. }
  607. static int m88e1111_config_aneg(struct phy_device *phydev)
  608. {
  609. int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  610. int err;
  611. if (extsr < 0)
  612. return extsr;
  613. /* If not using SGMII or copper 1000BaseX modes, use normal process.
  614. * Steps below are only required for these modes.
  615. */
  616. if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
  617. (extsr & MII_M1111_HWCFG_MODE_MASK) !=
  618. MII_M1111_HWCFG_MODE_COPPER_1000X_AN)
  619. return marvell_config_aneg(phydev);
  620. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  621. if (err < 0)
  622. goto error;
  623. /* Configure the copper link first */
  624. err = marvell_config_aneg(phydev);
  625. if (err < 0)
  626. goto error;
  627. /* Then the fiber link */
  628. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  629. if (err < 0)
  630. goto error;
  631. if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
  632. /* Do not touch the fiber advertisement if we're in copper->sgmii mode.
  633. * Just ensure that SGMII-side autonegotiation is enabled.
  634. * If we switched from some other mode to SGMII it may not be.
  635. */
  636. err = genphy_check_and_restart_aneg(phydev, false);
  637. else
  638. err = marvell_config_aneg_fiber(phydev);
  639. if (err < 0)
  640. goto error;
  641. return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  642. error:
  643. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  644. return err;
  645. }
  646. static int m88e1510_config_aneg(struct phy_device *phydev)
  647. {
  648. int err;
  649. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  650. if (err < 0)
  651. goto error;
  652. /* Configure the copper link first */
  653. err = m88e1318_config_aneg(phydev);
  654. if (err < 0)
  655. goto error;
  656. /* Do not touch the fiber page if we're in copper->sgmii mode */
  657. if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
  658. return 0;
  659. /* Then the fiber link */
  660. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  661. if (err < 0)
  662. goto error;
  663. err = marvell_config_aneg_fiber(phydev);
  664. if (err < 0)
  665. goto error;
  666. return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  667. error:
  668. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  669. return err;
  670. }
  671. static void marvell_config_led(struct phy_device *phydev)
  672. {
  673. u16 def_config;
  674. int err;
  675. switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
  676. /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
  677. case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
  678. case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
  679. def_config = MII_88E1121_PHY_LED_DEF;
  680. break;
  681. /* Default PHY LED config:
  682. * LED[0] .. 1000Mbps Link
  683. * LED[1] .. 100Mbps Link
  684. * LED[2] .. Blink, Activity
  685. */
  686. case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
  687. if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
  688. def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
  689. else
  690. def_config = MII_88E1510_PHY_LED_DEF;
  691. break;
  692. default:
  693. return;
  694. }
  695. err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
  696. def_config);
  697. if (err < 0)
  698. phydev_warn(phydev, "Fail to config marvell phy LED.\n");
  699. }
  700. static int marvell_config_init(struct phy_device *phydev)
  701. {
  702. /* Set default LED */
  703. marvell_config_led(phydev);
  704. /* Set registers from marvell,reg-init DT property */
  705. return marvell_of_reg_init(phydev);
  706. }
  707. static int m88e3016_config_init(struct phy_device *phydev)
  708. {
  709. int ret;
  710. /* Enable Scrambler and Auto-Crossover */
  711. ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
  712. MII_88E3016_DISABLE_SCRAMBLER,
  713. MII_88E3016_AUTO_MDIX_CROSSOVER);
  714. if (ret < 0)
  715. return ret;
  716. return marvell_config_init(phydev);
  717. }
  718. static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
  719. u16 mode,
  720. int fibre_copper_auto)
  721. {
  722. if (fibre_copper_auto)
  723. mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
  724. return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
  725. MII_M1111_HWCFG_MODE_MASK |
  726. MII_M1111_HWCFG_FIBER_COPPER_AUTO |
  727. MII_M1111_HWCFG_FIBER_COPPER_RES,
  728. mode);
  729. }
  730. static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
  731. {
  732. int delay;
  733. switch (phydev->interface) {
  734. case PHY_INTERFACE_MODE_RGMII_ID:
  735. delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
  736. break;
  737. case PHY_INTERFACE_MODE_RGMII_RXID:
  738. delay = MII_M1111_RGMII_RX_DELAY;
  739. break;
  740. case PHY_INTERFACE_MODE_RGMII_TXID:
  741. delay = MII_M1111_RGMII_TX_DELAY;
  742. break;
  743. default:
  744. delay = 0;
  745. break;
  746. }
  747. return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
  748. MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
  749. delay);
  750. }
  751. static int m88e1111_config_init_rgmii(struct phy_device *phydev)
  752. {
  753. int temp;
  754. int err;
  755. err = m88e1111_config_init_rgmii_delays(phydev);
  756. if (err < 0)
  757. return err;
  758. temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  759. if (temp < 0)
  760. return temp;
  761. temp &= ~(MII_M1111_HWCFG_MODE_MASK);
  762. if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
  763. temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
  764. else
  765. temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
  766. return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
  767. }
  768. static int m88e1111_config_init_sgmii(struct phy_device *phydev)
  769. {
  770. int err;
  771. err = m88e1111_config_init_hwcfg_mode(
  772. phydev,
  773. MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
  774. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  775. if (err < 0)
  776. return err;
  777. /* make sure copper is selected */
  778. return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  779. }
  780. static int m88e1111_config_init_rtbi(struct phy_device *phydev)
  781. {
  782. int err;
  783. err = m88e1111_config_init_rgmii_delays(phydev);
  784. if (err < 0)
  785. return err;
  786. err = m88e1111_config_init_hwcfg_mode(
  787. phydev,
  788. MII_M1111_HWCFG_MODE_RTBI,
  789. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  790. if (err < 0)
  791. return err;
  792. /* soft reset */
  793. err = genphy_soft_reset(phydev);
  794. if (err < 0)
  795. return err;
  796. return m88e1111_config_init_hwcfg_mode(
  797. phydev,
  798. MII_M1111_HWCFG_MODE_RTBI,
  799. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  800. }
  801. static int m88e1111_config_init_1000basex(struct phy_device *phydev)
  802. {
  803. int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  804. int err, mode;
  805. if (extsr < 0)
  806. return extsr;
  807. /* If using copper mode, ensure 1000BaseX auto-negotiation is enabled.
  808. * FIXME: this does not actually enable 1000BaseX auto-negotiation if
  809. * it was previously disabled in the Fiber BMCR!
  810. */
  811. mode = extsr & MII_M1111_HWCFG_MODE_MASK;
  812. if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) {
  813. err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
  814. MII_M1111_HWCFG_MODE_MASK |
  815. MII_M1111_HWCFG_SERIAL_AN_BYPASS,
  816. MII_M1111_HWCFG_MODE_COPPER_1000X_AN |
  817. MII_M1111_HWCFG_SERIAL_AN_BYPASS);
  818. if (err < 0)
  819. return err;
  820. }
  821. return 0;
  822. }
  823. static int m88e1111_config_init(struct phy_device *phydev)
  824. {
  825. int err;
  826. if (phy_interface_is_rgmii(phydev)) {
  827. err = m88e1111_config_init_rgmii(phydev);
  828. if (err < 0)
  829. return err;
  830. }
  831. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  832. err = m88e1111_config_init_sgmii(phydev);
  833. if (err < 0)
  834. return err;
  835. }
  836. if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
  837. err = m88e1111_config_init_rtbi(phydev);
  838. if (err < 0)
  839. return err;
  840. }
  841. if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) {
  842. err = m88e1111_config_init_1000basex(phydev);
  843. if (err < 0)
  844. return err;
  845. }
  846. err = marvell_of_reg_init(phydev);
  847. if (err < 0)
  848. return err;
  849. err = genphy_soft_reset(phydev);
  850. if (err < 0)
  851. return err;
  852. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  853. /* If the HWCFG_MODE was changed from another mode (such as
  854. * 1000BaseX) to SGMII, the state of the support bits may have
  855. * also changed now that the PHY has been reset.
  856. * Update the PHY abilities accordingly.
  857. */
  858. err = genphy_read_abilities(phydev);
  859. linkmode_or(phydev->advertising, phydev->advertising,
  860. phydev->supported);
  861. }
  862. return err;
  863. }
  864. static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
  865. {
  866. int val, cnt, enable;
  867. val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
  868. if (val < 0)
  869. return val;
  870. enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
  871. cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
  872. *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
  873. return 0;
  874. }
  875. static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
  876. {
  877. int val, err;
  878. if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
  879. return -E2BIG;
  880. if (!cnt) {
  881. err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
  882. MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
  883. } else {
  884. val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
  885. val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
  886. err = phy_modify(phydev, MII_M1111_PHY_EXT_CR,
  887. MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
  888. MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
  889. val);
  890. }
  891. if (err < 0)
  892. return err;
  893. return genphy_soft_reset(phydev);
  894. }
  895. static int m88e1111_get_tunable(struct phy_device *phydev,
  896. struct ethtool_tunable *tuna, void *data)
  897. {
  898. switch (tuna->id) {
  899. case ETHTOOL_PHY_DOWNSHIFT:
  900. return m88e1111_get_downshift(phydev, data);
  901. default:
  902. return -EOPNOTSUPP;
  903. }
  904. }
  905. static int m88e1111_set_tunable(struct phy_device *phydev,
  906. struct ethtool_tunable *tuna, const void *data)
  907. {
  908. switch (tuna->id) {
  909. case ETHTOOL_PHY_DOWNSHIFT:
  910. return m88e1111_set_downshift(phydev, *(const u8 *)data);
  911. default:
  912. return -EOPNOTSUPP;
  913. }
  914. }
  915. static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
  916. {
  917. int val, cnt, enable;
  918. val = phy_read(phydev, MII_M1011_PHY_SCR);
  919. if (val < 0)
  920. return val;
  921. enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
  922. cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
  923. *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
  924. return 0;
  925. }
  926. static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
  927. {
  928. int val, err;
  929. if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
  930. return -E2BIG;
  931. if (!cnt) {
  932. err = phy_clear_bits(phydev, MII_M1011_PHY_SCR,
  933. MII_M1011_PHY_SCR_DOWNSHIFT_EN);
  934. } else {
  935. val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
  936. val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
  937. err = phy_modify(phydev, MII_M1011_PHY_SCR,
  938. MII_M1011_PHY_SCR_DOWNSHIFT_EN |
  939. MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
  940. val);
  941. }
  942. if (err < 0)
  943. return err;
  944. return genphy_soft_reset(phydev);
  945. }
  946. static int m88e1011_get_tunable(struct phy_device *phydev,
  947. struct ethtool_tunable *tuna, void *data)
  948. {
  949. switch (tuna->id) {
  950. case ETHTOOL_PHY_DOWNSHIFT:
  951. return m88e1011_get_downshift(phydev, data);
  952. default:
  953. return -EOPNOTSUPP;
  954. }
  955. }
  956. static int m88e1011_set_tunable(struct phy_device *phydev,
  957. struct ethtool_tunable *tuna, const void *data)
  958. {
  959. switch (tuna->id) {
  960. case ETHTOOL_PHY_DOWNSHIFT:
  961. return m88e1011_set_downshift(phydev, *(const u8 *)data);
  962. default:
  963. return -EOPNOTSUPP;
  964. }
  965. }
  966. static int m88e1112_config_init(struct phy_device *phydev)
  967. {
  968. int err;
  969. err = m88e1011_set_downshift(phydev, 3);
  970. if (err < 0)
  971. return err;
  972. return m88e1111_config_init(phydev);
  973. }
  974. static int m88e1111gbe_config_init(struct phy_device *phydev)
  975. {
  976. int err;
  977. err = m88e1111_set_downshift(phydev, 3);
  978. if (err < 0)
  979. return err;
  980. return m88e1111_config_init(phydev);
  981. }
  982. static int marvell_1011gbe_config_init(struct phy_device *phydev)
  983. {
  984. int err;
  985. err = m88e1011_set_downshift(phydev, 3);
  986. if (err < 0)
  987. return err;
  988. return marvell_config_init(phydev);
  989. }
  990. static int m88e1116r_config_init(struct phy_device *phydev)
  991. {
  992. int err;
  993. err = genphy_soft_reset(phydev);
  994. if (err < 0)
  995. return err;
  996. msleep(500);
  997. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  998. if (err < 0)
  999. return err;
  1000. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  1001. if (err < 0)
  1002. return err;
  1003. err = m88e1011_set_downshift(phydev, 8);
  1004. if (err < 0)
  1005. return err;
  1006. if (phy_interface_is_rgmii(phydev)) {
  1007. err = m88e1121_config_aneg_rgmii_delays(phydev);
  1008. if (err < 0)
  1009. return err;
  1010. }
  1011. err = genphy_soft_reset(phydev);
  1012. if (err < 0)
  1013. return err;
  1014. return marvell_config_init(phydev);
  1015. }
  1016. static int m88e1318_config_init(struct phy_device *phydev)
  1017. {
  1018. if (phy_interrupt_is_valid(phydev)) {
  1019. int err = phy_modify_paged(
  1020. phydev, MII_MARVELL_LED_PAGE,
  1021. MII_88E1318S_PHY_LED_TCR,
  1022. MII_88E1318S_PHY_LED_TCR_FORCE_INT,
  1023. MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
  1024. MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
  1025. if (err < 0)
  1026. return err;
  1027. }
  1028. return marvell_config_init(phydev);
  1029. }
  1030. static int m88e1510_config_init(struct phy_device *phydev)
  1031. {
  1032. static const struct {
  1033. u16 reg17, reg16;
  1034. } errata_vals[] = {
  1035. { 0x214b, 0x2144 },
  1036. { 0x0c28, 0x2146 },
  1037. { 0xb233, 0x214d },
  1038. { 0xcc0c, 0x2159 },
  1039. };
  1040. int err;
  1041. int i;
  1042. /* As per Marvell Release Notes - Alaska 88E1510/88E1518/88E1512/
  1043. * 88E1514 Rev A0, Errata Section 5.1:
  1044. * If EEE is intended to be used, the following register writes
  1045. * must be done once after every hardware reset.
  1046. */
  1047. err = marvell_set_page(phydev, 0x00FF);
  1048. if (err < 0)
  1049. return err;
  1050. for (i = 0; i < ARRAY_SIZE(errata_vals); ++i) {
  1051. err = phy_write(phydev, 17, errata_vals[i].reg17);
  1052. if (err)
  1053. return err;
  1054. err = phy_write(phydev, 16, errata_vals[i].reg16);
  1055. if (err)
  1056. return err;
  1057. }
  1058. err = marvell_set_page(phydev, 0x00FB);
  1059. if (err < 0)
  1060. return err;
  1061. err = phy_write(phydev, 07, 0xC00D);
  1062. if (err < 0)
  1063. return err;
  1064. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1065. if (err < 0)
  1066. return err;
  1067. /* SGMII-to-Copper mode initialization */
  1068. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  1069. /* Select page 18 */
  1070. err = marvell_set_page(phydev, 18);
  1071. if (err < 0)
  1072. return err;
  1073. /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
  1074. err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
  1075. MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
  1076. MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
  1077. if (err < 0)
  1078. return err;
  1079. /* PHY reset is necessary after changing MODE[2:0] */
  1080. err = phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
  1081. MII_88E1510_GEN_CTRL_REG_1_RESET);
  1082. if (err < 0)
  1083. return err;
  1084. /* Reset page selection */
  1085. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1086. if (err < 0)
  1087. return err;
  1088. }
  1089. err = m88e1011_set_downshift(phydev, 3);
  1090. if (err < 0)
  1091. return err;
  1092. return m88e1318_config_init(phydev);
  1093. }
  1094. static int m88e1118_config_aneg(struct phy_device *phydev)
  1095. {
  1096. int err;
  1097. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  1098. if (err < 0)
  1099. return err;
  1100. err = genphy_config_aneg(phydev);
  1101. if (err < 0)
  1102. return err;
  1103. return genphy_soft_reset(phydev);
  1104. }
  1105. static int m88e1118_config_init(struct phy_device *phydev)
  1106. {
  1107. u16 leds;
  1108. int err;
  1109. /* Enable 1000 Mbit */
  1110. err = phy_write_paged(phydev, MII_MARVELL_MSCR_PAGE,
  1111. MII_88E1121_PHY_MSCR_REG, 0x1070);
  1112. if (err < 0)
  1113. return err;
  1114. if (phy_interface_is_rgmii(phydev)) {
  1115. err = m88e1121_config_aneg_rgmii_delays(phydev);
  1116. if (err < 0)
  1117. return err;
  1118. }
  1119. /* Adjust LED Control */
  1120. if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
  1121. leds = 0x1100;
  1122. else
  1123. leds = 0x021e;
  1124. err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, 0x10, leds);
  1125. if (err < 0)
  1126. return err;
  1127. err = marvell_of_reg_init(phydev);
  1128. if (err < 0)
  1129. return err;
  1130. /* Reset page register */
  1131. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1132. if (err < 0)
  1133. return err;
  1134. return genphy_soft_reset(phydev);
  1135. }
  1136. static int m88e1149_config_init(struct phy_device *phydev)
  1137. {
  1138. int err;
  1139. /* Change address */
  1140. err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
  1141. if (err < 0)
  1142. return err;
  1143. /* Enable 1000 Mbit */
  1144. err = phy_write(phydev, 0x15, 0x1048);
  1145. if (err < 0)
  1146. return err;
  1147. err = marvell_of_reg_init(phydev);
  1148. if (err < 0)
  1149. return err;
  1150. /* Reset address */
  1151. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1152. if (err < 0)
  1153. return err;
  1154. return genphy_soft_reset(phydev);
  1155. }
  1156. static int m88e1145_config_init_rgmii(struct phy_device *phydev)
  1157. {
  1158. int err;
  1159. err = m88e1111_config_init_rgmii_delays(phydev);
  1160. if (err < 0)
  1161. return err;
  1162. if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
  1163. err = phy_write(phydev, 0x1d, 0x0012);
  1164. if (err < 0)
  1165. return err;
  1166. err = phy_modify(phydev, 0x1e, 0x0fc0,
  1167. 2 << 9 | /* 36 ohm */
  1168. 2 << 6); /* 39 ohm */
  1169. if (err < 0)
  1170. return err;
  1171. err = phy_write(phydev, 0x1d, 0x3);
  1172. if (err < 0)
  1173. return err;
  1174. err = phy_write(phydev, 0x1e, 0x8000);
  1175. }
  1176. return err;
  1177. }
  1178. static int m88e1145_config_init_sgmii(struct phy_device *phydev)
  1179. {
  1180. return m88e1111_config_init_hwcfg_mode(
  1181. phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
  1182. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  1183. }
  1184. static int m88e1145_config_init(struct phy_device *phydev)
  1185. {
  1186. int err;
  1187. /* Take care of errata E0 & E1 */
  1188. err = phy_write(phydev, 0x1d, 0x001b);
  1189. if (err < 0)
  1190. return err;
  1191. err = phy_write(phydev, 0x1e, 0x418f);
  1192. if (err < 0)
  1193. return err;
  1194. err = phy_write(phydev, 0x1d, 0x0016);
  1195. if (err < 0)
  1196. return err;
  1197. err = phy_write(phydev, 0x1e, 0xa2da);
  1198. if (err < 0)
  1199. return err;
  1200. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  1201. err = m88e1145_config_init_rgmii(phydev);
  1202. if (err < 0)
  1203. return err;
  1204. }
  1205. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  1206. err = m88e1145_config_init_sgmii(phydev);
  1207. if (err < 0)
  1208. return err;
  1209. }
  1210. err = m88e1111_set_downshift(phydev, 3);
  1211. if (err < 0)
  1212. return err;
  1213. err = marvell_of_reg_init(phydev);
  1214. if (err < 0)
  1215. return err;
  1216. return 0;
  1217. }
  1218. static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
  1219. {
  1220. int val;
  1221. val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
  1222. if (val < 0)
  1223. return val;
  1224. if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
  1225. *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
  1226. return 0;
  1227. }
  1228. val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
  1229. switch (val) {
  1230. case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
  1231. *msecs = 0;
  1232. break;
  1233. case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
  1234. *msecs = 10;
  1235. break;
  1236. case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
  1237. *msecs = 20;
  1238. break;
  1239. case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
  1240. *msecs = 40;
  1241. break;
  1242. default:
  1243. return -EINVAL;
  1244. }
  1245. return 0;
  1246. }
  1247. static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
  1248. {
  1249. struct ethtool_keee eee;
  1250. int val, ret;
  1251. if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
  1252. return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
  1253. MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
  1254. /* According to the Marvell data sheet EEE must be disabled for
  1255. * Fast Link Down detection to work properly
  1256. */
  1257. ret = genphy_c45_ethtool_get_eee(phydev, &eee);
  1258. if (!ret && eee.eee_enabled) {
  1259. phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
  1260. return -EBUSY;
  1261. }
  1262. if (*msecs <= 5)
  1263. val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
  1264. else if (*msecs <= 15)
  1265. val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
  1266. else if (*msecs <= 30)
  1267. val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
  1268. else
  1269. val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
  1270. val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
  1271. ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
  1272. MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
  1273. if (ret)
  1274. return ret;
  1275. return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
  1276. MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
  1277. }
  1278. static int m88e1540_get_tunable(struct phy_device *phydev,
  1279. struct ethtool_tunable *tuna, void *data)
  1280. {
  1281. switch (tuna->id) {
  1282. case ETHTOOL_PHY_FAST_LINK_DOWN:
  1283. return m88e1540_get_fld(phydev, data);
  1284. case ETHTOOL_PHY_DOWNSHIFT:
  1285. return m88e1011_get_downshift(phydev, data);
  1286. default:
  1287. return -EOPNOTSUPP;
  1288. }
  1289. }
  1290. static int m88e1540_set_tunable(struct phy_device *phydev,
  1291. struct ethtool_tunable *tuna, const void *data)
  1292. {
  1293. switch (tuna->id) {
  1294. case ETHTOOL_PHY_FAST_LINK_DOWN:
  1295. return m88e1540_set_fld(phydev, data);
  1296. case ETHTOOL_PHY_DOWNSHIFT:
  1297. return m88e1011_set_downshift(phydev, *(const u8 *)data);
  1298. default:
  1299. return -EOPNOTSUPP;
  1300. }
  1301. }
  1302. /* The VOD can be out of specification on link up. Poke an
  1303. * undocumented register, in an undocumented page, with a magic value
  1304. * to fix this.
  1305. */
  1306. static int m88e6390_errata(struct phy_device *phydev)
  1307. {
  1308. int err;
  1309. err = phy_write(phydev, MII_BMCR,
  1310. BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
  1311. if (err)
  1312. return err;
  1313. usleep_range(300, 400);
  1314. err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
  1315. if (err)
  1316. return err;
  1317. return genphy_soft_reset(phydev);
  1318. }
  1319. static int m88e6390_config_aneg(struct phy_device *phydev)
  1320. {
  1321. int err;
  1322. err = m88e6390_errata(phydev);
  1323. if (err)
  1324. return err;
  1325. return m88e1510_config_aneg(phydev);
  1326. }
  1327. /**
  1328. * fiber_lpa_mod_linkmode_lpa_t
  1329. * @advertising: the linkmode advertisement settings
  1330. * @lpa: value of the MII_LPA register for fiber link
  1331. *
  1332. * A small helper function that translates MII_LPA bits to linkmode LP
  1333. * advertisement settings. Other bits in advertising are left
  1334. * unchanged.
  1335. */
  1336. static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
  1337. {
  1338. linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
  1339. advertising, lpa & LPA_1000XHALF);
  1340. linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
  1341. advertising, lpa & LPA_1000XFULL);
  1342. }
  1343. static int marvell_read_status_page_an(struct phy_device *phydev,
  1344. int fiber, int status)
  1345. {
  1346. int lpa;
  1347. int err;
  1348. if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
  1349. phydev->link = 0;
  1350. return 0;
  1351. }
  1352. if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
  1353. phydev->duplex = DUPLEX_FULL;
  1354. else
  1355. phydev->duplex = DUPLEX_HALF;
  1356. switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
  1357. case MII_M1011_PHY_STATUS_1000:
  1358. phydev->speed = SPEED_1000;
  1359. break;
  1360. case MII_M1011_PHY_STATUS_100:
  1361. phydev->speed = SPEED_100;
  1362. break;
  1363. default:
  1364. phydev->speed = SPEED_10;
  1365. break;
  1366. }
  1367. if (!fiber) {
  1368. err = genphy_read_lpa(phydev);
  1369. if (err < 0)
  1370. return err;
  1371. phy_resolve_aneg_pause(phydev);
  1372. } else {
  1373. lpa = phy_read(phydev, MII_LPA);
  1374. if (lpa < 0)
  1375. return lpa;
  1376. /* The fiber link is only 1000M capable */
  1377. fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
  1378. if (phydev->duplex == DUPLEX_FULL) {
  1379. if (!(lpa & LPA_PAUSE_FIBER)) {
  1380. phydev->pause = 0;
  1381. phydev->asym_pause = 0;
  1382. } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
  1383. phydev->pause = 1;
  1384. phydev->asym_pause = 1;
  1385. } else {
  1386. phydev->pause = 1;
  1387. phydev->asym_pause = 0;
  1388. }
  1389. }
  1390. }
  1391. return 0;
  1392. }
  1393. /* marvell_read_status_page
  1394. *
  1395. * Description:
  1396. * Check the link, then figure out the current state
  1397. * by comparing what we advertise with what the link partner
  1398. * advertises. Start by checking the gigabit possibilities,
  1399. * then move on to 10/100.
  1400. */
  1401. static int marvell_read_status_page(struct phy_device *phydev, int page)
  1402. {
  1403. int status;
  1404. int fiber;
  1405. int err;
  1406. status = phy_read(phydev, MII_M1011_PHY_STATUS);
  1407. if (status < 0)
  1408. return status;
  1409. /* Use the generic register for copper link status,
  1410. * and the PHY status register for fiber link status.
  1411. */
  1412. if (page == MII_MARVELL_FIBER_PAGE) {
  1413. phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
  1414. } else {
  1415. err = genphy_update_link(phydev);
  1416. if (err)
  1417. return err;
  1418. }
  1419. if (page == MII_MARVELL_FIBER_PAGE)
  1420. fiber = 1;
  1421. else
  1422. fiber = 0;
  1423. linkmode_zero(phydev->lp_advertising);
  1424. phydev->pause = 0;
  1425. phydev->asym_pause = 0;
  1426. phydev->speed = SPEED_UNKNOWN;
  1427. phydev->duplex = DUPLEX_UNKNOWN;
  1428. phydev->port = fiber ? PORT_FIBRE : PORT_TP;
  1429. if (phydev->autoneg == AUTONEG_ENABLE)
  1430. err = marvell_read_status_page_an(phydev, fiber, status);
  1431. else
  1432. err = genphy_read_status_fixed(phydev);
  1433. return err;
  1434. }
  1435. /* marvell_read_status
  1436. *
  1437. * Some Marvell's phys have two modes: fiber and copper.
  1438. * Both need status checked.
  1439. * Description:
  1440. * First, check the fiber link and status.
  1441. * If the fiber link is down, check the copper link and status which
  1442. * will be the default value if both link are down.
  1443. */
  1444. static int marvell_read_status(struct phy_device *phydev)
  1445. {
  1446. int err;
  1447. /* Check the fiber mode first */
  1448. if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
  1449. phydev->supported) &&
  1450. phydev->interface != PHY_INTERFACE_MODE_SGMII) {
  1451. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1452. if (err < 0)
  1453. goto error;
  1454. err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
  1455. if (err < 0)
  1456. goto error;
  1457. /* If the fiber link is up, it is the selected and
  1458. * used link. In this case, we need to stay in the
  1459. * fiber page. Please to be careful about that, avoid
  1460. * to restore Copper page in other functions which
  1461. * could break the behaviour for some fiber phy like
  1462. * 88E1512.
  1463. */
  1464. if (phydev->link)
  1465. return 0;
  1466. /* If fiber link is down, check and save copper mode state */
  1467. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1468. if (err < 0)
  1469. goto error;
  1470. }
  1471. return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
  1472. error:
  1473. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1474. return err;
  1475. }
  1476. /* marvell_suspend
  1477. *
  1478. * Some Marvell's phys have two modes: fiber and copper.
  1479. * Both need to be suspended
  1480. */
  1481. static int marvell_suspend(struct phy_device *phydev)
  1482. {
  1483. int err;
  1484. /* Suspend the fiber mode first */
  1485. if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
  1486. phydev->supported)) {
  1487. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1488. if (err < 0)
  1489. goto error;
  1490. /* With the page set, use the generic suspend */
  1491. err = genphy_suspend(phydev);
  1492. if (err < 0)
  1493. goto error;
  1494. /* Then, the copper link */
  1495. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1496. if (err < 0)
  1497. goto error;
  1498. }
  1499. /* With the page set, use the generic suspend */
  1500. return genphy_suspend(phydev);
  1501. error:
  1502. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1503. return err;
  1504. }
  1505. /* marvell_resume
  1506. *
  1507. * Some Marvell's phys have two modes: fiber and copper.
  1508. * Both need to be resumed
  1509. */
  1510. static int marvell_resume(struct phy_device *phydev)
  1511. {
  1512. int err;
  1513. /* Resume the fiber mode first */
  1514. if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
  1515. phydev->supported)) {
  1516. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1517. if (err < 0)
  1518. goto error;
  1519. /* With the page set, use the generic resume */
  1520. err = genphy_resume(phydev);
  1521. if (err < 0)
  1522. goto error;
  1523. /* Then, the copper link */
  1524. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1525. if (err < 0)
  1526. goto error;
  1527. }
  1528. /* With the page set, use the generic resume */
  1529. return genphy_resume(phydev);
  1530. error:
  1531. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1532. return err;
  1533. }
  1534. static int marvell_aneg_done(struct phy_device *phydev)
  1535. {
  1536. int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
  1537. return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
  1538. }
  1539. static void m88e1318_get_wol(struct phy_device *phydev,
  1540. struct ethtool_wolinfo *wol)
  1541. {
  1542. int ret;
  1543. wol->supported = WAKE_MAGIC | WAKE_PHY;
  1544. wol->wolopts = 0;
  1545. ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE,
  1546. MII_88E1318S_PHY_WOL_CTRL);
  1547. if (ret < 0)
  1548. return;
  1549. if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
  1550. wol->wolopts |= WAKE_MAGIC;
  1551. if (ret & MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE)
  1552. wol->wolopts |= WAKE_PHY;
  1553. }
  1554. static int m88e1318_set_wol(struct phy_device *phydev,
  1555. struct ethtool_wolinfo *wol)
  1556. {
  1557. int err = 0, oldpage;
  1558. oldpage = phy_save_page(phydev);
  1559. if (oldpage < 0)
  1560. goto error;
  1561. if (wol->wolopts & (WAKE_MAGIC | WAKE_PHY)) {
  1562. /* Explicitly switch to page 0x00, just to be sure */
  1563. err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
  1564. if (err < 0)
  1565. goto error;
  1566. /* If WOL event happened once, the LED[2] interrupt pin
  1567. * will not be cleared unless we reading the interrupt status
  1568. * register. If interrupts are in use, the normal interrupt
  1569. * handling will clear the WOL event. Clear the WOL event
  1570. * before enabling it if !phy_interrupt_is_valid()
  1571. */
  1572. if (!phy_interrupt_is_valid(phydev))
  1573. __phy_read(phydev, MII_M1011_IEVENT);
  1574. /* Enable the WOL interrupt */
  1575. err = __phy_set_bits(phydev, MII_88E1318S_PHY_CSIER,
  1576. MII_88E1318S_PHY_CSIER_WOL_EIE);
  1577. if (err < 0)
  1578. goto error;
  1579. err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
  1580. if (err < 0)
  1581. goto error;
  1582. /* Setup LED[2] as interrupt pin (active low) */
  1583. err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
  1584. MII_88E1318S_PHY_LED_TCR_FORCE_INT,
  1585. MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
  1586. MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
  1587. if (err < 0)
  1588. goto error;
  1589. }
  1590. if (wol->wolopts & WAKE_MAGIC) {
  1591. err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
  1592. if (err < 0)
  1593. goto error;
  1594. /* Store the device address for the magic packet */
  1595. err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
  1596. ((phydev->attached_dev->dev_addr[5] << 8) |
  1597. phydev->attached_dev->dev_addr[4]));
  1598. if (err < 0)
  1599. goto error;
  1600. err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
  1601. ((phydev->attached_dev->dev_addr[3] << 8) |
  1602. phydev->attached_dev->dev_addr[2]));
  1603. if (err < 0)
  1604. goto error;
  1605. err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
  1606. ((phydev->attached_dev->dev_addr[1] << 8) |
  1607. phydev->attached_dev->dev_addr[0]));
  1608. if (err < 0)
  1609. goto error;
  1610. /* Clear WOL status and enable magic packet matching */
  1611. err = __phy_set_bits(phydev, MII_88E1318S_PHY_WOL_CTRL,
  1612. MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
  1613. MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
  1614. if (err < 0)
  1615. goto error;
  1616. } else {
  1617. err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
  1618. if (err < 0)
  1619. goto error;
  1620. /* Clear WOL status and disable magic packet matching */
  1621. err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
  1622. MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
  1623. MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
  1624. if (err < 0)
  1625. goto error;
  1626. }
  1627. if (wol->wolopts & WAKE_PHY) {
  1628. err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
  1629. if (err < 0)
  1630. goto error;
  1631. /* Clear WOL status and enable link up event */
  1632. err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
  1633. MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
  1634. MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE);
  1635. if (err < 0)
  1636. goto error;
  1637. } else {
  1638. err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
  1639. if (err < 0)
  1640. goto error;
  1641. /* Clear WOL status and disable link up event */
  1642. err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
  1643. MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE,
  1644. MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
  1645. if (err < 0)
  1646. goto error;
  1647. }
  1648. error:
  1649. return phy_restore_page(phydev, oldpage, err);
  1650. }
  1651. static int marvell_get_sset_count(struct phy_device *phydev)
  1652. {
  1653. if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
  1654. phydev->supported))
  1655. return ARRAY_SIZE(marvell_hw_stats);
  1656. else
  1657. return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
  1658. }
  1659. static int marvell_get_sset_count_simple(struct phy_device *phydev)
  1660. {
  1661. return ARRAY_SIZE(marvell_hw_stats_simple);
  1662. }
  1663. static void marvell_get_strings(struct phy_device *phydev, u8 *data)
  1664. {
  1665. int count = marvell_get_sset_count(phydev);
  1666. int i;
  1667. for (i = 0; i < count; i++) {
  1668. strscpy(data + i * ETH_GSTRING_LEN,
  1669. marvell_hw_stats[i].string, ETH_GSTRING_LEN);
  1670. }
  1671. }
  1672. static void marvell_get_strings_simple(struct phy_device *phydev, u8 *data)
  1673. {
  1674. int count = marvell_get_sset_count_simple(phydev);
  1675. int i;
  1676. for (i = 0; i < count; i++) {
  1677. strscpy(data + i * ETH_GSTRING_LEN,
  1678. marvell_hw_stats_simple[i].string, ETH_GSTRING_LEN);
  1679. }
  1680. }
  1681. static u64 marvell_get_stat(struct phy_device *phydev, int i)
  1682. {
  1683. struct marvell_hw_stat stat = marvell_hw_stats[i];
  1684. struct marvell_priv *priv = phydev->priv;
  1685. int val;
  1686. u64 ret;
  1687. val = phy_read_paged(phydev, stat.page, stat.reg);
  1688. if (val < 0) {
  1689. ret = U64_MAX;
  1690. } else {
  1691. val = val & ((1 << stat.bits) - 1);
  1692. priv->stats[i] += val;
  1693. ret = priv->stats[i];
  1694. }
  1695. return ret;
  1696. }
  1697. static u64 marvell_get_stat_simple(struct phy_device *phydev, int i)
  1698. {
  1699. struct marvell_hw_stat_simple stat = marvell_hw_stats_simple[i];
  1700. struct marvell_priv *priv = phydev->priv;
  1701. int val;
  1702. u64 ret;
  1703. val = phy_read(phydev, stat.reg);
  1704. if (val < 0) {
  1705. ret = U64_MAX;
  1706. } else {
  1707. val = val & ((1 << stat.bits) - 1);
  1708. priv->stats[i] += val;
  1709. ret = priv->stats[i];
  1710. }
  1711. return ret;
  1712. }
  1713. static void marvell_get_stats(struct phy_device *phydev,
  1714. struct ethtool_stats *stats, u64 *data)
  1715. {
  1716. int count = marvell_get_sset_count(phydev);
  1717. int i;
  1718. for (i = 0; i < count; i++)
  1719. data[i] = marvell_get_stat(phydev, i);
  1720. }
  1721. static void marvell_get_stats_simple(struct phy_device *phydev,
  1722. struct ethtool_stats *stats, u64 *data)
  1723. {
  1724. int count = marvell_get_sset_count_simple(phydev);
  1725. int i;
  1726. for (i = 0; i < count; i++)
  1727. data[i] = marvell_get_stat_simple(phydev, i);
  1728. }
  1729. static int m88e1510_loopback(struct phy_device *phydev, bool enable)
  1730. {
  1731. int err;
  1732. if (enable) {
  1733. u16 bmcr_ctl, mscr2_ctl = 0;
  1734. bmcr_ctl = mii_bmcr_encode_fixed(phydev->speed, phydev->duplex);
  1735. err = phy_write(phydev, MII_BMCR, bmcr_ctl);
  1736. if (err < 0)
  1737. return err;
  1738. if (phydev->speed == SPEED_1000)
  1739. mscr2_ctl = BMCR_SPEED1000;
  1740. else if (phydev->speed == SPEED_100)
  1741. mscr2_ctl = BMCR_SPEED100;
  1742. err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
  1743. MII_88E1510_MSCR_2, BMCR_SPEED1000 |
  1744. BMCR_SPEED100, mscr2_ctl);
  1745. if (err < 0)
  1746. return err;
  1747. /* Need soft reset to have speed configuration takes effect */
  1748. err = genphy_soft_reset(phydev);
  1749. if (err < 0)
  1750. return err;
  1751. err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK,
  1752. BMCR_LOOPBACK);
  1753. if (!err) {
  1754. /* It takes some time for PHY device to switch
  1755. * into/out-of loopback mode.
  1756. */
  1757. msleep(1000);
  1758. }
  1759. return err;
  1760. } else {
  1761. err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 0);
  1762. if (err < 0)
  1763. return err;
  1764. return phy_config_aneg(phydev);
  1765. }
  1766. }
  1767. static int marvell_vct5_wait_complete(struct phy_device *phydev)
  1768. {
  1769. int i;
  1770. int val;
  1771. for (i = 0; i < 32; i++) {
  1772. val = __phy_read(phydev, MII_VCT5_CTRL);
  1773. if (val < 0)
  1774. return val;
  1775. if (val & MII_VCT5_CTRL_COMPLETE)
  1776. return 0;
  1777. }
  1778. phydev_err(phydev, "Timeout while waiting for cable test to finish\n");
  1779. return -ETIMEDOUT;
  1780. }
  1781. static int marvell_vct5_amplitude(struct phy_device *phydev, int pair)
  1782. {
  1783. int amplitude;
  1784. int val;
  1785. int reg;
  1786. reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair;
  1787. val = __phy_read(phydev, reg);
  1788. if (val < 0)
  1789. return 0;
  1790. amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >>
  1791. MII_VCT5_TX_RX_AMPLITUDE_SHIFT;
  1792. if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION))
  1793. amplitude = -amplitude;
  1794. return 1000 * amplitude / 128;
  1795. }
  1796. static u32 marvell_vct5_distance2cm(int distance)
  1797. {
  1798. return distance * 805 / 10;
  1799. }
  1800. static u32 marvell_vct5_cm2distance(int cm)
  1801. {
  1802. return cm * 10 / 805;
  1803. }
  1804. static int marvell_vct5_amplitude_distance(struct phy_device *phydev,
  1805. int distance, int pair)
  1806. {
  1807. u16 reg;
  1808. int err;
  1809. int mV;
  1810. int i;
  1811. err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE,
  1812. distance);
  1813. if (err)
  1814. return err;
  1815. reg = MII_VCT5_CTRL_ENABLE |
  1816. MII_VCT5_CTRL_TX_SAME_CHANNEL |
  1817. MII_VCT5_CTRL_SAMPLES_DEFAULT |
  1818. MII_VCT5_CTRL_SAMPLE_POINT |
  1819. MII_VCT5_CTRL_PEEK_HYST_DEFAULT;
  1820. err = __phy_write(phydev, MII_VCT5_CTRL, reg);
  1821. if (err)
  1822. return err;
  1823. err = marvell_vct5_wait_complete(phydev);
  1824. if (err)
  1825. return err;
  1826. for (i = 0; i < 4; i++) {
  1827. if (pair != PHY_PAIR_ALL && i != pair)
  1828. continue;
  1829. mV = marvell_vct5_amplitude(phydev, i);
  1830. ethnl_cable_test_amplitude(phydev, i, mV);
  1831. }
  1832. return 0;
  1833. }
  1834. static int marvell_vct5_amplitude_graph(struct phy_device *phydev)
  1835. {
  1836. struct marvell_priv *priv = phydev->priv;
  1837. int distance;
  1838. u16 width;
  1839. int page;
  1840. int err;
  1841. u16 reg;
  1842. if (priv->first <= TDR_SHORT_CABLE_LENGTH)
  1843. width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS;
  1844. else
  1845. width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
  1846. reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
  1847. MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
  1848. MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
  1849. err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
  1850. MII_VCT5_TX_PULSE_CTRL, reg);
  1851. if (err)
  1852. return err;
  1853. /* Reading the TDR data is very MDIO heavy. We need to optimize
  1854. * access to keep the time to a minimum. So lock the bus once,
  1855. * and don't release it until complete. We can then avoid having
  1856. * to change the page for every access, greatly speeding things
  1857. * up.
  1858. */
  1859. page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE);
  1860. if (page < 0)
  1861. goto restore_page;
  1862. for (distance = priv->first;
  1863. distance <= priv->last;
  1864. distance += priv->step) {
  1865. err = marvell_vct5_amplitude_distance(phydev, distance,
  1866. priv->pair);
  1867. if (err)
  1868. goto restore_page;
  1869. if (distance > TDR_SHORT_CABLE_LENGTH &&
  1870. width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) {
  1871. width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
  1872. reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
  1873. MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
  1874. MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
  1875. err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg);
  1876. if (err)
  1877. goto restore_page;
  1878. }
  1879. }
  1880. restore_page:
  1881. return phy_restore_page(phydev, page, err);
  1882. }
  1883. static int marvell_cable_test_start_common(struct phy_device *phydev)
  1884. {
  1885. int bmcr, bmsr, ret;
  1886. /* If auto-negotiation is enabled, but not complete, the cable
  1887. * test never completes. So disable auto-neg.
  1888. */
  1889. bmcr = phy_read(phydev, MII_BMCR);
  1890. if (bmcr < 0)
  1891. return bmcr;
  1892. bmsr = phy_read(phydev, MII_BMSR);
  1893. if (bmsr < 0)
  1894. return bmsr;
  1895. if (bmcr & BMCR_ANENABLE) {
  1896. ret = phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE);
  1897. if (ret < 0)
  1898. return ret;
  1899. ret = genphy_soft_reset(phydev);
  1900. if (ret < 0)
  1901. return ret;
  1902. }
  1903. /* If the link is up, allow it some time to go down */
  1904. if (bmsr & BMSR_LSTATUS)
  1905. msleep(1500);
  1906. return 0;
  1907. }
  1908. static int marvell_vct7_cable_test_start(struct phy_device *phydev)
  1909. {
  1910. struct marvell_priv *priv = phydev->priv;
  1911. int ret;
  1912. ret = marvell_cable_test_start_common(phydev);
  1913. if (ret)
  1914. return ret;
  1915. priv->cable_test_tdr = false;
  1916. /* Reset the VCT5 API control to defaults, otherwise
  1917. * VCT7 does not work correctly.
  1918. */
  1919. ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
  1920. MII_VCT5_CTRL,
  1921. MII_VCT5_CTRL_TX_SAME_CHANNEL |
  1922. MII_VCT5_CTRL_SAMPLES_DEFAULT |
  1923. MII_VCT5_CTRL_MODE_MAXIMUM_PEEK |
  1924. MII_VCT5_CTRL_PEEK_HYST_DEFAULT);
  1925. if (ret)
  1926. return ret;
  1927. ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
  1928. MII_VCT5_SAMPLE_POINT_DISTANCE, 0);
  1929. if (ret)
  1930. return ret;
  1931. return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
  1932. MII_VCT7_CTRL,
  1933. MII_VCT7_CTRL_RUN_NOW |
  1934. MII_VCT7_CTRL_CENTIMETERS);
  1935. }
  1936. static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev,
  1937. const struct phy_tdr_config *cfg)
  1938. {
  1939. struct marvell_priv *priv = phydev->priv;
  1940. int ret;
  1941. priv->cable_test_tdr = true;
  1942. priv->first = marvell_vct5_cm2distance(cfg->first);
  1943. priv->last = marvell_vct5_cm2distance(cfg->last);
  1944. priv->step = marvell_vct5_cm2distance(cfg->step);
  1945. priv->pair = cfg->pair;
  1946. if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
  1947. return -EINVAL;
  1948. if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
  1949. return -EINVAL;
  1950. /* Disable VCT7 */
  1951. ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
  1952. MII_VCT7_CTRL, 0);
  1953. if (ret)
  1954. return ret;
  1955. ret = marvell_cable_test_start_common(phydev);
  1956. if (ret)
  1957. return ret;
  1958. ret = ethnl_cable_test_pulse(phydev, 1000);
  1959. if (ret)
  1960. return ret;
  1961. return ethnl_cable_test_step(phydev,
  1962. marvell_vct5_distance2cm(priv->first),
  1963. marvell_vct5_distance2cm(priv->last),
  1964. marvell_vct5_distance2cm(priv->step));
  1965. }
  1966. static int marvell_vct7_distance_to_length(int distance, bool meter)
  1967. {
  1968. if (meter)
  1969. distance *= 100;
  1970. return distance;
  1971. }
  1972. static bool marvell_vct7_distance_valid(int result)
  1973. {
  1974. switch (result) {
  1975. case MII_VCT7_RESULTS_OPEN:
  1976. case MII_VCT7_RESULTS_SAME_SHORT:
  1977. case MII_VCT7_RESULTS_CROSS_SHORT:
  1978. return true;
  1979. }
  1980. return false;
  1981. }
  1982. static int marvell_vct7_report_length(struct phy_device *phydev,
  1983. int pair, bool meter)
  1984. {
  1985. int length;
  1986. int ret;
  1987. ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
  1988. MII_VCT7_PAIR_0_DISTANCE + pair);
  1989. if (ret < 0)
  1990. return ret;
  1991. length = marvell_vct7_distance_to_length(ret, meter);
  1992. ethnl_cable_test_fault_length(phydev, pair, length);
  1993. return 0;
  1994. }
  1995. static int marvell_vct7_cable_test_report_trans(int result)
  1996. {
  1997. switch (result) {
  1998. case MII_VCT7_RESULTS_OK:
  1999. return ETHTOOL_A_CABLE_RESULT_CODE_OK;
  2000. case MII_VCT7_RESULTS_OPEN:
  2001. return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
  2002. case MII_VCT7_RESULTS_SAME_SHORT:
  2003. return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
  2004. case MII_VCT7_RESULTS_CROSS_SHORT:
  2005. return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
  2006. default:
  2007. return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
  2008. }
  2009. }
  2010. static int marvell_vct7_cable_test_report(struct phy_device *phydev)
  2011. {
  2012. int pair0, pair1, pair2, pair3;
  2013. bool meter;
  2014. int ret;
  2015. ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
  2016. MII_VCT7_RESULTS);
  2017. if (ret < 0)
  2018. return ret;
  2019. pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >>
  2020. MII_VCT7_RESULTS_PAIR3_SHIFT;
  2021. pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >>
  2022. MII_VCT7_RESULTS_PAIR2_SHIFT;
  2023. pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >>
  2024. MII_VCT7_RESULTS_PAIR1_SHIFT;
  2025. pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >>
  2026. MII_VCT7_RESULTS_PAIR0_SHIFT;
  2027. ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
  2028. marvell_vct7_cable_test_report_trans(pair0));
  2029. ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
  2030. marvell_vct7_cable_test_report_trans(pair1));
  2031. ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
  2032. marvell_vct7_cable_test_report_trans(pair2));
  2033. ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
  2034. marvell_vct7_cable_test_report_trans(pair3));
  2035. ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL);
  2036. if (ret < 0)
  2037. return ret;
  2038. meter = ret & MII_VCT7_CTRL_METERS;
  2039. if (marvell_vct7_distance_valid(pair0))
  2040. marvell_vct7_report_length(phydev, 0, meter);
  2041. if (marvell_vct7_distance_valid(pair1))
  2042. marvell_vct7_report_length(phydev, 1, meter);
  2043. if (marvell_vct7_distance_valid(pair2))
  2044. marvell_vct7_report_length(phydev, 2, meter);
  2045. if (marvell_vct7_distance_valid(pair3))
  2046. marvell_vct7_report_length(phydev, 3, meter);
  2047. return 0;
  2048. }
  2049. static int marvell_vct7_cable_test_get_status(struct phy_device *phydev,
  2050. bool *finished)
  2051. {
  2052. struct marvell_priv *priv = phydev->priv;
  2053. int ret;
  2054. if (priv->cable_test_tdr) {
  2055. ret = marvell_vct5_amplitude_graph(phydev);
  2056. *finished = true;
  2057. return ret;
  2058. }
  2059. *finished = false;
  2060. ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
  2061. MII_VCT7_CTRL);
  2062. if (ret < 0)
  2063. return ret;
  2064. if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) {
  2065. *finished = true;
  2066. return marvell_vct7_cable_test_report(phydev);
  2067. }
  2068. return 0;
  2069. }
  2070. static int m88e3082_vct_cable_test_start(struct phy_device *phydev)
  2071. {
  2072. struct marvell_priv *priv = phydev->priv;
  2073. int ret;
  2074. /* It needs some magic workarounds described in VCT manual for this PHY.
  2075. */
  2076. ret = phy_write(phydev, 29, 0x0003);
  2077. if (ret < 0)
  2078. return ret;
  2079. ret = phy_write(phydev, 30, 0x6440);
  2080. if (ret < 0)
  2081. return ret;
  2082. if (priv->vct_phase == M88E3082_VCT_PHASE1) {
  2083. ret = phy_write(phydev, 29, 0x000a);
  2084. if (ret < 0)
  2085. return ret;
  2086. ret = phy_write(phydev, 30, 0x0002);
  2087. if (ret < 0)
  2088. return ret;
  2089. }
  2090. ret = phy_write(phydev, MII_BMCR,
  2091. BMCR_RESET | BMCR_SPEED100 | BMCR_FULLDPLX);
  2092. if (ret < 0)
  2093. return ret;
  2094. ret = phy_write(phydev, MII_VCT_TXPINS, MII_VCT_TXPINS_ENVCT);
  2095. if (ret < 0)
  2096. return ret;
  2097. ret = phy_write(phydev, 29, 0x0003);
  2098. if (ret < 0)
  2099. return ret;
  2100. ret = phy_write(phydev, 30, 0x0);
  2101. if (ret < 0)
  2102. return ret;
  2103. if (priv->vct_phase == M88E3082_VCT_OFF) {
  2104. priv->vct_phase = M88E3082_VCT_PHASE1;
  2105. priv->pair = 0;
  2106. return 0;
  2107. }
  2108. ret = phy_write(phydev, 29, 0x000a);
  2109. if (ret < 0)
  2110. return ret;
  2111. ret = phy_write(phydev, 30, 0x0);
  2112. if (ret < 0)
  2113. return ret;
  2114. priv->vct_phase = M88E3082_VCT_PHASE2;
  2115. return 0;
  2116. }
  2117. static int m88e3082_vct_cable_test_report_trans(int result, u8 distance)
  2118. {
  2119. switch (result) {
  2120. case MII_VCT_TXRXPINS_VCTTST_OK:
  2121. if (distance == MII_VCT_TXRXPINS_DISTRFLN_MAX)
  2122. return ETHTOOL_A_CABLE_RESULT_CODE_OK;
  2123. return ETHTOOL_A_CABLE_RESULT_CODE_IMPEDANCE_MISMATCH;
  2124. case MII_VCT_TXRXPINS_VCTTST_SHORT:
  2125. return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
  2126. case MII_VCT_TXRXPINS_VCTTST_OPEN:
  2127. return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
  2128. default:
  2129. return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
  2130. }
  2131. }
  2132. static u32 m88e3082_vct_distrfln_2_cm(u8 distrfln)
  2133. {
  2134. if (distrfln < 24)
  2135. return 0;
  2136. /* Original function for meters: y = 0.7861x - 18.862 */
  2137. return (7861 * distrfln - 188620) / 100;
  2138. }
  2139. static int m88e3082_vct_cable_test_get_status(struct phy_device *phydev,
  2140. bool *finished)
  2141. {
  2142. u8 tx_vcttst_res, rx_vcttst_res, tx_distrfln, rx_distrfln;
  2143. struct marvell_priv *priv = phydev->priv;
  2144. int ret, tx_result, rx_result;
  2145. bool done_phase = true;
  2146. *finished = false;
  2147. ret = phy_read(phydev, MII_VCT_TXPINS);
  2148. if (ret < 0)
  2149. return ret;
  2150. else if (ret & MII_VCT_TXPINS_ENVCT)
  2151. return 0;
  2152. tx_distrfln = ret & MII_VCT_TXRXPINS_DISTRFLN;
  2153. tx_vcttst_res = (ret & MII_VCT_TXRXPINS_VCTTST) >>
  2154. MII_VCT_TXRXPINS_VCTTST_SHIFT;
  2155. ret = phy_read(phydev, MII_VCT_RXPINS);
  2156. if (ret < 0)
  2157. return ret;
  2158. rx_distrfln = ret & MII_VCT_TXRXPINS_DISTRFLN;
  2159. rx_vcttst_res = (ret & MII_VCT_TXRXPINS_VCTTST) >>
  2160. MII_VCT_TXRXPINS_VCTTST_SHIFT;
  2161. *finished = true;
  2162. switch (priv->vct_phase) {
  2163. case M88E3082_VCT_PHASE1:
  2164. tx_result = m88e3082_vct_cable_test_report_trans(tx_vcttst_res,
  2165. tx_distrfln);
  2166. rx_result = m88e3082_vct_cable_test_report_trans(rx_vcttst_res,
  2167. rx_distrfln);
  2168. ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
  2169. tx_result);
  2170. ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
  2171. rx_result);
  2172. if (tx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN) {
  2173. done_phase = false;
  2174. priv->pair |= M88E3082_PAIR_A;
  2175. } else if (tx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
  2176. u8 pair = ETHTOOL_A_CABLE_PAIR_A;
  2177. u32 cm = m88e3082_vct_distrfln_2_cm(tx_distrfln);
  2178. ethnl_cable_test_fault_length(phydev, pair, cm);
  2179. }
  2180. if (rx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN) {
  2181. done_phase = false;
  2182. priv->pair |= M88E3082_PAIR_B;
  2183. } else if (rx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
  2184. u8 pair = ETHTOOL_A_CABLE_PAIR_B;
  2185. u32 cm = m88e3082_vct_distrfln_2_cm(rx_distrfln);
  2186. ethnl_cable_test_fault_length(phydev, pair, cm);
  2187. }
  2188. break;
  2189. case M88E3082_VCT_PHASE2:
  2190. if (priv->pair & M88E3082_PAIR_A &&
  2191. tx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN &&
  2192. tx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
  2193. u8 pair = ETHTOOL_A_CABLE_PAIR_A;
  2194. u32 cm = m88e3082_vct_distrfln_2_cm(tx_distrfln);
  2195. ethnl_cable_test_fault_length(phydev, pair, cm);
  2196. }
  2197. if (priv->pair & M88E3082_PAIR_B &&
  2198. rx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN &&
  2199. rx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
  2200. u8 pair = ETHTOOL_A_CABLE_PAIR_B;
  2201. u32 cm = m88e3082_vct_distrfln_2_cm(rx_distrfln);
  2202. ethnl_cable_test_fault_length(phydev, pair, cm);
  2203. }
  2204. break;
  2205. default:
  2206. return -EINVAL;
  2207. }
  2208. if (!done_phase) {
  2209. *finished = false;
  2210. return m88e3082_vct_cable_test_start(phydev);
  2211. }
  2212. if (*finished)
  2213. priv->vct_phase = M88E3082_VCT_OFF;
  2214. return 0;
  2215. }
  2216. static int m88e1111_vct_cable_test_start(struct phy_device *phydev)
  2217. {
  2218. int ret;
  2219. ret = marvell_cable_test_start_common(phydev);
  2220. if (ret)
  2221. return ret;
  2222. /* It needs some magic workarounds described in VCT manual for this PHY.
  2223. */
  2224. ret = phy_write(phydev, 29, 0x0018);
  2225. if (ret < 0)
  2226. return ret;
  2227. ret = phy_write(phydev, 30, 0x00c2);
  2228. if (ret < 0)
  2229. return ret;
  2230. ret = phy_write(phydev, 30, 0x00ca);
  2231. if (ret < 0)
  2232. return ret;
  2233. ret = phy_write(phydev, 30, 0x00c2);
  2234. if (ret < 0)
  2235. return ret;
  2236. ret = phy_write_paged(phydev, MII_MARVELL_COPPER_PAGE, MII_VCT_SR,
  2237. MII_VCT_TXPINS_ENVCT);
  2238. if (ret < 0)
  2239. return ret;
  2240. ret = phy_write(phydev, 29, 0x0018);
  2241. if (ret < 0)
  2242. return ret;
  2243. ret = phy_write(phydev, 30, 0x0042);
  2244. if (ret < 0)
  2245. return ret;
  2246. return 0;
  2247. }
  2248. static u32 m88e1111_vct_distrfln_2_cm(u8 distrfln)
  2249. {
  2250. if (distrfln < 36)
  2251. return 0;
  2252. /* Original function for meters: y = 0.8018x - 28.751 */
  2253. return (8018 * distrfln - 287510) / 100;
  2254. }
  2255. static int m88e1111_vct_cable_test_get_status(struct phy_device *phydev,
  2256. bool *finished)
  2257. {
  2258. u8 vcttst_res, distrfln;
  2259. int ret, result;
  2260. *finished = false;
  2261. /* Each pair use one page: A-0, B-1, C-2, D-3 */
  2262. for (u8 i = 0; i < 4; i++) {
  2263. ret = phy_read_paged(phydev, i, MII_VCT_SR);
  2264. if (ret < 0)
  2265. return ret;
  2266. else if (i == 0 && ret & MII_VCT_TXPINS_ENVCT)
  2267. return 0;
  2268. distrfln = ret & MII_VCT_TXRXPINS_DISTRFLN;
  2269. vcttst_res = (ret & MII_VCT_TXRXPINS_VCTTST) >>
  2270. MII_VCT_TXRXPINS_VCTTST_SHIFT;
  2271. result = m88e3082_vct_cable_test_report_trans(vcttst_res,
  2272. distrfln);
  2273. ethnl_cable_test_result(phydev, i, result);
  2274. if (distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
  2275. u32 cm = m88e1111_vct_distrfln_2_cm(distrfln);
  2276. ethnl_cable_test_fault_length(phydev, i, cm);
  2277. }
  2278. }
  2279. *finished = true;
  2280. return 0;
  2281. }
  2282. #ifdef CONFIG_HWMON
  2283. struct marvell_hwmon_ops {
  2284. int (*config)(struct phy_device *phydev);
  2285. int (*get_temp)(struct phy_device *phydev, long *temp);
  2286. int (*get_temp_critical)(struct phy_device *phydev, long *temp);
  2287. int (*set_temp_critical)(struct phy_device *phydev, long temp);
  2288. int (*get_temp_alarm)(struct phy_device *phydev, long *alarm);
  2289. };
  2290. static const struct marvell_hwmon_ops *
  2291. to_marvell_hwmon_ops(const struct phy_device *phydev)
  2292. {
  2293. return phydev->drv->driver_data;
  2294. }
  2295. static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
  2296. {
  2297. int oldpage;
  2298. int ret = 0;
  2299. int val;
  2300. *temp = 0;
  2301. oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  2302. if (oldpage < 0)
  2303. goto error;
  2304. /* Enable temperature sensor */
  2305. ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
  2306. if (ret < 0)
  2307. goto error;
  2308. ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
  2309. ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
  2310. if (ret < 0)
  2311. goto error;
  2312. /* Wait for temperature to stabilize */
  2313. usleep_range(10000, 12000);
  2314. val = __phy_read(phydev, MII_88E1121_MISC_TEST);
  2315. if (val < 0) {
  2316. ret = val;
  2317. goto error;
  2318. }
  2319. /* Disable temperature sensor */
  2320. ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
  2321. ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
  2322. if (ret < 0)
  2323. goto error;
  2324. *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
  2325. error:
  2326. return phy_restore_page(phydev, oldpage, ret);
  2327. }
  2328. static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
  2329. {
  2330. int ret;
  2331. *temp = 0;
  2332. ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  2333. MII_88E1510_TEMP_SENSOR);
  2334. if (ret < 0)
  2335. return ret;
  2336. *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
  2337. return 0;
  2338. }
  2339. static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
  2340. {
  2341. int ret;
  2342. *temp = 0;
  2343. ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  2344. MII_88E1121_MISC_TEST);
  2345. if (ret < 0)
  2346. return ret;
  2347. *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
  2348. MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
  2349. /* convert to mC */
  2350. *temp *= 1000;
  2351. return 0;
  2352. }
  2353. static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
  2354. {
  2355. temp = temp / 1000;
  2356. temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
  2357. return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  2358. MII_88E1121_MISC_TEST,
  2359. MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
  2360. temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
  2361. }
  2362. static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
  2363. {
  2364. int ret;
  2365. *alarm = false;
  2366. ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  2367. MII_88E1121_MISC_TEST);
  2368. if (ret < 0)
  2369. return ret;
  2370. *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
  2371. return 0;
  2372. }
  2373. static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
  2374. {
  2375. int sum = 0;
  2376. int oldpage;
  2377. int ret = 0;
  2378. int i;
  2379. *temp = 0;
  2380. oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  2381. if (oldpage < 0)
  2382. goto error;
  2383. /* Enable temperature sensor */
  2384. ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
  2385. if (ret < 0)
  2386. goto error;
  2387. ret &= ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
  2388. ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S;
  2389. ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
  2390. if (ret < 0)
  2391. goto error;
  2392. /* Wait for temperature to stabilize */
  2393. usleep_range(10000, 12000);
  2394. /* Reading the temperature sense has an errata. You need to read
  2395. * a number of times and take an average.
  2396. */
  2397. for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
  2398. ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
  2399. if (ret < 0)
  2400. goto error;
  2401. sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
  2402. }
  2403. sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
  2404. *temp = (sum - 75) * 1000;
  2405. /* Disable temperature sensor */
  2406. ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
  2407. if (ret < 0)
  2408. goto error;
  2409. ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
  2410. ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE;
  2411. ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
  2412. error:
  2413. phy_restore_page(phydev, oldpage, ret);
  2414. return ret;
  2415. }
  2416. static int m88e6393_get_temp(struct phy_device *phydev, long *temp)
  2417. {
  2418. int err;
  2419. err = m88e1510_get_temp(phydev, temp);
  2420. /* 88E1510 measures T + 25, while the PHY on 88E6393X switch
  2421. * T + 75, so we have to subtract another 50
  2422. */
  2423. *temp -= 50000;
  2424. return err;
  2425. }
  2426. static int m88e6393_get_temp_critical(struct phy_device *phydev, long *temp)
  2427. {
  2428. int ret;
  2429. *temp = 0;
  2430. ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  2431. MII_88E6390_TEMP_SENSOR);
  2432. if (ret < 0)
  2433. return ret;
  2434. *temp = (((ret & MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK) >>
  2435. MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT) - 75) * 1000;
  2436. return 0;
  2437. }
  2438. static int m88e6393_set_temp_critical(struct phy_device *phydev, long temp)
  2439. {
  2440. temp = (temp / 1000) + 75;
  2441. return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  2442. MII_88E6390_TEMP_SENSOR,
  2443. MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK,
  2444. temp << MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT);
  2445. }
  2446. static int m88e6393_hwmon_config(struct phy_device *phydev)
  2447. {
  2448. int err;
  2449. err = m88e6393_set_temp_critical(phydev, 100000);
  2450. if (err)
  2451. return err;
  2452. return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  2453. MII_88E6390_MISC_TEST,
  2454. MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK |
  2455. MII_88E6393_MISC_TEST_SAMPLES_MASK |
  2456. MII_88E6393_MISC_TEST_RATE_MASK,
  2457. MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE |
  2458. MII_88E6393_MISC_TEST_SAMPLES_2048 |
  2459. MII_88E6393_MISC_TEST_RATE_2_3MS);
  2460. }
  2461. static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
  2462. u32 attr, int channel, long *temp)
  2463. {
  2464. struct phy_device *phydev = dev_get_drvdata(dev);
  2465. const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
  2466. int err = -EOPNOTSUPP;
  2467. switch (attr) {
  2468. case hwmon_temp_input:
  2469. if (ops->get_temp)
  2470. err = ops->get_temp(phydev, temp);
  2471. break;
  2472. case hwmon_temp_crit:
  2473. if (ops->get_temp_critical)
  2474. err = ops->get_temp_critical(phydev, temp);
  2475. break;
  2476. case hwmon_temp_max_alarm:
  2477. if (ops->get_temp_alarm)
  2478. err = ops->get_temp_alarm(phydev, temp);
  2479. break;
  2480. }
  2481. return err;
  2482. }
  2483. static int marvell_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
  2484. u32 attr, int channel, long temp)
  2485. {
  2486. struct phy_device *phydev = dev_get_drvdata(dev);
  2487. const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
  2488. int err = -EOPNOTSUPP;
  2489. switch (attr) {
  2490. case hwmon_temp_crit:
  2491. if (ops->set_temp_critical)
  2492. err = ops->set_temp_critical(phydev, temp);
  2493. break;
  2494. }
  2495. return err;
  2496. }
  2497. static umode_t marvell_hwmon_is_visible(const void *data,
  2498. enum hwmon_sensor_types type,
  2499. u32 attr, int channel)
  2500. {
  2501. const struct phy_device *phydev = data;
  2502. const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
  2503. if (type != hwmon_temp)
  2504. return 0;
  2505. switch (attr) {
  2506. case hwmon_temp_input:
  2507. return ops->get_temp ? 0444 : 0;
  2508. case hwmon_temp_max_alarm:
  2509. return ops->get_temp_alarm ? 0444 : 0;
  2510. case hwmon_temp_crit:
  2511. return (ops->get_temp_critical ? 0444 : 0) |
  2512. (ops->set_temp_critical ? 0200 : 0);
  2513. default:
  2514. return 0;
  2515. }
  2516. }
  2517. static u32 marvell_hwmon_chip_config[] = {
  2518. HWMON_C_REGISTER_TZ,
  2519. 0
  2520. };
  2521. static const struct hwmon_channel_info marvell_hwmon_chip = {
  2522. .type = hwmon_chip,
  2523. .config = marvell_hwmon_chip_config,
  2524. };
  2525. /* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not
  2526. * defined for all PHYs, because the hwmon code checks whether the attributes
  2527. * exists via the .is_visible method
  2528. */
  2529. static u32 marvell_hwmon_temp_config[] = {
  2530. HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
  2531. 0
  2532. };
  2533. static const struct hwmon_channel_info marvell_hwmon_temp = {
  2534. .type = hwmon_temp,
  2535. .config = marvell_hwmon_temp_config,
  2536. };
  2537. static const struct hwmon_channel_info * const marvell_hwmon_info[] = {
  2538. &marvell_hwmon_chip,
  2539. &marvell_hwmon_temp,
  2540. NULL
  2541. };
  2542. static const struct hwmon_ops marvell_hwmon_hwmon_ops = {
  2543. .is_visible = marvell_hwmon_is_visible,
  2544. .read = marvell_hwmon_read,
  2545. .write = marvell_hwmon_write,
  2546. };
  2547. static const struct hwmon_chip_info marvell_hwmon_chip_info = {
  2548. .ops = &marvell_hwmon_hwmon_ops,
  2549. .info = marvell_hwmon_info,
  2550. };
  2551. static int marvell_hwmon_name(struct phy_device *phydev)
  2552. {
  2553. struct marvell_priv *priv = phydev->priv;
  2554. struct device *dev = &phydev->mdio.dev;
  2555. const char *devname = dev_name(dev);
  2556. size_t len = strlen(devname);
  2557. int i, j;
  2558. priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
  2559. if (!priv->hwmon_name)
  2560. return -ENOMEM;
  2561. for (i = j = 0; i < len && devname[i]; i++) {
  2562. if (isalnum(devname[i]))
  2563. priv->hwmon_name[j++] = devname[i];
  2564. }
  2565. return 0;
  2566. }
  2567. static int marvell_hwmon_probe(struct phy_device *phydev)
  2568. {
  2569. const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
  2570. struct marvell_priv *priv = phydev->priv;
  2571. struct device *dev = &phydev->mdio.dev;
  2572. int err;
  2573. if (!ops)
  2574. return 0;
  2575. err = marvell_hwmon_name(phydev);
  2576. if (err)
  2577. return err;
  2578. priv->hwmon_dev = devm_hwmon_device_register_with_info(
  2579. dev, priv->hwmon_name, phydev, &marvell_hwmon_chip_info, NULL);
  2580. if (IS_ERR(priv->hwmon_dev))
  2581. return PTR_ERR(priv->hwmon_dev);
  2582. if (ops->config)
  2583. err = ops->config(phydev);
  2584. return err;
  2585. }
  2586. static const struct marvell_hwmon_ops m88e1121_hwmon_ops = {
  2587. .get_temp = m88e1121_get_temp,
  2588. };
  2589. static const struct marvell_hwmon_ops m88e1510_hwmon_ops = {
  2590. .get_temp = m88e1510_get_temp,
  2591. .get_temp_critical = m88e1510_get_temp_critical,
  2592. .set_temp_critical = m88e1510_set_temp_critical,
  2593. .get_temp_alarm = m88e1510_get_temp_alarm,
  2594. };
  2595. static const struct marvell_hwmon_ops m88e6390_hwmon_ops = {
  2596. .get_temp = m88e6390_get_temp,
  2597. };
  2598. static const struct marvell_hwmon_ops m88e6393_hwmon_ops = {
  2599. .config = m88e6393_hwmon_config,
  2600. .get_temp = m88e6393_get_temp,
  2601. .get_temp_critical = m88e6393_get_temp_critical,
  2602. .set_temp_critical = m88e6393_set_temp_critical,
  2603. .get_temp_alarm = m88e1510_get_temp_alarm,
  2604. };
  2605. #define DEF_MARVELL_HWMON_OPS(s) (&(s))
  2606. #else
  2607. #define DEF_MARVELL_HWMON_OPS(s) NULL
  2608. static int marvell_hwmon_probe(struct phy_device *phydev)
  2609. {
  2610. return 0;
  2611. }
  2612. #endif
  2613. static int m88e1318_led_brightness_set(struct phy_device *phydev,
  2614. u8 index, enum led_brightness value)
  2615. {
  2616. int reg;
  2617. reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
  2618. MII_88E1318S_PHY_LED_FUNC);
  2619. if (reg < 0)
  2620. return reg;
  2621. switch (index) {
  2622. case 0:
  2623. case 1:
  2624. case 2:
  2625. reg &= ~(0xf << (4 * index));
  2626. if (value == LED_OFF)
  2627. reg |= MII_88E1318S_PHY_LED_FUNC_OFF << (4 * index);
  2628. else
  2629. reg |= MII_88E1318S_PHY_LED_FUNC_ON << (4 * index);
  2630. break;
  2631. default:
  2632. return -EINVAL;
  2633. }
  2634. return phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
  2635. MII_88E1318S_PHY_LED_FUNC, reg);
  2636. }
  2637. static int m88e1318_led_blink_set(struct phy_device *phydev, u8 index,
  2638. unsigned long *delay_on,
  2639. unsigned long *delay_off)
  2640. {
  2641. int reg;
  2642. reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
  2643. MII_88E1318S_PHY_LED_FUNC);
  2644. if (reg < 0)
  2645. return reg;
  2646. switch (index) {
  2647. case 0:
  2648. case 1:
  2649. case 2:
  2650. reg &= ~(0xf << (4 * index));
  2651. reg |= MII_88E1318S_PHY_LED_FUNC_BLINK << (4 * index);
  2652. /* Reset default is 84ms */
  2653. *delay_on = 84 / 2;
  2654. *delay_off = 84 / 2;
  2655. break;
  2656. default:
  2657. return -EINVAL;
  2658. }
  2659. return phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
  2660. MII_88E1318S_PHY_LED_FUNC, reg);
  2661. }
  2662. struct marvell_led_rules {
  2663. int mode;
  2664. unsigned long rules;
  2665. };
  2666. static const struct marvell_led_rules marvell_led0[] = {
  2667. {
  2668. .mode = 0,
  2669. .rules = BIT(TRIGGER_NETDEV_LINK),
  2670. },
  2671. {
  2672. .mode = 1,
  2673. .rules = (BIT(TRIGGER_NETDEV_LINK) |
  2674. BIT(TRIGGER_NETDEV_RX) |
  2675. BIT(TRIGGER_NETDEV_TX)),
  2676. },
  2677. {
  2678. .mode = 3,
  2679. .rules = (BIT(TRIGGER_NETDEV_RX) |
  2680. BIT(TRIGGER_NETDEV_TX)),
  2681. },
  2682. {
  2683. .mode = 4,
  2684. .rules = (BIT(TRIGGER_NETDEV_RX) |
  2685. BIT(TRIGGER_NETDEV_TX)),
  2686. },
  2687. {
  2688. .mode = 5,
  2689. .rules = BIT(TRIGGER_NETDEV_TX),
  2690. },
  2691. {
  2692. .mode = 6,
  2693. .rules = BIT(TRIGGER_NETDEV_LINK),
  2694. },
  2695. {
  2696. .mode = 7,
  2697. .rules = BIT(TRIGGER_NETDEV_LINK_1000),
  2698. },
  2699. {
  2700. .mode = 8,
  2701. .rules = 0,
  2702. },
  2703. };
  2704. static const struct marvell_led_rules marvell_led1[] = {
  2705. {
  2706. .mode = 1,
  2707. .rules = (BIT(TRIGGER_NETDEV_LINK) |
  2708. BIT(TRIGGER_NETDEV_RX) |
  2709. BIT(TRIGGER_NETDEV_TX)),
  2710. },
  2711. {
  2712. .mode = 2,
  2713. .rules = (BIT(TRIGGER_NETDEV_LINK) |
  2714. BIT(TRIGGER_NETDEV_RX)),
  2715. },
  2716. {
  2717. .mode = 3,
  2718. .rules = (BIT(TRIGGER_NETDEV_RX) |
  2719. BIT(TRIGGER_NETDEV_TX)),
  2720. },
  2721. {
  2722. .mode = 4,
  2723. .rules = (BIT(TRIGGER_NETDEV_RX) |
  2724. BIT(TRIGGER_NETDEV_TX)),
  2725. },
  2726. {
  2727. .mode = 6,
  2728. .rules = (BIT(TRIGGER_NETDEV_LINK_100) |
  2729. BIT(TRIGGER_NETDEV_LINK_1000)),
  2730. },
  2731. {
  2732. .mode = 7,
  2733. .rules = BIT(TRIGGER_NETDEV_LINK_100),
  2734. },
  2735. {
  2736. .mode = 8,
  2737. .rules = 0,
  2738. },
  2739. };
  2740. static const struct marvell_led_rules marvell_led2[] = {
  2741. {
  2742. .mode = 0,
  2743. .rules = BIT(TRIGGER_NETDEV_LINK),
  2744. },
  2745. {
  2746. .mode = 1,
  2747. .rules = (BIT(TRIGGER_NETDEV_LINK) |
  2748. BIT(TRIGGER_NETDEV_RX) |
  2749. BIT(TRIGGER_NETDEV_TX)),
  2750. },
  2751. {
  2752. .mode = 3,
  2753. .rules = (BIT(TRIGGER_NETDEV_RX) |
  2754. BIT(TRIGGER_NETDEV_TX)),
  2755. },
  2756. {
  2757. .mode = 4,
  2758. .rules = (BIT(TRIGGER_NETDEV_RX) |
  2759. BIT(TRIGGER_NETDEV_TX)),
  2760. },
  2761. {
  2762. .mode = 5,
  2763. .rules = BIT(TRIGGER_NETDEV_TX),
  2764. },
  2765. {
  2766. .mode = 6,
  2767. .rules = (BIT(TRIGGER_NETDEV_LINK_10) |
  2768. BIT(TRIGGER_NETDEV_LINK_1000)),
  2769. },
  2770. {
  2771. .mode = 7,
  2772. .rules = BIT(TRIGGER_NETDEV_LINK_10),
  2773. },
  2774. {
  2775. .mode = 8,
  2776. .rules = 0,
  2777. },
  2778. };
  2779. static int marvell_find_led_mode(unsigned long rules,
  2780. const struct marvell_led_rules *marvell_rules,
  2781. int count,
  2782. int *mode)
  2783. {
  2784. int i;
  2785. for (i = 0; i < count; i++) {
  2786. if (marvell_rules[i].rules == rules) {
  2787. *mode = marvell_rules[i].mode;
  2788. return 0;
  2789. }
  2790. }
  2791. return -EOPNOTSUPP;
  2792. }
  2793. static int marvell_get_led_mode(u8 index, unsigned long rules, int *mode)
  2794. {
  2795. int ret;
  2796. switch (index) {
  2797. case 0:
  2798. ret = marvell_find_led_mode(rules, marvell_led0,
  2799. ARRAY_SIZE(marvell_led0), mode);
  2800. break;
  2801. case 1:
  2802. ret = marvell_find_led_mode(rules, marvell_led1,
  2803. ARRAY_SIZE(marvell_led1), mode);
  2804. break;
  2805. case 2:
  2806. ret = marvell_find_led_mode(rules, marvell_led2,
  2807. ARRAY_SIZE(marvell_led2), mode);
  2808. break;
  2809. default:
  2810. ret = -EINVAL;
  2811. }
  2812. return ret;
  2813. }
  2814. static int marvell_find_led_rules(unsigned long *rules,
  2815. const struct marvell_led_rules *marvell_rules,
  2816. int count,
  2817. int mode)
  2818. {
  2819. int i;
  2820. for (i = 0; i < count; i++) {
  2821. if (marvell_rules[i].mode == mode) {
  2822. *rules = marvell_rules[i].rules;
  2823. return 0;
  2824. }
  2825. }
  2826. return -EOPNOTSUPP;
  2827. }
  2828. static int marvell_get_led_rules(u8 index, unsigned long *rules, int mode)
  2829. {
  2830. int ret;
  2831. switch (index) {
  2832. case 0:
  2833. ret = marvell_find_led_rules(rules, marvell_led0,
  2834. ARRAY_SIZE(marvell_led0), mode);
  2835. break;
  2836. case 1:
  2837. ret = marvell_find_led_rules(rules, marvell_led1,
  2838. ARRAY_SIZE(marvell_led1), mode);
  2839. break;
  2840. case 2:
  2841. ret = marvell_find_led_rules(rules, marvell_led2,
  2842. ARRAY_SIZE(marvell_led2), mode);
  2843. break;
  2844. default:
  2845. ret = -EOPNOTSUPP;
  2846. }
  2847. return ret;
  2848. }
  2849. static int m88e1318_led_hw_is_supported(struct phy_device *phydev, u8 index,
  2850. unsigned long rules)
  2851. {
  2852. int mode, ret;
  2853. switch (index) {
  2854. case 0:
  2855. case 1:
  2856. case 2:
  2857. ret = marvell_get_led_mode(index, rules, &mode);
  2858. break;
  2859. default:
  2860. ret = -EINVAL;
  2861. }
  2862. return ret;
  2863. }
  2864. static int m88e1318_led_hw_control_set(struct phy_device *phydev, u8 index,
  2865. unsigned long rules)
  2866. {
  2867. int mode, ret, reg;
  2868. switch (index) {
  2869. case 0:
  2870. case 1:
  2871. case 2:
  2872. ret = marvell_get_led_mode(index, rules, &mode);
  2873. break;
  2874. default:
  2875. ret = -EINVAL;
  2876. }
  2877. if (ret < 0)
  2878. return ret;
  2879. reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
  2880. MII_88E1318S_PHY_LED_FUNC);
  2881. if (reg < 0)
  2882. return reg;
  2883. reg &= ~(0xf << (4 * index));
  2884. reg |= mode << (4 * index);
  2885. return phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
  2886. MII_88E1318S_PHY_LED_FUNC, reg);
  2887. }
  2888. static int m88e1318_led_hw_control_get(struct phy_device *phydev, u8 index,
  2889. unsigned long *rules)
  2890. {
  2891. int mode, reg;
  2892. if (index > 2)
  2893. return -EINVAL;
  2894. reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
  2895. MII_88E1318S_PHY_LED_FUNC);
  2896. if (reg < 0)
  2897. return reg;
  2898. mode = (reg >> (4 * index)) & 0xf;
  2899. return marvell_get_led_rules(index, rules, mode);
  2900. }
  2901. static int marvell_probe(struct phy_device *phydev)
  2902. {
  2903. struct marvell_priv *priv;
  2904. priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
  2905. if (!priv)
  2906. return -ENOMEM;
  2907. phydev->priv = priv;
  2908. return marvell_hwmon_probe(phydev);
  2909. }
  2910. static int m88e1510_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
  2911. {
  2912. DECLARE_PHY_INTERFACE_MASK(interfaces);
  2913. struct phy_device *phydev = upstream;
  2914. phy_interface_t interface;
  2915. struct device *dev;
  2916. int oldpage;
  2917. int ret = 0;
  2918. u16 mode;
  2919. __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };
  2920. dev = &phydev->mdio.dev;
  2921. sfp_parse_support(phydev->sfp_bus, id, supported, interfaces);
  2922. interface = sfp_select_interface(phydev->sfp_bus, supported);
  2923. dev_info(dev, "%s SFP module inserted\n", phy_modes(interface));
  2924. switch (interface) {
  2925. case PHY_INTERFACE_MODE_1000BASEX:
  2926. mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X;
  2927. break;
  2928. case PHY_INTERFACE_MODE_100BASEX:
  2929. mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX;
  2930. break;
  2931. case PHY_INTERFACE_MODE_SGMII:
  2932. mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII;
  2933. break;
  2934. default:
  2935. dev_err(dev, "Incompatible SFP module inserted\n");
  2936. return -EINVAL;
  2937. }
  2938. oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
  2939. if (oldpage < 0)
  2940. goto error;
  2941. ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
  2942. MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, mode);
  2943. if (ret < 0)
  2944. goto error;
  2945. ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
  2946. MII_88E1510_GEN_CTRL_REG_1_RESET);
  2947. error:
  2948. return phy_restore_page(phydev, oldpage, ret);
  2949. }
  2950. static void m88e1510_sfp_remove(void *upstream)
  2951. {
  2952. struct phy_device *phydev = upstream;
  2953. int oldpage;
  2954. int ret = 0;
  2955. oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
  2956. if (oldpage < 0)
  2957. goto error;
  2958. ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
  2959. MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
  2960. MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII);
  2961. if (ret < 0)
  2962. goto error;
  2963. ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
  2964. MII_88E1510_GEN_CTRL_REG_1_RESET);
  2965. error:
  2966. phy_restore_page(phydev, oldpage, ret);
  2967. }
  2968. static const struct sfp_upstream_ops m88e1510_sfp_ops = {
  2969. .module_insert = m88e1510_sfp_insert,
  2970. .module_remove = m88e1510_sfp_remove,
  2971. .attach = phy_sfp_attach,
  2972. .detach = phy_sfp_detach,
  2973. .connect_phy = phy_sfp_connect_phy,
  2974. .disconnect_phy = phy_sfp_disconnect_phy,
  2975. };
  2976. static int m88e1510_probe(struct phy_device *phydev)
  2977. {
  2978. int err;
  2979. err = marvell_probe(phydev);
  2980. if (err)
  2981. return err;
  2982. return phy_sfp_probe(phydev, &m88e1510_sfp_ops);
  2983. }
  2984. static struct phy_driver marvell_drivers[] = {
  2985. {
  2986. .phy_id = MARVELL_PHY_ID_88E1101,
  2987. .phy_id_mask = MARVELL_PHY_ID_MASK,
  2988. .name = "Marvell 88E1101",
  2989. /* PHY_GBIT_FEATURES */
  2990. .probe = marvell_probe,
  2991. .config_init = marvell_config_init,
  2992. .config_aneg = m88e1101_config_aneg,
  2993. .config_intr = marvell_config_intr,
  2994. .handle_interrupt = marvell_handle_interrupt,
  2995. .resume = genphy_resume,
  2996. .suspend = genphy_suspend,
  2997. .read_page = marvell_read_page,
  2998. .write_page = marvell_write_page,
  2999. .get_sset_count = marvell_get_sset_count,
  3000. .get_strings = marvell_get_strings,
  3001. .get_stats = marvell_get_stats,
  3002. },
  3003. {
  3004. .phy_id = MARVELL_PHY_ID_88E3082,
  3005. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3006. .name = "Marvell 88E308X/88E609X Family",
  3007. /* PHY_BASIC_FEATURES */
  3008. .probe = marvell_probe,
  3009. .config_init = marvell_config_init,
  3010. .aneg_done = marvell_aneg_done,
  3011. .read_status = marvell_read_status,
  3012. .resume = genphy_resume,
  3013. .suspend = genphy_suspend,
  3014. .cable_test_start = m88e3082_vct_cable_test_start,
  3015. .cable_test_get_status = m88e3082_vct_cable_test_get_status,
  3016. },
  3017. {
  3018. .phy_id = MARVELL_PHY_ID_88E1112,
  3019. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3020. .name = "Marvell 88E1112",
  3021. /* PHY_GBIT_FEATURES */
  3022. .probe = marvell_probe,
  3023. .config_init = m88e1112_config_init,
  3024. .config_aneg = marvell_config_aneg,
  3025. .config_intr = marvell_config_intr,
  3026. .handle_interrupt = marvell_handle_interrupt,
  3027. .resume = genphy_resume,
  3028. .suspend = genphy_suspend,
  3029. .read_page = marvell_read_page,
  3030. .write_page = marvell_write_page,
  3031. .get_sset_count = marvell_get_sset_count,
  3032. .get_strings = marvell_get_strings,
  3033. .get_stats = marvell_get_stats,
  3034. .get_tunable = m88e1011_get_tunable,
  3035. .set_tunable = m88e1011_set_tunable,
  3036. },
  3037. {
  3038. .phy_id = MARVELL_PHY_ID_88E1111,
  3039. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3040. .name = "Marvell 88E1111",
  3041. /* PHY_GBIT_FEATURES */
  3042. .flags = PHY_POLL_CABLE_TEST,
  3043. .probe = marvell_probe,
  3044. .config_init = m88e1111gbe_config_init,
  3045. .config_aneg = m88e1111_config_aneg,
  3046. .read_status = marvell_read_status,
  3047. .config_intr = marvell_config_intr,
  3048. .handle_interrupt = marvell_handle_interrupt,
  3049. .resume = genphy_resume,
  3050. .suspend = genphy_suspend,
  3051. .read_page = marvell_read_page,
  3052. .write_page = marvell_write_page,
  3053. .get_sset_count = marvell_get_sset_count,
  3054. .get_strings = marvell_get_strings,
  3055. .get_stats = marvell_get_stats,
  3056. .get_tunable = m88e1111_get_tunable,
  3057. .set_tunable = m88e1111_set_tunable,
  3058. .cable_test_start = m88e1111_vct_cable_test_start,
  3059. .cable_test_get_status = m88e1111_vct_cable_test_get_status,
  3060. },
  3061. {
  3062. .phy_id = MARVELL_PHY_ID_88E1111_FINISAR,
  3063. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3064. .name = "Marvell 88E1111 (Finisar)",
  3065. /* PHY_GBIT_FEATURES */
  3066. .probe = marvell_probe,
  3067. .config_init = m88e1111gbe_config_init,
  3068. .config_aneg = m88e1111_config_aneg,
  3069. .read_status = marvell_read_status,
  3070. .config_intr = marvell_config_intr,
  3071. .handle_interrupt = marvell_handle_interrupt,
  3072. .resume = genphy_resume,
  3073. .suspend = genphy_suspend,
  3074. .read_page = marvell_read_page,
  3075. .write_page = marvell_write_page,
  3076. .get_sset_count = marvell_get_sset_count,
  3077. .get_strings = marvell_get_strings,
  3078. .get_stats = marvell_get_stats,
  3079. .get_tunable = m88e1111_get_tunable,
  3080. .set_tunable = m88e1111_set_tunable,
  3081. },
  3082. {
  3083. .phy_id = MARVELL_PHY_ID_88E1118,
  3084. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3085. .name = "Marvell 88E1118",
  3086. /* PHY_GBIT_FEATURES */
  3087. .probe = marvell_probe,
  3088. .config_init = m88e1118_config_init,
  3089. .config_aneg = m88e1118_config_aneg,
  3090. .config_intr = marvell_config_intr,
  3091. .handle_interrupt = marvell_handle_interrupt,
  3092. .resume = genphy_resume,
  3093. .suspend = genphy_suspend,
  3094. .read_page = marvell_read_page,
  3095. .write_page = marvell_write_page,
  3096. .get_sset_count = marvell_get_sset_count,
  3097. .get_strings = marvell_get_strings,
  3098. .get_stats = marvell_get_stats,
  3099. },
  3100. {
  3101. .phy_id = MARVELL_PHY_ID_88E1121R,
  3102. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3103. .name = "Marvell 88E1121R",
  3104. .driver_data = DEF_MARVELL_HWMON_OPS(m88e1121_hwmon_ops),
  3105. /* PHY_GBIT_FEATURES */
  3106. .probe = marvell_probe,
  3107. .config_init = marvell_1011gbe_config_init,
  3108. .config_aneg = m88e1121_config_aneg,
  3109. .read_status = marvell_read_status,
  3110. .config_intr = marvell_config_intr,
  3111. .handle_interrupt = marvell_handle_interrupt,
  3112. .resume = genphy_resume,
  3113. .suspend = genphy_suspend,
  3114. .read_page = marvell_read_page,
  3115. .write_page = marvell_write_page,
  3116. .get_sset_count = marvell_get_sset_count,
  3117. .get_strings = marvell_get_strings,
  3118. .get_stats = marvell_get_stats,
  3119. .get_tunable = m88e1011_get_tunable,
  3120. .set_tunable = m88e1011_set_tunable,
  3121. },
  3122. {
  3123. .phy_id = MARVELL_PHY_ID_88E1318S,
  3124. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3125. .name = "Marvell 88E1318S",
  3126. /* PHY_GBIT_FEATURES */
  3127. .probe = marvell_probe,
  3128. .config_init = m88e1318_config_init,
  3129. .config_aneg = m88e1318_config_aneg,
  3130. .read_status = marvell_read_status,
  3131. .config_intr = marvell_config_intr,
  3132. .handle_interrupt = marvell_handle_interrupt,
  3133. .get_wol = m88e1318_get_wol,
  3134. .set_wol = m88e1318_set_wol,
  3135. .resume = genphy_resume,
  3136. .suspend = genphy_suspend,
  3137. .read_page = marvell_read_page,
  3138. .write_page = marvell_write_page,
  3139. .get_sset_count = marvell_get_sset_count,
  3140. .get_strings = marvell_get_strings,
  3141. .get_stats = marvell_get_stats,
  3142. .led_brightness_set = m88e1318_led_brightness_set,
  3143. .led_blink_set = m88e1318_led_blink_set,
  3144. .led_hw_is_supported = m88e1318_led_hw_is_supported,
  3145. .led_hw_control_set = m88e1318_led_hw_control_set,
  3146. .led_hw_control_get = m88e1318_led_hw_control_get,
  3147. },
  3148. {
  3149. .phy_id = MARVELL_PHY_ID_88E1145,
  3150. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3151. .name = "Marvell 88E1145",
  3152. /* PHY_GBIT_FEATURES */
  3153. .flags = PHY_POLL_CABLE_TEST,
  3154. .probe = marvell_probe,
  3155. .config_init = m88e1145_config_init,
  3156. .config_aneg = m88e1101_config_aneg,
  3157. .config_intr = marvell_config_intr,
  3158. .handle_interrupt = marvell_handle_interrupt,
  3159. .resume = genphy_resume,
  3160. .suspend = genphy_suspend,
  3161. .read_page = marvell_read_page,
  3162. .write_page = marvell_write_page,
  3163. .get_sset_count = marvell_get_sset_count,
  3164. .get_strings = marvell_get_strings,
  3165. .get_stats = marvell_get_stats,
  3166. .get_tunable = m88e1111_get_tunable,
  3167. .set_tunable = m88e1111_set_tunable,
  3168. .cable_test_start = m88e1111_vct_cable_test_start,
  3169. .cable_test_get_status = m88e1111_vct_cable_test_get_status,
  3170. },
  3171. {
  3172. .phy_id = MARVELL_PHY_ID_88E1149R,
  3173. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3174. .name = "Marvell 88E1149R",
  3175. /* PHY_GBIT_FEATURES */
  3176. .probe = marvell_probe,
  3177. .config_init = m88e1149_config_init,
  3178. .config_aneg = m88e1118_config_aneg,
  3179. .config_intr = marvell_config_intr,
  3180. .handle_interrupt = marvell_handle_interrupt,
  3181. .resume = genphy_resume,
  3182. .suspend = genphy_suspend,
  3183. .read_page = marvell_read_page,
  3184. .write_page = marvell_write_page,
  3185. .get_sset_count = marvell_get_sset_count,
  3186. .get_strings = marvell_get_strings,
  3187. .get_stats = marvell_get_stats,
  3188. },
  3189. {
  3190. .phy_id = MARVELL_PHY_ID_88E1240,
  3191. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3192. .name = "Marvell 88E1240",
  3193. /* PHY_GBIT_FEATURES */
  3194. .probe = marvell_probe,
  3195. .config_init = m88e1112_config_init,
  3196. .config_aneg = marvell_config_aneg,
  3197. .config_intr = marvell_config_intr,
  3198. .handle_interrupt = marvell_handle_interrupt,
  3199. .resume = genphy_resume,
  3200. .suspend = genphy_suspend,
  3201. .read_page = marvell_read_page,
  3202. .write_page = marvell_write_page,
  3203. .get_sset_count = marvell_get_sset_count,
  3204. .get_strings = marvell_get_strings,
  3205. .get_stats = marvell_get_stats,
  3206. .get_tunable = m88e1011_get_tunable,
  3207. .set_tunable = m88e1011_set_tunable,
  3208. },
  3209. {
  3210. .phy_id = MARVELL_PHY_ID_88E1116R,
  3211. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3212. .name = "Marvell 88E1116R",
  3213. /* PHY_GBIT_FEATURES */
  3214. .probe = marvell_probe,
  3215. .config_init = m88e1116r_config_init,
  3216. .config_intr = marvell_config_intr,
  3217. .handle_interrupt = marvell_handle_interrupt,
  3218. .resume = genphy_resume,
  3219. .suspend = genphy_suspend,
  3220. .read_page = marvell_read_page,
  3221. .write_page = marvell_write_page,
  3222. .get_sset_count = marvell_get_sset_count,
  3223. .get_strings = marvell_get_strings,
  3224. .get_stats = marvell_get_stats,
  3225. .get_tunable = m88e1011_get_tunable,
  3226. .set_tunable = m88e1011_set_tunable,
  3227. },
  3228. {
  3229. .phy_id = MARVELL_PHY_ID_88E1510,
  3230. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3231. .name = "Marvell 88E1510",
  3232. .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
  3233. .features = PHY_GBIT_FIBRE_FEATURES,
  3234. .flags = PHY_POLL_CABLE_TEST,
  3235. .probe = m88e1510_probe,
  3236. .config_init = m88e1510_config_init,
  3237. .config_aneg = m88e1510_config_aneg,
  3238. .read_status = marvell_read_status,
  3239. .config_intr = marvell_config_intr,
  3240. .handle_interrupt = marvell_handle_interrupt,
  3241. .get_wol = m88e1318_get_wol,
  3242. .set_wol = m88e1318_set_wol,
  3243. .resume = marvell_resume,
  3244. .suspend = marvell_suspend,
  3245. .read_page = marvell_read_page,
  3246. .write_page = marvell_write_page,
  3247. .get_sset_count = marvell_get_sset_count,
  3248. .get_strings = marvell_get_strings,
  3249. .get_stats = marvell_get_stats,
  3250. .set_loopback = m88e1510_loopback,
  3251. .get_tunable = m88e1011_get_tunable,
  3252. .set_tunable = m88e1011_set_tunable,
  3253. .cable_test_start = marvell_vct7_cable_test_start,
  3254. .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
  3255. .cable_test_get_status = marvell_vct7_cable_test_get_status,
  3256. .led_brightness_set = m88e1318_led_brightness_set,
  3257. .led_blink_set = m88e1318_led_blink_set,
  3258. .led_hw_is_supported = m88e1318_led_hw_is_supported,
  3259. .led_hw_control_set = m88e1318_led_hw_control_set,
  3260. .led_hw_control_get = m88e1318_led_hw_control_get,
  3261. },
  3262. {
  3263. .phy_id = MARVELL_PHY_ID_88E1540,
  3264. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3265. .name = "Marvell 88E1540",
  3266. .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
  3267. /* PHY_GBIT_FEATURES */
  3268. .flags = PHY_POLL_CABLE_TEST,
  3269. .probe = marvell_probe,
  3270. .config_init = marvell_1011gbe_config_init,
  3271. .config_aneg = m88e1510_config_aneg,
  3272. .read_status = marvell_read_status,
  3273. .config_intr = marvell_config_intr,
  3274. .handle_interrupt = marvell_handle_interrupt,
  3275. .resume = genphy_resume,
  3276. .suspend = genphy_suspend,
  3277. .read_page = marvell_read_page,
  3278. .write_page = marvell_write_page,
  3279. .get_sset_count = marvell_get_sset_count,
  3280. .get_strings = marvell_get_strings,
  3281. .get_stats = marvell_get_stats,
  3282. .get_tunable = m88e1540_get_tunable,
  3283. .set_tunable = m88e1540_set_tunable,
  3284. .cable_test_start = marvell_vct7_cable_test_start,
  3285. .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
  3286. .cable_test_get_status = marvell_vct7_cable_test_get_status,
  3287. .led_brightness_set = m88e1318_led_brightness_set,
  3288. .led_blink_set = m88e1318_led_blink_set,
  3289. .led_hw_is_supported = m88e1318_led_hw_is_supported,
  3290. .led_hw_control_set = m88e1318_led_hw_control_set,
  3291. .led_hw_control_get = m88e1318_led_hw_control_get,
  3292. },
  3293. {
  3294. .phy_id = MARVELL_PHY_ID_88E1545,
  3295. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3296. .name = "Marvell 88E1545",
  3297. .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
  3298. .probe = marvell_probe,
  3299. /* PHY_GBIT_FEATURES */
  3300. .flags = PHY_POLL_CABLE_TEST,
  3301. .config_init = marvell_1011gbe_config_init,
  3302. .config_aneg = m88e1510_config_aneg,
  3303. .read_status = marvell_read_status,
  3304. .config_intr = marvell_config_intr,
  3305. .handle_interrupt = marvell_handle_interrupt,
  3306. .resume = genphy_resume,
  3307. .suspend = genphy_suspend,
  3308. .read_page = marvell_read_page,
  3309. .write_page = marvell_write_page,
  3310. .get_sset_count = marvell_get_sset_count,
  3311. .get_strings = marvell_get_strings,
  3312. .get_stats = marvell_get_stats,
  3313. .get_tunable = m88e1540_get_tunable,
  3314. .set_tunable = m88e1540_set_tunable,
  3315. .cable_test_start = marvell_vct7_cable_test_start,
  3316. .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
  3317. .cable_test_get_status = marvell_vct7_cable_test_get_status,
  3318. .led_brightness_set = m88e1318_led_brightness_set,
  3319. .led_blink_set = m88e1318_led_blink_set,
  3320. .led_hw_is_supported = m88e1318_led_hw_is_supported,
  3321. .led_hw_control_set = m88e1318_led_hw_control_set,
  3322. .led_hw_control_get = m88e1318_led_hw_control_get,
  3323. },
  3324. {
  3325. .phy_id = MARVELL_PHY_ID_88E3016,
  3326. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3327. .name = "Marvell 88E3016",
  3328. /* PHY_BASIC_FEATURES */
  3329. .probe = marvell_probe,
  3330. .config_init = m88e3016_config_init,
  3331. .aneg_done = marvell_aneg_done,
  3332. .read_status = marvell_read_status,
  3333. .config_intr = marvell_config_intr,
  3334. .handle_interrupt = marvell_handle_interrupt,
  3335. .resume = genphy_resume,
  3336. .suspend = genphy_suspend,
  3337. .read_page = marvell_read_page,
  3338. .write_page = marvell_write_page,
  3339. .get_sset_count = marvell_get_sset_count,
  3340. .get_strings = marvell_get_strings,
  3341. .get_stats = marvell_get_stats,
  3342. },
  3343. {
  3344. .phy_id = MARVELL_PHY_ID_88E6250_FAMILY,
  3345. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3346. .name = "Marvell 88E6250 Family",
  3347. /* PHY_BASIC_FEATURES */
  3348. .probe = marvell_probe,
  3349. .aneg_done = marvell_aneg_done,
  3350. .config_intr = marvell_config_intr,
  3351. .handle_interrupt = marvell_handle_interrupt,
  3352. .resume = genphy_resume,
  3353. .suspend = genphy_suspend,
  3354. .get_sset_count = marvell_get_sset_count_simple,
  3355. .get_strings = marvell_get_strings_simple,
  3356. .get_stats = marvell_get_stats_simple,
  3357. },
  3358. {
  3359. .phy_id = MARVELL_PHY_ID_88E6341_FAMILY,
  3360. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3361. .name = "Marvell 88E6341 Family",
  3362. .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
  3363. /* PHY_GBIT_FEATURES */
  3364. .flags = PHY_POLL_CABLE_TEST,
  3365. .probe = marvell_probe,
  3366. .config_init = marvell_1011gbe_config_init,
  3367. .config_aneg = m88e6390_config_aneg,
  3368. .read_status = marvell_read_status,
  3369. .config_intr = marvell_config_intr,
  3370. .handle_interrupt = marvell_handle_interrupt,
  3371. .resume = genphy_resume,
  3372. .suspend = genphy_suspend,
  3373. .read_page = marvell_read_page,
  3374. .write_page = marvell_write_page,
  3375. .get_sset_count = marvell_get_sset_count,
  3376. .get_strings = marvell_get_strings,
  3377. .get_stats = marvell_get_stats,
  3378. .get_tunable = m88e1540_get_tunable,
  3379. .set_tunable = m88e1540_set_tunable,
  3380. .cable_test_start = marvell_vct7_cable_test_start,
  3381. .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
  3382. .cable_test_get_status = marvell_vct7_cable_test_get_status,
  3383. },
  3384. {
  3385. .phy_id = MARVELL_PHY_ID_88E6390_FAMILY,
  3386. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3387. .name = "Marvell 88E6390 Family",
  3388. .driver_data = DEF_MARVELL_HWMON_OPS(m88e6390_hwmon_ops),
  3389. /* PHY_GBIT_FEATURES */
  3390. .flags = PHY_POLL_CABLE_TEST,
  3391. .probe = marvell_probe,
  3392. .config_init = marvell_1011gbe_config_init,
  3393. .config_aneg = m88e6390_config_aneg,
  3394. .read_status = marvell_read_status,
  3395. .config_intr = marvell_config_intr,
  3396. .handle_interrupt = marvell_handle_interrupt,
  3397. .resume = genphy_resume,
  3398. .suspend = genphy_suspend,
  3399. .read_page = marvell_read_page,
  3400. .write_page = marvell_write_page,
  3401. .get_sset_count = marvell_get_sset_count,
  3402. .get_strings = marvell_get_strings,
  3403. .get_stats = marvell_get_stats,
  3404. .get_tunable = m88e1540_get_tunable,
  3405. .set_tunable = m88e1540_set_tunable,
  3406. .cable_test_start = marvell_vct7_cable_test_start,
  3407. .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
  3408. .cable_test_get_status = marvell_vct7_cable_test_get_status,
  3409. },
  3410. {
  3411. .phy_id = MARVELL_PHY_ID_88E6393_FAMILY,
  3412. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3413. .name = "Marvell 88E6393 Family",
  3414. .driver_data = DEF_MARVELL_HWMON_OPS(m88e6393_hwmon_ops),
  3415. /* PHY_GBIT_FEATURES */
  3416. .flags = PHY_POLL_CABLE_TEST,
  3417. .probe = marvell_probe,
  3418. .config_init = marvell_1011gbe_config_init,
  3419. .config_aneg = m88e1510_config_aneg,
  3420. .read_status = marvell_read_status,
  3421. .config_intr = marvell_config_intr,
  3422. .handle_interrupt = marvell_handle_interrupt,
  3423. .resume = genphy_resume,
  3424. .suspend = genphy_suspend,
  3425. .read_page = marvell_read_page,
  3426. .write_page = marvell_write_page,
  3427. .get_sset_count = marvell_get_sset_count,
  3428. .get_strings = marvell_get_strings,
  3429. .get_stats = marvell_get_stats,
  3430. .get_tunable = m88e1540_get_tunable,
  3431. .set_tunable = m88e1540_set_tunable,
  3432. .cable_test_start = marvell_vct7_cable_test_start,
  3433. .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
  3434. .cable_test_get_status = marvell_vct7_cable_test_get_status,
  3435. },
  3436. {
  3437. .phy_id = MARVELL_PHY_ID_88E1340S,
  3438. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3439. .name = "Marvell 88E1340S",
  3440. .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
  3441. .probe = marvell_probe,
  3442. /* PHY_GBIT_FEATURES */
  3443. .config_init = marvell_1011gbe_config_init,
  3444. .config_aneg = m88e1510_config_aneg,
  3445. .read_status = marvell_read_status,
  3446. .config_intr = marvell_config_intr,
  3447. .handle_interrupt = marvell_handle_interrupt,
  3448. .resume = genphy_resume,
  3449. .suspend = genphy_suspend,
  3450. .read_page = marvell_read_page,
  3451. .write_page = marvell_write_page,
  3452. .get_sset_count = marvell_get_sset_count,
  3453. .get_strings = marvell_get_strings,
  3454. .get_stats = marvell_get_stats,
  3455. .get_tunable = m88e1540_get_tunable,
  3456. .set_tunable = m88e1540_set_tunable,
  3457. },
  3458. {
  3459. .phy_id = MARVELL_PHY_ID_88E1548P,
  3460. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3461. .name = "Marvell 88E1548P",
  3462. .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
  3463. .probe = marvell_probe,
  3464. .features = PHY_GBIT_FIBRE_FEATURES,
  3465. .config_init = marvell_1011gbe_config_init,
  3466. .config_aneg = m88e1510_config_aneg,
  3467. .read_status = marvell_read_status,
  3468. .config_intr = marvell_config_intr,
  3469. .handle_interrupt = marvell_handle_interrupt,
  3470. .resume = genphy_resume,
  3471. .suspend = genphy_suspend,
  3472. .read_page = marvell_read_page,
  3473. .write_page = marvell_write_page,
  3474. .get_sset_count = marvell_get_sset_count,
  3475. .get_strings = marvell_get_strings,
  3476. .get_stats = marvell_get_stats,
  3477. .get_tunable = m88e1540_get_tunable,
  3478. .set_tunable = m88e1540_set_tunable,
  3479. .led_brightness_set = m88e1318_led_brightness_set,
  3480. .led_blink_set = m88e1318_led_blink_set,
  3481. .led_hw_is_supported = m88e1318_led_hw_is_supported,
  3482. .led_hw_control_set = m88e1318_led_hw_control_set,
  3483. .led_hw_control_get = m88e1318_led_hw_control_get,
  3484. },
  3485. };
  3486. module_phy_driver(marvell_drivers);
  3487. static struct mdio_device_id __maybe_unused marvell_tbl[] = {
  3488. { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
  3489. { MARVELL_PHY_ID_88E3082, MARVELL_PHY_ID_MASK },
  3490. { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
  3491. { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
  3492. { MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK },
  3493. { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
  3494. { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
  3495. { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
  3496. { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
  3497. { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
  3498. { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
  3499. { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
  3500. { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
  3501. { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
  3502. { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
  3503. { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
  3504. { MARVELL_PHY_ID_88E6250_FAMILY, MARVELL_PHY_ID_MASK },
  3505. { MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK },
  3506. { MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK },
  3507. { MARVELL_PHY_ID_88E6393_FAMILY, MARVELL_PHY_ID_MASK },
  3508. { MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK },
  3509. { MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK },
  3510. { }
  3511. };
  3512. MODULE_DEVICE_TABLE(mdio, marvell_tbl);