smsc95xx.c 52 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /***************************************************************************
  3. *
  4. * Copyright (C) 2007-2008 SMSC
  5. *
  6. *****************************************************************************/
  7. #include <linux/module.h>
  8. #include <linux/kmod.h>
  9. #include <linux/netdevice.h>
  10. #include <linux/etherdevice.h>
  11. #include <linux/ethtool.h>
  12. #include <linux/mii.h>
  13. #include <linux/usb.h>
  14. #include <linux/bitrev.h>
  15. #include <linux/crc16.h>
  16. #include <linux/crc32.h>
  17. #include <linux/usb/usbnet.h>
  18. #include <linux/slab.h>
  19. #include <linux/of_net.h>
  20. #include <linux/irq.h>
  21. #include <linux/irqdomain.h>
  22. #include <linux/mdio.h>
  23. #include <linux/phy.h>
  24. #include <net/selftests.h>
  25. #include "smsc95xx.h"
  26. #define SMSC_CHIPNAME "smsc95xx"
  27. #define SMSC_DRIVER_VERSION "2.0.0"
  28. #define HS_USB_PKT_SIZE (512)
  29. #define FS_USB_PKT_SIZE (64)
  30. #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
  31. #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
  32. #define DEFAULT_BULK_IN_DELAY (0x00002000)
  33. #define MAX_SINGLE_PACKET_SIZE (2048)
  34. #define LAN95XX_EEPROM_MAGIC (0x9500)
  35. #define EEPROM_MAC_OFFSET (0x01)
  36. #define DEFAULT_TX_CSUM_ENABLE (true)
  37. #define DEFAULT_RX_CSUM_ENABLE (true)
  38. #define SMSC95XX_INTERNAL_PHY_ID (1)
  39. #define SMSC95XX_TX_OVERHEAD (8)
  40. #define SMSC95XX_TX_OVERHEAD_CSUM (12)
  41. #define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \
  42. WAKE_MCAST | WAKE_ARP | WAKE_MAGIC)
  43. #define FEATURE_8_WAKEUP_FILTERS (0x01)
  44. #define FEATURE_PHY_NLP_CROSSOVER (0x02)
  45. #define FEATURE_REMOTE_WAKEUP (0x04)
  46. #define SUSPEND_SUSPEND0 (0x01)
  47. #define SUSPEND_SUSPEND1 (0x02)
  48. #define SUSPEND_SUSPEND2 (0x04)
  49. #define SUSPEND_SUSPEND3 (0x08)
  50. #define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \
  51. SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3)
  52. #define SMSC95XX_NR_IRQS (1) /* raise to 12 for GPIOs */
  53. #define PHY_HWIRQ (SMSC95XX_NR_IRQS - 1)
  54. struct smsc95xx_priv {
  55. u32 mac_cr;
  56. u32 hash_hi;
  57. u32 hash_lo;
  58. u32 wolopts;
  59. spinlock_t mac_cr_lock;
  60. u8 features;
  61. u8 suspend_flags;
  62. bool is_internal_phy;
  63. struct irq_chip irqchip;
  64. struct irq_domain *irqdomain;
  65. struct fwnode_handle *irqfwnode;
  66. struct mii_bus *mdiobus;
  67. struct phy_device *phydev;
  68. struct task_struct *pm_task;
  69. };
  70. static bool turbo_mode = true;
  71. module_param(turbo_mode, bool, 0644);
  72. MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
  73. static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index,
  74. u32 *data)
  75. {
  76. struct smsc95xx_priv *pdata = dev->driver_priv;
  77. u32 buf;
  78. int ret;
  79. int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
  80. if (current != pdata->pm_task)
  81. fn = usbnet_read_cmd;
  82. else
  83. fn = usbnet_read_cmd_nopm;
  84. ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN
  85. | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  86. 0, index, &buf, 4);
  87. if (ret < 4) {
  88. ret = ret < 0 ? ret : -ENODATA;
  89. if (ret != -ENODEV)
  90. netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n",
  91. index, ret);
  92. return ret;
  93. }
  94. le32_to_cpus(&buf);
  95. *data = buf;
  96. return ret;
  97. }
  98. static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index,
  99. u32 data)
  100. {
  101. struct smsc95xx_priv *pdata = dev->driver_priv;
  102. u32 buf;
  103. int ret;
  104. int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
  105. if (current != pdata->pm_task)
  106. fn = usbnet_write_cmd;
  107. else
  108. fn = usbnet_write_cmd_nopm;
  109. buf = data;
  110. cpu_to_le32s(&buf);
  111. ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT
  112. | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  113. 0, index, &buf, 4);
  114. if (ret < 0 && ret != -ENODEV)
  115. netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n",
  116. index, ret);
  117. return ret;
  118. }
  119. /* Loop until the read is completed with timeout
  120. * called with phy_mutex held */
  121. static int __must_check smsc95xx_phy_wait_not_busy(struct usbnet *dev)
  122. {
  123. unsigned long start_time = jiffies;
  124. u32 val;
  125. int ret;
  126. do {
  127. ret = smsc95xx_read_reg(dev, MII_ADDR, &val);
  128. if (ret < 0) {
  129. /* Ignore -ENODEV error during disconnect() */
  130. if (ret == -ENODEV)
  131. return 0;
  132. netdev_warn(dev->net, "Error reading MII_ACCESS\n");
  133. return ret;
  134. }
  135. if (!(val & MII_BUSY_))
  136. return 0;
  137. } while (!time_after(jiffies, start_time + HZ));
  138. return -EIO;
  139. }
  140. static u32 mii_address_cmd(int phy_id, int idx, u16 op)
  141. {
  142. return (phy_id & 0x1f) << 11 | (idx & 0x1f) << 6 | op;
  143. }
  144. static int smsc95xx_mdio_read(struct usbnet *dev, int phy_id, int idx)
  145. {
  146. u32 val, addr;
  147. int ret;
  148. mutex_lock(&dev->phy_mutex);
  149. /* confirm MII not busy */
  150. ret = smsc95xx_phy_wait_not_busy(dev);
  151. if (ret < 0) {
  152. netdev_warn(dev->net, "%s: MII is busy\n", __func__);
  153. goto done;
  154. }
  155. /* set the address, index & direction (read from PHY) */
  156. addr = mii_address_cmd(phy_id, idx, MII_READ_ | MII_BUSY_);
  157. ret = smsc95xx_write_reg(dev, MII_ADDR, addr);
  158. if (ret < 0) {
  159. if (ret != -ENODEV)
  160. netdev_warn(dev->net, "Error writing MII_ADDR\n");
  161. goto done;
  162. }
  163. ret = smsc95xx_phy_wait_not_busy(dev);
  164. if (ret < 0) {
  165. netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx);
  166. goto done;
  167. }
  168. ret = smsc95xx_read_reg(dev, MII_DATA, &val);
  169. if (ret < 0) {
  170. if (ret != -ENODEV)
  171. netdev_warn(dev->net, "Error reading MII_DATA\n");
  172. goto done;
  173. }
  174. ret = (u16)(val & 0xFFFF);
  175. done:
  176. mutex_unlock(&dev->phy_mutex);
  177. /* Ignore -ENODEV error during disconnect() */
  178. if (ret == -ENODEV)
  179. return 0;
  180. return ret;
  181. }
  182. static void smsc95xx_mdio_write(struct usbnet *dev, int phy_id, int idx,
  183. int regval)
  184. {
  185. u32 val, addr;
  186. int ret;
  187. mutex_lock(&dev->phy_mutex);
  188. /* confirm MII not busy */
  189. ret = smsc95xx_phy_wait_not_busy(dev);
  190. if (ret < 0) {
  191. netdev_warn(dev->net, "%s: MII is busy\n", __func__);
  192. goto done;
  193. }
  194. val = regval;
  195. ret = smsc95xx_write_reg(dev, MII_DATA, val);
  196. if (ret < 0) {
  197. if (ret != -ENODEV)
  198. netdev_warn(dev->net, "Error writing MII_DATA\n");
  199. goto done;
  200. }
  201. /* set the address, index & direction (write to PHY) */
  202. addr = mii_address_cmd(phy_id, idx, MII_WRITE_ | MII_BUSY_);
  203. ret = smsc95xx_write_reg(dev, MII_ADDR, addr);
  204. if (ret < 0) {
  205. if (ret != -ENODEV)
  206. netdev_warn(dev->net, "Error writing MII_ADDR\n");
  207. goto done;
  208. }
  209. ret = smsc95xx_phy_wait_not_busy(dev);
  210. if (ret < 0) {
  211. netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx);
  212. goto done;
  213. }
  214. done:
  215. mutex_unlock(&dev->phy_mutex);
  216. }
  217. static int smsc95xx_mdiobus_reset(struct mii_bus *bus)
  218. {
  219. struct smsc95xx_priv *pdata;
  220. struct usbnet *dev;
  221. u32 val;
  222. int ret;
  223. dev = bus->priv;
  224. pdata = dev->driver_priv;
  225. if (pdata->is_internal_phy)
  226. return 0;
  227. mutex_lock(&dev->phy_mutex);
  228. ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
  229. if (ret < 0)
  230. goto reset_out;
  231. val |= PM_CTL_PHY_RST_;
  232. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  233. if (ret < 0)
  234. goto reset_out;
  235. /* Driver has no knowledge at this point about the external PHY.
  236. * The 802.3 specifies that the reset process shall
  237. * be completed within 0.5 s.
  238. */
  239. fsleep(500000);
  240. reset_out:
  241. mutex_unlock(&dev->phy_mutex);
  242. return 0;
  243. }
  244. static int smsc95xx_mdiobus_read(struct mii_bus *bus, int phy_id, int idx)
  245. {
  246. struct usbnet *dev = bus->priv;
  247. return smsc95xx_mdio_read(dev, phy_id, idx);
  248. }
  249. static int smsc95xx_mdiobus_write(struct mii_bus *bus, int phy_id, int idx,
  250. u16 regval)
  251. {
  252. struct usbnet *dev = bus->priv;
  253. smsc95xx_mdio_write(dev, phy_id, idx, regval);
  254. return 0;
  255. }
  256. static int __must_check smsc95xx_wait_eeprom(struct usbnet *dev)
  257. {
  258. unsigned long start_time = jiffies;
  259. u32 val;
  260. int ret;
  261. do {
  262. ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
  263. if (ret < 0) {
  264. netdev_warn(dev->net, "Error reading E2P_CMD\n");
  265. return ret;
  266. }
  267. if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
  268. break;
  269. udelay(40);
  270. } while (!time_after(jiffies, start_time + HZ));
  271. if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
  272. netdev_warn(dev->net, "EEPROM read operation timeout\n");
  273. return -EIO;
  274. }
  275. return 0;
  276. }
  277. static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
  278. {
  279. unsigned long start_time = jiffies;
  280. u32 val;
  281. int ret;
  282. do {
  283. ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
  284. if (ret < 0) {
  285. netdev_warn(dev->net, "Error reading E2P_CMD\n");
  286. return ret;
  287. }
  288. if (!(val & E2P_CMD_BUSY_))
  289. return 0;
  290. udelay(40);
  291. } while (!time_after(jiffies, start_time + HZ));
  292. netdev_warn(dev->net, "EEPROM is busy\n");
  293. return -EIO;
  294. }
  295. static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
  296. u8 *data)
  297. {
  298. u32 val;
  299. int i, ret;
  300. BUG_ON(!dev);
  301. BUG_ON(!data);
  302. ret = smsc95xx_eeprom_confirm_not_busy(dev);
  303. if (ret)
  304. return ret;
  305. for (i = 0; i < length; i++) {
  306. val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
  307. ret = smsc95xx_write_reg(dev, E2P_CMD, val);
  308. if (ret < 0) {
  309. netdev_warn(dev->net, "Error writing E2P_CMD\n");
  310. return ret;
  311. }
  312. ret = smsc95xx_wait_eeprom(dev);
  313. if (ret < 0)
  314. return ret;
  315. ret = smsc95xx_read_reg(dev, E2P_DATA, &val);
  316. if (ret < 0) {
  317. netdev_warn(dev->net, "Error reading E2P_DATA\n");
  318. return ret;
  319. }
  320. data[i] = val & 0xFF;
  321. offset++;
  322. }
  323. return 0;
  324. }
  325. static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
  326. u8 *data)
  327. {
  328. u32 val;
  329. int i, ret;
  330. BUG_ON(!dev);
  331. BUG_ON(!data);
  332. ret = smsc95xx_eeprom_confirm_not_busy(dev);
  333. if (ret)
  334. return ret;
  335. /* Issue write/erase enable command */
  336. val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
  337. ret = smsc95xx_write_reg(dev, E2P_CMD, val);
  338. if (ret < 0) {
  339. netdev_warn(dev->net, "Error writing E2P_DATA\n");
  340. return ret;
  341. }
  342. ret = smsc95xx_wait_eeprom(dev);
  343. if (ret < 0)
  344. return ret;
  345. for (i = 0; i < length; i++) {
  346. /* Fill data register */
  347. val = data[i];
  348. ret = smsc95xx_write_reg(dev, E2P_DATA, val);
  349. if (ret < 0) {
  350. netdev_warn(dev->net, "Error writing E2P_DATA\n");
  351. return ret;
  352. }
  353. /* Send "write" command */
  354. val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
  355. ret = smsc95xx_write_reg(dev, E2P_CMD, val);
  356. if (ret < 0) {
  357. netdev_warn(dev->net, "Error writing E2P_CMD\n");
  358. return ret;
  359. }
  360. ret = smsc95xx_wait_eeprom(dev);
  361. if (ret < 0)
  362. return ret;
  363. offset++;
  364. }
  365. return 0;
  366. }
  367. static int __must_check smsc95xx_write_reg_async(struct usbnet *dev, u16 index,
  368. u32 data)
  369. {
  370. const u16 size = 4;
  371. u32 buf;
  372. int ret;
  373. buf = data;
  374. cpu_to_le32s(&buf);
  375. ret = usbnet_write_cmd_async(dev, USB_VENDOR_REQUEST_WRITE_REGISTER,
  376. USB_DIR_OUT | USB_TYPE_VENDOR |
  377. USB_RECIP_DEVICE,
  378. 0, index, &buf, size);
  379. if (ret < 0)
  380. netdev_warn(dev->net, "Error write async cmd, sts=%d\n",
  381. ret);
  382. return ret;
  383. }
  384. /* returns hash bit number for given MAC address
  385. * example:
  386. * 01 00 5E 00 00 01 -> returns bit number 31 */
  387. static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
  388. {
  389. return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
  390. }
  391. static void smsc95xx_set_multicast(struct net_device *netdev)
  392. {
  393. struct usbnet *dev = netdev_priv(netdev);
  394. struct smsc95xx_priv *pdata = dev->driver_priv;
  395. unsigned long flags;
  396. int ret;
  397. pdata->hash_hi = 0;
  398. pdata->hash_lo = 0;
  399. spin_lock_irqsave(&pdata->mac_cr_lock, flags);
  400. if (dev->net->flags & IFF_PROMISC) {
  401. netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n");
  402. pdata->mac_cr |= MAC_CR_PRMS_;
  403. pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
  404. } else if (dev->net->flags & IFF_ALLMULTI) {
  405. netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n");
  406. pdata->mac_cr |= MAC_CR_MCPAS_;
  407. pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
  408. } else if (!netdev_mc_empty(dev->net)) {
  409. struct netdev_hw_addr *ha;
  410. pdata->mac_cr |= MAC_CR_HPFILT_;
  411. pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  412. netdev_for_each_mc_addr(ha, netdev) {
  413. u32 bitnum = smsc95xx_hash(ha->addr);
  414. u32 mask = 0x01 << (bitnum & 0x1F);
  415. if (bitnum & 0x20)
  416. pdata->hash_hi |= mask;
  417. else
  418. pdata->hash_lo |= mask;
  419. }
  420. netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n",
  421. pdata->hash_hi, pdata->hash_lo);
  422. } else {
  423. netif_dbg(dev, drv, dev->net, "receive own packets only\n");
  424. pdata->mac_cr &=
  425. ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
  426. }
  427. spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
  428. /* Initiate async writes, as we can't wait for completion here */
  429. ret = smsc95xx_write_reg_async(dev, HASHH, pdata->hash_hi);
  430. if (ret < 0)
  431. netdev_warn(dev->net, "failed to initiate async write to HASHH\n");
  432. ret = smsc95xx_write_reg_async(dev, HASHL, pdata->hash_lo);
  433. if (ret < 0)
  434. netdev_warn(dev->net, "failed to initiate async write to HASHL\n");
  435. ret = smsc95xx_write_reg_async(dev, MAC_CR, pdata->mac_cr);
  436. if (ret < 0)
  437. netdev_warn(dev->net, "failed to initiate async write to MAC_CR\n");
  438. }
  439. static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev)
  440. {
  441. u32 flow = 0, afc_cfg;
  442. struct smsc95xx_priv *pdata = dev->driver_priv;
  443. bool tx_pause, rx_pause;
  444. int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
  445. if (ret < 0)
  446. return ret;
  447. if (pdata->phydev->duplex == DUPLEX_FULL) {
  448. phy_get_pause(pdata->phydev, &tx_pause, &rx_pause);
  449. if (rx_pause)
  450. flow = 0xFFFF0002;
  451. if (tx_pause) {
  452. afc_cfg |= 0xF;
  453. flow |= 0xFFFF0000;
  454. } else {
  455. afc_cfg &= ~0xF;
  456. }
  457. netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n",
  458. rx_pause ? "enabled" : "disabled",
  459. tx_pause ? "enabled" : "disabled");
  460. } else {
  461. netif_dbg(dev, link, dev->net, "half duplex\n");
  462. afc_cfg |= 0xF;
  463. }
  464. ret = smsc95xx_write_reg(dev, FLOW, flow);
  465. if (ret < 0)
  466. return ret;
  467. return smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
  468. }
  469. static void smsc95xx_mac_update_fullduplex(struct usbnet *dev)
  470. {
  471. struct smsc95xx_priv *pdata = dev->driver_priv;
  472. unsigned long flags;
  473. int ret;
  474. spin_lock_irqsave(&pdata->mac_cr_lock, flags);
  475. if (pdata->phydev->duplex != DUPLEX_FULL) {
  476. pdata->mac_cr &= ~MAC_CR_FDPX_;
  477. pdata->mac_cr |= MAC_CR_RCVOWN_;
  478. } else {
  479. pdata->mac_cr &= ~MAC_CR_RCVOWN_;
  480. pdata->mac_cr |= MAC_CR_FDPX_;
  481. }
  482. spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
  483. ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
  484. if (ret < 0) {
  485. if (ret != -ENODEV)
  486. netdev_warn(dev->net,
  487. "Error updating MAC full duplex mode\n");
  488. return;
  489. }
  490. ret = smsc95xx_phy_update_flowcontrol(dev);
  491. if (ret < 0)
  492. netdev_warn(dev->net, "Error updating PHY flow control\n");
  493. }
  494. static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
  495. {
  496. struct smsc95xx_priv *pdata = dev->driver_priv;
  497. unsigned long flags;
  498. u32 intdata;
  499. if (urb->actual_length != 4) {
  500. netdev_warn(dev->net, "unexpected urb length %d\n",
  501. urb->actual_length);
  502. return;
  503. }
  504. intdata = get_unaligned_le32(urb->transfer_buffer);
  505. netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata);
  506. local_irq_save(flags);
  507. if (intdata & INT_ENP_PHY_INT_)
  508. generic_handle_domain_irq(pdata->irqdomain, PHY_HWIRQ);
  509. else
  510. netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
  511. intdata);
  512. local_irq_restore(flags);
  513. }
  514. /* Enable or disable Tx & Rx checksum offload engines */
  515. static int smsc95xx_set_features(struct net_device *netdev,
  516. netdev_features_t features)
  517. {
  518. struct usbnet *dev = netdev_priv(netdev);
  519. u32 read_buf;
  520. int ret;
  521. ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
  522. if (ret < 0)
  523. return ret;
  524. if (features & NETIF_F_IP_CSUM)
  525. read_buf |= Tx_COE_EN_;
  526. else
  527. read_buf &= ~Tx_COE_EN_;
  528. if (features & NETIF_F_RXCSUM)
  529. read_buf |= Rx_COE_EN_;
  530. else
  531. read_buf &= ~Rx_COE_EN_;
  532. ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
  533. if (ret < 0)
  534. return ret;
  535. netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);
  536. return 0;
  537. }
  538. static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
  539. {
  540. return MAX_EEPROM_SIZE;
  541. }
  542. static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
  543. struct ethtool_eeprom *ee, u8 *data)
  544. {
  545. struct usbnet *dev = netdev_priv(netdev);
  546. ee->magic = LAN95XX_EEPROM_MAGIC;
  547. return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
  548. }
  549. static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
  550. struct ethtool_eeprom *ee, u8 *data)
  551. {
  552. struct usbnet *dev = netdev_priv(netdev);
  553. if (ee->magic != LAN95XX_EEPROM_MAGIC) {
  554. netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n",
  555. ee->magic);
  556. return -EINVAL;
  557. }
  558. return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
  559. }
  560. static int smsc95xx_ethtool_getregslen(struct net_device *netdev)
  561. {
  562. /* all smsc95xx registers */
  563. return COE_CR - ID_REV + sizeof(u32);
  564. }
  565. static void
  566. smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs,
  567. void *buf)
  568. {
  569. struct usbnet *dev = netdev_priv(netdev);
  570. unsigned int i, j;
  571. int retval;
  572. u32 *data = buf;
  573. retval = smsc95xx_read_reg(dev, ID_REV, &regs->version);
  574. if (retval < 0) {
  575. netdev_warn(netdev, "REGS: cannot read ID_REV\n");
  576. return;
  577. }
  578. for (i = ID_REV, j = 0; i <= COE_CR; i += (sizeof(u32)), j++) {
  579. retval = smsc95xx_read_reg(dev, i, &data[j]);
  580. if (retval < 0) {
  581. netdev_warn(netdev, "REGS: cannot read reg[%x]\n", i);
  582. return;
  583. }
  584. }
  585. }
  586. static void smsc95xx_ethtool_get_wol(struct net_device *net,
  587. struct ethtool_wolinfo *wolinfo)
  588. {
  589. struct usbnet *dev = netdev_priv(net);
  590. struct smsc95xx_priv *pdata = dev->driver_priv;
  591. wolinfo->supported = SUPPORTED_WAKE;
  592. wolinfo->wolopts = pdata->wolopts;
  593. }
  594. static int smsc95xx_ethtool_set_wol(struct net_device *net,
  595. struct ethtool_wolinfo *wolinfo)
  596. {
  597. struct usbnet *dev = netdev_priv(net);
  598. struct smsc95xx_priv *pdata = dev->driver_priv;
  599. int ret;
  600. if (wolinfo->wolopts & ~SUPPORTED_WAKE)
  601. return -EINVAL;
  602. pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE;
  603. ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts);
  604. if (ret < 0)
  605. netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret);
  606. return ret;
  607. }
  608. static u32 smsc95xx_get_link(struct net_device *net)
  609. {
  610. phy_read_status(net->phydev);
  611. return net->phydev->link;
  612. }
  613. static void smsc95xx_ethtool_get_strings(struct net_device *netdev, u32 sset,
  614. u8 *data)
  615. {
  616. switch (sset) {
  617. case ETH_SS_TEST:
  618. net_selftest_get_strings(data);
  619. break;
  620. }
  621. }
  622. static int smsc95xx_ethtool_get_sset_count(struct net_device *ndev, int sset)
  623. {
  624. switch (sset) {
  625. case ETH_SS_TEST:
  626. return net_selftest_get_count();
  627. default:
  628. return -EOPNOTSUPP;
  629. }
  630. }
  631. static const struct ethtool_ops smsc95xx_ethtool_ops = {
  632. .get_link = smsc95xx_get_link,
  633. .nway_reset = phy_ethtool_nway_reset,
  634. .get_drvinfo = usbnet_get_drvinfo,
  635. .get_msglevel = usbnet_get_msglevel,
  636. .set_msglevel = usbnet_set_msglevel,
  637. .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len,
  638. .get_eeprom = smsc95xx_ethtool_get_eeprom,
  639. .set_eeprom = smsc95xx_ethtool_set_eeprom,
  640. .get_regs_len = smsc95xx_ethtool_getregslen,
  641. .get_regs = smsc95xx_ethtool_getregs,
  642. .get_wol = smsc95xx_ethtool_get_wol,
  643. .set_wol = smsc95xx_ethtool_set_wol,
  644. .get_link_ksettings = phy_ethtool_get_link_ksettings,
  645. .set_link_ksettings = phy_ethtool_set_link_ksettings,
  646. .get_ts_info = ethtool_op_get_ts_info,
  647. .self_test = net_selftest,
  648. .get_strings = smsc95xx_ethtool_get_strings,
  649. .get_sset_count = smsc95xx_ethtool_get_sset_count,
  650. };
  651. static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
  652. {
  653. if (!netif_running(netdev))
  654. return -EINVAL;
  655. return phy_mii_ioctl(netdev->phydev, rq, cmd);
  656. }
  657. static void smsc95xx_init_mac_address(struct usbnet *dev)
  658. {
  659. u8 addr[ETH_ALEN];
  660. /* maybe the boot loader passed the MAC address in devicetree */
  661. if (!platform_get_ethdev_address(&dev->udev->dev, dev->net)) {
  662. if (is_valid_ether_addr(dev->net->dev_addr)) {
  663. /* device tree values are valid so use them */
  664. netif_dbg(dev, ifup, dev->net, "MAC address read from the device tree\n");
  665. return;
  666. }
  667. }
  668. /* try reading mac address from EEPROM */
  669. if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, addr) == 0) {
  670. eth_hw_addr_set(dev->net, addr);
  671. if (is_valid_ether_addr(dev->net->dev_addr)) {
  672. /* eeprom values are valid so use them */
  673. netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n");
  674. return;
  675. }
  676. }
  677. /* no useful static MAC address found. generate a random one */
  678. eth_hw_addr_random(dev->net);
  679. netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
  680. }
  681. static int smsc95xx_set_mac_address(struct usbnet *dev)
  682. {
  683. u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
  684. dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
  685. u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
  686. int ret;
  687. ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
  688. if (ret < 0)
  689. return ret;
  690. return smsc95xx_write_reg(dev, ADDRH, addr_hi);
  691. }
  692. /* starts the TX path */
  693. static int smsc95xx_start_tx_path(struct usbnet *dev)
  694. {
  695. struct smsc95xx_priv *pdata = dev->driver_priv;
  696. unsigned long flags;
  697. int ret;
  698. /* Enable Tx at MAC */
  699. spin_lock_irqsave(&pdata->mac_cr_lock, flags);
  700. pdata->mac_cr |= MAC_CR_TXEN_;
  701. spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
  702. ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
  703. if (ret < 0)
  704. return ret;
  705. /* Enable Tx at SCSRs */
  706. return smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_);
  707. }
  708. /* Starts the Receive path */
  709. static int smsc95xx_start_rx_path(struct usbnet *dev)
  710. {
  711. struct smsc95xx_priv *pdata = dev->driver_priv;
  712. unsigned long flags;
  713. spin_lock_irqsave(&pdata->mac_cr_lock, flags);
  714. pdata->mac_cr |= MAC_CR_RXEN_;
  715. spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
  716. return smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
  717. }
  718. static int smsc95xx_reset(struct usbnet *dev)
  719. {
  720. struct smsc95xx_priv *pdata = dev->driver_priv;
  721. u32 read_buf, burst_cap;
  722. int ret = 0, timeout;
  723. netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n");
  724. ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_);
  725. if (ret < 0)
  726. return ret;
  727. timeout = 0;
  728. do {
  729. msleep(10);
  730. ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
  731. if (ret < 0)
  732. return ret;
  733. timeout++;
  734. } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
  735. if (timeout >= 100) {
  736. netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n");
  737. return -ETIMEDOUT;
  738. }
  739. ret = smsc95xx_set_mac_address(dev);
  740. if (ret < 0)
  741. return ret;
  742. netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n",
  743. dev->net->dev_addr);
  744. ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
  745. if (ret < 0)
  746. return ret;
  747. netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n",
  748. read_buf);
  749. read_buf |= HW_CFG_BIR_;
  750. ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
  751. if (ret < 0)
  752. return ret;
  753. ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
  754. if (ret < 0)
  755. return ret;
  756. netif_dbg(dev, ifup, dev->net,
  757. "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n",
  758. read_buf);
  759. if (!turbo_mode) {
  760. burst_cap = 0;
  761. dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
  762. } else if (dev->udev->speed == USB_SPEED_HIGH) {
  763. burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
  764. dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
  765. } else {
  766. burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
  767. dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
  768. }
  769. netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n",
  770. (ulong)dev->rx_urb_size);
  771. ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
  772. if (ret < 0)
  773. return ret;
  774. ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
  775. if (ret < 0)
  776. return ret;
  777. netif_dbg(dev, ifup, dev->net,
  778. "Read Value from BURST_CAP after writing: 0x%08x\n",
  779. read_buf);
  780. ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
  781. if (ret < 0)
  782. return ret;
  783. ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
  784. if (ret < 0)
  785. return ret;
  786. netif_dbg(dev, ifup, dev->net,
  787. "Read Value from BULK_IN_DLY after writing: 0x%08x\n",
  788. read_buf);
  789. ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
  790. if (ret < 0)
  791. return ret;
  792. netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG: 0x%08x\n",
  793. read_buf);
  794. if (turbo_mode)
  795. read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
  796. read_buf &= ~HW_CFG_RXDOFF_;
  797. /* set Rx data offset=2, Make IP header aligns on word boundary. */
  798. read_buf |= NET_IP_ALIGN << 9;
  799. ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
  800. if (ret < 0)
  801. return ret;
  802. ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
  803. if (ret < 0)
  804. return ret;
  805. netif_dbg(dev, ifup, dev->net,
  806. "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
  807. ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
  808. if (ret < 0)
  809. return ret;
  810. ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
  811. if (ret < 0)
  812. return ret;
  813. netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);
  814. ret = smsc95xx_read_reg(dev, LED_GPIO_CFG, &read_buf);
  815. if (ret < 0)
  816. return ret;
  817. /* Configure GPIO pins as LED outputs */
  818. read_buf |= LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
  819. LED_GPIO_CFG_FDX_LED;
  820. ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, read_buf);
  821. if (ret < 0)
  822. return ret;
  823. /* Init Tx */
  824. ret = smsc95xx_write_reg(dev, FLOW, 0);
  825. if (ret < 0)
  826. return ret;
  827. ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT);
  828. if (ret < 0)
  829. return ret;
  830. /* Don't need mac_cr_lock during initialisation */
  831. ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
  832. if (ret < 0)
  833. return ret;
  834. /* Init Rx */
  835. /* Set Vlan */
  836. ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q);
  837. if (ret < 0)
  838. return ret;
  839. /* Enable or disable checksum offload engines */
  840. ret = smsc95xx_set_features(dev->net, dev->net->features);
  841. if (ret < 0) {
  842. netdev_warn(dev->net, "Failed to set checksum offload features\n");
  843. return ret;
  844. }
  845. smsc95xx_set_multicast(dev->net);
  846. ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
  847. if (ret < 0)
  848. return ret;
  849. /* enable PHY interrupts */
  850. read_buf |= INT_EP_CTL_PHY_INT_;
  851. ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
  852. if (ret < 0)
  853. return ret;
  854. ret = smsc95xx_start_tx_path(dev);
  855. if (ret < 0) {
  856. netdev_warn(dev->net, "Failed to start TX path\n");
  857. return ret;
  858. }
  859. ret = smsc95xx_start_rx_path(dev);
  860. if (ret < 0) {
  861. netdev_warn(dev->net, "Failed to start RX path\n");
  862. return ret;
  863. }
  864. netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n");
  865. return 0;
  866. }
  867. static const struct net_device_ops smsc95xx_netdev_ops = {
  868. .ndo_open = usbnet_open,
  869. .ndo_stop = usbnet_stop,
  870. .ndo_start_xmit = usbnet_start_xmit,
  871. .ndo_tx_timeout = usbnet_tx_timeout,
  872. .ndo_change_mtu = usbnet_change_mtu,
  873. .ndo_get_stats64 = dev_get_tstats64,
  874. .ndo_set_mac_address = eth_mac_addr,
  875. .ndo_validate_addr = eth_validate_addr,
  876. .ndo_eth_ioctl = smsc95xx_ioctl,
  877. .ndo_set_rx_mode = smsc95xx_set_multicast,
  878. .ndo_set_features = smsc95xx_set_features,
  879. };
  880. static void smsc95xx_handle_link_change(struct net_device *net)
  881. {
  882. struct usbnet *dev = netdev_priv(net);
  883. phy_print_status(net->phydev);
  884. smsc95xx_mac_update_fullduplex(dev);
  885. usbnet_defer_kevent(dev, EVENT_LINK_CHANGE);
  886. }
  887. static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
  888. {
  889. struct smsc95xx_priv *pdata;
  890. char usb_path[64];
  891. int ret, phy_irq;
  892. u32 val;
  893. printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
  894. ret = usbnet_get_endpoints(dev, intf);
  895. if (ret < 0) {
  896. netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret);
  897. return ret;
  898. }
  899. pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
  900. if (!pdata)
  901. return -ENOMEM;
  902. dev->driver_priv = pdata;
  903. spin_lock_init(&pdata->mac_cr_lock);
  904. /* LAN95xx devices do not alter the computed checksum of 0 to 0xffff.
  905. * RFC 2460, ipv6 UDP calculated checksum yields a result of zero must
  906. * be changed to 0xffff. RFC 768, ipv4 UDP computed checksum is zero,
  907. * it is transmitted as all ones. The zero transmitted checksum means
  908. * transmitter generated no checksum. Hence, enable csum offload only
  909. * for ipv4 packets.
  910. */
  911. if (DEFAULT_TX_CSUM_ENABLE)
  912. dev->net->features |= NETIF_F_IP_CSUM;
  913. if (DEFAULT_RX_CSUM_ENABLE)
  914. dev->net->features |= NETIF_F_RXCSUM;
  915. dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM;
  916. set_bit(EVENT_NO_IP_ALIGN, &dev->flags);
  917. smsc95xx_init_mac_address(dev);
  918. /* Init all registers */
  919. ret = smsc95xx_reset(dev);
  920. if (ret)
  921. goto free_pdata;
  922. /* create irq domain for use by PHY driver and GPIO consumers */
  923. usb_make_path(dev->udev, usb_path, sizeof(usb_path));
  924. pdata->irqfwnode = irq_domain_alloc_named_fwnode(usb_path);
  925. if (!pdata->irqfwnode) {
  926. ret = -ENOMEM;
  927. goto free_pdata;
  928. }
  929. pdata->irqdomain = irq_domain_create_linear(pdata->irqfwnode,
  930. SMSC95XX_NR_IRQS,
  931. &irq_domain_simple_ops,
  932. pdata);
  933. if (!pdata->irqdomain) {
  934. ret = -ENOMEM;
  935. goto free_irqfwnode;
  936. }
  937. phy_irq = irq_create_mapping(pdata->irqdomain, PHY_HWIRQ);
  938. if (!phy_irq) {
  939. ret = -ENOENT;
  940. goto remove_irqdomain;
  941. }
  942. pdata->irqchip = dummy_irq_chip;
  943. pdata->irqchip.name = SMSC_CHIPNAME;
  944. irq_set_chip_and_handler_name(phy_irq, &pdata->irqchip,
  945. handle_simple_irq, "phy");
  946. pdata->mdiobus = mdiobus_alloc();
  947. if (!pdata->mdiobus) {
  948. ret = -ENOMEM;
  949. goto dispose_irq;
  950. }
  951. ret = smsc95xx_read_reg(dev, HW_CFG, &val);
  952. if (ret < 0)
  953. goto free_mdio;
  954. pdata->is_internal_phy = !(val & HW_CFG_PSEL_);
  955. if (pdata->is_internal_phy)
  956. pdata->mdiobus->phy_mask = ~(1u << SMSC95XX_INTERNAL_PHY_ID);
  957. pdata->mdiobus->priv = dev;
  958. pdata->mdiobus->read = smsc95xx_mdiobus_read;
  959. pdata->mdiobus->write = smsc95xx_mdiobus_write;
  960. pdata->mdiobus->reset = smsc95xx_mdiobus_reset;
  961. pdata->mdiobus->name = "smsc95xx-mdiobus";
  962. pdata->mdiobus->parent = &dev->udev->dev;
  963. snprintf(pdata->mdiobus->id, ARRAY_SIZE(pdata->mdiobus->id),
  964. "usb-%03d:%03d", dev->udev->bus->busnum, dev->udev->devnum);
  965. ret = mdiobus_register(pdata->mdiobus);
  966. if (ret) {
  967. netdev_err(dev->net, "Could not register MDIO bus\n");
  968. goto free_mdio;
  969. }
  970. pdata->phydev = phy_find_first(pdata->mdiobus);
  971. if (!pdata->phydev) {
  972. netdev_err(dev->net, "no PHY found\n");
  973. ret = -ENODEV;
  974. goto unregister_mdio;
  975. }
  976. pdata->phydev->irq = phy_irq;
  977. pdata->phydev->is_internal = pdata->is_internal_phy;
  978. /* detect device revision as different features may be available */
  979. ret = smsc95xx_read_reg(dev, ID_REV, &val);
  980. if (ret < 0)
  981. goto unregister_mdio;
  982. val >>= 16;
  983. if ((val == ID_REV_CHIP_ID_9500A_) || (val == ID_REV_CHIP_ID_9530_) ||
  984. (val == ID_REV_CHIP_ID_89530_) || (val == ID_REV_CHIP_ID_9730_))
  985. pdata->features = (FEATURE_8_WAKEUP_FILTERS |
  986. FEATURE_PHY_NLP_CROSSOVER |
  987. FEATURE_REMOTE_WAKEUP);
  988. else if (val == ID_REV_CHIP_ID_9512_)
  989. pdata->features = FEATURE_8_WAKEUP_FILTERS;
  990. dev->net->netdev_ops = &smsc95xx_netdev_ops;
  991. dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
  992. dev->net->flags |= IFF_MULTICAST;
  993. dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM;
  994. dev->net->min_mtu = ETH_MIN_MTU;
  995. dev->net->max_mtu = ETH_DATA_LEN;
  996. dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
  997. ret = phy_connect_direct(dev->net, pdata->phydev,
  998. &smsc95xx_handle_link_change,
  999. PHY_INTERFACE_MODE_MII);
  1000. if (ret) {
  1001. netdev_err(dev->net, "can't attach PHY to %s\n", pdata->mdiobus->id);
  1002. goto unregister_mdio;
  1003. }
  1004. phy_attached_info(dev->net->phydev);
  1005. return 0;
  1006. unregister_mdio:
  1007. mdiobus_unregister(pdata->mdiobus);
  1008. free_mdio:
  1009. mdiobus_free(pdata->mdiobus);
  1010. dispose_irq:
  1011. irq_dispose_mapping(phy_irq);
  1012. remove_irqdomain:
  1013. irq_domain_remove(pdata->irqdomain);
  1014. free_irqfwnode:
  1015. irq_domain_free_fwnode(pdata->irqfwnode);
  1016. free_pdata:
  1017. kfree(pdata);
  1018. return ret;
  1019. }
  1020. static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
  1021. {
  1022. struct smsc95xx_priv *pdata = dev->driver_priv;
  1023. phy_disconnect(dev->net->phydev);
  1024. mdiobus_unregister(pdata->mdiobus);
  1025. mdiobus_free(pdata->mdiobus);
  1026. irq_dispose_mapping(irq_find_mapping(pdata->irqdomain, PHY_HWIRQ));
  1027. irq_domain_remove(pdata->irqdomain);
  1028. irq_domain_free_fwnode(pdata->irqfwnode);
  1029. netif_dbg(dev, ifdown, dev->net, "free pdata\n");
  1030. kfree(pdata);
  1031. }
  1032. static int smsc95xx_start_phy(struct usbnet *dev)
  1033. {
  1034. phy_start(dev->net->phydev);
  1035. return 0;
  1036. }
  1037. static int smsc95xx_stop(struct usbnet *dev)
  1038. {
  1039. phy_stop(dev->net->phydev);
  1040. return 0;
  1041. }
  1042. static u32 smsc_crc(const u8 *buffer, size_t len, int filter)
  1043. {
  1044. u32 crc = bitrev16(crc16(0xFFFF, buffer, len));
  1045. return crc << ((filter % 2) * 16);
  1046. }
  1047. static int smsc95xx_link_ok(struct usbnet *dev)
  1048. {
  1049. struct smsc95xx_priv *pdata = dev->driver_priv;
  1050. int ret;
  1051. /* first, a dummy read, needed to latch some MII phys */
  1052. ret = smsc95xx_mdio_read(dev, pdata->phydev->mdio.addr, MII_BMSR);
  1053. if (ret < 0)
  1054. return ret;
  1055. ret = smsc95xx_mdio_read(dev, pdata->phydev->mdio.addr, MII_BMSR);
  1056. if (ret < 0)
  1057. return ret;
  1058. return !!(ret & BMSR_LSTATUS);
  1059. }
  1060. static int smsc95xx_enter_suspend0(struct usbnet *dev)
  1061. {
  1062. struct smsc95xx_priv *pdata = dev->driver_priv;
  1063. u32 val;
  1064. int ret;
  1065. ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
  1066. if (ret < 0)
  1067. return ret;
  1068. val &= (~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_));
  1069. val |= PM_CTL_SUS_MODE_0;
  1070. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  1071. if (ret < 0)
  1072. return ret;
  1073. /* clear wol status */
  1074. val &= ~PM_CTL_WUPS_;
  1075. val |= PM_CTL_WUPS_WOL_;
  1076. /* enable energy detection */
  1077. if (pdata->wolopts & WAKE_PHY)
  1078. val |= PM_CTL_WUPS_ED_;
  1079. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  1080. if (ret < 0)
  1081. return ret;
  1082. /* read back PM_CTRL */
  1083. ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
  1084. if (ret < 0)
  1085. return ret;
  1086. pdata->suspend_flags |= SUSPEND_SUSPEND0;
  1087. return 0;
  1088. }
  1089. static int smsc95xx_enter_suspend1(struct usbnet *dev)
  1090. {
  1091. struct smsc95xx_priv *pdata = dev->driver_priv;
  1092. int ret, phy_id = pdata->phydev->mdio.addr;
  1093. u32 val;
  1094. /* reconfigure link pulse detection timing for
  1095. * compatibility with non-standard link partners
  1096. */
  1097. if (pdata->features & FEATURE_PHY_NLP_CROSSOVER)
  1098. smsc95xx_mdio_write(dev, phy_id, PHY_EDPD_CONFIG,
  1099. PHY_EDPD_CONFIG_DEFAULT);
  1100. /* enable energy detect power-down mode */
  1101. ret = smsc95xx_mdio_read(dev, phy_id, PHY_MODE_CTRL_STS);
  1102. if (ret < 0)
  1103. return ret;
  1104. ret |= MODE_CTRL_STS_EDPWRDOWN_;
  1105. smsc95xx_mdio_write(dev, phy_id, PHY_MODE_CTRL_STS, ret);
  1106. /* enter SUSPEND1 mode */
  1107. ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
  1108. if (ret < 0)
  1109. return ret;
  1110. val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
  1111. val |= PM_CTL_SUS_MODE_1;
  1112. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  1113. if (ret < 0)
  1114. return ret;
  1115. /* clear wol status, enable energy detection */
  1116. val &= ~PM_CTL_WUPS_;
  1117. val |= (PM_CTL_WUPS_ED_ | PM_CTL_ED_EN_);
  1118. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  1119. if (ret < 0)
  1120. return ret;
  1121. pdata->suspend_flags |= SUSPEND_SUSPEND1;
  1122. return 0;
  1123. }
  1124. static int smsc95xx_enter_suspend2(struct usbnet *dev)
  1125. {
  1126. struct smsc95xx_priv *pdata = dev->driver_priv;
  1127. u32 val;
  1128. int ret;
  1129. ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
  1130. if (ret < 0)
  1131. return ret;
  1132. val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
  1133. val |= PM_CTL_SUS_MODE_2;
  1134. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  1135. if (ret < 0)
  1136. return ret;
  1137. pdata->suspend_flags |= SUSPEND_SUSPEND2;
  1138. return 0;
  1139. }
  1140. static int smsc95xx_enter_suspend3(struct usbnet *dev)
  1141. {
  1142. struct smsc95xx_priv *pdata = dev->driver_priv;
  1143. u32 val;
  1144. int ret;
  1145. ret = smsc95xx_read_reg(dev, RX_FIFO_INF, &val);
  1146. if (ret < 0)
  1147. return ret;
  1148. if (val & RX_FIFO_INF_USED_) {
  1149. netdev_info(dev->net, "rx fifo not empty in autosuspend\n");
  1150. return -EBUSY;
  1151. }
  1152. ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
  1153. if (ret < 0)
  1154. return ret;
  1155. val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
  1156. val |= PM_CTL_SUS_MODE_3 | PM_CTL_RES_CLR_WKP_STS;
  1157. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  1158. if (ret < 0)
  1159. return ret;
  1160. /* clear wol status */
  1161. val &= ~PM_CTL_WUPS_;
  1162. val |= PM_CTL_WUPS_WOL_;
  1163. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  1164. if (ret < 0)
  1165. return ret;
  1166. pdata->suspend_flags |= SUSPEND_SUSPEND3;
  1167. return 0;
  1168. }
  1169. static int smsc95xx_autosuspend(struct usbnet *dev, u32 link_up)
  1170. {
  1171. struct smsc95xx_priv *pdata = dev->driver_priv;
  1172. if (!netif_running(dev->net)) {
  1173. /* interface is ifconfig down so fully power down hw */
  1174. netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n");
  1175. return smsc95xx_enter_suspend2(dev);
  1176. }
  1177. if (!link_up) {
  1178. /* link is down so enter EDPD mode, but only if device can
  1179. * reliably resume from it. This check should be redundant
  1180. * as current FEATURE_REMOTE_WAKEUP parts also support
  1181. * FEATURE_PHY_NLP_CROSSOVER but it's included for clarity */
  1182. if (!(pdata->features & FEATURE_PHY_NLP_CROSSOVER)) {
  1183. netdev_warn(dev->net, "EDPD not supported\n");
  1184. return -EBUSY;
  1185. }
  1186. netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n");
  1187. netdev_info(dev->net, "entering SUSPEND1 mode\n");
  1188. return smsc95xx_enter_suspend1(dev);
  1189. }
  1190. netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n");
  1191. return smsc95xx_enter_suspend3(dev);
  1192. }
  1193. static int smsc95xx_suspend(struct usb_interface *intf, pm_message_t message)
  1194. {
  1195. struct usbnet *dev = usb_get_intfdata(intf);
  1196. struct smsc95xx_priv *pdata = dev->driver_priv;
  1197. u32 val, link_up;
  1198. int ret;
  1199. pdata->pm_task = current;
  1200. ret = usbnet_suspend(intf, message);
  1201. if (ret < 0) {
  1202. netdev_warn(dev->net, "usbnet_suspend error\n");
  1203. pdata->pm_task = NULL;
  1204. return ret;
  1205. }
  1206. if (pdata->suspend_flags) {
  1207. netdev_warn(dev->net, "error during last resume\n");
  1208. pdata->suspend_flags = 0;
  1209. }
  1210. link_up = smsc95xx_link_ok(dev);
  1211. if (message.event == PM_EVENT_AUTO_SUSPEND &&
  1212. (pdata->features & FEATURE_REMOTE_WAKEUP)) {
  1213. ret = smsc95xx_autosuspend(dev, link_up);
  1214. goto done;
  1215. }
  1216. /* if we get this far we're not autosuspending */
  1217. /* if no wol options set, or if link is down and we're not waking on
  1218. * PHY activity, enter lowest power SUSPEND2 mode
  1219. */
  1220. if (!(pdata->wolopts & SUPPORTED_WAKE) ||
  1221. !(link_up || (pdata->wolopts & WAKE_PHY))) {
  1222. netdev_info(dev->net, "entering SUSPEND2 mode\n");
  1223. /* disable energy detect (link up) & wake up events */
  1224. ret = smsc95xx_read_reg(dev, WUCSR, &val);
  1225. if (ret < 0)
  1226. goto done;
  1227. val &= ~(WUCSR_MPEN_ | WUCSR_WAKE_EN_);
  1228. ret = smsc95xx_write_reg(dev, WUCSR, val);
  1229. if (ret < 0)
  1230. goto done;
  1231. ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
  1232. if (ret < 0)
  1233. goto done;
  1234. val &= ~(PM_CTL_ED_EN_ | PM_CTL_WOL_EN_);
  1235. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  1236. if (ret < 0)
  1237. goto done;
  1238. ret = smsc95xx_enter_suspend2(dev);
  1239. goto done;
  1240. }
  1241. if (pdata->wolopts & WAKE_PHY) {
  1242. /* if link is down then configure EDPD and enter SUSPEND1,
  1243. * otherwise enter SUSPEND0 below
  1244. */
  1245. if (!link_up) {
  1246. netdev_info(dev->net, "entering SUSPEND1 mode\n");
  1247. ret = smsc95xx_enter_suspend1(dev);
  1248. goto done;
  1249. }
  1250. }
  1251. if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
  1252. u32 *filter_mask = kcalloc(32, sizeof(u32), GFP_KERNEL);
  1253. u32 command[2];
  1254. u32 offset[2];
  1255. u32 crc[4];
  1256. int wuff_filter_count =
  1257. (pdata->features & FEATURE_8_WAKEUP_FILTERS) ?
  1258. LAN9500A_WUFF_NUM : LAN9500_WUFF_NUM;
  1259. int i, filter = 0;
  1260. if (!filter_mask) {
  1261. netdev_warn(dev->net, "Unable to allocate filter_mask\n");
  1262. ret = -ENOMEM;
  1263. goto done;
  1264. }
  1265. memset(command, 0, sizeof(command));
  1266. memset(offset, 0, sizeof(offset));
  1267. memset(crc, 0, sizeof(crc));
  1268. if (pdata->wolopts & WAKE_BCAST) {
  1269. const u8 bcast[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
  1270. netdev_info(dev->net, "enabling broadcast detection\n");
  1271. filter_mask[filter * 4] = 0x003F;
  1272. filter_mask[filter * 4 + 1] = 0x00;
  1273. filter_mask[filter * 4 + 2] = 0x00;
  1274. filter_mask[filter * 4 + 3] = 0x00;
  1275. command[filter/4] |= 0x05UL << ((filter % 4) * 8);
  1276. offset[filter/4] |= 0x00 << ((filter % 4) * 8);
  1277. crc[filter/2] |= smsc_crc(bcast, 6, filter);
  1278. filter++;
  1279. }
  1280. if (pdata->wolopts & WAKE_MCAST) {
  1281. const u8 mcast[] = {0x01, 0x00, 0x5E};
  1282. netdev_info(dev->net, "enabling multicast detection\n");
  1283. filter_mask[filter * 4] = 0x0007;
  1284. filter_mask[filter * 4 + 1] = 0x00;
  1285. filter_mask[filter * 4 + 2] = 0x00;
  1286. filter_mask[filter * 4 + 3] = 0x00;
  1287. command[filter/4] |= 0x09UL << ((filter % 4) * 8);
  1288. offset[filter/4] |= 0x00 << ((filter % 4) * 8);
  1289. crc[filter/2] |= smsc_crc(mcast, 3, filter);
  1290. filter++;
  1291. }
  1292. if (pdata->wolopts & WAKE_ARP) {
  1293. const u8 arp[] = {0x08, 0x06};
  1294. netdev_info(dev->net, "enabling ARP detection\n");
  1295. filter_mask[filter * 4] = 0x0003;
  1296. filter_mask[filter * 4 + 1] = 0x00;
  1297. filter_mask[filter * 4 + 2] = 0x00;
  1298. filter_mask[filter * 4 + 3] = 0x00;
  1299. command[filter/4] |= 0x05UL << ((filter % 4) * 8);
  1300. offset[filter/4] |= 0x0C << ((filter % 4) * 8);
  1301. crc[filter/2] |= smsc_crc(arp, 2, filter);
  1302. filter++;
  1303. }
  1304. if (pdata->wolopts & WAKE_UCAST) {
  1305. netdev_info(dev->net, "enabling unicast detection\n");
  1306. filter_mask[filter * 4] = 0x003F;
  1307. filter_mask[filter * 4 + 1] = 0x00;
  1308. filter_mask[filter * 4 + 2] = 0x00;
  1309. filter_mask[filter * 4 + 3] = 0x00;
  1310. command[filter/4] |= 0x01UL << ((filter % 4) * 8);
  1311. offset[filter/4] |= 0x00 << ((filter % 4) * 8);
  1312. crc[filter/2] |= smsc_crc(dev->net->dev_addr, ETH_ALEN, filter);
  1313. filter++;
  1314. }
  1315. for (i = 0; i < (wuff_filter_count * 4); i++) {
  1316. ret = smsc95xx_write_reg(dev, WUFF, filter_mask[i]);
  1317. if (ret < 0) {
  1318. kfree(filter_mask);
  1319. goto done;
  1320. }
  1321. }
  1322. kfree(filter_mask);
  1323. for (i = 0; i < (wuff_filter_count / 4); i++) {
  1324. ret = smsc95xx_write_reg(dev, WUFF, command[i]);
  1325. if (ret < 0)
  1326. goto done;
  1327. }
  1328. for (i = 0; i < (wuff_filter_count / 4); i++) {
  1329. ret = smsc95xx_write_reg(dev, WUFF, offset[i]);
  1330. if (ret < 0)
  1331. goto done;
  1332. }
  1333. for (i = 0; i < (wuff_filter_count / 2); i++) {
  1334. ret = smsc95xx_write_reg(dev, WUFF, crc[i]);
  1335. if (ret < 0)
  1336. goto done;
  1337. }
  1338. /* clear any pending pattern match packet status */
  1339. ret = smsc95xx_read_reg(dev, WUCSR, &val);
  1340. if (ret < 0)
  1341. goto done;
  1342. val |= WUCSR_WUFR_;
  1343. ret = smsc95xx_write_reg(dev, WUCSR, val);
  1344. if (ret < 0)
  1345. goto done;
  1346. }
  1347. if (pdata->wolopts & WAKE_MAGIC) {
  1348. /* clear any pending magic packet status */
  1349. ret = smsc95xx_read_reg(dev, WUCSR, &val);
  1350. if (ret < 0)
  1351. goto done;
  1352. val |= WUCSR_MPR_;
  1353. ret = smsc95xx_write_reg(dev, WUCSR, val);
  1354. if (ret < 0)
  1355. goto done;
  1356. }
  1357. /* enable/disable wakeup sources */
  1358. ret = smsc95xx_read_reg(dev, WUCSR, &val);
  1359. if (ret < 0)
  1360. goto done;
  1361. if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
  1362. netdev_info(dev->net, "enabling pattern match wakeup\n");
  1363. val |= WUCSR_WAKE_EN_;
  1364. } else {
  1365. netdev_info(dev->net, "disabling pattern match wakeup\n");
  1366. val &= ~WUCSR_WAKE_EN_;
  1367. }
  1368. if (pdata->wolopts & WAKE_MAGIC) {
  1369. netdev_info(dev->net, "enabling magic packet wakeup\n");
  1370. val |= WUCSR_MPEN_;
  1371. } else {
  1372. netdev_info(dev->net, "disabling magic packet wakeup\n");
  1373. val &= ~WUCSR_MPEN_;
  1374. }
  1375. ret = smsc95xx_write_reg(dev, WUCSR, val);
  1376. if (ret < 0)
  1377. goto done;
  1378. /* enable wol wakeup source */
  1379. ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
  1380. if (ret < 0)
  1381. goto done;
  1382. val |= PM_CTL_WOL_EN_;
  1383. /* phy energy detect wakeup source */
  1384. if (pdata->wolopts & WAKE_PHY)
  1385. val |= PM_CTL_ED_EN_;
  1386. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  1387. if (ret < 0)
  1388. goto done;
  1389. /* enable receiver to enable frame reception */
  1390. smsc95xx_start_rx_path(dev);
  1391. /* some wol options are enabled, so enter SUSPEND0 */
  1392. netdev_info(dev->net, "entering SUSPEND0 mode\n");
  1393. ret = smsc95xx_enter_suspend0(dev);
  1394. done:
  1395. /*
  1396. * TODO: resume() might need to handle the suspend failure
  1397. * in system sleep
  1398. */
  1399. if (ret && PMSG_IS_AUTO(message))
  1400. usbnet_resume(intf);
  1401. pdata->pm_task = NULL;
  1402. return ret;
  1403. }
  1404. static int smsc95xx_resume(struct usb_interface *intf)
  1405. {
  1406. struct usbnet *dev = usb_get_intfdata(intf);
  1407. struct smsc95xx_priv *pdata;
  1408. u8 suspend_flags;
  1409. int ret;
  1410. u32 val;
  1411. BUG_ON(!dev);
  1412. pdata = dev->driver_priv;
  1413. suspend_flags = pdata->suspend_flags;
  1414. netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags);
  1415. /* do this first to ensure it's cleared even in error case */
  1416. pdata->suspend_flags = 0;
  1417. pdata->pm_task = current;
  1418. if (suspend_flags & SUSPEND_ALLMODES) {
  1419. /* clear wake-up sources */
  1420. ret = smsc95xx_read_reg(dev, WUCSR, &val);
  1421. if (ret < 0)
  1422. goto done;
  1423. val &= ~(WUCSR_WAKE_EN_ | WUCSR_MPEN_);
  1424. ret = smsc95xx_write_reg(dev, WUCSR, val);
  1425. if (ret < 0)
  1426. goto done;
  1427. /* clear wake-up status */
  1428. ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
  1429. if (ret < 0)
  1430. goto done;
  1431. val &= ~PM_CTL_WOL_EN_;
  1432. val |= PM_CTL_WUPS_;
  1433. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  1434. if (ret < 0)
  1435. goto done;
  1436. }
  1437. phy_init_hw(pdata->phydev);
  1438. ret = usbnet_resume(intf);
  1439. if (ret < 0)
  1440. netdev_warn(dev->net, "usbnet_resume error\n");
  1441. done:
  1442. pdata->pm_task = NULL;
  1443. return ret;
  1444. }
  1445. static int smsc95xx_reset_resume(struct usb_interface *intf)
  1446. {
  1447. struct usbnet *dev = usb_get_intfdata(intf);
  1448. struct smsc95xx_priv *pdata = dev->driver_priv;
  1449. int ret;
  1450. pdata->pm_task = current;
  1451. ret = smsc95xx_reset(dev);
  1452. pdata->pm_task = NULL;
  1453. if (ret < 0)
  1454. return ret;
  1455. return smsc95xx_resume(intf);
  1456. }
  1457. static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
  1458. {
  1459. u16 *csum_ptr = (u16 *)(skb_tail_pointer(skb) - 2);
  1460. skb->csum = (__force __wsum)get_unaligned(csum_ptr);
  1461. skb->ip_summed = CHECKSUM_COMPLETE;
  1462. skb_trim(skb, skb->len - 2); /* remove csum */
  1463. }
  1464. static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
  1465. {
  1466. /* This check is no longer done by usbnet */
  1467. if (skb->len < dev->net->hard_header_len)
  1468. return 0;
  1469. while (skb->len > 0) {
  1470. u32 header, align_count;
  1471. struct sk_buff *ax_skb;
  1472. unsigned char *packet;
  1473. u16 size;
  1474. header = get_unaligned_le32(skb->data);
  1475. skb_pull(skb, 4 + NET_IP_ALIGN);
  1476. packet = skb->data;
  1477. /* get the packet length */
  1478. size = (u16)((header & RX_STS_FL_) >> 16);
  1479. align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
  1480. if (unlikely(size > skb->len)) {
  1481. netif_dbg(dev, rx_err, dev->net,
  1482. "size err header=0x%08x\n", header);
  1483. return 0;
  1484. }
  1485. if (unlikely(header & RX_STS_ES_)) {
  1486. netif_dbg(dev, rx_err, dev->net,
  1487. "Error header=0x%08x\n", header);
  1488. dev->net->stats.rx_errors++;
  1489. dev->net->stats.rx_dropped++;
  1490. if (header & RX_STS_CRC_) {
  1491. dev->net->stats.rx_crc_errors++;
  1492. } else {
  1493. if (header & (RX_STS_TL_ | RX_STS_RF_))
  1494. dev->net->stats.rx_frame_errors++;
  1495. if ((header & RX_STS_LE_) &&
  1496. (!(header & RX_STS_FT_)))
  1497. dev->net->stats.rx_length_errors++;
  1498. }
  1499. } else {
  1500. /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
  1501. if (unlikely(size > (ETH_FRAME_LEN + 12))) {
  1502. netif_dbg(dev, rx_err, dev->net,
  1503. "size err header=0x%08x\n", header);
  1504. return 0;
  1505. }
  1506. /* last frame in this batch */
  1507. if (skb->len == size) {
  1508. if (dev->net->features & NETIF_F_RXCSUM)
  1509. smsc95xx_rx_csum_offload(skb);
  1510. skb_trim(skb, skb->len - 4); /* remove fcs */
  1511. return 1;
  1512. }
  1513. ax_skb = netdev_alloc_skb_ip_align(dev->net, size);
  1514. if (unlikely(!ax_skb)) {
  1515. netdev_warn(dev->net, "Error allocating skb\n");
  1516. return 0;
  1517. }
  1518. skb_put(ax_skb, size);
  1519. memcpy(ax_skb->data, packet, size);
  1520. if (dev->net->features & NETIF_F_RXCSUM)
  1521. smsc95xx_rx_csum_offload(ax_skb);
  1522. skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
  1523. usbnet_skb_return(dev, ax_skb);
  1524. }
  1525. skb_pull(skb, size);
  1526. /* padding bytes before the next frame starts */
  1527. if (skb->len)
  1528. skb_pull(skb, align_count);
  1529. }
  1530. return 1;
  1531. }
  1532. static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
  1533. {
  1534. u16 low_16 = (u16)skb_checksum_start_offset(skb);
  1535. u16 high_16 = low_16 + skb->csum_offset;
  1536. return (high_16 << 16) | low_16;
  1537. }
  1538. /* The TX CSUM won't work if the checksum lies in the last 4 bytes of the
  1539. * transmission. This is fairly unlikely, only seems to trigger with some
  1540. * short TCP ACK packets sent.
  1541. *
  1542. * Note, this calculation should probably check for the alignment of the
  1543. * data as well, but a straight check for csum being in the last four bytes
  1544. * of the packet should be ok for now.
  1545. */
  1546. static bool smsc95xx_can_tx_checksum(struct sk_buff *skb)
  1547. {
  1548. unsigned int len = skb->len - skb_checksum_start_offset(skb);
  1549. if (skb->len <= 45)
  1550. return false;
  1551. return skb->csum_offset < (len - (4 + 1));
  1552. }
  1553. static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
  1554. struct sk_buff *skb, gfp_t flags)
  1555. {
  1556. bool csum = skb->ip_summed == CHECKSUM_PARTIAL;
  1557. int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
  1558. u32 tx_cmd_a, tx_cmd_b;
  1559. void *ptr;
  1560. /* We do not advertise SG, so skbs should be already linearized */
  1561. BUG_ON(skb_shinfo(skb)->nr_frags);
  1562. /* Make writable and expand header space by overhead if required */
  1563. if (skb_cow_head(skb, overhead)) {
  1564. /* Must deallocate here as returning NULL to indicate error
  1565. * means the skb won't be deallocated in the caller.
  1566. */
  1567. dev_kfree_skb_any(skb);
  1568. return NULL;
  1569. }
  1570. tx_cmd_b = (u32)skb->len;
  1571. tx_cmd_a = tx_cmd_b | TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
  1572. if (csum) {
  1573. if (!smsc95xx_can_tx_checksum(skb)) {
  1574. /* workaround - hardware tx checksum does not work
  1575. * properly with extremely small packets */
  1576. long csstart = skb_checksum_start_offset(skb);
  1577. __wsum calc = csum_partial(skb->data + csstart,
  1578. skb->len - csstart, 0);
  1579. *((__sum16 *)(skb->data + csstart
  1580. + skb->csum_offset)) = csum_fold(calc);
  1581. csum = false;
  1582. } else {
  1583. u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
  1584. ptr = skb_push(skb, 4);
  1585. put_unaligned_le32(csum_preamble, ptr);
  1586. tx_cmd_a += 4;
  1587. tx_cmd_b += 4;
  1588. tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
  1589. }
  1590. }
  1591. ptr = skb_push(skb, 8);
  1592. put_unaligned_le32(tx_cmd_a, ptr);
  1593. put_unaligned_le32(tx_cmd_b, ptr+4);
  1594. return skb;
  1595. }
  1596. static int smsc95xx_manage_power(struct usbnet *dev, int on)
  1597. {
  1598. struct smsc95xx_priv *pdata = dev->driver_priv;
  1599. dev->intf->needs_remote_wakeup = on;
  1600. if (pdata->features & FEATURE_REMOTE_WAKEUP)
  1601. return 0;
  1602. /* this chip revision isn't capable of remote wakeup */
  1603. netdev_info(dev->net, "hardware isn't capable of remote wakeup\n");
  1604. if (on)
  1605. usb_autopm_get_interface_no_resume(dev->intf);
  1606. else
  1607. usb_autopm_put_interface(dev->intf);
  1608. return 0;
  1609. }
  1610. static const struct driver_info smsc95xx_info = {
  1611. .description = "smsc95xx USB 2.0 Ethernet",
  1612. .bind = smsc95xx_bind,
  1613. .unbind = smsc95xx_unbind,
  1614. .reset = smsc95xx_reset,
  1615. .check_connect = smsc95xx_start_phy,
  1616. .stop = smsc95xx_stop,
  1617. .rx_fixup = smsc95xx_rx_fixup,
  1618. .tx_fixup = smsc95xx_tx_fixup,
  1619. .status = smsc95xx_status,
  1620. .manage_power = smsc95xx_manage_power,
  1621. .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
  1622. };
  1623. static const struct usb_device_id products[] = {
  1624. {
  1625. /* SMSC9500 USB Ethernet Device */
  1626. USB_DEVICE(0x0424, 0x9500),
  1627. .driver_info = (unsigned long) &smsc95xx_info,
  1628. },
  1629. {
  1630. /* SMSC9505 USB Ethernet Device */
  1631. USB_DEVICE(0x0424, 0x9505),
  1632. .driver_info = (unsigned long) &smsc95xx_info,
  1633. },
  1634. {
  1635. /* SMSC9500A USB Ethernet Device */
  1636. USB_DEVICE(0x0424, 0x9E00),
  1637. .driver_info = (unsigned long) &smsc95xx_info,
  1638. },
  1639. {
  1640. /* SMSC9505A USB Ethernet Device */
  1641. USB_DEVICE(0x0424, 0x9E01),
  1642. .driver_info = (unsigned long) &smsc95xx_info,
  1643. },
  1644. {
  1645. /* SMSC9512/9514 USB Hub & Ethernet Device */
  1646. USB_DEVICE(0x0424, 0xec00),
  1647. .driver_info = (unsigned long) &smsc95xx_info,
  1648. },
  1649. {
  1650. /* SMSC9500 USB Ethernet Device (SAL10) */
  1651. USB_DEVICE(0x0424, 0x9900),
  1652. .driver_info = (unsigned long) &smsc95xx_info,
  1653. },
  1654. {
  1655. /* SMSC9505 USB Ethernet Device (SAL10) */
  1656. USB_DEVICE(0x0424, 0x9901),
  1657. .driver_info = (unsigned long) &smsc95xx_info,
  1658. },
  1659. {
  1660. /* SMSC9500A USB Ethernet Device (SAL10) */
  1661. USB_DEVICE(0x0424, 0x9902),
  1662. .driver_info = (unsigned long) &smsc95xx_info,
  1663. },
  1664. {
  1665. /* SMSC9505A USB Ethernet Device (SAL10) */
  1666. USB_DEVICE(0x0424, 0x9903),
  1667. .driver_info = (unsigned long) &smsc95xx_info,
  1668. },
  1669. {
  1670. /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */
  1671. USB_DEVICE(0x0424, 0x9904),
  1672. .driver_info = (unsigned long) &smsc95xx_info,
  1673. },
  1674. {
  1675. /* SMSC9500A USB Ethernet Device (HAL) */
  1676. USB_DEVICE(0x0424, 0x9905),
  1677. .driver_info = (unsigned long) &smsc95xx_info,
  1678. },
  1679. {
  1680. /* SMSC9505A USB Ethernet Device (HAL) */
  1681. USB_DEVICE(0x0424, 0x9906),
  1682. .driver_info = (unsigned long) &smsc95xx_info,
  1683. },
  1684. {
  1685. /* SMSC9500 USB Ethernet Device (Alternate ID) */
  1686. USB_DEVICE(0x0424, 0x9907),
  1687. .driver_info = (unsigned long) &smsc95xx_info,
  1688. },
  1689. {
  1690. /* SMSC9500A USB Ethernet Device (Alternate ID) */
  1691. USB_DEVICE(0x0424, 0x9908),
  1692. .driver_info = (unsigned long) &smsc95xx_info,
  1693. },
  1694. {
  1695. /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */
  1696. USB_DEVICE(0x0424, 0x9909),
  1697. .driver_info = (unsigned long) &smsc95xx_info,
  1698. },
  1699. {
  1700. /* SMSC LAN9530 USB Ethernet Device */
  1701. USB_DEVICE(0x0424, 0x9530),
  1702. .driver_info = (unsigned long) &smsc95xx_info,
  1703. },
  1704. {
  1705. /* SMSC LAN9730 USB Ethernet Device */
  1706. USB_DEVICE(0x0424, 0x9730),
  1707. .driver_info = (unsigned long) &smsc95xx_info,
  1708. },
  1709. {
  1710. /* SMSC LAN89530 USB Ethernet Device */
  1711. USB_DEVICE(0x0424, 0x9E08),
  1712. .driver_info = (unsigned long) &smsc95xx_info,
  1713. },
  1714. {
  1715. /* SYSTEC USB-SPEmodule1 10BASE-T1L Ethernet Device */
  1716. USB_DEVICE(0x0878, 0x1400),
  1717. .driver_info = (unsigned long)&smsc95xx_info,
  1718. },
  1719. {
  1720. /* Microchip's EVB-LAN8670-USB 10BASE-T1S Ethernet Device */
  1721. USB_DEVICE(0x184F, 0x0051),
  1722. .driver_info = (unsigned long)&smsc95xx_info,
  1723. },
  1724. { }, /* END */
  1725. };
  1726. MODULE_DEVICE_TABLE(usb, products);
  1727. static struct usb_driver smsc95xx_driver = {
  1728. .name = "smsc95xx",
  1729. .id_table = products,
  1730. .probe = usbnet_probe,
  1731. .suspend = smsc95xx_suspend,
  1732. .resume = smsc95xx_resume,
  1733. .reset_resume = smsc95xx_reset_resume,
  1734. .disconnect = usbnet_disconnect,
  1735. .disable_hub_initiated_lpm = 1,
  1736. .supports_autosuspend = 1,
  1737. };
  1738. module_usb_driver(smsc95xx_driver);
  1739. MODULE_AUTHOR("Nancy Lin");
  1740. MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>");
  1741. MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
  1742. MODULE_LICENSE("GPL");