htt_rx.c 124 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470
  1. // SPDX-License-Identifier: ISC
  2. /*
  3. * Copyright (c) 2005-2011 Atheros Communications Inc.
  4. * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
  5. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  6. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  7. */
  8. #include "core.h"
  9. #include "htc.h"
  10. #include "htt.h"
  11. #include "txrx.h"
  12. #include "debug.h"
  13. #include "trace.h"
  14. #include "mac.h"
  15. #include <linux/log2.h>
  16. #include <linux/bitfield.h>
  17. /* when under memory pressure rx ring refill may fail and needs a retry */
  18. #define HTT_RX_RING_REFILL_RETRY_MS 50
  19. #define HTT_RX_RING_REFILL_RESCHED_MS 5
  20. /* shortcut to interpret a raw memory buffer as a rx descriptor */
  21. #define HTT_RX_BUF_TO_RX_DESC(hw, buf) ath10k_htt_rx_desc_from_raw_buffer(hw, buf)
  22. static int ath10k_htt_rx_get_csum_state(struct ath10k_hw_params *hw, struct sk_buff *skb);
  23. static struct sk_buff *
  24. ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u64 paddr)
  25. {
  26. struct ath10k_skb_rxcb *rxcb;
  27. hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr)
  28. if (rxcb->paddr == paddr)
  29. return ATH10K_RXCB_SKB(rxcb);
  30. WARN_ON_ONCE(1);
  31. return NULL;
  32. }
  33. static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
  34. {
  35. struct sk_buff *skb;
  36. struct ath10k_skb_rxcb *rxcb;
  37. struct hlist_node *n;
  38. int i;
  39. if (htt->rx_ring.in_ord_rx) {
  40. hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) {
  41. skb = ATH10K_RXCB_SKB(rxcb);
  42. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  43. skb->len + skb_tailroom(skb),
  44. DMA_FROM_DEVICE);
  45. hash_del(&rxcb->hlist);
  46. dev_kfree_skb_any(skb);
  47. }
  48. } else {
  49. for (i = 0; i < htt->rx_ring.size; i++) {
  50. skb = htt->rx_ring.netbufs_ring[i];
  51. if (!skb)
  52. continue;
  53. rxcb = ATH10K_SKB_RXCB(skb);
  54. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  55. skb->len + skb_tailroom(skb),
  56. DMA_FROM_DEVICE);
  57. dev_kfree_skb_any(skb);
  58. }
  59. }
  60. htt->rx_ring.fill_cnt = 0;
  61. hash_init(htt->rx_ring.skb_table);
  62. memset(htt->rx_ring.netbufs_ring, 0,
  63. htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0]));
  64. }
  65. static size_t ath10k_htt_get_rx_ring_size_32(struct ath10k_htt *htt)
  66. {
  67. return htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring_32);
  68. }
  69. static size_t ath10k_htt_get_rx_ring_size_64(struct ath10k_htt *htt)
  70. {
  71. return htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring_64);
  72. }
  73. static void ath10k_htt_config_paddrs_ring_32(struct ath10k_htt *htt,
  74. void *vaddr)
  75. {
  76. htt->rx_ring.paddrs_ring_32 = vaddr;
  77. }
  78. static void ath10k_htt_config_paddrs_ring_64(struct ath10k_htt *htt,
  79. void *vaddr)
  80. {
  81. htt->rx_ring.paddrs_ring_64 = vaddr;
  82. }
  83. static void ath10k_htt_set_paddrs_ring_32(struct ath10k_htt *htt,
  84. dma_addr_t paddr, int idx)
  85. {
  86. htt->rx_ring.paddrs_ring_32[idx] = __cpu_to_le32(paddr);
  87. }
  88. static void ath10k_htt_set_paddrs_ring_64(struct ath10k_htt *htt,
  89. dma_addr_t paddr, int idx)
  90. {
  91. htt->rx_ring.paddrs_ring_64[idx] = __cpu_to_le64(paddr);
  92. }
  93. static void ath10k_htt_reset_paddrs_ring_32(struct ath10k_htt *htt, int idx)
  94. {
  95. htt->rx_ring.paddrs_ring_32[idx] = 0;
  96. }
  97. static void ath10k_htt_reset_paddrs_ring_64(struct ath10k_htt *htt, int idx)
  98. {
  99. htt->rx_ring.paddrs_ring_64[idx] = 0;
  100. }
  101. static void *ath10k_htt_get_vaddr_ring_32(struct ath10k_htt *htt)
  102. {
  103. return (void *)htt->rx_ring.paddrs_ring_32;
  104. }
  105. static void *ath10k_htt_get_vaddr_ring_64(struct ath10k_htt *htt)
  106. {
  107. return (void *)htt->rx_ring.paddrs_ring_64;
  108. }
  109. static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  110. {
  111. struct ath10k_hw_params *hw = &htt->ar->hw_params;
  112. struct htt_rx_desc *rx_desc;
  113. struct ath10k_skb_rxcb *rxcb;
  114. struct sk_buff *skb;
  115. dma_addr_t paddr;
  116. int ret = 0, idx;
  117. /* The Full Rx Reorder firmware has no way of telling the host
  118. * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring.
  119. * To keep things simple make sure ring is always half empty. This
  120. * guarantees there'll be no replenishment overruns possible.
  121. */
  122. BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2);
  123. idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
  124. if (idx < 0 || idx >= htt->rx_ring.size) {
  125. ath10k_err(htt->ar, "rx ring index is not valid, firmware malfunctioning?\n");
  126. idx &= htt->rx_ring.size_mask;
  127. ret = -ENOMEM;
  128. goto fail;
  129. }
  130. while (num > 0) {
  131. skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
  132. if (!skb) {
  133. ret = -ENOMEM;
  134. goto fail;
  135. }
  136. if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
  137. skb_pull(skb,
  138. PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
  139. skb->data);
  140. /* Clear rx_desc attention word before posting to Rx ring */
  141. rx_desc = HTT_RX_BUF_TO_RX_DESC(hw, skb->data);
  142. ath10k_htt_rx_desc_get_attention(hw, rx_desc)->flags = __cpu_to_le32(0);
  143. paddr = dma_map_single(htt->ar->dev, skb->data,
  144. skb->len + skb_tailroom(skb),
  145. DMA_FROM_DEVICE);
  146. if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
  147. dev_kfree_skb_any(skb);
  148. ret = -ENOMEM;
  149. goto fail;
  150. }
  151. rxcb = ATH10K_SKB_RXCB(skb);
  152. rxcb->paddr = paddr;
  153. htt->rx_ring.netbufs_ring[idx] = skb;
  154. ath10k_htt_set_paddrs_ring(htt, paddr, idx);
  155. htt->rx_ring.fill_cnt++;
  156. if (htt->rx_ring.in_ord_rx) {
  157. hash_add(htt->rx_ring.skb_table,
  158. &ATH10K_SKB_RXCB(skb)->hlist,
  159. paddr);
  160. }
  161. num--;
  162. idx++;
  163. idx &= htt->rx_ring.size_mask;
  164. }
  165. fail:
  166. /*
  167. * Make sure the rx buffer is updated before available buffer
  168. * index to avoid any potential rx ring corruption.
  169. */
  170. mb();
  171. *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
  172. return ret;
  173. }
  174. static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  175. {
  176. lockdep_assert_held(&htt->rx_ring.lock);
  177. return __ath10k_htt_rx_ring_fill_n(htt, num);
  178. }
  179. static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
  180. {
  181. int ret, num_deficit, num_to_fill;
  182. /* Refilling the whole RX ring buffer proves to be a bad idea. The
  183. * reason is RX may take up significant amount of CPU cycles and starve
  184. * other tasks, e.g. TX on an ethernet device while acting as a bridge
  185. * with ath10k wlan interface. This ended up with very poor performance
  186. * once CPU the host system was overwhelmed with RX on ath10k.
  187. *
  188. * By limiting the number of refills the replenishing occurs
  189. * progressively. This in turns makes use of the fact tasklets are
  190. * processed in FIFO order. This means actual RX processing can starve
  191. * out refilling. If there's not enough buffers on RX ring FW will not
  192. * report RX until it is refilled with enough buffers. This
  193. * automatically balances load wrt to CPU power.
  194. *
  195. * This probably comes at a cost of lower maximum throughput but
  196. * improves the average and stability.
  197. */
  198. spin_lock_bh(&htt->rx_ring.lock);
  199. num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
  200. num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
  201. num_deficit -= num_to_fill;
  202. ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
  203. if (ret == -ENOMEM) {
  204. /*
  205. * Failed to fill it to the desired level -
  206. * we'll start a timer and try again next time.
  207. * As long as enough buffers are left in the ring for
  208. * another A-MPDU rx, no special recovery is needed.
  209. */
  210. mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
  211. msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
  212. } else if (num_deficit > 0) {
  213. mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
  214. msecs_to_jiffies(HTT_RX_RING_REFILL_RESCHED_MS));
  215. }
  216. spin_unlock_bh(&htt->rx_ring.lock);
  217. }
  218. static void ath10k_htt_rx_ring_refill_retry(struct timer_list *t)
  219. {
  220. struct ath10k_htt *htt = from_timer(htt, t, rx_ring.refill_retry_timer);
  221. ath10k_htt_rx_msdu_buff_replenish(htt);
  222. }
  223. int ath10k_htt_rx_ring_refill(struct ath10k *ar)
  224. {
  225. struct ath10k_htt *htt = &ar->htt;
  226. int ret;
  227. if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL)
  228. return 0;
  229. spin_lock_bh(&htt->rx_ring.lock);
  230. ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level -
  231. htt->rx_ring.fill_cnt));
  232. if (ret)
  233. ath10k_htt_rx_ring_free(htt);
  234. spin_unlock_bh(&htt->rx_ring.lock);
  235. return ret;
  236. }
  237. void ath10k_htt_rx_free(struct ath10k_htt *htt)
  238. {
  239. if (htt->ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL)
  240. return;
  241. del_timer_sync(&htt->rx_ring.refill_retry_timer);
  242. skb_queue_purge(&htt->rx_msdus_q);
  243. skb_queue_purge(&htt->rx_in_ord_compl_q);
  244. skb_queue_purge(&htt->tx_fetch_ind_q);
  245. spin_lock_bh(&htt->rx_ring.lock);
  246. ath10k_htt_rx_ring_free(htt);
  247. spin_unlock_bh(&htt->rx_ring.lock);
  248. dma_free_coherent(htt->ar->dev,
  249. ath10k_htt_get_rx_ring_size(htt),
  250. ath10k_htt_get_vaddr_ring(htt),
  251. htt->rx_ring.base_paddr);
  252. ath10k_htt_config_paddrs_ring(htt, NULL);
  253. dma_free_coherent(htt->ar->dev,
  254. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  255. htt->rx_ring.alloc_idx.vaddr,
  256. htt->rx_ring.alloc_idx.paddr);
  257. htt->rx_ring.alloc_idx.vaddr = NULL;
  258. kfree(htt->rx_ring.netbufs_ring);
  259. htt->rx_ring.netbufs_ring = NULL;
  260. }
  261. static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
  262. {
  263. struct ath10k *ar = htt->ar;
  264. int idx;
  265. struct sk_buff *msdu;
  266. lockdep_assert_held(&htt->rx_ring.lock);
  267. if (htt->rx_ring.fill_cnt == 0) {
  268. ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
  269. return NULL;
  270. }
  271. idx = htt->rx_ring.sw_rd_idx.msdu_payld;
  272. msdu = htt->rx_ring.netbufs_ring[idx];
  273. htt->rx_ring.netbufs_ring[idx] = NULL;
  274. ath10k_htt_reset_paddrs_ring(htt, idx);
  275. idx++;
  276. idx &= htt->rx_ring.size_mask;
  277. htt->rx_ring.sw_rd_idx.msdu_payld = idx;
  278. htt->rx_ring.fill_cnt--;
  279. dma_unmap_single(htt->ar->dev,
  280. ATH10K_SKB_RXCB(msdu)->paddr,
  281. msdu->len + skb_tailroom(msdu),
  282. DMA_FROM_DEVICE);
  283. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
  284. msdu->data, msdu->len + skb_tailroom(msdu));
  285. return msdu;
  286. }
  287. /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
  288. static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
  289. struct sk_buff_head *amsdu)
  290. {
  291. struct ath10k *ar = htt->ar;
  292. struct ath10k_hw_params *hw = &ar->hw_params;
  293. int msdu_len, msdu_chaining = 0;
  294. struct sk_buff *msdu;
  295. struct htt_rx_desc *rx_desc;
  296. struct rx_attention *rx_desc_attention;
  297. struct rx_frag_info_common *rx_desc_frag_info_common;
  298. struct rx_msdu_start_common *rx_desc_msdu_start_common;
  299. struct rx_msdu_end_common *rx_desc_msdu_end_common;
  300. lockdep_assert_held(&htt->rx_ring.lock);
  301. for (;;) {
  302. int last_msdu, msdu_len_invalid, msdu_chained;
  303. msdu = ath10k_htt_rx_netbuf_pop(htt);
  304. if (!msdu) {
  305. __skb_queue_purge(amsdu);
  306. return -ENOENT;
  307. }
  308. __skb_queue_tail(amsdu, msdu);
  309. rx_desc = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data);
  310. rx_desc_attention = ath10k_htt_rx_desc_get_attention(hw, rx_desc);
  311. rx_desc_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw,
  312. rx_desc);
  313. rx_desc_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rx_desc);
  314. rx_desc_frag_info_common = ath10k_htt_rx_desc_get_frag_info(hw, rx_desc);
  315. /* FIXME: we must report msdu payload since this is what caller
  316. * expects now
  317. */
  318. skb_put(msdu, hw->rx_desc_ops->rx_desc_msdu_payload_offset);
  319. skb_pull(msdu, hw->rx_desc_ops->rx_desc_msdu_payload_offset);
  320. /*
  321. * Sanity check - confirm the HW is finished filling in the
  322. * rx data.
  323. * If the HW and SW are working correctly, then it's guaranteed
  324. * that the HW's MAC DMA is done before this point in the SW.
  325. * To prevent the case that we handle a stale Rx descriptor,
  326. * just assert for now until we have a way to recover.
  327. */
  328. if (!(__le32_to_cpu(rx_desc_attention->flags)
  329. & RX_ATTENTION_FLAGS_MSDU_DONE)) {
  330. __skb_queue_purge(amsdu);
  331. return -EIO;
  332. }
  333. msdu_len_invalid = !!(__le32_to_cpu(rx_desc_attention->flags)
  334. & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
  335. RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
  336. msdu_len = MS(__le32_to_cpu(rx_desc_msdu_start_common->info0),
  337. RX_MSDU_START_INFO0_MSDU_LENGTH);
  338. msdu_chained = rx_desc_frag_info_common->ring2_more_count;
  339. if (msdu_len_invalid)
  340. msdu_len = 0;
  341. skb_trim(msdu, 0);
  342. skb_put(msdu, min(msdu_len, ath10k_htt_rx_msdu_size(hw)));
  343. msdu_len -= msdu->len;
  344. /* Note: Chained buffers do not contain rx descriptor */
  345. while (msdu_chained--) {
  346. msdu = ath10k_htt_rx_netbuf_pop(htt);
  347. if (!msdu) {
  348. __skb_queue_purge(amsdu);
  349. return -ENOENT;
  350. }
  351. __skb_queue_tail(amsdu, msdu);
  352. skb_trim(msdu, 0);
  353. skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE));
  354. msdu_len -= msdu->len;
  355. msdu_chaining = 1;
  356. }
  357. last_msdu = __le32_to_cpu(rx_desc_msdu_end_common->info0) &
  358. RX_MSDU_END_INFO0_LAST_MSDU;
  359. /* FIXME: why are we skipping the first part of the rx_desc? */
  360. trace_ath10k_htt_rx_desc(ar, (void *)rx_desc + sizeof(u32),
  361. hw->rx_desc_ops->rx_desc_size - sizeof(u32));
  362. if (last_msdu)
  363. break;
  364. }
  365. if (skb_queue_empty(amsdu))
  366. msdu_chaining = -1;
  367. /*
  368. * Don't refill the ring yet.
  369. *
  370. * First, the elements popped here are still in use - it is not
  371. * safe to overwrite them until the matching call to
  372. * mpdu_desc_list_next. Second, for efficiency it is preferable to
  373. * refill the rx ring with 1 PPDU's worth of rx buffers (something
  374. * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
  375. * (something like 3 buffers). Consequently, we'll rely on the txrx
  376. * SW to tell us when it is done pulling all the PPDU's rx buffers
  377. * out of the rx ring, and then refill it just once.
  378. */
  379. return msdu_chaining;
  380. }
  381. static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt,
  382. u64 paddr)
  383. {
  384. struct ath10k *ar = htt->ar;
  385. struct ath10k_skb_rxcb *rxcb;
  386. struct sk_buff *msdu;
  387. lockdep_assert_held(&htt->rx_ring.lock);
  388. msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr);
  389. if (!msdu)
  390. return NULL;
  391. rxcb = ATH10K_SKB_RXCB(msdu);
  392. hash_del(&rxcb->hlist);
  393. htt->rx_ring.fill_cnt--;
  394. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  395. msdu->len + skb_tailroom(msdu),
  396. DMA_FROM_DEVICE);
  397. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
  398. msdu->data, msdu->len + skb_tailroom(msdu));
  399. return msdu;
  400. }
  401. static inline void ath10k_htt_append_frag_list(struct sk_buff *skb_head,
  402. struct sk_buff *frag_list,
  403. unsigned int frag_len)
  404. {
  405. skb_shinfo(skb_head)->frag_list = frag_list;
  406. skb_head->data_len = frag_len;
  407. skb_head->len += skb_head->data_len;
  408. }
  409. static int ath10k_htt_rx_handle_amsdu_mon_32(struct ath10k_htt *htt,
  410. struct sk_buff *msdu,
  411. struct htt_rx_in_ord_msdu_desc **msdu_desc)
  412. {
  413. struct ath10k *ar = htt->ar;
  414. struct ath10k_hw_params *hw = &ar->hw_params;
  415. u32 paddr;
  416. struct sk_buff *frag_buf;
  417. struct sk_buff *prev_frag_buf;
  418. u8 last_frag;
  419. struct htt_rx_in_ord_msdu_desc *ind_desc = *msdu_desc;
  420. struct htt_rx_desc *rxd;
  421. int amsdu_len = __le16_to_cpu(ind_desc->msdu_len);
  422. rxd = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data);
  423. trace_ath10k_htt_rx_desc(ar, rxd, hw->rx_desc_ops->rx_desc_size);
  424. skb_put(msdu, hw->rx_desc_ops->rx_desc_size);
  425. skb_pull(msdu, hw->rx_desc_ops->rx_desc_size);
  426. skb_put(msdu, min(amsdu_len, ath10k_htt_rx_msdu_size(hw)));
  427. amsdu_len -= msdu->len;
  428. last_frag = ind_desc->reserved;
  429. if (last_frag) {
  430. if (amsdu_len) {
  431. ath10k_warn(ar, "invalid amsdu len %u, left %d",
  432. __le16_to_cpu(ind_desc->msdu_len),
  433. amsdu_len);
  434. }
  435. return 0;
  436. }
  437. ind_desc++;
  438. paddr = __le32_to_cpu(ind_desc->msdu_paddr);
  439. frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr);
  440. if (!frag_buf) {
  441. ath10k_warn(ar, "failed to pop frag-1 paddr: 0x%x", paddr);
  442. return -ENOENT;
  443. }
  444. skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE));
  445. ath10k_htt_append_frag_list(msdu, frag_buf, amsdu_len);
  446. amsdu_len -= frag_buf->len;
  447. prev_frag_buf = frag_buf;
  448. last_frag = ind_desc->reserved;
  449. while (!last_frag) {
  450. ind_desc++;
  451. paddr = __le32_to_cpu(ind_desc->msdu_paddr);
  452. frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr);
  453. if (!frag_buf) {
  454. ath10k_warn(ar, "failed to pop frag-n paddr: 0x%x",
  455. paddr);
  456. prev_frag_buf->next = NULL;
  457. return -ENOENT;
  458. }
  459. skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE));
  460. last_frag = ind_desc->reserved;
  461. amsdu_len -= frag_buf->len;
  462. prev_frag_buf->next = frag_buf;
  463. prev_frag_buf = frag_buf;
  464. }
  465. if (amsdu_len) {
  466. ath10k_warn(ar, "invalid amsdu len %u, left %d",
  467. __le16_to_cpu(ind_desc->msdu_len), amsdu_len);
  468. }
  469. *msdu_desc = ind_desc;
  470. prev_frag_buf->next = NULL;
  471. return 0;
  472. }
  473. static int
  474. ath10k_htt_rx_handle_amsdu_mon_64(struct ath10k_htt *htt,
  475. struct sk_buff *msdu,
  476. struct htt_rx_in_ord_msdu_desc_ext **msdu_desc)
  477. {
  478. struct ath10k *ar = htt->ar;
  479. struct ath10k_hw_params *hw = &ar->hw_params;
  480. u64 paddr;
  481. struct sk_buff *frag_buf;
  482. struct sk_buff *prev_frag_buf;
  483. u8 last_frag;
  484. struct htt_rx_in_ord_msdu_desc_ext *ind_desc = *msdu_desc;
  485. struct htt_rx_desc *rxd;
  486. int amsdu_len = __le16_to_cpu(ind_desc->msdu_len);
  487. rxd = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data);
  488. trace_ath10k_htt_rx_desc(ar, rxd, hw->rx_desc_ops->rx_desc_size);
  489. skb_put(msdu, hw->rx_desc_ops->rx_desc_size);
  490. skb_pull(msdu, hw->rx_desc_ops->rx_desc_size);
  491. skb_put(msdu, min(amsdu_len, ath10k_htt_rx_msdu_size(hw)));
  492. amsdu_len -= msdu->len;
  493. last_frag = ind_desc->reserved;
  494. if (last_frag) {
  495. if (amsdu_len) {
  496. ath10k_warn(ar, "invalid amsdu len %u, left %d",
  497. __le16_to_cpu(ind_desc->msdu_len),
  498. amsdu_len);
  499. }
  500. return 0;
  501. }
  502. ind_desc++;
  503. paddr = __le64_to_cpu(ind_desc->msdu_paddr);
  504. frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr);
  505. if (!frag_buf) {
  506. ath10k_warn(ar, "failed to pop frag-1 paddr: 0x%llx", paddr);
  507. return -ENOENT;
  508. }
  509. skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE));
  510. ath10k_htt_append_frag_list(msdu, frag_buf, amsdu_len);
  511. amsdu_len -= frag_buf->len;
  512. prev_frag_buf = frag_buf;
  513. last_frag = ind_desc->reserved;
  514. while (!last_frag) {
  515. ind_desc++;
  516. paddr = __le64_to_cpu(ind_desc->msdu_paddr);
  517. frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr);
  518. if (!frag_buf) {
  519. ath10k_warn(ar, "failed to pop frag-n paddr: 0x%llx",
  520. paddr);
  521. prev_frag_buf->next = NULL;
  522. return -ENOENT;
  523. }
  524. skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE));
  525. last_frag = ind_desc->reserved;
  526. amsdu_len -= frag_buf->len;
  527. prev_frag_buf->next = frag_buf;
  528. prev_frag_buf = frag_buf;
  529. }
  530. if (amsdu_len) {
  531. ath10k_warn(ar, "invalid amsdu len %u, left %d",
  532. __le16_to_cpu(ind_desc->msdu_len), amsdu_len);
  533. }
  534. *msdu_desc = ind_desc;
  535. prev_frag_buf->next = NULL;
  536. return 0;
  537. }
  538. static int ath10k_htt_rx_pop_paddr32_list(struct ath10k_htt *htt,
  539. struct htt_rx_in_ord_ind *ev,
  540. struct sk_buff_head *list)
  541. {
  542. struct ath10k *ar = htt->ar;
  543. struct ath10k_hw_params *hw = &ar->hw_params;
  544. struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs32;
  545. struct htt_rx_desc *rxd;
  546. struct rx_attention *rxd_attention;
  547. struct sk_buff *msdu;
  548. int msdu_count, ret;
  549. bool is_offload;
  550. u32 paddr;
  551. lockdep_assert_held(&htt->rx_ring.lock);
  552. msdu_count = __le16_to_cpu(ev->msdu_count);
  553. is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
  554. while (msdu_count--) {
  555. paddr = __le32_to_cpu(msdu_desc->msdu_paddr);
  556. msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
  557. if (!msdu) {
  558. __skb_queue_purge(list);
  559. return -ENOENT;
  560. }
  561. if (!is_offload && ar->monitor_arvif) {
  562. ret = ath10k_htt_rx_handle_amsdu_mon_32(htt, msdu,
  563. &msdu_desc);
  564. if (ret) {
  565. __skb_queue_purge(list);
  566. return ret;
  567. }
  568. __skb_queue_tail(list, msdu);
  569. msdu_desc++;
  570. continue;
  571. }
  572. __skb_queue_tail(list, msdu);
  573. if (!is_offload) {
  574. rxd = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data);
  575. rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
  576. trace_ath10k_htt_rx_desc(ar, rxd, hw->rx_desc_ops->rx_desc_size);
  577. skb_put(msdu, hw->rx_desc_ops->rx_desc_size);
  578. skb_pull(msdu, hw->rx_desc_ops->rx_desc_size);
  579. skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
  580. if (!(__le32_to_cpu(rxd_attention->flags) &
  581. RX_ATTENTION_FLAGS_MSDU_DONE)) {
  582. ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
  583. return -EIO;
  584. }
  585. }
  586. msdu_desc++;
  587. }
  588. return 0;
  589. }
  590. static int ath10k_htt_rx_pop_paddr64_list(struct ath10k_htt *htt,
  591. struct htt_rx_in_ord_ind *ev,
  592. struct sk_buff_head *list)
  593. {
  594. struct ath10k *ar = htt->ar;
  595. struct ath10k_hw_params *hw = &ar->hw_params;
  596. struct htt_rx_in_ord_msdu_desc_ext *msdu_desc = ev->msdu_descs64;
  597. struct htt_rx_desc *rxd;
  598. struct rx_attention *rxd_attention;
  599. struct sk_buff *msdu;
  600. int msdu_count, ret;
  601. bool is_offload;
  602. u64 paddr;
  603. lockdep_assert_held(&htt->rx_ring.lock);
  604. msdu_count = __le16_to_cpu(ev->msdu_count);
  605. is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
  606. while (msdu_count--) {
  607. paddr = __le64_to_cpu(msdu_desc->msdu_paddr);
  608. msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
  609. if (!msdu) {
  610. __skb_queue_purge(list);
  611. return -ENOENT;
  612. }
  613. if (!is_offload && ar->monitor_arvif) {
  614. ret = ath10k_htt_rx_handle_amsdu_mon_64(htt, msdu,
  615. &msdu_desc);
  616. if (ret) {
  617. __skb_queue_purge(list);
  618. return ret;
  619. }
  620. __skb_queue_tail(list, msdu);
  621. msdu_desc++;
  622. continue;
  623. }
  624. __skb_queue_tail(list, msdu);
  625. if (!is_offload) {
  626. rxd = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data);
  627. rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
  628. trace_ath10k_htt_rx_desc(ar, rxd, hw->rx_desc_ops->rx_desc_size);
  629. skb_put(msdu, hw->rx_desc_ops->rx_desc_size);
  630. skb_pull(msdu, hw->rx_desc_ops->rx_desc_size);
  631. skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
  632. if (!(__le32_to_cpu(rxd_attention->flags) &
  633. RX_ATTENTION_FLAGS_MSDU_DONE)) {
  634. ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
  635. return -EIO;
  636. }
  637. }
  638. msdu_desc++;
  639. }
  640. return 0;
  641. }
  642. int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
  643. {
  644. struct ath10k *ar = htt->ar;
  645. dma_addr_t paddr;
  646. void *vaddr, *vaddr_ring;
  647. size_t size;
  648. struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
  649. if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL)
  650. return 0;
  651. htt->rx_confused = false;
  652. /* XXX: The fill level could be changed during runtime in response to
  653. * the host processing latency. Is this really worth it?
  654. */
  655. htt->rx_ring.size = HTT_RX_RING_SIZE;
  656. htt->rx_ring.size_mask = htt->rx_ring.size - 1;
  657. htt->rx_ring.fill_level = ar->hw_params.rx_ring_fill_level;
  658. if (!is_power_of_2(htt->rx_ring.size)) {
  659. ath10k_warn(ar, "htt rx ring size is not power of 2\n");
  660. return -EINVAL;
  661. }
  662. htt->rx_ring.netbufs_ring =
  663. kcalloc(htt->rx_ring.size, sizeof(struct sk_buff *),
  664. GFP_KERNEL);
  665. if (!htt->rx_ring.netbufs_ring)
  666. goto err_netbuf;
  667. size = ath10k_htt_get_rx_ring_size(htt);
  668. vaddr_ring = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_KERNEL);
  669. if (!vaddr_ring)
  670. goto err_dma_ring;
  671. ath10k_htt_config_paddrs_ring(htt, vaddr_ring);
  672. htt->rx_ring.base_paddr = paddr;
  673. vaddr = dma_alloc_coherent(htt->ar->dev,
  674. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  675. &paddr, GFP_KERNEL);
  676. if (!vaddr)
  677. goto err_dma_idx;
  678. htt->rx_ring.alloc_idx.vaddr = vaddr;
  679. htt->rx_ring.alloc_idx.paddr = paddr;
  680. htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask;
  681. *htt->rx_ring.alloc_idx.vaddr = 0;
  682. /* Initialize the Rx refill retry timer */
  683. timer_setup(timer, ath10k_htt_rx_ring_refill_retry, 0);
  684. spin_lock_init(&htt->rx_ring.lock);
  685. htt->rx_ring.fill_cnt = 0;
  686. htt->rx_ring.sw_rd_idx.msdu_payld = 0;
  687. hash_init(htt->rx_ring.skb_table);
  688. skb_queue_head_init(&htt->rx_msdus_q);
  689. skb_queue_head_init(&htt->rx_in_ord_compl_q);
  690. skb_queue_head_init(&htt->tx_fetch_ind_q);
  691. atomic_set(&htt->num_mpdus_ready, 0);
  692. ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
  693. htt->rx_ring.size, htt->rx_ring.fill_level);
  694. return 0;
  695. err_dma_idx:
  696. dma_free_coherent(htt->ar->dev,
  697. ath10k_htt_get_rx_ring_size(htt),
  698. vaddr_ring,
  699. htt->rx_ring.base_paddr);
  700. ath10k_htt_config_paddrs_ring(htt, NULL);
  701. err_dma_ring:
  702. kfree(htt->rx_ring.netbufs_ring);
  703. htt->rx_ring.netbufs_ring = NULL;
  704. err_netbuf:
  705. return -ENOMEM;
  706. }
  707. static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
  708. enum htt_rx_mpdu_encrypt_type type)
  709. {
  710. switch (type) {
  711. case HTT_RX_MPDU_ENCRYPT_NONE:
  712. return 0;
  713. case HTT_RX_MPDU_ENCRYPT_WEP40:
  714. case HTT_RX_MPDU_ENCRYPT_WEP104:
  715. return IEEE80211_WEP_IV_LEN;
  716. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  717. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  718. return IEEE80211_TKIP_IV_LEN;
  719. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  720. return IEEE80211_CCMP_HDR_LEN;
  721. case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2:
  722. return IEEE80211_CCMP_256_HDR_LEN;
  723. case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2:
  724. case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2:
  725. return IEEE80211_GCMP_HDR_LEN;
  726. case HTT_RX_MPDU_ENCRYPT_WEP128:
  727. case HTT_RX_MPDU_ENCRYPT_WAPI:
  728. break;
  729. }
  730. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  731. return 0;
  732. }
  733. #define MICHAEL_MIC_LEN 8
  734. static int ath10k_htt_rx_crypto_mic_len(struct ath10k *ar,
  735. enum htt_rx_mpdu_encrypt_type type)
  736. {
  737. switch (type) {
  738. case HTT_RX_MPDU_ENCRYPT_NONE:
  739. case HTT_RX_MPDU_ENCRYPT_WEP40:
  740. case HTT_RX_MPDU_ENCRYPT_WEP104:
  741. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  742. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  743. return 0;
  744. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  745. return IEEE80211_CCMP_MIC_LEN;
  746. case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2:
  747. return IEEE80211_CCMP_256_MIC_LEN;
  748. case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2:
  749. case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2:
  750. return IEEE80211_GCMP_MIC_LEN;
  751. case HTT_RX_MPDU_ENCRYPT_WEP128:
  752. case HTT_RX_MPDU_ENCRYPT_WAPI:
  753. break;
  754. }
  755. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  756. return 0;
  757. }
  758. static int ath10k_htt_rx_crypto_icv_len(struct ath10k *ar,
  759. enum htt_rx_mpdu_encrypt_type type)
  760. {
  761. switch (type) {
  762. case HTT_RX_MPDU_ENCRYPT_NONE:
  763. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  764. case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2:
  765. case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2:
  766. case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2:
  767. return 0;
  768. case HTT_RX_MPDU_ENCRYPT_WEP40:
  769. case HTT_RX_MPDU_ENCRYPT_WEP104:
  770. return IEEE80211_WEP_ICV_LEN;
  771. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  772. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  773. return IEEE80211_TKIP_ICV_LEN;
  774. case HTT_RX_MPDU_ENCRYPT_WEP128:
  775. case HTT_RX_MPDU_ENCRYPT_WAPI:
  776. break;
  777. }
  778. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  779. return 0;
  780. }
  781. struct amsdu_subframe_hdr {
  782. u8 dst[ETH_ALEN];
  783. u8 src[ETH_ALEN];
  784. __be16 len;
  785. } __packed;
  786. #define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63)
  787. static inline u8 ath10k_bw_to_mac80211_bw(u8 bw)
  788. {
  789. u8 ret = 0;
  790. switch (bw) {
  791. case 0:
  792. ret = RATE_INFO_BW_20;
  793. break;
  794. case 1:
  795. ret = RATE_INFO_BW_40;
  796. break;
  797. case 2:
  798. ret = RATE_INFO_BW_80;
  799. break;
  800. case 3:
  801. ret = RATE_INFO_BW_160;
  802. break;
  803. }
  804. return ret;
  805. }
  806. static void ath10k_htt_rx_h_rates(struct ath10k *ar,
  807. struct ieee80211_rx_status *status,
  808. struct htt_rx_desc *rxd)
  809. {
  810. struct ath10k_hw_params *hw = &ar->hw_params;
  811. struct rx_attention *rxd_attention;
  812. struct rx_mpdu_start *rxd_mpdu_start;
  813. struct rx_mpdu_end *rxd_mpdu_end;
  814. struct rx_msdu_start_common *rxd_msdu_start_common;
  815. struct rx_msdu_end_common *rxd_msdu_end_common;
  816. struct rx_ppdu_start *rxd_ppdu_start;
  817. struct ieee80211_supported_band *sband;
  818. u8 cck, rate, bw, sgi, mcs, nss;
  819. u8 *rxd_msdu_payload;
  820. u8 preamble = 0;
  821. u8 group_id;
  822. u32 info1, info2, info3;
  823. u32 stbc, nsts_su;
  824. rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
  825. rxd_mpdu_start = ath10k_htt_rx_desc_get_mpdu_start(hw, rxd);
  826. rxd_mpdu_end = ath10k_htt_rx_desc_get_mpdu_end(hw, rxd);
  827. rxd_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, rxd);
  828. rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
  829. rxd_ppdu_start = ath10k_htt_rx_desc_get_ppdu_start(hw, rxd);
  830. rxd_msdu_payload = ath10k_htt_rx_desc_get_msdu_payload(hw, rxd);
  831. info1 = __le32_to_cpu(rxd_ppdu_start->info1);
  832. info2 = __le32_to_cpu(rxd_ppdu_start->info2);
  833. info3 = __le32_to_cpu(rxd_ppdu_start->info3);
  834. preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE);
  835. switch (preamble) {
  836. case HTT_RX_LEGACY:
  837. /* To get legacy rate index band is required. Since band can't
  838. * be undefined check if freq is non-zero.
  839. */
  840. if (!status->freq)
  841. return;
  842. cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT;
  843. rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE);
  844. rate &= ~RX_PPDU_START_RATE_FLAG;
  845. sband = &ar->mac.sbands[status->band];
  846. status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate, cck);
  847. break;
  848. case HTT_RX_HT:
  849. case HTT_RX_HT_WITH_TXBF:
  850. /* HT-SIG - Table 20-11 in info2 and info3 */
  851. mcs = info2 & 0x1F;
  852. nss = mcs >> 3;
  853. bw = (info2 >> 7) & 1;
  854. sgi = (info3 >> 7) & 1;
  855. status->rate_idx = mcs;
  856. status->encoding = RX_ENC_HT;
  857. if (sgi)
  858. status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
  859. if (bw)
  860. status->bw = RATE_INFO_BW_40;
  861. break;
  862. case HTT_RX_VHT:
  863. case HTT_RX_VHT_WITH_TXBF:
  864. /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3
  865. * TODO check this
  866. */
  867. bw = info2 & 3;
  868. sgi = info3 & 1;
  869. stbc = (info2 >> 3) & 1;
  870. group_id = (info2 >> 4) & 0x3F;
  871. if (GROUP_ID_IS_SU_MIMO(group_id)) {
  872. mcs = (info3 >> 4) & 0x0F;
  873. nsts_su = ((info2 >> 10) & 0x07);
  874. if (stbc)
  875. nss = (nsts_su >> 2) + 1;
  876. else
  877. nss = (nsts_su + 1);
  878. } else {
  879. /* Hardware doesn't decode VHT-SIG-B into Rx descriptor
  880. * so it's impossible to decode MCS. Also since
  881. * firmware consumes Group Id Management frames host
  882. * has no knowledge regarding group/user position
  883. * mapping so it's impossible to pick the correct Nsts
  884. * from VHT-SIG-A1.
  885. *
  886. * Bandwidth and SGI are valid so report the rateinfo
  887. * on best-effort basis.
  888. */
  889. mcs = 0;
  890. nss = 1;
  891. }
  892. if (mcs > 0x09) {
  893. ath10k_warn(ar, "invalid MCS received %u\n", mcs);
  894. ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n",
  895. __le32_to_cpu(rxd_attention->flags),
  896. __le32_to_cpu(rxd_mpdu_start->info0),
  897. __le32_to_cpu(rxd_mpdu_start->info1),
  898. __le32_to_cpu(rxd_msdu_start_common->info0),
  899. __le32_to_cpu(rxd_msdu_start_common->info1),
  900. rxd_ppdu_start->info0,
  901. __le32_to_cpu(rxd_ppdu_start->info1),
  902. __le32_to_cpu(rxd_ppdu_start->info2),
  903. __le32_to_cpu(rxd_ppdu_start->info3),
  904. __le32_to_cpu(rxd_ppdu_start->info4));
  905. ath10k_warn(ar, "msdu end %08x mpdu end %08x\n",
  906. __le32_to_cpu(rxd_msdu_end_common->info0),
  907. __le32_to_cpu(rxd_mpdu_end->info0));
  908. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL,
  909. "rx desc msdu payload: ",
  910. rxd_msdu_payload, 50);
  911. }
  912. status->rate_idx = mcs;
  913. status->nss = nss;
  914. if (sgi)
  915. status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
  916. status->bw = ath10k_bw_to_mac80211_bw(bw);
  917. status->encoding = RX_ENC_VHT;
  918. break;
  919. default:
  920. break;
  921. }
  922. }
  923. static struct ieee80211_channel *
  924. ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd)
  925. {
  926. struct ath10k_hw_params *hw = &ar->hw_params;
  927. struct rx_attention *rxd_attention;
  928. struct rx_msdu_end_common *rxd_msdu_end_common;
  929. struct rx_mpdu_start *rxd_mpdu_start;
  930. struct ath10k_peer *peer;
  931. struct ath10k_vif *arvif;
  932. struct cfg80211_chan_def def;
  933. u16 peer_id;
  934. lockdep_assert_held(&ar->data_lock);
  935. if (!rxd)
  936. return NULL;
  937. rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
  938. rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
  939. rxd_mpdu_start = ath10k_htt_rx_desc_get_mpdu_start(hw, rxd);
  940. if (rxd_attention->flags &
  941. __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID))
  942. return NULL;
  943. if (!(rxd_msdu_end_common->info0 &
  944. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)))
  945. return NULL;
  946. peer_id = MS(__le32_to_cpu(rxd_mpdu_start->info0),
  947. RX_MPDU_START_INFO0_PEER_IDX);
  948. peer = ath10k_peer_find_by_id(ar, peer_id);
  949. if (!peer)
  950. return NULL;
  951. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  952. if (WARN_ON_ONCE(!arvif))
  953. return NULL;
  954. if (ath10k_mac_vif_chan(arvif->vif, &def))
  955. return NULL;
  956. return def.chan;
  957. }
  958. static struct ieee80211_channel *
  959. ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id)
  960. {
  961. struct ath10k_vif *arvif;
  962. struct cfg80211_chan_def def;
  963. lockdep_assert_held(&ar->data_lock);
  964. list_for_each_entry(arvif, &ar->arvifs, list) {
  965. if (arvif->vdev_id == vdev_id &&
  966. ath10k_mac_vif_chan(arvif->vif, &def) == 0)
  967. return def.chan;
  968. }
  969. return NULL;
  970. }
  971. static void
  972. ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw,
  973. struct ieee80211_chanctx_conf *conf,
  974. void *data)
  975. {
  976. struct cfg80211_chan_def *def = data;
  977. *def = conf->def;
  978. }
  979. static struct ieee80211_channel *
  980. ath10k_htt_rx_h_any_channel(struct ath10k *ar)
  981. {
  982. struct cfg80211_chan_def def = {};
  983. ieee80211_iter_chan_contexts_atomic(ar->hw,
  984. ath10k_htt_rx_h_any_chan_iter,
  985. &def);
  986. return def.chan;
  987. }
  988. static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
  989. struct ieee80211_rx_status *status,
  990. struct htt_rx_desc *rxd,
  991. u32 vdev_id)
  992. {
  993. struct ieee80211_channel *ch;
  994. spin_lock_bh(&ar->data_lock);
  995. ch = ar->scan_channel;
  996. if (!ch)
  997. ch = ar->rx_channel;
  998. if (!ch)
  999. ch = ath10k_htt_rx_h_peer_channel(ar, rxd);
  1000. if (!ch)
  1001. ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id);
  1002. if (!ch)
  1003. ch = ath10k_htt_rx_h_any_channel(ar);
  1004. if (!ch)
  1005. ch = ar->tgt_oper_chan;
  1006. spin_unlock_bh(&ar->data_lock);
  1007. if (!ch)
  1008. return false;
  1009. status->band = ch->band;
  1010. status->freq = ch->center_freq;
  1011. return true;
  1012. }
  1013. static void ath10k_htt_rx_h_signal(struct ath10k *ar,
  1014. struct ieee80211_rx_status *status,
  1015. struct htt_rx_desc *rxd)
  1016. {
  1017. struct ath10k_hw_params *hw = &ar->hw_params;
  1018. struct rx_ppdu_start *rxd_ppdu_start = ath10k_htt_rx_desc_get_ppdu_start(hw, rxd);
  1019. int i;
  1020. for (i = 0; i < IEEE80211_MAX_CHAINS ; i++) {
  1021. status->chains &= ~BIT(i);
  1022. if (rxd_ppdu_start->rssi_chains[i].pri20_mhz != 0x80) {
  1023. status->chain_signal[i] = ATH10K_DEFAULT_NOISE_FLOOR +
  1024. rxd_ppdu_start->rssi_chains[i].pri20_mhz;
  1025. status->chains |= BIT(i);
  1026. }
  1027. }
  1028. /* FIXME: Get real NF */
  1029. status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
  1030. rxd_ppdu_start->rssi_comb;
  1031. status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
  1032. }
  1033. static void ath10k_htt_rx_h_mactime(struct ath10k *ar,
  1034. struct ieee80211_rx_status *status,
  1035. struct htt_rx_desc *rxd)
  1036. {
  1037. struct ath10k_hw_params *hw = &ar->hw_params;
  1038. struct rx_ppdu_end_common *rxd_ppdu_end_common;
  1039. rxd_ppdu_end_common = ath10k_htt_rx_desc_get_ppdu_end(hw, rxd);
  1040. /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This
  1041. * means all prior MSDUs in a PPDU are reported to mac80211 without the
  1042. * TSF. Is it worth holding frames until end of PPDU is known?
  1043. *
  1044. * FIXME: Can we get/compute 64bit TSF?
  1045. */
  1046. status->mactime = __le32_to_cpu(rxd_ppdu_end_common->tsf_timestamp);
  1047. status->flag |= RX_FLAG_MACTIME_END;
  1048. }
  1049. static void ath10k_htt_rx_h_ppdu(struct ath10k *ar,
  1050. struct sk_buff_head *amsdu,
  1051. struct ieee80211_rx_status *status,
  1052. u32 vdev_id)
  1053. {
  1054. struct sk_buff *first;
  1055. struct ath10k_hw_params *hw = &ar->hw_params;
  1056. struct htt_rx_desc *rxd;
  1057. struct rx_attention *rxd_attention;
  1058. bool is_first_ppdu;
  1059. bool is_last_ppdu;
  1060. if (skb_queue_empty(amsdu))
  1061. return;
  1062. first = skb_peek(amsdu);
  1063. rxd = HTT_RX_BUF_TO_RX_DESC(hw,
  1064. (void *)first->data - hw->rx_desc_ops->rx_desc_size);
  1065. rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
  1066. is_first_ppdu = !!(rxd_attention->flags &
  1067. __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU));
  1068. is_last_ppdu = !!(rxd_attention->flags &
  1069. __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU));
  1070. if (is_first_ppdu) {
  1071. /* New PPDU starts so clear out the old per-PPDU status. */
  1072. status->freq = 0;
  1073. status->rate_idx = 0;
  1074. status->nss = 0;
  1075. status->encoding = RX_ENC_LEGACY;
  1076. status->bw = RATE_INFO_BW_20;
  1077. status->flag &= ~RX_FLAG_MACTIME;
  1078. status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  1079. status->flag &= ~(RX_FLAG_AMPDU_IS_LAST);
  1080. status->flag |= RX_FLAG_AMPDU_DETAILS | RX_FLAG_AMPDU_LAST_KNOWN;
  1081. status->ampdu_reference = ar->ampdu_reference;
  1082. ath10k_htt_rx_h_signal(ar, status, rxd);
  1083. ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id);
  1084. ath10k_htt_rx_h_rates(ar, status, rxd);
  1085. }
  1086. if (is_last_ppdu) {
  1087. ath10k_htt_rx_h_mactime(ar, status, rxd);
  1088. /* set ampdu last segment flag */
  1089. status->flag |= RX_FLAG_AMPDU_IS_LAST;
  1090. ar->ampdu_reference++;
  1091. }
  1092. }
  1093. static const char * const tid_to_ac[] = {
  1094. "BE",
  1095. "BK",
  1096. "BK",
  1097. "BE",
  1098. "VI",
  1099. "VI",
  1100. "VO",
  1101. "VO",
  1102. };
  1103. static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
  1104. {
  1105. u8 *qc;
  1106. int tid;
  1107. if (!ieee80211_is_data_qos(hdr->frame_control))
  1108. return "";
  1109. qc = ieee80211_get_qos_ctl(hdr);
  1110. tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
  1111. if (tid < 8)
  1112. snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
  1113. else
  1114. snprintf(out, size, "tid %d", tid);
  1115. return out;
  1116. }
  1117. static void ath10k_htt_rx_h_queue_msdu(struct ath10k *ar,
  1118. struct ieee80211_rx_status *rx_status,
  1119. struct sk_buff *skb)
  1120. {
  1121. struct ieee80211_rx_status *status;
  1122. status = IEEE80211_SKB_RXCB(skb);
  1123. *status = *rx_status;
  1124. skb_queue_tail(&ar->htt.rx_msdus_q, skb);
  1125. }
  1126. static void ath10k_process_rx(struct ath10k *ar, struct sk_buff *skb)
  1127. {
  1128. struct ieee80211_rx_status *status;
  1129. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1130. char tid[32];
  1131. status = IEEE80211_SKB_RXCB(skb);
  1132. if (!(ar->filter_flags & FIF_FCSFAIL) &&
  1133. status->flag & RX_FLAG_FAILED_FCS_CRC) {
  1134. ar->stats.rx_crc_err_drop++;
  1135. dev_kfree_skb_any(skb);
  1136. return;
  1137. }
  1138. ath10k_dbg(ar, ATH10K_DBG_DATA,
  1139. "rx skb %pK len %u peer %pM %s %s sn %u %s%s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
  1140. skb,
  1141. skb->len,
  1142. ieee80211_get_SA(hdr),
  1143. ath10k_get_tid(hdr, tid, sizeof(tid)),
  1144. is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
  1145. "mcast" : "ucast",
  1146. IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl)),
  1147. (status->encoding == RX_ENC_LEGACY) ? "legacy" : "",
  1148. (status->encoding == RX_ENC_HT) ? "ht" : "",
  1149. (status->encoding == RX_ENC_VHT) ? "vht" : "",
  1150. (status->bw == RATE_INFO_BW_40) ? "40" : "",
  1151. (status->bw == RATE_INFO_BW_80) ? "80" : "",
  1152. (status->bw == RATE_INFO_BW_160) ? "160" : "",
  1153. status->enc_flags & RX_ENC_FLAG_SHORT_GI ? "sgi " : "",
  1154. status->rate_idx,
  1155. status->nss,
  1156. status->freq,
  1157. status->band, status->flag,
  1158. !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
  1159. !!(status->flag & RX_FLAG_MMIC_ERROR),
  1160. !!(status->flag & RX_FLAG_AMSDU_MORE));
  1161. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
  1162. skb->data, skb->len);
  1163. trace_ath10k_rx_hdr(ar, skb->data, skb->len);
  1164. trace_ath10k_rx_payload(ar, skb->data, skb->len);
  1165. ieee80211_rx_napi(ar->hw, NULL, skb, &ar->napi);
  1166. }
  1167. static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar,
  1168. struct ieee80211_hdr *hdr)
  1169. {
  1170. int len = ieee80211_hdrlen(hdr->frame_control);
  1171. if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,
  1172. ar->running_fw->fw_file.fw_features))
  1173. len = round_up(len, 4);
  1174. return len;
  1175. }
  1176. static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar,
  1177. struct sk_buff *msdu,
  1178. struct ieee80211_rx_status *status,
  1179. enum htt_rx_mpdu_encrypt_type enctype,
  1180. bool is_decrypted,
  1181. const u8 first_hdr[64])
  1182. {
  1183. struct ieee80211_hdr *hdr;
  1184. struct ath10k_hw_params *hw = &ar->hw_params;
  1185. struct htt_rx_desc *rxd;
  1186. struct rx_msdu_end_common *rxd_msdu_end_common;
  1187. size_t hdr_len;
  1188. size_t crypto_len;
  1189. bool is_first;
  1190. bool is_last;
  1191. bool msdu_limit_err;
  1192. int bytes_aligned = ar->hw_params.decap_align_bytes;
  1193. u8 *qos;
  1194. rxd = HTT_RX_BUF_TO_RX_DESC(hw,
  1195. (void *)msdu->data - hw->rx_desc_ops->rx_desc_size);
  1196. rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
  1197. is_first = !!(rxd_msdu_end_common->info0 &
  1198. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
  1199. is_last = !!(rxd_msdu_end_common->info0 &
  1200. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
  1201. /* Delivered decapped frame:
  1202. * [802.11 header]
  1203. * [crypto param] <-- can be trimmed if !fcs_err &&
  1204. * !decrypt_err && !peer_idx_invalid
  1205. * [amsdu header] <-- only if A-MSDU
  1206. * [rfc1042/llc]
  1207. * [payload]
  1208. * [FCS] <-- at end, needs to be trimmed
  1209. */
  1210. /* Some hardwares(QCA99x0 variants) limit number of msdus in a-msdu when
  1211. * deaggregate, so that unwanted MSDU-deaggregation is avoided for
  1212. * error packets. If limit exceeds, hw sends all remaining MSDUs as
  1213. * a single last MSDU with this msdu limit error set.
  1214. */
  1215. msdu_limit_err = ath10k_htt_rx_desc_msdu_limit_error(hw, rxd);
  1216. /* If MSDU limit error happens, then don't warn on, the partial raw MSDU
  1217. * without first MSDU is expected in that case, and handled later here.
  1218. */
  1219. /* This probably shouldn't happen but warn just in case */
  1220. if (WARN_ON_ONCE(!is_first && !msdu_limit_err))
  1221. return;
  1222. /* This probably shouldn't happen but warn just in case */
  1223. if (WARN_ON_ONCE(!(is_first && is_last) && !msdu_limit_err))
  1224. return;
  1225. skb_trim(msdu, msdu->len - FCS_LEN);
  1226. /* Push original 80211 header */
  1227. if (unlikely(msdu_limit_err)) {
  1228. hdr = (struct ieee80211_hdr *)first_hdr;
  1229. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1230. crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
  1231. if (ieee80211_is_data_qos(hdr->frame_control)) {
  1232. qos = ieee80211_get_qos_ctl(hdr);
  1233. qos[0] |= IEEE80211_QOS_CTL_A_MSDU_PRESENT;
  1234. }
  1235. if (crypto_len)
  1236. memcpy(skb_push(msdu, crypto_len),
  1237. (void *)hdr + round_up(hdr_len, bytes_aligned),
  1238. crypto_len);
  1239. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  1240. }
  1241. /* In most cases this will be true for sniffed frames. It makes sense
  1242. * to deliver them as-is without stripping the crypto param. This is
  1243. * necessary for software based decryption.
  1244. *
  1245. * If there's no error then the frame is decrypted. At least that is
  1246. * the case for frames that come in via fragmented rx indication.
  1247. */
  1248. if (!is_decrypted)
  1249. return;
  1250. /* The payload is decrypted so strip crypto params. Start from tail
  1251. * since hdr is used to compute some stuff.
  1252. */
  1253. hdr = (void *)msdu->data;
  1254. /* Tail */
  1255. if (status->flag & RX_FLAG_IV_STRIPPED) {
  1256. skb_trim(msdu, msdu->len -
  1257. ath10k_htt_rx_crypto_mic_len(ar, enctype));
  1258. skb_trim(msdu, msdu->len -
  1259. ath10k_htt_rx_crypto_icv_len(ar, enctype));
  1260. } else {
  1261. /* MIC */
  1262. if (status->flag & RX_FLAG_MIC_STRIPPED)
  1263. skb_trim(msdu, msdu->len -
  1264. ath10k_htt_rx_crypto_mic_len(ar, enctype));
  1265. /* ICV */
  1266. if (status->flag & RX_FLAG_ICV_STRIPPED)
  1267. skb_trim(msdu, msdu->len -
  1268. ath10k_htt_rx_crypto_icv_len(ar, enctype));
  1269. }
  1270. /* MMIC */
  1271. if ((status->flag & RX_FLAG_MMIC_STRIPPED) &&
  1272. !ieee80211_has_morefrags(hdr->frame_control) &&
  1273. enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
  1274. skb_trim(msdu, msdu->len - MICHAEL_MIC_LEN);
  1275. /* Head */
  1276. if (status->flag & RX_FLAG_IV_STRIPPED) {
  1277. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1278. crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
  1279. memmove((void *)msdu->data + crypto_len,
  1280. (void *)msdu->data, hdr_len);
  1281. skb_pull(msdu, crypto_len);
  1282. }
  1283. }
  1284. static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar,
  1285. struct sk_buff *msdu,
  1286. struct ieee80211_rx_status *status,
  1287. const u8 first_hdr[64],
  1288. enum htt_rx_mpdu_encrypt_type enctype)
  1289. {
  1290. struct ath10k_hw_params *hw = &ar->hw_params;
  1291. struct ieee80211_hdr *hdr;
  1292. struct htt_rx_desc *rxd;
  1293. size_t hdr_len;
  1294. u8 da[ETH_ALEN];
  1295. u8 sa[ETH_ALEN];
  1296. int l3_pad_bytes;
  1297. int bytes_aligned = ar->hw_params.decap_align_bytes;
  1298. /* Delivered decapped frame:
  1299. * [nwifi 802.11 header] <-- replaced with 802.11 hdr
  1300. * [rfc1042/llc]
  1301. *
  1302. * Note: The nwifi header doesn't have QoS Control and is
  1303. * (always?) a 3addr frame.
  1304. *
  1305. * Note2: There's no A-MSDU subframe header. Even if it's part
  1306. * of an A-MSDU.
  1307. */
  1308. /* pull decapped header and copy SA & DA */
  1309. rxd = HTT_RX_BUF_TO_RX_DESC(hw, (void *)msdu->data -
  1310. hw->rx_desc_ops->rx_desc_size);
  1311. l3_pad_bytes = ath10k_htt_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
  1312. skb_put(msdu, l3_pad_bytes);
  1313. hdr = (struct ieee80211_hdr *)(msdu->data + l3_pad_bytes);
  1314. hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr);
  1315. ether_addr_copy(da, ieee80211_get_DA(hdr));
  1316. ether_addr_copy(sa, ieee80211_get_SA(hdr));
  1317. skb_pull(msdu, hdr_len);
  1318. /* push original 802.11 header */
  1319. hdr = (struct ieee80211_hdr *)first_hdr;
  1320. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1321. if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
  1322. memcpy(skb_push(msdu,
  1323. ath10k_htt_rx_crypto_param_len(ar, enctype)),
  1324. (void *)hdr + round_up(hdr_len, bytes_aligned),
  1325. ath10k_htt_rx_crypto_param_len(ar, enctype));
  1326. }
  1327. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  1328. /* original 802.11 header has a different DA and in
  1329. * case of 4addr it may also have different SA
  1330. */
  1331. hdr = (struct ieee80211_hdr *)msdu->data;
  1332. ether_addr_copy(ieee80211_get_DA(hdr), da);
  1333. ether_addr_copy(ieee80211_get_SA(hdr), sa);
  1334. }
  1335. static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
  1336. struct sk_buff *msdu,
  1337. enum htt_rx_mpdu_encrypt_type enctype)
  1338. {
  1339. struct ieee80211_hdr *hdr;
  1340. struct ath10k_hw_params *hw = &ar->hw_params;
  1341. struct htt_rx_desc *rxd;
  1342. struct rx_msdu_end_common *rxd_msdu_end_common;
  1343. u8 *rxd_rx_hdr_status;
  1344. size_t hdr_len, crypto_len;
  1345. void *rfc1042;
  1346. bool is_first, is_last, is_amsdu;
  1347. int bytes_aligned = ar->hw_params.decap_align_bytes;
  1348. rxd = HTT_RX_BUF_TO_RX_DESC(hw,
  1349. (void *)msdu->data - hw->rx_desc_ops->rx_desc_size);
  1350. rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
  1351. rxd_rx_hdr_status = ath10k_htt_rx_desc_get_rx_hdr_status(hw, rxd);
  1352. hdr = (void *)rxd_rx_hdr_status;
  1353. is_first = !!(rxd_msdu_end_common->info0 &
  1354. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
  1355. is_last = !!(rxd_msdu_end_common->info0 &
  1356. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
  1357. is_amsdu = !(is_first && is_last);
  1358. rfc1042 = hdr;
  1359. if (is_first) {
  1360. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1361. crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
  1362. rfc1042 += round_up(hdr_len, bytes_aligned) +
  1363. round_up(crypto_len, bytes_aligned);
  1364. }
  1365. if (is_amsdu)
  1366. rfc1042 += sizeof(struct amsdu_subframe_hdr);
  1367. return rfc1042;
  1368. }
  1369. static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar,
  1370. struct sk_buff *msdu,
  1371. struct ieee80211_rx_status *status,
  1372. const u8 first_hdr[64],
  1373. enum htt_rx_mpdu_encrypt_type enctype)
  1374. {
  1375. struct ath10k_hw_params *hw = &ar->hw_params;
  1376. struct ieee80211_hdr *hdr;
  1377. struct ethhdr *eth;
  1378. size_t hdr_len;
  1379. void *rfc1042;
  1380. u8 da[ETH_ALEN];
  1381. u8 sa[ETH_ALEN];
  1382. int l3_pad_bytes;
  1383. struct htt_rx_desc *rxd;
  1384. int bytes_aligned = ar->hw_params.decap_align_bytes;
  1385. /* Delivered decapped frame:
  1386. * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc
  1387. * [payload]
  1388. */
  1389. rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype);
  1390. if (WARN_ON_ONCE(!rfc1042))
  1391. return;
  1392. rxd = HTT_RX_BUF_TO_RX_DESC(hw,
  1393. (void *)msdu->data - hw->rx_desc_ops->rx_desc_size);
  1394. l3_pad_bytes = ath10k_htt_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
  1395. skb_put(msdu, l3_pad_bytes);
  1396. skb_pull(msdu, l3_pad_bytes);
  1397. /* pull decapped header and copy SA & DA */
  1398. eth = (struct ethhdr *)msdu->data;
  1399. ether_addr_copy(da, eth->h_dest);
  1400. ether_addr_copy(sa, eth->h_source);
  1401. skb_pull(msdu, sizeof(struct ethhdr));
  1402. /* push rfc1042/llc/snap */
  1403. memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042,
  1404. sizeof(struct rfc1042_hdr));
  1405. /* push original 802.11 header */
  1406. hdr = (struct ieee80211_hdr *)first_hdr;
  1407. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1408. if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
  1409. memcpy(skb_push(msdu,
  1410. ath10k_htt_rx_crypto_param_len(ar, enctype)),
  1411. (void *)hdr + round_up(hdr_len, bytes_aligned),
  1412. ath10k_htt_rx_crypto_param_len(ar, enctype));
  1413. }
  1414. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  1415. /* original 802.11 header has a different DA and in
  1416. * case of 4addr it may also have different SA
  1417. */
  1418. hdr = (struct ieee80211_hdr *)msdu->data;
  1419. ether_addr_copy(ieee80211_get_DA(hdr), da);
  1420. ether_addr_copy(ieee80211_get_SA(hdr), sa);
  1421. }
  1422. static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar,
  1423. struct sk_buff *msdu,
  1424. struct ieee80211_rx_status *status,
  1425. const u8 first_hdr[64],
  1426. enum htt_rx_mpdu_encrypt_type enctype)
  1427. {
  1428. struct ath10k_hw_params *hw = &ar->hw_params;
  1429. struct ieee80211_hdr *hdr;
  1430. size_t hdr_len;
  1431. int l3_pad_bytes;
  1432. struct htt_rx_desc *rxd;
  1433. int bytes_aligned = ar->hw_params.decap_align_bytes;
  1434. /* Delivered decapped frame:
  1435. * [amsdu header] <-- replaced with 802.11 hdr
  1436. * [rfc1042/llc]
  1437. * [payload]
  1438. */
  1439. rxd = HTT_RX_BUF_TO_RX_DESC(hw,
  1440. (void *)msdu->data - hw->rx_desc_ops->rx_desc_size);
  1441. l3_pad_bytes = ath10k_htt_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
  1442. skb_put(msdu, l3_pad_bytes);
  1443. skb_pull(msdu, sizeof(struct amsdu_subframe_hdr) + l3_pad_bytes);
  1444. hdr = (struct ieee80211_hdr *)first_hdr;
  1445. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1446. if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
  1447. memcpy(skb_push(msdu,
  1448. ath10k_htt_rx_crypto_param_len(ar, enctype)),
  1449. (void *)hdr + round_up(hdr_len, bytes_aligned),
  1450. ath10k_htt_rx_crypto_param_len(ar, enctype));
  1451. }
  1452. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  1453. }
  1454. static void ath10k_htt_rx_h_undecap(struct ath10k *ar,
  1455. struct sk_buff *msdu,
  1456. struct ieee80211_rx_status *status,
  1457. u8 first_hdr[64],
  1458. enum htt_rx_mpdu_encrypt_type enctype,
  1459. bool is_decrypted)
  1460. {
  1461. struct ath10k_hw_params *hw = &ar->hw_params;
  1462. struct htt_rx_desc *rxd;
  1463. struct rx_msdu_start_common *rxd_msdu_start_common;
  1464. enum rx_msdu_decap_format decap;
  1465. /* First msdu's decapped header:
  1466. * [802.11 header] <-- padded to 4 bytes long
  1467. * [crypto param] <-- padded to 4 bytes long
  1468. * [amsdu header] <-- only if A-MSDU
  1469. * [rfc1042/llc]
  1470. *
  1471. * Other (2nd, 3rd, ..) msdu's decapped header:
  1472. * [amsdu header] <-- only if A-MSDU
  1473. * [rfc1042/llc]
  1474. */
  1475. rxd = HTT_RX_BUF_TO_RX_DESC(hw,
  1476. (void *)msdu->data - hw->rx_desc_ops->rx_desc_size);
  1477. rxd_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, rxd);
  1478. decap = MS(__le32_to_cpu(rxd_msdu_start_common->info1),
  1479. RX_MSDU_START_INFO1_DECAP_FORMAT);
  1480. switch (decap) {
  1481. case RX_MSDU_DECAP_RAW:
  1482. ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype,
  1483. is_decrypted, first_hdr);
  1484. break;
  1485. case RX_MSDU_DECAP_NATIVE_WIFI:
  1486. ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr,
  1487. enctype);
  1488. break;
  1489. case RX_MSDU_DECAP_ETHERNET2_DIX:
  1490. ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype);
  1491. break;
  1492. case RX_MSDU_DECAP_8023_SNAP_LLC:
  1493. ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr,
  1494. enctype);
  1495. break;
  1496. }
  1497. }
  1498. static int ath10k_htt_rx_get_csum_state(struct ath10k_hw_params *hw, struct sk_buff *skb)
  1499. {
  1500. struct htt_rx_desc *rxd;
  1501. struct rx_attention *rxd_attention;
  1502. struct rx_msdu_start_common *rxd_msdu_start_common;
  1503. u32 flags, info;
  1504. bool is_ip4, is_ip6;
  1505. bool is_tcp, is_udp;
  1506. bool ip_csum_ok, tcpudp_csum_ok;
  1507. rxd = HTT_RX_BUF_TO_RX_DESC(hw,
  1508. (void *)skb->data - hw->rx_desc_ops->rx_desc_size);
  1509. rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
  1510. rxd_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, rxd);
  1511. flags = __le32_to_cpu(rxd_attention->flags);
  1512. info = __le32_to_cpu(rxd_msdu_start_common->info1);
  1513. is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
  1514. is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
  1515. is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
  1516. is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
  1517. ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
  1518. tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
  1519. if (!is_ip4 && !is_ip6)
  1520. return CHECKSUM_NONE;
  1521. if (!is_tcp && !is_udp)
  1522. return CHECKSUM_NONE;
  1523. if (!ip_csum_ok)
  1524. return CHECKSUM_NONE;
  1525. if (!tcpudp_csum_ok)
  1526. return CHECKSUM_NONE;
  1527. return CHECKSUM_UNNECESSARY;
  1528. }
  1529. static void ath10k_htt_rx_h_csum_offload(struct ath10k_hw_params *hw,
  1530. struct sk_buff *msdu)
  1531. {
  1532. msdu->ip_summed = ath10k_htt_rx_get_csum_state(hw, msdu);
  1533. }
  1534. static u64 ath10k_htt_rx_h_get_pn(struct ath10k *ar, struct sk_buff *skb,
  1535. enum htt_rx_mpdu_encrypt_type enctype)
  1536. {
  1537. struct ieee80211_hdr *hdr;
  1538. u64 pn = 0;
  1539. u8 *ehdr;
  1540. hdr = (struct ieee80211_hdr *)skb->data;
  1541. ehdr = skb->data + ieee80211_hdrlen(hdr->frame_control);
  1542. if (enctype == HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2) {
  1543. pn = ehdr[0];
  1544. pn |= (u64)ehdr[1] << 8;
  1545. pn |= (u64)ehdr[4] << 16;
  1546. pn |= (u64)ehdr[5] << 24;
  1547. pn |= (u64)ehdr[6] << 32;
  1548. pn |= (u64)ehdr[7] << 40;
  1549. }
  1550. return pn;
  1551. }
  1552. static bool ath10k_htt_rx_h_frag_multicast_check(struct ath10k *ar,
  1553. struct sk_buff *skb)
  1554. {
  1555. struct ieee80211_hdr *hdr;
  1556. hdr = (struct ieee80211_hdr *)skb->data;
  1557. return !is_multicast_ether_addr(hdr->addr1);
  1558. }
  1559. static bool ath10k_htt_rx_h_frag_pn_check(struct ath10k *ar,
  1560. struct sk_buff *skb,
  1561. u16 peer_id,
  1562. enum htt_rx_mpdu_encrypt_type enctype)
  1563. {
  1564. struct ath10k_peer *peer;
  1565. union htt_rx_pn_t *last_pn, new_pn = {0};
  1566. struct ieee80211_hdr *hdr;
  1567. u8 tid, frag_number;
  1568. u32 seq;
  1569. peer = ath10k_peer_find_by_id(ar, peer_id);
  1570. if (!peer) {
  1571. ath10k_dbg(ar, ATH10K_DBG_HTT, "invalid peer for frag pn check\n");
  1572. return false;
  1573. }
  1574. hdr = (struct ieee80211_hdr *)skb->data;
  1575. if (ieee80211_is_data_qos(hdr->frame_control))
  1576. tid = ieee80211_get_tid(hdr);
  1577. else
  1578. tid = ATH10K_TXRX_NON_QOS_TID;
  1579. last_pn = &peer->frag_tids_last_pn[tid];
  1580. new_pn.pn48 = ath10k_htt_rx_h_get_pn(ar, skb, enctype);
  1581. frag_number = le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG;
  1582. seq = IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl));
  1583. if (frag_number == 0) {
  1584. last_pn->pn48 = new_pn.pn48;
  1585. peer->frag_tids_seq[tid] = seq;
  1586. } else {
  1587. if (seq != peer->frag_tids_seq[tid])
  1588. return false;
  1589. if (new_pn.pn48 != last_pn->pn48 + 1)
  1590. return false;
  1591. last_pn->pn48 = new_pn.pn48;
  1592. }
  1593. return true;
  1594. }
  1595. static void ath10k_htt_rx_h_mpdu(struct ath10k *ar,
  1596. struct sk_buff_head *amsdu,
  1597. struct ieee80211_rx_status *status,
  1598. bool fill_crypt_header,
  1599. u8 *rx_hdr,
  1600. enum ath10k_pkt_rx_err *err,
  1601. u16 peer_id,
  1602. bool frag)
  1603. {
  1604. struct sk_buff *first;
  1605. struct sk_buff *last;
  1606. struct sk_buff *msdu, *temp;
  1607. struct ath10k_hw_params *hw = &ar->hw_params;
  1608. struct htt_rx_desc *rxd;
  1609. struct rx_attention *rxd_attention;
  1610. struct rx_mpdu_start *rxd_mpdu_start;
  1611. struct ieee80211_hdr *hdr;
  1612. enum htt_rx_mpdu_encrypt_type enctype;
  1613. u8 first_hdr[64];
  1614. u8 *qos;
  1615. bool has_fcs_err;
  1616. bool has_crypto_err;
  1617. bool has_tkip_err;
  1618. bool has_peer_idx_invalid;
  1619. bool is_decrypted;
  1620. bool is_mgmt;
  1621. u32 attention;
  1622. bool frag_pn_check = true, multicast_check = true;
  1623. if (skb_queue_empty(amsdu))
  1624. return;
  1625. first = skb_peek(amsdu);
  1626. rxd = HTT_RX_BUF_TO_RX_DESC(hw,
  1627. (void *)first->data - hw->rx_desc_ops->rx_desc_size);
  1628. rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
  1629. rxd_mpdu_start = ath10k_htt_rx_desc_get_mpdu_start(hw, rxd);
  1630. is_mgmt = !!(rxd_attention->flags &
  1631. __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE));
  1632. enctype = MS(__le32_to_cpu(rxd_mpdu_start->info0),
  1633. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  1634. /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11
  1635. * decapped header. It'll be used for undecapping of each MSDU.
  1636. */
  1637. hdr = (void *)ath10k_htt_rx_desc_get_rx_hdr_status(hw, rxd);
  1638. memcpy(first_hdr, hdr, RX_HTT_HDR_STATUS_LEN);
  1639. if (rx_hdr)
  1640. memcpy(rx_hdr, hdr, RX_HTT_HDR_STATUS_LEN);
  1641. /* Each A-MSDU subframe will use the original header as the base and be
  1642. * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl.
  1643. */
  1644. hdr = (void *)first_hdr;
  1645. if (ieee80211_is_data_qos(hdr->frame_control)) {
  1646. qos = ieee80211_get_qos_ctl(hdr);
  1647. qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
  1648. }
  1649. /* Some attention flags are valid only in the last MSDU. */
  1650. last = skb_peek_tail(amsdu);
  1651. rxd = HTT_RX_BUF_TO_RX_DESC(hw,
  1652. (void *)last->data - hw->rx_desc_ops->rx_desc_size);
  1653. rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
  1654. attention = __le32_to_cpu(rxd_attention->flags);
  1655. has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR);
  1656. has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
  1657. has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
  1658. has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID);
  1659. /* Note: If hardware captures an encrypted frame that it can't decrypt,
  1660. * e.g. due to fcs error, missing peer or invalid key data it will
  1661. * report the frame as raw.
  1662. */
  1663. is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE &&
  1664. !has_fcs_err &&
  1665. !has_crypto_err &&
  1666. !has_peer_idx_invalid);
  1667. /* Clear per-MPDU flags while leaving per-PPDU flags intact. */
  1668. status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
  1669. RX_FLAG_MMIC_ERROR |
  1670. RX_FLAG_DECRYPTED |
  1671. RX_FLAG_IV_STRIPPED |
  1672. RX_FLAG_ONLY_MONITOR |
  1673. RX_FLAG_MMIC_STRIPPED);
  1674. if (has_fcs_err)
  1675. status->flag |= RX_FLAG_FAILED_FCS_CRC;
  1676. if (has_tkip_err)
  1677. status->flag |= RX_FLAG_MMIC_ERROR;
  1678. if (err) {
  1679. if (has_fcs_err)
  1680. *err = ATH10K_PKT_RX_ERR_FCS;
  1681. else if (has_tkip_err)
  1682. *err = ATH10K_PKT_RX_ERR_TKIP;
  1683. else if (has_crypto_err)
  1684. *err = ATH10K_PKT_RX_ERR_CRYPT;
  1685. else if (has_peer_idx_invalid)
  1686. *err = ATH10K_PKT_RX_ERR_PEER_IDX_INVAL;
  1687. }
  1688. /* Firmware reports all necessary management frames via WMI already.
  1689. * They are not reported to monitor interfaces at all so pass the ones
  1690. * coming via HTT to monitor interfaces instead. This simplifies
  1691. * matters a lot.
  1692. */
  1693. if (is_mgmt)
  1694. status->flag |= RX_FLAG_ONLY_MONITOR;
  1695. if (is_decrypted) {
  1696. status->flag |= RX_FLAG_DECRYPTED;
  1697. if (likely(!is_mgmt))
  1698. status->flag |= RX_FLAG_MMIC_STRIPPED;
  1699. if (fill_crypt_header)
  1700. status->flag |= RX_FLAG_MIC_STRIPPED |
  1701. RX_FLAG_ICV_STRIPPED;
  1702. else
  1703. status->flag |= RX_FLAG_IV_STRIPPED;
  1704. }
  1705. skb_queue_walk(amsdu, msdu) {
  1706. if (frag && !fill_crypt_header && is_decrypted &&
  1707. enctype == HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2)
  1708. frag_pn_check = ath10k_htt_rx_h_frag_pn_check(ar,
  1709. msdu,
  1710. peer_id,
  1711. enctype);
  1712. if (frag)
  1713. multicast_check = ath10k_htt_rx_h_frag_multicast_check(ar,
  1714. msdu);
  1715. if (!frag_pn_check || !multicast_check) {
  1716. /* Discard the fragment with invalid PN or multicast DA
  1717. */
  1718. temp = msdu->prev;
  1719. __skb_unlink(msdu, amsdu);
  1720. dev_kfree_skb_any(msdu);
  1721. msdu = temp;
  1722. frag_pn_check = true;
  1723. multicast_check = true;
  1724. continue;
  1725. }
  1726. ath10k_htt_rx_h_csum_offload(&ar->hw_params, msdu);
  1727. if (frag && !fill_crypt_header &&
  1728. enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
  1729. status->flag &= ~RX_FLAG_MMIC_STRIPPED;
  1730. ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype,
  1731. is_decrypted);
  1732. /* Undecapping involves copying the original 802.11 header back
  1733. * to sk_buff. If frame is protected and hardware has decrypted
  1734. * it then remove the protected bit.
  1735. */
  1736. if (!is_decrypted)
  1737. continue;
  1738. if (is_mgmt)
  1739. continue;
  1740. if (fill_crypt_header)
  1741. continue;
  1742. hdr = (void *)msdu->data;
  1743. hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
  1744. if (frag && !fill_crypt_header &&
  1745. enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
  1746. status->flag &= ~RX_FLAG_IV_STRIPPED &
  1747. ~RX_FLAG_MMIC_STRIPPED;
  1748. }
  1749. }
  1750. static void ath10k_htt_rx_h_enqueue(struct ath10k *ar,
  1751. struct sk_buff_head *amsdu,
  1752. struct ieee80211_rx_status *status)
  1753. {
  1754. struct sk_buff *msdu;
  1755. struct sk_buff *first_subframe;
  1756. first_subframe = skb_peek(amsdu);
  1757. while ((msdu = __skb_dequeue(amsdu))) {
  1758. /* Setup per-MSDU flags */
  1759. if (skb_queue_empty(amsdu))
  1760. status->flag &= ~RX_FLAG_AMSDU_MORE;
  1761. else
  1762. status->flag |= RX_FLAG_AMSDU_MORE;
  1763. if (msdu == first_subframe) {
  1764. first_subframe = NULL;
  1765. status->flag &= ~RX_FLAG_ALLOW_SAME_PN;
  1766. } else {
  1767. status->flag |= RX_FLAG_ALLOW_SAME_PN;
  1768. }
  1769. ath10k_htt_rx_h_queue_msdu(ar, status, msdu);
  1770. }
  1771. }
  1772. static int ath10k_unchain_msdu(struct sk_buff_head *amsdu,
  1773. unsigned long *unchain_cnt)
  1774. {
  1775. struct sk_buff *skb, *first;
  1776. int space;
  1777. int total_len = 0;
  1778. int amsdu_len = skb_queue_len(amsdu);
  1779. /* TODO: Might could optimize this by using
  1780. * skb_try_coalesce or similar method to
  1781. * decrease copying, or maybe get mac80211 to
  1782. * provide a way to just receive a list of
  1783. * skb?
  1784. */
  1785. first = __skb_dequeue(amsdu);
  1786. /* Allocate total length all at once. */
  1787. skb_queue_walk(amsdu, skb)
  1788. total_len += skb->len;
  1789. space = total_len - skb_tailroom(first);
  1790. if ((space > 0) &&
  1791. (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) {
  1792. /* TODO: bump some rx-oom error stat */
  1793. /* put it back together so we can free the
  1794. * whole list at once.
  1795. */
  1796. __skb_queue_head(amsdu, first);
  1797. return -1;
  1798. }
  1799. /* Walk list again, copying contents into
  1800. * msdu_head
  1801. */
  1802. while ((skb = __skb_dequeue(amsdu))) {
  1803. skb_copy_from_linear_data(skb, skb_put(first, skb->len),
  1804. skb->len);
  1805. dev_kfree_skb_any(skb);
  1806. }
  1807. __skb_queue_head(amsdu, first);
  1808. *unchain_cnt += amsdu_len - 1;
  1809. return 0;
  1810. }
  1811. static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
  1812. struct sk_buff_head *amsdu,
  1813. unsigned long *drop_cnt,
  1814. unsigned long *unchain_cnt)
  1815. {
  1816. struct sk_buff *first;
  1817. struct ath10k_hw_params *hw = &ar->hw_params;
  1818. struct htt_rx_desc *rxd;
  1819. struct rx_msdu_start_common *rxd_msdu_start_common;
  1820. struct rx_frag_info_common *rxd_frag_info;
  1821. enum rx_msdu_decap_format decap;
  1822. first = skb_peek(amsdu);
  1823. rxd = HTT_RX_BUF_TO_RX_DESC(hw,
  1824. (void *)first->data - hw->rx_desc_ops->rx_desc_size);
  1825. rxd_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, rxd);
  1826. rxd_frag_info = ath10k_htt_rx_desc_get_frag_info(hw, rxd);
  1827. decap = MS(__le32_to_cpu(rxd_msdu_start_common->info1),
  1828. RX_MSDU_START_INFO1_DECAP_FORMAT);
  1829. /* FIXME: Current unchaining logic can only handle simple case of raw
  1830. * msdu chaining. If decapping is other than raw the chaining may be
  1831. * more complex and this isn't handled by the current code. Don't even
  1832. * try re-constructing such frames - it'll be pretty much garbage.
  1833. */
  1834. if (decap != RX_MSDU_DECAP_RAW ||
  1835. skb_queue_len(amsdu) != 1 + rxd_frag_info->ring2_more_count) {
  1836. *drop_cnt += skb_queue_len(amsdu);
  1837. __skb_queue_purge(amsdu);
  1838. return;
  1839. }
  1840. ath10k_unchain_msdu(amsdu, unchain_cnt);
  1841. }
  1842. static bool ath10k_htt_rx_validate_amsdu(struct ath10k *ar,
  1843. struct sk_buff_head *amsdu)
  1844. {
  1845. u8 *subframe_hdr;
  1846. struct sk_buff *first;
  1847. bool is_first, is_last;
  1848. struct ath10k_hw_params *hw = &ar->hw_params;
  1849. struct htt_rx_desc *rxd;
  1850. struct rx_msdu_end_common *rxd_msdu_end_common;
  1851. struct rx_mpdu_start *rxd_mpdu_start;
  1852. struct ieee80211_hdr *hdr;
  1853. size_t hdr_len, crypto_len;
  1854. enum htt_rx_mpdu_encrypt_type enctype;
  1855. int bytes_aligned = ar->hw_params.decap_align_bytes;
  1856. first = skb_peek(amsdu);
  1857. rxd = HTT_RX_BUF_TO_RX_DESC(hw,
  1858. (void *)first->data - hw->rx_desc_ops->rx_desc_size);
  1859. rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
  1860. rxd_mpdu_start = ath10k_htt_rx_desc_get_mpdu_start(hw, rxd);
  1861. hdr = (void *)ath10k_htt_rx_desc_get_rx_hdr_status(hw, rxd);
  1862. is_first = !!(rxd_msdu_end_common->info0 &
  1863. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
  1864. is_last = !!(rxd_msdu_end_common->info0 &
  1865. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
  1866. /* Return in case of non-aggregated msdu */
  1867. if (is_first && is_last)
  1868. return true;
  1869. /* First msdu flag is not set for the first msdu of the list */
  1870. if (!is_first)
  1871. return false;
  1872. enctype = MS(__le32_to_cpu(rxd_mpdu_start->info0),
  1873. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  1874. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1875. crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
  1876. subframe_hdr = (u8 *)hdr + round_up(hdr_len, bytes_aligned) +
  1877. crypto_len;
  1878. /* Validate if the amsdu has a proper first subframe.
  1879. * There are chances a single msdu can be received as amsdu when
  1880. * the unauthenticated amsdu flag of a QoS header
  1881. * gets flipped in non-SPP AMSDU's, in such cases the first
  1882. * subframe has llc/snap header in place of a valid da.
  1883. * return false if the da matches rfc1042 pattern
  1884. */
  1885. if (ether_addr_equal(subframe_hdr, rfc1042_header))
  1886. return false;
  1887. return true;
  1888. }
  1889. static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar,
  1890. struct sk_buff_head *amsdu,
  1891. struct ieee80211_rx_status *rx_status)
  1892. {
  1893. if (!rx_status->freq) {
  1894. ath10k_dbg(ar, ATH10K_DBG_HTT, "no channel configured; ignoring frame(s)!\n");
  1895. return false;
  1896. }
  1897. if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
  1898. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n");
  1899. return false;
  1900. }
  1901. if (!ath10k_htt_rx_validate_amsdu(ar, amsdu)) {
  1902. ath10k_dbg(ar, ATH10K_DBG_HTT, "invalid amsdu received\n");
  1903. return false;
  1904. }
  1905. return true;
  1906. }
  1907. static void ath10k_htt_rx_h_filter(struct ath10k *ar,
  1908. struct sk_buff_head *amsdu,
  1909. struct ieee80211_rx_status *rx_status,
  1910. unsigned long *drop_cnt)
  1911. {
  1912. if (skb_queue_empty(amsdu))
  1913. return;
  1914. if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status))
  1915. return;
  1916. if (drop_cnt)
  1917. *drop_cnt += skb_queue_len(amsdu);
  1918. __skb_queue_purge(amsdu);
  1919. }
  1920. static int ath10k_htt_rx_handle_amsdu(struct ath10k_htt *htt)
  1921. {
  1922. struct ath10k *ar = htt->ar;
  1923. struct ieee80211_rx_status *rx_status = &htt->rx_status;
  1924. struct sk_buff_head amsdu;
  1925. int ret;
  1926. unsigned long drop_cnt = 0;
  1927. unsigned long unchain_cnt = 0;
  1928. unsigned long drop_cnt_filter = 0;
  1929. unsigned long msdus_to_queue, num_msdus;
  1930. enum ath10k_pkt_rx_err err = ATH10K_PKT_RX_ERR_MAX;
  1931. u8 first_hdr[RX_HTT_HDR_STATUS_LEN];
  1932. __skb_queue_head_init(&amsdu);
  1933. spin_lock_bh(&htt->rx_ring.lock);
  1934. if (htt->rx_confused) {
  1935. spin_unlock_bh(&htt->rx_ring.lock);
  1936. return -EIO;
  1937. }
  1938. ret = ath10k_htt_rx_amsdu_pop(htt, &amsdu);
  1939. spin_unlock_bh(&htt->rx_ring.lock);
  1940. if (ret < 0) {
  1941. ath10k_warn(ar, "rx ring became corrupted: %d\n", ret);
  1942. __skb_queue_purge(&amsdu);
  1943. /* FIXME: It's probably a good idea to reboot the
  1944. * device instead of leaving it inoperable.
  1945. */
  1946. htt->rx_confused = true;
  1947. return ret;
  1948. }
  1949. num_msdus = skb_queue_len(&amsdu);
  1950. ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
  1951. /* only for ret = 1 indicates chained msdus */
  1952. if (ret > 0)
  1953. ath10k_htt_rx_h_unchain(ar, &amsdu, &drop_cnt, &unchain_cnt);
  1954. ath10k_htt_rx_h_filter(ar, &amsdu, rx_status, &drop_cnt_filter);
  1955. ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status, true, first_hdr, &err, 0,
  1956. false);
  1957. msdus_to_queue = skb_queue_len(&amsdu);
  1958. ath10k_htt_rx_h_enqueue(ar, &amsdu, rx_status);
  1959. ath10k_sta_update_rx_tid_stats(ar, first_hdr, num_msdus, err,
  1960. unchain_cnt, drop_cnt, drop_cnt_filter,
  1961. msdus_to_queue);
  1962. return 0;
  1963. }
  1964. static void ath10k_htt_rx_mpdu_desc_pn_hl(struct htt_hl_rx_desc *rx_desc,
  1965. union htt_rx_pn_t *pn,
  1966. int pn_len_bits)
  1967. {
  1968. switch (pn_len_bits) {
  1969. case 48:
  1970. pn->pn48 = __le32_to_cpu(rx_desc->pn_31_0) +
  1971. ((u64)(__le32_to_cpu(rx_desc->u0.pn_63_32) & 0xFFFF) << 32);
  1972. break;
  1973. case 24:
  1974. pn->pn24 = __le32_to_cpu(rx_desc->pn_31_0);
  1975. break;
  1976. }
  1977. }
  1978. static bool ath10k_htt_rx_pn_cmp48(union htt_rx_pn_t *new_pn,
  1979. union htt_rx_pn_t *old_pn)
  1980. {
  1981. return ((new_pn->pn48 & 0xffffffffffffULL) <=
  1982. (old_pn->pn48 & 0xffffffffffffULL));
  1983. }
  1984. static bool ath10k_htt_rx_pn_check_replay_hl(struct ath10k *ar,
  1985. struct ath10k_peer *peer,
  1986. struct htt_rx_indication_hl *rx)
  1987. {
  1988. bool last_pn_valid, pn_invalid = false;
  1989. enum htt_txrx_sec_cast_type sec_index;
  1990. enum htt_security_types sec_type;
  1991. union htt_rx_pn_t new_pn = {0};
  1992. struct htt_hl_rx_desc *rx_desc;
  1993. union htt_rx_pn_t *last_pn;
  1994. u32 rx_desc_info, tid;
  1995. int num_mpdu_ranges;
  1996. lockdep_assert_held(&ar->data_lock);
  1997. if (!peer)
  1998. return false;
  1999. if (!(rx->fw_desc.flags & FW_RX_DESC_FLAGS_FIRST_MSDU))
  2000. return false;
  2001. num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
  2002. HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
  2003. rx_desc = (struct htt_hl_rx_desc *)&rx->mpdu_ranges[num_mpdu_ranges];
  2004. rx_desc_info = __le32_to_cpu(rx_desc->info);
  2005. if (!MS(rx_desc_info, HTT_RX_DESC_HL_INFO_ENCRYPTED))
  2006. return false;
  2007. tid = MS(rx->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID);
  2008. last_pn_valid = peer->tids_last_pn_valid[tid];
  2009. last_pn = &peer->tids_last_pn[tid];
  2010. if (MS(rx_desc_info, HTT_RX_DESC_HL_INFO_MCAST_BCAST))
  2011. sec_index = HTT_TXRX_SEC_MCAST;
  2012. else
  2013. sec_index = HTT_TXRX_SEC_UCAST;
  2014. sec_type = peer->rx_pn[sec_index].sec_type;
  2015. ath10k_htt_rx_mpdu_desc_pn_hl(rx_desc, &new_pn, peer->rx_pn[sec_index].pn_len);
  2016. if (sec_type != HTT_SECURITY_AES_CCMP &&
  2017. sec_type != HTT_SECURITY_TKIP &&
  2018. sec_type != HTT_SECURITY_TKIP_NOMIC)
  2019. return false;
  2020. if (last_pn_valid)
  2021. pn_invalid = ath10k_htt_rx_pn_cmp48(&new_pn, last_pn);
  2022. else
  2023. peer->tids_last_pn_valid[tid] = true;
  2024. if (!pn_invalid)
  2025. last_pn->pn48 = new_pn.pn48;
  2026. return pn_invalid;
  2027. }
  2028. static bool ath10k_htt_rx_proc_rx_ind_hl(struct ath10k_htt *htt,
  2029. struct htt_rx_indication_hl *rx,
  2030. struct sk_buff *skb,
  2031. enum htt_rx_pn_check_type check_pn_type,
  2032. enum htt_rx_tkip_demic_type tkip_mic_type)
  2033. {
  2034. struct ath10k *ar = htt->ar;
  2035. struct ath10k_peer *peer;
  2036. struct htt_rx_indication_mpdu_range *mpdu_ranges;
  2037. struct fw_rx_desc_hl *fw_desc;
  2038. enum htt_txrx_sec_cast_type sec_index;
  2039. enum htt_security_types sec_type;
  2040. union htt_rx_pn_t new_pn = {0};
  2041. struct htt_hl_rx_desc *rx_desc;
  2042. struct ieee80211_hdr *hdr;
  2043. struct ieee80211_rx_status *rx_status;
  2044. u16 peer_id;
  2045. u8 rx_desc_len;
  2046. int num_mpdu_ranges;
  2047. size_t tot_hdr_len;
  2048. struct ieee80211_channel *ch;
  2049. bool pn_invalid, qos, first_msdu;
  2050. u32 tid, rx_desc_info;
  2051. peer_id = __le16_to_cpu(rx->hdr.peer_id);
  2052. tid = MS(rx->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID);
  2053. spin_lock_bh(&ar->data_lock);
  2054. peer = ath10k_peer_find_by_id(ar, peer_id);
  2055. spin_unlock_bh(&ar->data_lock);
  2056. if (!peer && peer_id != HTT_INVALID_PEERID)
  2057. ath10k_warn(ar, "Got RX ind from invalid peer: %u\n", peer_id);
  2058. if (!peer)
  2059. return true;
  2060. num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
  2061. HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
  2062. mpdu_ranges = htt_rx_ind_get_mpdu_ranges_hl(rx);
  2063. fw_desc = &rx->fw_desc;
  2064. rx_desc_len = fw_desc->len;
  2065. if (fw_desc->u.bits.discard) {
  2066. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt discard mpdu\n");
  2067. goto err;
  2068. }
  2069. /* I have not yet seen any case where num_mpdu_ranges > 1.
  2070. * qcacld does not seem handle that case either, so we introduce the
  2071. * same limitation here as well.
  2072. */
  2073. if (num_mpdu_ranges > 1)
  2074. ath10k_warn(ar,
  2075. "Unsupported number of MPDU ranges: %d, ignoring all but the first\n",
  2076. num_mpdu_ranges);
  2077. if (mpdu_ranges->mpdu_range_status !=
  2078. HTT_RX_IND_MPDU_STATUS_OK &&
  2079. mpdu_ranges->mpdu_range_status !=
  2080. HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR) {
  2081. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt mpdu_range_status %d\n",
  2082. mpdu_ranges->mpdu_range_status);
  2083. goto err;
  2084. }
  2085. rx_desc = (struct htt_hl_rx_desc *)&rx->mpdu_ranges[num_mpdu_ranges];
  2086. rx_desc_info = __le32_to_cpu(rx_desc->info);
  2087. if (MS(rx_desc_info, HTT_RX_DESC_HL_INFO_MCAST_BCAST))
  2088. sec_index = HTT_TXRX_SEC_MCAST;
  2089. else
  2090. sec_index = HTT_TXRX_SEC_UCAST;
  2091. sec_type = peer->rx_pn[sec_index].sec_type;
  2092. first_msdu = rx->fw_desc.flags & FW_RX_DESC_FLAGS_FIRST_MSDU;
  2093. ath10k_htt_rx_mpdu_desc_pn_hl(rx_desc, &new_pn, peer->rx_pn[sec_index].pn_len);
  2094. if (check_pn_type == HTT_RX_PN_CHECK && tid >= IEEE80211_NUM_TIDS) {
  2095. spin_lock_bh(&ar->data_lock);
  2096. pn_invalid = ath10k_htt_rx_pn_check_replay_hl(ar, peer, rx);
  2097. spin_unlock_bh(&ar->data_lock);
  2098. if (pn_invalid)
  2099. goto err;
  2100. }
  2101. /* Strip off all headers before the MAC header before delivery to
  2102. * mac80211
  2103. */
  2104. tot_hdr_len = sizeof(struct htt_resp_hdr) + sizeof(rx->hdr) +
  2105. sizeof(rx->ppdu) + sizeof(rx->prefix) +
  2106. sizeof(rx->fw_desc) +
  2107. sizeof(*mpdu_ranges) * num_mpdu_ranges + rx_desc_len;
  2108. skb_pull(skb, tot_hdr_len);
  2109. hdr = (struct ieee80211_hdr *)skb->data;
  2110. qos = ieee80211_is_data_qos(hdr->frame_control);
  2111. rx_status = IEEE80211_SKB_RXCB(skb);
  2112. memset(rx_status, 0, sizeof(*rx_status));
  2113. if (rx->ppdu.combined_rssi == 0) {
  2114. /* SDIO firmware does not provide signal */
  2115. rx_status->signal = 0;
  2116. rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  2117. } else {
  2118. rx_status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
  2119. rx->ppdu.combined_rssi;
  2120. rx_status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
  2121. }
  2122. spin_lock_bh(&ar->data_lock);
  2123. ch = ar->scan_channel;
  2124. if (!ch)
  2125. ch = ar->rx_channel;
  2126. if (!ch)
  2127. ch = ath10k_htt_rx_h_any_channel(ar);
  2128. if (!ch)
  2129. ch = ar->tgt_oper_chan;
  2130. spin_unlock_bh(&ar->data_lock);
  2131. if (ch) {
  2132. rx_status->band = ch->band;
  2133. rx_status->freq = ch->center_freq;
  2134. }
  2135. if (rx->fw_desc.flags & FW_RX_DESC_FLAGS_LAST_MSDU)
  2136. rx_status->flag &= ~RX_FLAG_AMSDU_MORE;
  2137. else
  2138. rx_status->flag |= RX_FLAG_AMSDU_MORE;
  2139. /* Not entirely sure about this, but all frames from the chipset has
  2140. * the protected flag set even though they have already been decrypted.
  2141. * Unmasking this flag is necessary in order for mac80211 not to drop
  2142. * the frame.
  2143. * TODO: Verify this is always the case or find out a way to check
  2144. * if there has been hw decryption.
  2145. */
  2146. if (ieee80211_has_protected(hdr->frame_control)) {
  2147. hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
  2148. rx_status->flag |= RX_FLAG_DECRYPTED |
  2149. RX_FLAG_IV_STRIPPED |
  2150. RX_FLAG_MMIC_STRIPPED;
  2151. if (tid < IEEE80211_NUM_TIDS &&
  2152. first_msdu &&
  2153. check_pn_type == HTT_RX_PN_CHECK &&
  2154. (sec_type == HTT_SECURITY_AES_CCMP ||
  2155. sec_type == HTT_SECURITY_TKIP ||
  2156. sec_type == HTT_SECURITY_TKIP_NOMIC)) {
  2157. u8 offset, *ivp, i;
  2158. s8 keyidx = 0;
  2159. __le64 pn48 = cpu_to_le64(new_pn.pn48);
  2160. hdr = (struct ieee80211_hdr *)skb->data;
  2161. offset = ieee80211_hdrlen(hdr->frame_control);
  2162. hdr->frame_control |= __cpu_to_le16(IEEE80211_FCTL_PROTECTED);
  2163. rx_status->flag &= ~RX_FLAG_IV_STRIPPED;
  2164. memmove(skb->data - IEEE80211_CCMP_HDR_LEN,
  2165. skb->data, offset);
  2166. skb_push(skb, IEEE80211_CCMP_HDR_LEN);
  2167. ivp = skb->data + offset;
  2168. memset(skb->data + offset, 0, IEEE80211_CCMP_HDR_LEN);
  2169. /* Ext IV */
  2170. ivp[IEEE80211_WEP_IV_LEN - 1] |= ATH10K_IEEE80211_EXTIV;
  2171. for (i = 0; i < ARRAY_SIZE(peer->keys); i++) {
  2172. if (peer->keys[i] &&
  2173. peer->keys[i]->flags & IEEE80211_KEY_FLAG_PAIRWISE)
  2174. keyidx = peer->keys[i]->keyidx;
  2175. }
  2176. /* Key ID */
  2177. ivp[IEEE80211_WEP_IV_LEN - 1] |= keyidx << 6;
  2178. if (sec_type == HTT_SECURITY_AES_CCMP) {
  2179. rx_status->flag |= RX_FLAG_MIC_STRIPPED;
  2180. /* pn 0, pn 1 */
  2181. memcpy(skb->data + offset, &pn48, 2);
  2182. /* pn 1, pn 3 , pn 34 , pn 5 */
  2183. memcpy(skb->data + offset + 4, ((u8 *)&pn48) + 2, 4);
  2184. } else {
  2185. rx_status->flag |= RX_FLAG_ICV_STRIPPED;
  2186. /* TSC 0 */
  2187. memcpy(skb->data + offset + 2, &pn48, 1);
  2188. /* TSC 1 */
  2189. memcpy(skb->data + offset, ((u8 *)&pn48) + 1, 1);
  2190. /* TSC 2 , TSC 3 , TSC 4 , TSC 5*/
  2191. memcpy(skb->data + offset + 4, ((u8 *)&pn48) + 2, 4);
  2192. }
  2193. }
  2194. }
  2195. if (tkip_mic_type == HTT_RX_TKIP_MIC)
  2196. rx_status->flag &= ~RX_FLAG_IV_STRIPPED &
  2197. ~RX_FLAG_MMIC_STRIPPED;
  2198. if (mpdu_ranges->mpdu_range_status == HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR)
  2199. rx_status->flag |= RX_FLAG_MMIC_ERROR;
  2200. if (!qos && tid < IEEE80211_NUM_TIDS) {
  2201. u8 offset;
  2202. __le16 qos_ctrl = 0;
  2203. hdr = (struct ieee80211_hdr *)skb->data;
  2204. offset = ieee80211_hdrlen(hdr->frame_control);
  2205. hdr->frame_control |= cpu_to_le16(IEEE80211_STYPE_QOS_DATA);
  2206. memmove(skb->data - IEEE80211_QOS_CTL_LEN, skb->data, offset);
  2207. skb_push(skb, IEEE80211_QOS_CTL_LEN);
  2208. qos_ctrl = cpu_to_le16(tid);
  2209. memcpy(skb->data + offset, &qos_ctrl, IEEE80211_QOS_CTL_LEN);
  2210. }
  2211. if (ar->napi.dev)
  2212. ieee80211_rx_napi(ar->hw, NULL, skb, &ar->napi);
  2213. else
  2214. ieee80211_rx_ni(ar->hw, skb);
  2215. /* We have delivered the skb to the upper layers (mac80211) so we
  2216. * must not free it.
  2217. */
  2218. return false;
  2219. err:
  2220. /* Tell the caller that it must free the skb since we have not
  2221. * consumed it
  2222. */
  2223. return true;
  2224. }
  2225. static int ath10k_htt_rx_frag_tkip_decap_nomic(struct sk_buff *skb,
  2226. u16 head_len,
  2227. u16 hdr_len)
  2228. {
  2229. u8 *ivp, *orig_hdr;
  2230. orig_hdr = skb->data;
  2231. ivp = orig_hdr + hdr_len + head_len;
  2232. /* the ExtIV bit is always set to 1 for TKIP */
  2233. if (!(ivp[IEEE80211_WEP_IV_LEN - 1] & ATH10K_IEEE80211_EXTIV))
  2234. return -EINVAL;
  2235. memmove(orig_hdr + IEEE80211_TKIP_IV_LEN, orig_hdr, head_len + hdr_len);
  2236. skb_pull(skb, IEEE80211_TKIP_IV_LEN);
  2237. skb_trim(skb, skb->len - ATH10K_IEEE80211_TKIP_MICLEN);
  2238. return 0;
  2239. }
  2240. static int ath10k_htt_rx_frag_tkip_decap_withmic(struct sk_buff *skb,
  2241. u16 head_len,
  2242. u16 hdr_len)
  2243. {
  2244. u8 *ivp, *orig_hdr;
  2245. orig_hdr = skb->data;
  2246. ivp = orig_hdr + hdr_len + head_len;
  2247. /* the ExtIV bit is always set to 1 for TKIP */
  2248. if (!(ivp[IEEE80211_WEP_IV_LEN - 1] & ATH10K_IEEE80211_EXTIV))
  2249. return -EINVAL;
  2250. memmove(orig_hdr + IEEE80211_TKIP_IV_LEN, orig_hdr, head_len + hdr_len);
  2251. skb_pull(skb, IEEE80211_TKIP_IV_LEN);
  2252. skb_trim(skb, skb->len - IEEE80211_TKIP_ICV_LEN);
  2253. return 0;
  2254. }
  2255. static int ath10k_htt_rx_frag_ccmp_decap(struct sk_buff *skb,
  2256. u16 head_len,
  2257. u16 hdr_len)
  2258. {
  2259. u8 *ivp, *orig_hdr;
  2260. orig_hdr = skb->data;
  2261. ivp = orig_hdr + hdr_len + head_len;
  2262. /* the ExtIV bit is always set to 1 for CCMP */
  2263. if (!(ivp[IEEE80211_WEP_IV_LEN - 1] & ATH10K_IEEE80211_EXTIV))
  2264. return -EINVAL;
  2265. skb_trim(skb, skb->len - IEEE80211_CCMP_MIC_LEN);
  2266. memmove(orig_hdr + IEEE80211_CCMP_HDR_LEN, orig_hdr, head_len + hdr_len);
  2267. skb_pull(skb, IEEE80211_CCMP_HDR_LEN);
  2268. return 0;
  2269. }
  2270. static int ath10k_htt_rx_frag_wep_decap(struct sk_buff *skb,
  2271. u16 head_len,
  2272. u16 hdr_len)
  2273. {
  2274. u8 *orig_hdr;
  2275. orig_hdr = skb->data;
  2276. memmove(orig_hdr + IEEE80211_WEP_IV_LEN,
  2277. orig_hdr, head_len + hdr_len);
  2278. skb_pull(skb, IEEE80211_WEP_IV_LEN);
  2279. skb_trim(skb, skb->len - IEEE80211_WEP_ICV_LEN);
  2280. return 0;
  2281. }
  2282. static bool ath10k_htt_rx_proc_rx_frag_ind_hl(struct ath10k_htt *htt,
  2283. struct htt_rx_fragment_indication *rx,
  2284. struct sk_buff *skb)
  2285. {
  2286. struct ath10k *ar = htt->ar;
  2287. enum htt_rx_tkip_demic_type tkip_mic = HTT_RX_NON_TKIP_MIC;
  2288. enum htt_txrx_sec_cast_type sec_index;
  2289. struct htt_rx_indication_hl *rx_hl;
  2290. enum htt_security_types sec_type;
  2291. u32 tid, frag, seq, rx_desc_info;
  2292. union htt_rx_pn_t new_pn = {0};
  2293. struct htt_hl_rx_desc *rx_desc;
  2294. u16 peer_id, sc, hdr_space;
  2295. union htt_rx_pn_t *last_pn;
  2296. struct ieee80211_hdr *hdr;
  2297. int ret, num_mpdu_ranges;
  2298. struct ath10k_peer *peer;
  2299. struct htt_resp *resp;
  2300. size_t tot_hdr_len;
  2301. resp = (struct htt_resp *)(skb->data + HTT_RX_FRAG_IND_INFO0_HEADER_LEN);
  2302. skb_pull(skb, HTT_RX_FRAG_IND_INFO0_HEADER_LEN);
  2303. skb_trim(skb, skb->len - FCS_LEN);
  2304. peer_id = __le16_to_cpu(rx->peer_id);
  2305. rx_hl = (struct htt_rx_indication_hl *)(&resp->rx_ind_hl);
  2306. spin_lock_bh(&ar->data_lock);
  2307. peer = ath10k_peer_find_by_id(ar, peer_id);
  2308. if (!peer) {
  2309. ath10k_dbg(ar, ATH10K_DBG_HTT, "invalid peer: %u\n", peer_id);
  2310. goto err;
  2311. }
  2312. num_mpdu_ranges = MS(__le32_to_cpu(rx_hl->hdr.info1),
  2313. HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
  2314. tot_hdr_len = sizeof(struct htt_resp_hdr) +
  2315. sizeof(rx_hl->hdr) +
  2316. sizeof(rx_hl->ppdu) +
  2317. sizeof(rx_hl->prefix) +
  2318. sizeof(rx_hl->fw_desc) +
  2319. sizeof(struct htt_rx_indication_mpdu_range) * num_mpdu_ranges;
  2320. tid = MS(rx_hl->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID);
  2321. rx_desc = (struct htt_hl_rx_desc *)(skb->data + tot_hdr_len);
  2322. rx_desc_info = __le32_to_cpu(rx_desc->info);
  2323. hdr = (struct ieee80211_hdr *)((u8 *)rx_desc + rx_hl->fw_desc.len);
  2324. if (is_multicast_ether_addr(hdr->addr1)) {
  2325. /* Discard the fragment with multicast DA */
  2326. goto err;
  2327. }
  2328. if (!MS(rx_desc_info, HTT_RX_DESC_HL_INFO_ENCRYPTED)) {
  2329. spin_unlock_bh(&ar->data_lock);
  2330. return ath10k_htt_rx_proc_rx_ind_hl(htt, &resp->rx_ind_hl, skb,
  2331. HTT_RX_NON_PN_CHECK,
  2332. HTT_RX_NON_TKIP_MIC);
  2333. }
  2334. if (ieee80211_has_retry(hdr->frame_control))
  2335. goto err;
  2336. hdr_space = ieee80211_hdrlen(hdr->frame_control);
  2337. sc = __le16_to_cpu(hdr->seq_ctrl);
  2338. seq = IEEE80211_SEQ_TO_SN(sc);
  2339. frag = sc & IEEE80211_SCTL_FRAG;
  2340. sec_index = MS(rx_desc_info, HTT_RX_DESC_HL_INFO_MCAST_BCAST) ?
  2341. HTT_TXRX_SEC_MCAST : HTT_TXRX_SEC_UCAST;
  2342. sec_type = peer->rx_pn[sec_index].sec_type;
  2343. ath10k_htt_rx_mpdu_desc_pn_hl(rx_desc, &new_pn, peer->rx_pn[sec_index].pn_len);
  2344. switch (sec_type) {
  2345. case HTT_SECURITY_TKIP:
  2346. tkip_mic = HTT_RX_TKIP_MIC;
  2347. ret = ath10k_htt_rx_frag_tkip_decap_withmic(skb,
  2348. tot_hdr_len +
  2349. rx_hl->fw_desc.len,
  2350. hdr_space);
  2351. if (ret)
  2352. goto err;
  2353. break;
  2354. case HTT_SECURITY_TKIP_NOMIC:
  2355. ret = ath10k_htt_rx_frag_tkip_decap_nomic(skb,
  2356. tot_hdr_len +
  2357. rx_hl->fw_desc.len,
  2358. hdr_space);
  2359. if (ret)
  2360. goto err;
  2361. break;
  2362. case HTT_SECURITY_AES_CCMP:
  2363. ret = ath10k_htt_rx_frag_ccmp_decap(skb,
  2364. tot_hdr_len + rx_hl->fw_desc.len,
  2365. hdr_space);
  2366. if (ret)
  2367. goto err;
  2368. break;
  2369. case HTT_SECURITY_WEP128:
  2370. case HTT_SECURITY_WEP104:
  2371. case HTT_SECURITY_WEP40:
  2372. ret = ath10k_htt_rx_frag_wep_decap(skb,
  2373. tot_hdr_len + rx_hl->fw_desc.len,
  2374. hdr_space);
  2375. if (ret)
  2376. goto err;
  2377. break;
  2378. default:
  2379. break;
  2380. }
  2381. resp = (struct htt_resp *)(skb->data);
  2382. if (sec_type != HTT_SECURITY_AES_CCMP &&
  2383. sec_type != HTT_SECURITY_TKIP &&
  2384. sec_type != HTT_SECURITY_TKIP_NOMIC) {
  2385. spin_unlock_bh(&ar->data_lock);
  2386. return ath10k_htt_rx_proc_rx_ind_hl(htt, &resp->rx_ind_hl, skb,
  2387. HTT_RX_NON_PN_CHECK,
  2388. HTT_RX_NON_TKIP_MIC);
  2389. }
  2390. last_pn = &peer->frag_tids_last_pn[tid];
  2391. if (frag == 0) {
  2392. if (ath10k_htt_rx_pn_check_replay_hl(ar, peer, &resp->rx_ind_hl))
  2393. goto err;
  2394. last_pn->pn48 = new_pn.pn48;
  2395. peer->frag_tids_seq[tid] = seq;
  2396. } else if (sec_type == HTT_SECURITY_AES_CCMP) {
  2397. if (seq != peer->frag_tids_seq[tid])
  2398. goto err;
  2399. if (new_pn.pn48 != last_pn->pn48 + 1)
  2400. goto err;
  2401. last_pn->pn48 = new_pn.pn48;
  2402. last_pn = &peer->tids_last_pn[tid];
  2403. last_pn->pn48 = new_pn.pn48;
  2404. }
  2405. spin_unlock_bh(&ar->data_lock);
  2406. return ath10k_htt_rx_proc_rx_ind_hl(htt, &resp->rx_ind_hl, skb,
  2407. HTT_RX_NON_PN_CHECK, tkip_mic);
  2408. err:
  2409. spin_unlock_bh(&ar->data_lock);
  2410. /* Tell the caller that it must free the skb since we have not
  2411. * consumed it
  2412. */
  2413. return true;
  2414. }
  2415. static void ath10k_htt_rx_proc_rx_ind_ll(struct ath10k_htt *htt,
  2416. struct htt_rx_indication *rx)
  2417. {
  2418. struct ath10k *ar = htt->ar;
  2419. struct htt_rx_indication_mpdu_range *mpdu_ranges;
  2420. int num_mpdu_ranges;
  2421. int i, mpdu_count = 0;
  2422. u16 peer_id;
  2423. u8 tid;
  2424. num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
  2425. HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
  2426. peer_id = __le16_to_cpu(rx->hdr.peer_id);
  2427. tid = MS(rx->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID);
  2428. mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
  2429. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
  2430. rx, struct_size(rx, mpdu_ranges, num_mpdu_ranges));
  2431. for (i = 0; i < num_mpdu_ranges; i++)
  2432. mpdu_count += mpdu_ranges[i].mpdu_count;
  2433. atomic_add(mpdu_count, &htt->num_mpdus_ready);
  2434. ath10k_sta_update_rx_tid_stats_ampdu(ar, peer_id, tid, mpdu_ranges,
  2435. num_mpdu_ranges);
  2436. }
  2437. static void ath10k_htt_rx_tx_compl_ind(struct ath10k *ar,
  2438. struct sk_buff *skb)
  2439. {
  2440. struct ath10k_htt *htt = &ar->htt;
  2441. struct htt_resp *resp = (struct htt_resp *)skb->data;
  2442. struct htt_tx_done tx_done = {};
  2443. int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
  2444. __le16 msdu_id, *msdus;
  2445. bool rssi_enabled = false;
  2446. u8 msdu_count = 0, num_airtime_records, tid;
  2447. int i, htt_pad = 0;
  2448. struct htt_data_tx_compl_ppdu_dur *ppdu_info;
  2449. struct ath10k_peer *peer;
  2450. u16 ppdu_info_offset = 0, peer_id;
  2451. u32 tx_duration;
  2452. switch (status) {
  2453. case HTT_DATA_TX_STATUS_NO_ACK:
  2454. tx_done.status = HTT_TX_COMPL_STATE_NOACK;
  2455. break;
  2456. case HTT_DATA_TX_STATUS_OK:
  2457. tx_done.status = HTT_TX_COMPL_STATE_ACK;
  2458. break;
  2459. case HTT_DATA_TX_STATUS_DISCARD:
  2460. case HTT_DATA_TX_STATUS_POSTPONE:
  2461. tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
  2462. break;
  2463. default:
  2464. ath10k_warn(ar, "unhandled tx completion status %d\n", status);
  2465. tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
  2466. break;
  2467. }
  2468. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
  2469. resp->data_tx_completion.num_msdus);
  2470. msdu_count = resp->data_tx_completion.num_msdus;
  2471. msdus = resp->data_tx_completion.msdus;
  2472. rssi_enabled = ath10k_is_rssi_enable(&ar->hw_params, resp);
  2473. if (rssi_enabled)
  2474. htt_pad = ath10k_tx_data_rssi_get_pad_bytes(&ar->hw_params,
  2475. resp);
  2476. for (i = 0; i < msdu_count; i++) {
  2477. msdu_id = msdus[i];
  2478. tx_done.msdu_id = __le16_to_cpu(msdu_id);
  2479. if (rssi_enabled) {
  2480. /* Total no of MSDUs should be even,
  2481. * if odd MSDUs are sent firmware fills
  2482. * last msdu id with 0xffff
  2483. */
  2484. if (msdu_count & 0x01) {
  2485. msdu_id = msdus[msdu_count + i + 1 + htt_pad];
  2486. tx_done.ack_rssi = __le16_to_cpu(msdu_id);
  2487. } else {
  2488. msdu_id = msdus[msdu_count + i + htt_pad];
  2489. tx_done.ack_rssi = __le16_to_cpu(msdu_id);
  2490. }
  2491. }
  2492. /* kfifo_put: In practice firmware shouldn't fire off per-CE
  2493. * interrupt and main interrupt (MSI/-X range case) for the same
  2494. * HTC service so it should be safe to use kfifo_put w/o lock.
  2495. *
  2496. * From kfifo_put() documentation:
  2497. * Note that with only one concurrent reader and one concurrent
  2498. * writer, you don't need extra locking to use these macro.
  2499. */
  2500. if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL) {
  2501. ath10k_txrx_tx_unref(htt, &tx_done);
  2502. } else if (!kfifo_put(&htt->txdone_fifo, tx_done)) {
  2503. ath10k_warn(ar, "txdone fifo overrun, msdu_id %d status %d\n",
  2504. tx_done.msdu_id, tx_done.status);
  2505. ath10k_txrx_tx_unref(htt, &tx_done);
  2506. }
  2507. }
  2508. if (!(resp->data_tx_completion.flags2 & HTT_TX_CMPL_FLAG_PPDU_DURATION_PRESENT))
  2509. return;
  2510. ppdu_info_offset = (msdu_count & 0x01) ? msdu_count + 1 : msdu_count;
  2511. if (rssi_enabled)
  2512. ppdu_info_offset += ppdu_info_offset;
  2513. if (resp->data_tx_completion.flags2 &
  2514. (HTT_TX_CMPL_FLAG_PPID_PRESENT | HTT_TX_CMPL_FLAG_PA_PRESENT))
  2515. ppdu_info_offset += 2;
  2516. ppdu_info = (struct htt_data_tx_compl_ppdu_dur *)&msdus[ppdu_info_offset];
  2517. num_airtime_records = FIELD_GET(HTT_TX_COMPL_PPDU_DUR_INFO0_NUM_ENTRIES_MASK,
  2518. __le32_to_cpu(ppdu_info->info0));
  2519. for (i = 0; i < num_airtime_records; i++) {
  2520. struct htt_data_tx_ppdu_dur *ppdu_dur;
  2521. u32 info0;
  2522. ppdu_dur = &ppdu_info->ppdu_dur[i];
  2523. info0 = __le32_to_cpu(ppdu_dur->info0);
  2524. peer_id = FIELD_GET(HTT_TX_PPDU_DUR_INFO0_PEER_ID_MASK,
  2525. info0);
  2526. rcu_read_lock();
  2527. spin_lock_bh(&ar->data_lock);
  2528. peer = ath10k_peer_find_by_id(ar, peer_id);
  2529. if (!peer || !peer->sta) {
  2530. spin_unlock_bh(&ar->data_lock);
  2531. rcu_read_unlock();
  2532. continue;
  2533. }
  2534. tid = FIELD_GET(HTT_TX_PPDU_DUR_INFO0_TID_MASK, info0) &
  2535. IEEE80211_QOS_CTL_TID_MASK;
  2536. tx_duration = __le32_to_cpu(ppdu_dur->tx_duration);
  2537. ieee80211_sta_register_airtime(peer->sta, tid, tx_duration, 0);
  2538. spin_unlock_bh(&ar->data_lock);
  2539. rcu_read_unlock();
  2540. }
  2541. }
  2542. static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
  2543. {
  2544. struct htt_rx_addba *ev = &resp->rx_addba;
  2545. struct ath10k_peer *peer;
  2546. struct ath10k_vif *arvif;
  2547. u16 info0, tid, peer_id;
  2548. info0 = __le16_to_cpu(ev->info0);
  2549. tid = MS(info0, HTT_RX_BA_INFO0_TID);
  2550. peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
  2551. ath10k_dbg(ar, ATH10K_DBG_HTT,
  2552. "htt rx addba tid %u peer_id %u size %u\n",
  2553. tid, peer_id, ev->window_size);
  2554. spin_lock_bh(&ar->data_lock);
  2555. peer = ath10k_peer_find_by_id(ar, peer_id);
  2556. if (!peer) {
  2557. ath10k_warn(ar, "received addba event for invalid peer_id: %u\n",
  2558. peer_id);
  2559. spin_unlock_bh(&ar->data_lock);
  2560. return;
  2561. }
  2562. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  2563. if (!arvif) {
  2564. ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
  2565. peer->vdev_id);
  2566. spin_unlock_bh(&ar->data_lock);
  2567. return;
  2568. }
  2569. ath10k_dbg(ar, ATH10K_DBG_HTT,
  2570. "htt rx start rx ba session sta %pM tid %u size %u\n",
  2571. peer->addr, tid, ev->window_size);
  2572. ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
  2573. spin_unlock_bh(&ar->data_lock);
  2574. }
  2575. static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
  2576. {
  2577. struct htt_rx_delba *ev = &resp->rx_delba;
  2578. struct ath10k_peer *peer;
  2579. struct ath10k_vif *arvif;
  2580. u16 info0, tid, peer_id;
  2581. info0 = __le16_to_cpu(ev->info0);
  2582. tid = MS(info0, HTT_RX_BA_INFO0_TID);
  2583. peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
  2584. ath10k_dbg(ar, ATH10K_DBG_HTT,
  2585. "htt rx delba tid %u peer_id %u\n",
  2586. tid, peer_id);
  2587. spin_lock_bh(&ar->data_lock);
  2588. peer = ath10k_peer_find_by_id(ar, peer_id);
  2589. if (!peer) {
  2590. ath10k_warn(ar, "received addba event for invalid peer_id: %u\n",
  2591. peer_id);
  2592. spin_unlock_bh(&ar->data_lock);
  2593. return;
  2594. }
  2595. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  2596. if (!arvif) {
  2597. ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
  2598. peer->vdev_id);
  2599. spin_unlock_bh(&ar->data_lock);
  2600. return;
  2601. }
  2602. ath10k_dbg(ar, ATH10K_DBG_HTT,
  2603. "htt rx stop rx ba session sta %pM tid %u\n",
  2604. peer->addr, tid);
  2605. ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
  2606. spin_unlock_bh(&ar->data_lock);
  2607. }
  2608. static int ath10k_htt_rx_extract_amsdu(struct ath10k_hw_params *hw,
  2609. struct sk_buff_head *list,
  2610. struct sk_buff_head *amsdu)
  2611. {
  2612. struct sk_buff *msdu;
  2613. struct htt_rx_desc *rxd;
  2614. struct rx_msdu_end_common *rxd_msdu_end_common;
  2615. if (skb_queue_empty(list))
  2616. return -ENOBUFS;
  2617. if (WARN_ON(!skb_queue_empty(amsdu)))
  2618. return -EINVAL;
  2619. while ((msdu = __skb_dequeue(list))) {
  2620. __skb_queue_tail(amsdu, msdu);
  2621. rxd = HTT_RX_BUF_TO_RX_DESC(hw,
  2622. (void *)msdu->data -
  2623. hw->rx_desc_ops->rx_desc_size);
  2624. rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
  2625. if (rxd_msdu_end_common->info0 &
  2626. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))
  2627. break;
  2628. }
  2629. msdu = skb_peek_tail(amsdu);
  2630. rxd = HTT_RX_BUF_TO_RX_DESC(hw,
  2631. (void *)msdu->data - hw->rx_desc_ops->rx_desc_size);
  2632. rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
  2633. if (!(rxd_msdu_end_common->info0 &
  2634. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) {
  2635. skb_queue_splice_init(amsdu, list);
  2636. return -EAGAIN;
  2637. }
  2638. return 0;
  2639. }
  2640. static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status,
  2641. struct sk_buff *skb)
  2642. {
  2643. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2644. if (!ieee80211_has_protected(hdr->frame_control))
  2645. return;
  2646. /* Offloaded frames are already decrypted but firmware insists they are
  2647. * protected in the 802.11 header. Strip the flag. Otherwise mac80211
  2648. * will drop the frame.
  2649. */
  2650. hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
  2651. status->flag |= RX_FLAG_DECRYPTED |
  2652. RX_FLAG_IV_STRIPPED |
  2653. RX_FLAG_MMIC_STRIPPED;
  2654. }
  2655. static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar,
  2656. struct sk_buff_head *list)
  2657. {
  2658. struct ath10k_htt *htt = &ar->htt;
  2659. struct ieee80211_rx_status *status = &htt->rx_status;
  2660. struct htt_rx_offload_msdu *rx;
  2661. struct sk_buff *msdu;
  2662. size_t offset;
  2663. while ((msdu = __skb_dequeue(list))) {
  2664. /* Offloaded frames don't have Rx descriptor. Instead they have
  2665. * a short meta information header.
  2666. */
  2667. rx = (void *)msdu->data;
  2668. skb_put(msdu, sizeof(*rx));
  2669. skb_pull(msdu, sizeof(*rx));
  2670. if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) {
  2671. ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n");
  2672. dev_kfree_skb_any(msdu);
  2673. continue;
  2674. }
  2675. skb_put(msdu, __le16_to_cpu(rx->msdu_len));
  2676. /* Offloaded rx header length isn't multiple of 2 nor 4 so the
  2677. * actual payload is unaligned. Align the frame. Otherwise
  2678. * mac80211 complains. This shouldn't reduce performance much
  2679. * because these offloaded frames are rare.
  2680. */
  2681. offset = 4 - ((unsigned long)msdu->data & 3);
  2682. skb_put(msdu, offset);
  2683. memmove(msdu->data + offset, msdu->data, msdu->len);
  2684. skb_pull(msdu, offset);
  2685. /* FIXME: The frame is NWifi. Re-construct QoS Control
  2686. * if possible later.
  2687. */
  2688. memset(status, 0, sizeof(*status));
  2689. status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  2690. ath10k_htt_rx_h_rx_offload_prot(status, msdu);
  2691. ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id);
  2692. ath10k_htt_rx_h_queue_msdu(ar, status, msdu);
  2693. }
  2694. }
  2695. static int ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb)
  2696. {
  2697. struct ath10k_htt *htt = &ar->htt;
  2698. struct htt_resp *resp = (void *)skb->data;
  2699. struct ieee80211_rx_status *status = &htt->rx_status;
  2700. struct sk_buff_head list;
  2701. struct sk_buff_head amsdu;
  2702. u16 peer_id;
  2703. u16 msdu_count;
  2704. u8 vdev_id;
  2705. u8 tid;
  2706. bool offload;
  2707. bool frag;
  2708. int ret;
  2709. lockdep_assert_held(&htt->rx_ring.lock);
  2710. if (htt->rx_confused)
  2711. return -EIO;
  2712. skb_pull(skb, sizeof(resp->hdr));
  2713. skb_pull(skb, sizeof(resp->rx_in_ord_ind));
  2714. peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id);
  2715. msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count);
  2716. vdev_id = resp->rx_in_ord_ind.vdev_id;
  2717. tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID);
  2718. offload = !!(resp->rx_in_ord_ind.info &
  2719. HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
  2720. frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK);
  2721. ath10k_dbg(ar, ATH10K_DBG_HTT,
  2722. "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n",
  2723. vdev_id, peer_id, tid, offload, frag, msdu_count);
  2724. if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs32)) {
  2725. ath10k_warn(ar, "dropping invalid in order rx indication\n");
  2726. return -EINVAL;
  2727. }
  2728. /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later
  2729. * extracted and processed.
  2730. */
  2731. __skb_queue_head_init(&list);
  2732. if (ar->hw_params.target_64bit)
  2733. ret = ath10k_htt_rx_pop_paddr64_list(htt, &resp->rx_in_ord_ind,
  2734. &list);
  2735. else
  2736. ret = ath10k_htt_rx_pop_paddr32_list(htt, &resp->rx_in_ord_ind,
  2737. &list);
  2738. if (ret < 0) {
  2739. ath10k_warn(ar, "failed to pop paddr list: %d\n", ret);
  2740. htt->rx_confused = true;
  2741. return -EIO;
  2742. }
  2743. /* Offloaded frames are very different and need to be handled
  2744. * separately.
  2745. */
  2746. if (offload)
  2747. ath10k_htt_rx_h_rx_offload(ar, &list);
  2748. while (!skb_queue_empty(&list)) {
  2749. __skb_queue_head_init(&amsdu);
  2750. ret = ath10k_htt_rx_extract_amsdu(&ar->hw_params, &list, &amsdu);
  2751. switch (ret) {
  2752. case 0:
  2753. /* Note: The in-order indication may report interleaved
  2754. * frames from different PPDUs meaning reported rx rate
  2755. * to mac80211 isn't accurate/reliable. It's still
  2756. * better to report something than nothing though. This
  2757. * should still give an idea about rx rate to the user.
  2758. */
  2759. ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id);
  2760. ath10k_htt_rx_h_filter(ar, &amsdu, status, NULL);
  2761. ath10k_htt_rx_h_mpdu(ar, &amsdu, status, false, NULL,
  2762. NULL, peer_id, frag);
  2763. ath10k_htt_rx_h_enqueue(ar, &amsdu, status);
  2764. break;
  2765. case -EAGAIN:
  2766. fallthrough;
  2767. default:
  2768. /* Should not happen. */
  2769. ath10k_warn(ar, "failed to extract amsdu: %d\n", ret);
  2770. htt->rx_confused = true;
  2771. __skb_queue_purge(&list);
  2772. return -EIO;
  2773. }
  2774. }
  2775. return ret;
  2776. }
  2777. static void ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k *ar,
  2778. const __le32 *resp_ids,
  2779. int num_resp_ids)
  2780. {
  2781. int i;
  2782. u32 resp_id;
  2783. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm num_resp_ids %d\n",
  2784. num_resp_ids);
  2785. for (i = 0; i < num_resp_ids; i++) {
  2786. resp_id = le32_to_cpu(resp_ids[i]);
  2787. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm resp_id %u\n",
  2788. resp_id);
  2789. /* TODO: free resp_id */
  2790. }
  2791. }
  2792. static void ath10k_htt_rx_tx_fetch_ind(struct ath10k *ar, struct sk_buff *skb)
  2793. {
  2794. struct ieee80211_hw *hw = ar->hw;
  2795. struct ieee80211_txq *txq;
  2796. struct htt_resp *resp = (struct htt_resp *)skb->data;
  2797. struct htt_tx_fetch_record *record;
  2798. size_t len;
  2799. size_t max_num_bytes;
  2800. size_t max_num_msdus;
  2801. size_t num_bytes;
  2802. size_t num_msdus;
  2803. const __le32 *resp_ids;
  2804. u16 num_records;
  2805. u16 num_resp_ids;
  2806. u16 peer_id;
  2807. u8 tid;
  2808. int ret;
  2809. int i;
  2810. bool may_tx;
  2811. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind\n");
  2812. len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_ind);
  2813. if (unlikely(skb->len < len)) {
  2814. ath10k_warn(ar, "received corrupted tx_fetch_ind event: buffer too short\n");
  2815. return;
  2816. }
  2817. num_records = le16_to_cpu(resp->tx_fetch_ind.num_records);
  2818. num_resp_ids = le16_to_cpu(resp->tx_fetch_ind.num_resp_ids);
  2819. len += sizeof(resp->tx_fetch_ind.records[0]) * num_records;
  2820. len += sizeof(resp->tx_fetch_ind.resp_ids[0]) * num_resp_ids;
  2821. if (unlikely(skb->len < len)) {
  2822. ath10k_warn(ar, "received corrupted tx_fetch_ind event: too many records/resp_ids\n");
  2823. return;
  2824. }
  2825. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind num records %u num resps %u seq %u\n",
  2826. num_records, num_resp_ids,
  2827. le16_to_cpu(resp->tx_fetch_ind.fetch_seq_num));
  2828. if (!ar->htt.tx_q_state.enabled) {
  2829. ath10k_warn(ar, "received unexpected tx_fetch_ind event: not enabled\n");
  2830. return;
  2831. }
  2832. if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH) {
  2833. ath10k_warn(ar, "received unexpected tx_fetch_ind event: in push mode\n");
  2834. return;
  2835. }
  2836. rcu_read_lock();
  2837. for (i = 0; i < num_records; i++) {
  2838. record = &resp->tx_fetch_ind.records[i];
  2839. peer_id = MS(le16_to_cpu(record->info),
  2840. HTT_TX_FETCH_RECORD_INFO_PEER_ID);
  2841. tid = MS(le16_to_cpu(record->info),
  2842. HTT_TX_FETCH_RECORD_INFO_TID);
  2843. max_num_msdus = le16_to_cpu(record->num_msdus);
  2844. max_num_bytes = le32_to_cpu(record->num_bytes);
  2845. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch record %i peer_id %u tid %u msdus %zu bytes %zu\n",
  2846. i, peer_id, tid, max_num_msdus, max_num_bytes);
  2847. if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
  2848. unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
  2849. ath10k_warn(ar, "received out of range peer_id %u tid %u\n",
  2850. peer_id, tid);
  2851. continue;
  2852. }
  2853. spin_lock_bh(&ar->data_lock);
  2854. txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
  2855. spin_unlock_bh(&ar->data_lock);
  2856. /* It is okay to release the lock and use txq because RCU read
  2857. * lock is held.
  2858. */
  2859. if (unlikely(!txq)) {
  2860. ath10k_warn(ar, "failed to lookup txq for peer_id %u tid %u\n",
  2861. peer_id, tid);
  2862. continue;
  2863. }
  2864. num_msdus = 0;
  2865. num_bytes = 0;
  2866. ieee80211_txq_schedule_start(hw, txq->ac);
  2867. may_tx = ieee80211_txq_may_transmit(hw, txq);
  2868. while (num_msdus < max_num_msdus &&
  2869. num_bytes < max_num_bytes) {
  2870. if (!may_tx)
  2871. break;
  2872. ret = ath10k_mac_tx_push_txq(hw, txq);
  2873. if (ret < 0)
  2874. break;
  2875. num_msdus++;
  2876. num_bytes += ret;
  2877. }
  2878. ieee80211_return_txq(hw, txq, false);
  2879. ieee80211_txq_schedule_end(hw, txq->ac);
  2880. record->num_msdus = cpu_to_le16(num_msdus);
  2881. record->num_bytes = cpu_to_le32(num_bytes);
  2882. ath10k_htt_tx_txq_recalc(hw, txq);
  2883. }
  2884. rcu_read_unlock();
  2885. resp_ids = ath10k_htt_get_tx_fetch_ind_resp_ids(&resp->tx_fetch_ind);
  2886. ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, resp_ids, num_resp_ids);
  2887. ret = ath10k_htt_tx_fetch_resp(ar,
  2888. resp->tx_fetch_ind.token,
  2889. resp->tx_fetch_ind.fetch_seq_num,
  2890. resp->tx_fetch_ind.records,
  2891. num_records);
  2892. if (unlikely(ret)) {
  2893. ath10k_warn(ar, "failed to submit tx fetch resp for token 0x%08x: %d\n",
  2894. le32_to_cpu(resp->tx_fetch_ind.token), ret);
  2895. /* FIXME: request fw restart */
  2896. }
  2897. ath10k_htt_tx_txq_sync(ar);
  2898. }
  2899. static void ath10k_htt_rx_tx_fetch_confirm(struct ath10k *ar,
  2900. struct sk_buff *skb)
  2901. {
  2902. const struct htt_resp *resp = (void *)skb->data;
  2903. size_t len;
  2904. int num_resp_ids;
  2905. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm\n");
  2906. len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_confirm);
  2907. if (unlikely(skb->len < len)) {
  2908. ath10k_warn(ar, "received corrupted tx_fetch_confirm event: buffer too short\n");
  2909. return;
  2910. }
  2911. num_resp_ids = le16_to_cpu(resp->tx_fetch_confirm.num_resp_ids);
  2912. len += sizeof(resp->tx_fetch_confirm.resp_ids[0]) * num_resp_ids;
  2913. if (unlikely(skb->len < len)) {
  2914. ath10k_warn(ar, "received corrupted tx_fetch_confirm event: resp_ids buffer overflow\n");
  2915. return;
  2916. }
  2917. ath10k_htt_rx_tx_fetch_resp_id_confirm(ar,
  2918. resp->tx_fetch_confirm.resp_ids,
  2919. num_resp_ids);
  2920. }
  2921. static void ath10k_htt_rx_tx_mode_switch_ind(struct ath10k *ar,
  2922. struct sk_buff *skb)
  2923. {
  2924. const struct htt_resp *resp = (void *)skb->data;
  2925. const struct htt_tx_mode_switch_record *record;
  2926. struct ieee80211_txq *txq;
  2927. struct ath10k_txq *artxq;
  2928. size_t len;
  2929. size_t num_records;
  2930. enum htt_tx_mode_switch_mode mode;
  2931. bool enable;
  2932. u16 info0;
  2933. u16 info1;
  2934. u16 threshold;
  2935. u16 peer_id;
  2936. u8 tid;
  2937. int i;
  2938. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx mode switch ind\n");
  2939. len = sizeof(resp->hdr) + sizeof(resp->tx_mode_switch_ind);
  2940. if (unlikely(skb->len < len)) {
  2941. ath10k_warn(ar, "received corrupted tx_mode_switch_ind event: buffer too short\n");
  2942. return;
  2943. }
  2944. info0 = le16_to_cpu(resp->tx_mode_switch_ind.info0);
  2945. info1 = le16_to_cpu(resp->tx_mode_switch_ind.info1);
  2946. enable = !!(info0 & HTT_TX_MODE_SWITCH_IND_INFO0_ENABLE);
  2947. num_records = MS(info0, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
  2948. mode = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_MODE);
  2949. threshold = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
  2950. ath10k_dbg(ar, ATH10K_DBG_HTT,
  2951. "htt rx tx mode switch ind info0 0x%04x info1 0x%04x enable %d num records %zd mode %d threshold %u\n",
  2952. info0, info1, enable, num_records, mode, threshold);
  2953. len += sizeof(resp->tx_mode_switch_ind.records[0]) * num_records;
  2954. if (unlikely(skb->len < len)) {
  2955. ath10k_warn(ar, "received corrupted tx_mode_switch_mode_ind event: too many records\n");
  2956. return;
  2957. }
  2958. switch (mode) {
  2959. case HTT_TX_MODE_SWITCH_PUSH:
  2960. case HTT_TX_MODE_SWITCH_PUSH_PULL:
  2961. break;
  2962. default:
  2963. ath10k_warn(ar, "received invalid tx_mode_switch_mode_ind mode %d, ignoring\n",
  2964. mode);
  2965. return;
  2966. }
  2967. if (!enable)
  2968. return;
  2969. ar->htt.tx_q_state.enabled = enable;
  2970. ar->htt.tx_q_state.mode = mode;
  2971. ar->htt.tx_q_state.num_push_allowed = threshold;
  2972. rcu_read_lock();
  2973. for (i = 0; i < num_records; i++) {
  2974. record = &resp->tx_mode_switch_ind.records[i];
  2975. info0 = le16_to_cpu(record->info0);
  2976. peer_id = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_PEER_ID);
  2977. tid = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_TID);
  2978. if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
  2979. unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
  2980. ath10k_warn(ar, "received out of range peer_id %u tid %u\n",
  2981. peer_id, tid);
  2982. continue;
  2983. }
  2984. spin_lock_bh(&ar->data_lock);
  2985. txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
  2986. spin_unlock_bh(&ar->data_lock);
  2987. /* It is okay to release the lock and use txq because RCU read
  2988. * lock is held.
  2989. */
  2990. if (unlikely(!txq)) {
  2991. ath10k_warn(ar, "failed to lookup txq for peer_id %u tid %u\n",
  2992. peer_id, tid);
  2993. continue;
  2994. }
  2995. spin_lock_bh(&ar->htt.tx_lock);
  2996. artxq = (void *)txq->drv_priv;
  2997. artxq->num_push_allowed = le16_to_cpu(record->num_max_msdus);
  2998. spin_unlock_bh(&ar->htt.tx_lock);
  2999. }
  3000. rcu_read_unlock();
  3001. ath10k_mac_tx_push_pending(ar);
  3002. }
  3003. void ath10k_htt_htc_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
  3004. {
  3005. bool release;
  3006. release = ath10k_htt_t2h_msg_handler(ar, skb);
  3007. /* Free the indication buffer */
  3008. if (release)
  3009. dev_kfree_skb_any(skb);
  3010. }
  3011. static inline s8 ath10k_get_legacy_rate_idx(struct ath10k *ar, u8 rate)
  3012. {
  3013. static const u8 legacy_rates[] = {1, 2, 5, 11, 6, 9, 12,
  3014. 18, 24, 36, 48, 54};
  3015. int i;
  3016. for (i = 0; i < ARRAY_SIZE(legacy_rates); i++) {
  3017. if (rate == legacy_rates[i])
  3018. return i;
  3019. }
  3020. ath10k_warn(ar, "Invalid legacy rate %d peer stats", rate);
  3021. return -EINVAL;
  3022. }
  3023. static void
  3024. ath10k_accumulate_per_peer_tx_stats(struct ath10k *ar,
  3025. struct ath10k_sta *arsta,
  3026. struct ath10k_per_peer_tx_stats *pstats,
  3027. s8 legacy_rate_idx)
  3028. {
  3029. struct rate_info *txrate = &arsta->txrate;
  3030. struct ath10k_htt_tx_stats *tx_stats;
  3031. int idx, ht_idx, gi, mcs, bw, nss;
  3032. unsigned long flags;
  3033. if (!arsta->tx_stats)
  3034. return;
  3035. tx_stats = arsta->tx_stats;
  3036. flags = txrate->flags;
  3037. gi = test_bit(ATH10K_RATE_INFO_FLAGS_SGI_BIT, &flags);
  3038. mcs = ATH10K_HW_MCS_RATE(pstats->ratecode);
  3039. bw = txrate->bw;
  3040. nss = txrate->nss;
  3041. ht_idx = mcs + (nss - 1) * 8;
  3042. idx = mcs * 8 + 8 * 10 * (nss - 1);
  3043. idx += bw * 2 + gi;
  3044. #define STATS_OP_FMT(name) tx_stats->stats[ATH10K_STATS_TYPE_##name]
  3045. if (txrate->flags & RATE_INFO_FLAGS_VHT_MCS) {
  3046. STATS_OP_FMT(SUCC).vht[0][mcs] += pstats->succ_bytes;
  3047. STATS_OP_FMT(SUCC).vht[1][mcs] += pstats->succ_pkts;
  3048. STATS_OP_FMT(FAIL).vht[0][mcs] += pstats->failed_bytes;
  3049. STATS_OP_FMT(FAIL).vht[1][mcs] += pstats->failed_pkts;
  3050. STATS_OP_FMT(RETRY).vht[0][mcs] += pstats->retry_bytes;
  3051. STATS_OP_FMT(RETRY).vht[1][mcs] += pstats->retry_pkts;
  3052. } else if (txrate->flags & RATE_INFO_FLAGS_MCS) {
  3053. STATS_OP_FMT(SUCC).ht[0][ht_idx] += pstats->succ_bytes;
  3054. STATS_OP_FMT(SUCC).ht[1][ht_idx] += pstats->succ_pkts;
  3055. STATS_OP_FMT(FAIL).ht[0][ht_idx] += pstats->failed_bytes;
  3056. STATS_OP_FMT(FAIL).ht[1][ht_idx] += pstats->failed_pkts;
  3057. STATS_OP_FMT(RETRY).ht[0][ht_idx] += pstats->retry_bytes;
  3058. STATS_OP_FMT(RETRY).ht[1][ht_idx] += pstats->retry_pkts;
  3059. } else {
  3060. mcs = legacy_rate_idx;
  3061. STATS_OP_FMT(SUCC).legacy[0][mcs] += pstats->succ_bytes;
  3062. STATS_OP_FMT(SUCC).legacy[1][mcs] += pstats->succ_pkts;
  3063. STATS_OP_FMT(FAIL).legacy[0][mcs] += pstats->failed_bytes;
  3064. STATS_OP_FMT(FAIL).legacy[1][mcs] += pstats->failed_pkts;
  3065. STATS_OP_FMT(RETRY).legacy[0][mcs] += pstats->retry_bytes;
  3066. STATS_OP_FMT(RETRY).legacy[1][mcs] += pstats->retry_pkts;
  3067. }
  3068. if (ATH10K_HW_AMPDU(pstats->flags)) {
  3069. tx_stats->ba_fails += ATH10K_HW_BA_FAIL(pstats->flags);
  3070. if (txrate->flags & RATE_INFO_FLAGS_MCS) {
  3071. STATS_OP_FMT(AMPDU).ht[0][ht_idx] +=
  3072. pstats->succ_bytes + pstats->retry_bytes;
  3073. STATS_OP_FMT(AMPDU).ht[1][ht_idx] +=
  3074. pstats->succ_pkts + pstats->retry_pkts;
  3075. } else {
  3076. STATS_OP_FMT(AMPDU).vht[0][mcs] +=
  3077. pstats->succ_bytes + pstats->retry_bytes;
  3078. STATS_OP_FMT(AMPDU).vht[1][mcs] +=
  3079. pstats->succ_pkts + pstats->retry_pkts;
  3080. }
  3081. STATS_OP_FMT(AMPDU).bw[0][bw] +=
  3082. pstats->succ_bytes + pstats->retry_bytes;
  3083. STATS_OP_FMT(AMPDU).nss[0][nss - 1] +=
  3084. pstats->succ_bytes + pstats->retry_bytes;
  3085. STATS_OP_FMT(AMPDU).gi[0][gi] +=
  3086. pstats->succ_bytes + pstats->retry_bytes;
  3087. STATS_OP_FMT(AMPDU).rate_table[0][idx] +=
  3088. pstats->succ_bytes + pstats->retry_bytes;
  3089. STATS_OP_FMT(AMPDU).bw[1][bw] +=
  3090. pstats->succ_pkts + pstats->retry_pkts;
  3091. STATS_OP_FMT(AMPDU).nss[1][nss - 1] +=
  3092. pstats->succ_pkts + pstats->retry_pkts;
  3093. STATS_OP_FMT(AMPDU).gi[1][gi] +=
  3094. pstats->succ_pkts + pstats->retry_pkts;
  3095. STATS_OP_FMT(AMPDU).rate_table[1][idx] +=
  3096. pstats->succ_pkts + pstats->retry_pkts;
  3097. } else {
  3098. tx_stats->ack_fails +=
  3099. ATH10K_HW_BA_FAIL(pstats->flags);
  3100. }
  3101. STATS_OP_FMT(SUCC).bw[0][bw] += pstats->succ_bytes;
  3102. STATS_OP_FMT(SUCC).nss[0][nss - 1] += pstats->succ_bytes;
  3103. STATS_OP_FMT(SUCC).gi[0][gi] += pstats->succ_bytes;
  3104. STATS_OP_FMT(SUCC).bw[1][bw] += pstats->succ_pkts;
  3105. STATS_OP_FMT(SUCC).nss[1][nss - 1] += pstats->succ_pkts;
  3106. STATS_OP_FMT(SUCC).gi[1][gi] += pstats->succ_pkts;
  3107. STATS_OP_FMT(FAIL).bw[0][bw] += pstats->failed_bytes;
  3108. STATS_OP_FMT(FAIL).nss[0][nss - 1] += pstats->failed_bytes;
  3109. STATS_OP_FMT(FAIL).gi[0][gi] += pstats->failed_bytes;
  3110. STATS_OP_FMT(FAIL).bw[1][bw] += pstats->failed_pkts;
  3111. STATS_OP_FMT(FAIL).nss[1][nss - 1] += pstats->failed_pkts;
  3112. STATS_OP_FMT(FAIL).gi[1][gi] += pstats->failed_pkts;
  3113. STATS_OP_FMT(RETRY).bw[0][bw] += pstats->retry_bytes;
  3114. STATS_OP_FMT(RETRY).nss[0][nss - 1] += pstats->retry_bytes;
  3115. STATS_OP_FMT(RETRY).gi[0][gi] += pstats->retry_bytes;
  3116. STATS_OP_FMT(RETRY).bw[1][bw] += pstats->retry_pkts;
  3117. STATS_OP_FMT(RETRY).nss[1][nss - 1] += pstats->retry_pkts;
  3118. STATS_OP_FMT(RETRY).gi[1][gi] += pstats->retry_pkts;
  3119. if (txrate->flags >= RATE_INFO_FLAGS_MCS) {
  3120. STATS_OP_FMT(SUCC).rate_table[0][idx] += pstats->succ_bytes;
  3121. STATS_OP_FMT(SUCC).rate_table[1][idx] += pstats->succ_pkts;
  3122. STATS_OP_FMT(FAIL).rate_table[0][idx] += pstats->failed_bytes;
  3123. STATS_OP_FMT(FAIL).rate_table[1][idx] += pstats->failed_pkts;
  3124. STATS_OP_FMT(RETRY).rate_table[0][idx] += pstats->retry_bytes;
  3125. STATS_OP_FMT(RETRY).rate_table[1][idx] += pstats->retry_pkts;
  3126. }
  3127. tx_stats->tx_duration += pstats->duration;
  3128. }
  3129. static void
  3130. ath10k_update_per_peer_tx_stats(struct ath10k *ar,
  3131. struct ieee80211_sta *sta,
  3132. struct ath10k_per_peer_tx_stats *peer_stats)
  3133. {
  3134. struct ath10k_sta *arsta = (struct ath10k_sta *)sta->drv_priv;
  3135. struct ieee80211_chanctx_conf *conf = NULL;
  3136. u8 rate = 0, sgi;
  3137. s8 rate_idx = 0;
  3138. bool skip_auto_rate;
  3139. struct rate_info txrate;
  3140. lockdep_assert_held(&ar->data_lock);
  3141. txrate.flags = ATH10K_HW_PREAMBLE(peer_stats->ratecode);
  3142. txrate.bw = ATH10K_HW_BW(peer_stats->flags);
  3143. txrate.nss = ATH10K_HW_NSS(peer_stats->ratecode);
  3144. txrate.mcs = ATH10K_HW_MCS_RATE(peer_stats->ratecode);
  3145. sgi = ATH10K_HW_GI(peer_stats->flags);
  3146. skip_auto_rate = ATH10K_FW_SKIPPED_RATE_CTRL(peer_stats->flags);
  3147. /* Firmware's rate control skips broadcast/management frames,
  3148. * if host has configure fixed rates and in some other special cases.
  3149. */
  3150. if (skip_auto_rate)
  3151. return;
  3152. if (txrate.flags == WMI_RATE_PREAMBLE_VHT && txrate.mcs > 9) {
  3153. ath10k_warn(ar, "Invalid VHT mcs %d peer stats", txrate.mcs);
  3154. return;
  3155. }
  3156. if (txrate.flags == WMI_RATE_PREAMBLE_HT &&
  3157. (txrate.mcs > 7 || txrate.nss < 1)) {
  3158. ath10k_warn(ar, "Invalid HT mcs %d nss %d peer stats",
  3159. txrate.mcs, txrate.nss);
  3160. return;
  3161. }
  3162. memset(&arsta->txrate, 0, sizeof(arsta->txrate));
  3163. memset(&arsta->tx_info.status, 0, sizeof(arsta->tx_info.status));
  3164. if (txrate.flags == WMI_RATE_PREAMBLE_CCK ||
  3165. txrate.flags == WMI_RATE_PREAMBLE_OFDM) {
  3166. rate = ATH10K_HW_LEGACY_RATE(peer_stats->ratecode);
  3167. /* This is hacky, FW sends CCK rate 5.5Mbps as 6 */
  3168. if (rate == 6 && txrate.flags == WMI_RATE_PREAMBLE_CCK)
  3169. rate = 5;
  3170. rate_idx = ath10k_get_legacy_rate_idx(ar, rate);
  3171. if (rate_idx < 0)
  3172. return;
  3173. arsta->txrate.legacy = rate;
  3174. } else if (txrate.flags == WMI_RATE_PREAMBLE_HT) {
  3175. arsta->txrate.flags = RATE_INFO_FLAGS_MCS;
  3176. arsta->txrate.mcs = txrate.mcs + 8 * (txrate.nss - 1);
  3177. } else {
  3178. arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS;
  3179. arsta->txrate.mcs = txrate.mcs;
  3180. }
  3181. switch (txrate.flags) {
  3182. case WMI_RATE_PREAMBLE_OFDM:
  3183. if (arsta->arvif && arsta->arvif->vif)
  3184. conf = rcu_dereference(arsta->arvif->vif->bss_conf.chanctx_conf);
  3185. if (conf && conf->def.chan->band == NL80211_BAND_5GHZ)
  3186. arsta->tx_info.status.rates[0].idx = rate_idx - 4;
  3187. break;
  3188. case WMI_RATE_PREAMBLE_CCK:
  3189. arsta->tx_info.status.rates[0].idx = rate_idx;
  3190. if (sgi)
  3191. arsta->tx_info.status.rates[0].flags |=
  3192. (IEEE80211_TX_RC_USE_SHORT_PREAMBLE |
  3193. IEEE80211_TX_RC_SHORT_GI);
  3194. break;
  3195. case WMI_RATE_PREAMBLE_HT:
  3196. arsta->tx_info.status.rates[0].idx =
  3197. txrate.mcs + ((txrate.nss - 1) * 8);
  3198. if (sgi)
  3199. arsta->tx_info.status.rates[0].flags |=
  3200. IEEE80211_TX_RC_SHORT_GI;
  3201. arsta->tx_info.status.rates[0].flags |= IEEE80211_TX_RC_MCS;
  3202. break;
  3203. case WMI_RATE_PREAMBLE_VHT:
  3204. ieee80211_rate_set_vht(&arsta->tx_info.status.rates[0],
  3205. txrate.mcs, txrate.nss);
  3206. if (sgi)
  3207. arsta->tx_info.status.rates[0].flags |=
  3208. IEEE80211_TX_RC_SHORT_GI;
  3209. arsta->tx_info.status.rates[0].flags |= IEEE80211_TX_RC_VHT_MCS;
  3210. break;
  3211. }
  3212. arsta->txrate.nss = txrate.nss;
  3213. arsta->txrate.bw = ath10k_bw_to_mac80211_bw(txrate.bw);
  3214. arsta->last_tx_bitrate = cfg80211_calculate_bitrate(&arsta->txrate);
  3215. if (sgi)
  3216. arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
  3217. switch (arsta->txrate.bw) {
  3218. case RATE_INFO_BW_40:
  3219. arsta->tx_info.status.rates[0].flags |=
  3220. IEEE80211_TX_RC_40_MHZ_WIDTH;
  3221. break;
  3222. case RATE_INFO_BW_80:
  3223. arsta->tx_info.status.rates[0].flags |=
  3224. IEEE80211_TX_RC_80_MHZ_WIDTH;
  3225. break;
  3226. case RATE_INFO_BW_160:
  3227. arsta->tx_info.status.rates[0].flags |=
  3228. IEEE80211_TX_RC_160_MHZ_WIDTH;
  3229. break;
  3230. }
  3231. if (peer_stats->succ_pkts) {
  3232. arsta->tx_info.flags = IEEE80211_TX_STAT_ACK;
  3233. arsta->tx_info.status.rates[0].count = 1;
  3234. ieee80211_tx_rate_update(ar->hw, sta, &arsta->tx_info);
  3235. }
  3236. if (ar->htt.disable_tx_comp) {
  3237. arsta->tx_failed += peer_stats->failed_pkts;
  3238. ath10k_dbg(ar, ATH10K_DBG_HTT, "tx failed %d\n",
  3239. arsta->tx_failed);
  3240. }
  3241. arsta->tx_retries += peer_stats->retry_pkts;
  3242. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx retries %d", arsta->tx_retries);
  3243. if (ath10k_debug_is_extd_tx_stats_enabled(ar))
  3244. ath10k_accumulate_per_peer_tx_stats(ar, arsta, peer_stats,
  3245. rate_idx);
  3246. }
  3247. static void ath10k_htt_fetch_peer_stats(struct ath10k *ar,
  3248. struct sk_buff *skb)
  3249. {
  3250. struct htt_resp *resp = (struct htt_resp *)skb->data;
  3251. struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats;
  3252. struct htt_per_peer_tx_stats_ind *tx_stats;
  3253. struct ieee80211_sta *sta;
  3254. struct ath10k_peer *peer;
  3255. int peer_id, i;
  3256. u8 ppdu_len, num_ppdu;
  3257. num_ppdu = resp->peer_tx_stats.num_ppdu;
  3258. ppdu_len = resp->peer_tx_stats.ppdu_len * sizeof(__le32);
  3259. if (skb->len < sizeof(struct htt_resp_hdr) + num_ppdu * ppdu_len) {
  3260. ath10k_warn(ar, "Invalid peer stats buf length %d\n", skb->len);
  3261. return;
  3262. }
  3263. tx_stats = (struct htt_per_peer_tx_stats_ind *)
  3264. (resp->peer_tx_stats.payload);
  3265. peer_id = __le16_to_cpu(tx_stats->peer_id);
  3266. rcu_read_lock();
  3267. spin_lock_bh(&ar->data_lock);
  3268. peer = ath10k_peer_find_by_id(ar, peer_id);
  3269. if (!peer || !peer->sta) {
  3270. ath10k_warn(ar, "Invalid peer id %d peer stats buffer\n",
  3271. peer_id);
  3272. goto out;
  3273. }
  3274. sta = peer->sta;
  3275. for (i = 0; i < num_ppdu; i++) {
  3276. tx_stats = (struct htt_per_peer_tx_stats_ind *)
  3277. (resp->peer_tx_stats.payload + i * ppdu_len);
  3278. p_tx_stats->succ_bytes = __le32_to_cpu(tx_stats->succ_bytes);
  3279. p_tx_stats->retry_bytes = __le32_to_cpu(tx_stats->retry_bytes);
  3280. p_tx_stats->failed_bytes =
  3281. __le32_to_cpu(tx_stats->failed_bytes);
  3282. p_tx_stats->ratecode = tx_stats->ratecode;
  3283. p_tx_stats->flags = tx_stats->flags;
  3284. p_tx_stats->succ_pkts = __le16_to_cpu(tx_stats->succ_pkts);
  3285. p_tx_stats->retry_pkts = __le16_to_cpu(tx_stats->retry_pkts);
  3286. p_tx_stats->failed_pkts = __le16_to_cpu(tx_stats->failed_pkts);
  3287. p_tx_stats->duration = __le16_to_cpu(tx_stats->tx_duration);
  3288. ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats);
  3289. }
  3290. out:
  3291. spin_unlock_bh(&ar->data_lock);
  3292. rcu_read_unlock();
  3293. }
  3294. static void ath10k_fetch_10_2_tx_stats(struct ath10k *ar, u8 *data)
  3295. {
  3296. struct ath10k_pktlog_hdr *hdr = (struct ath10k_pktlog_hdr *)data;
  3297. struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats;
  3298. struct ath10k_10_2_peer_tx_stats *tx_stats;
  3299. struct ieee80211_sta *sta;
  3300. struct ath10k_peer *peer;
  3301. u16 log_type = __le16_to_cpu(hdr->log_type);
  3302. u32 peer_id = 0, i;
  3303. if (log_type != ATH_PKTLOG_TYPE_TX_STAT)
  3304. return;
  3305. tx_stats = (struct ath10k_10_2_peer_tx_stats *)((hdr->payload) +
  3306. ATH10K_10_2_TX_STATS_OFFSET);
  3307. if (!tx_stats->tx_ppdu_cnt)
  3308. return;
  3309. peer_id = tx_stats->peer_id;
  3310. rcu_read_lock();
  3311. spin_lock_bh(&ar->data_lock);
  3312. peer = ath10k_peer_find_by_id(ar, peer_id);
  3313. if (!peer || !peer->sta) {
  3314. ath10k_warn(ar, "Invalid peer id %d in peer stats buffer\n",
  3315. peer_id);
  3316. goto out;
  3317. }
  3318. sta = peer->sta;
  3319. for (i = 0; i < tx_stats->tx_ppdu_cnt; i++) {
  3320. p_tx_stats->succ_bytes =
  3321. __le16_to_cpu(tx_stats->success_bytes[i]);
  3322. p_tx_stats->retry_bytes =
  3323. __le16_to_cpu(tx_stats->retry_bytes[i]);
  3324. p_tx_stats->failed_bytes =
  3325. __le16_to_cpu(tx_stats->failed_bytes[i]);
  3326. p_tx_stats->ratecode = tx_stats->ratecode[i];
  3327. p_tx_stats->flags = tx_stats->flags[i];
  3328. p_tx_stats->succ_pkts = tx_stats->success_pkts[i];
  3329. p_tx_stats->retry_pkts = tx_stats->retry_pkts[i];
  3330. p_tx_stats->failed_pkts = tx_stats->failed_pkts[i];
  3331. ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats);
  3332. }
  3333. spin_unlock_bh(&ar->data_lock);
  3334. rcu_read_unlock();
  3335. return;
  3336. out:
  3337. spin_unlock_bh(&ar->data_lock);
  3338. rcu_read_unlock();
  3339. }
  3340. static int ath10k_htt_rx_pn_len(enum htt_security_types sec_type)
  3341. {
  3342. switch (sec_type) {
  3343. case HTT_SECURITY_TKIP:
  3344. case HTT_SECURITY_TKIP_NOMIC:
  3345. case HTT_SECURITY_AES_CCMP:
  3346. return 48;
  3347. default:
  3348. return 0;
  3349. }
  3350. }
  3351. static void ath10k_htt_rx_sec_ind_handler(struct ath10k *ar,
  3352. struct htt_security_indication *ev)
  3353. {
  3354. enum htt_txrx_sec_cast_type sec_index;
  3355. enum htt_security_types sec_type;
  3356. struct ath10k_peer *peer;
  3357. spin_lock_bh(&ar->data_lock);
  3358. peer = ath10k_peer_find_by_id(ar, __le16_to_cpu(ev->peer_id));
  3359. if (!peer) {
  3360. ath10k_warn(ar, "failed to find peer id %d for security indication",
  3361. __le16_to_cpu(ev->peer_id));
  3362. goto out;
  3363. }
  3364. sec_type = MS(ev->flags, HTT_SECURITY_TYPE);
  3365. if (ev->flags & HTT_SECURITY_IS_UNICAST)
  3366. sec_index = HTT_TXRX_SEC_UCAST;
  3367. else
  3368. sec_index = HTT_TXRX_SEC_MCAST;
  3369. peer->rx_pn[sec_index].sec_type = sec_type;
  3370. peer->rx_pn[sec_index].pn_len = ath10k_htt_rx_pn_len(sec_type);
  3371. memset(peer->tids_last_pn_valid, 0, sizeof(peer->tids_last_pn_valid));
  3372. memset(peer->tids_last_pn, 0, sizeof(peer->tids_last_pn));
  3373. out:
  3374. spin_unlock_bh(&ar->data_lock);
  3375. }
  3376. bool ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
  3377. {
  3378. struct ath10k_htt *htt = &ar->htt;
  3379. struct htt_resp *resp = (struct htt_resp *)skb->data;
  3380. enum htt_t2h_msg_type type;
  3381. /* confirm alignment */
  3382. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  3383. ath10k_warn(ar, "unaligned htt message, expect trouble\n");
  3384. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
  3385. resp->hdr.msg_type);
  3386. if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) {
  3387. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X",
  3388. resp->hdr.msg_type, ar->htt.t2h_msg_types_max);
  3389. return true;
  3390. }
  3391. type = ar->htt.t2h_msg_types[resp->hdr.msg_type];
  3392. switch (type) {
  3393. case HTT_T2H_MSG_TYPE_VERSION_CONF: {
  3394. htt->target_version_major = resp->ver_resp.major;
  3395. htt->target_version_minor = resp->ver_resp.minor;
  3396. complete(&htt->target_version_received);
  3397. break;
  3398. }
  3399. case HTT_T2H_MSG_TYPE_RX_IND:
  3400. if (ar->bus_param.dev_type != ATH10K_DEV_TYPE_HL) {
  3401. ath10k_htt_rx_proc_rx_ind_ll(htt, &resp->rx_ind);
  3402. } else {
  3403. skb_queue_tail(&htt->rx_indication_head, skb);
  3404. return false;
  3405. }
  3406. break;
  3407. case HTT_T2H_MSG_TYPE_PEER_MAP: {
  3408. struct htt_peer_map_event ev = {
  3409. .vdev_id = resp->peer_map.vdev_id,
  3410. .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
  3411. };
  3412. memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
  3413. ath10k_peer_map_event(htt, &ev);
  3414. break;
  3415. }
  3416. case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
  3417. struct htt_peer_unmap_event ev = {
  3418. .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
  3419. };
  3420. ath10k_peer_unmap_event(htt, &ev);
  3421. break;
  3422. }
  3423. case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
  3424. struct htt_tx_done tx_done = {};
  3425. struct ath10k_htt *htt = &ar->htt;
  3426. struct ath10k_htc *htc = &ar->htc;
  3427. struct ath10k_htc_ep *ep = &ar->htc.endpoint[htt->eid];
  3428. int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
  3429. int info = __le32_to_cpu(resp->mgmt_tx_completion.info);
  3430. tx_done.msdu_id = __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
  3431. switch (status) {
  3432. case HTT_MGMT_TX_STATUS_OK:
  3433. tx_done.status = HTT_TX_COMPL_STATE_ACK;
  3434. if (test_bit(WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
  3435. ar->wmi.svc_map) &&
  3436. (resp->mgmt_tx_completion.flags &
  3437. HTT_MGMT_TX_CMPL_FLAG_ACK_RSSI)) {
  3438. tx_done.ack_rssi =
  3439. FIELD_GET(HTT_MGMT_TX_CMPL_INFO_ACK_RSSI_MASK,
  3440. info);
  3441. }
  3442. break;
  3443. case HTT_MGMT_TX_STATUS_RETRY:
  3444. tx_done.status = HTT_TX_COMPL_STATE_NOACK;
  3445. break;
  3446. case HTT_MGMT_TX_STATUS_DROP:
  3447. tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
  3448. break;
  3449. }
  3450. if (htt->disable_tx_comp) {
  3451. spin_lock_bh(&htc->tx_lock);
  3452. ep->tx_credits++;
  3453. spin_unlock_bh(&htc->tx_lock);
  3454. }
  3455. status = ath10k_txrx_tx_unref(htt, &tx_done);
  3456. if (!status) {
  3457. spin_lock_bh(&htt->tx_lock);
  3458. ath10k_htt_tx_mgmt_dec_pending(htt);
  3459. spin_unlock_bh(&htt->tx_lock);
  3460. }
  3461. break;
  3462. }
  3463. case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
  3464. ath10k_htt_rx_tx_compl_ind(htt->ar, skb);
  3465. break;
  3466. case HTT_T2H_MSG_TYPE_SEC_IND: {
  3467. struct ath10k *ar = htt->ar;
  3468. struct htt_security_indication *ev = &resp->security_indication;
  3469. ath10k_htt_rx_sec_ind_handler(ar, ev);
  3470. ath10k_dbg(ar, ATH10K_DBG_HTT,
  3471. "sec ind peer_id %d unicast %d type %d\n",
  3472. __le16_to_cpu(ev->peer_id),
  3473. !!(ev->flags & HTT_SECURITY_IS_UNICAST),
  3474. MS(ev->flags, HTT_SECURITY_TYPE));
  3475. complete(&ar->install_key_done);
  3476. break;
  3477. }
  3478. case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
  3479. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  3480. skb->data, skb->len);
  3481. atomic_inc(&htt->num_mpdus_ready);
  3482. return ath10k_htt_rx_proc_rx_frag_ind(htt,
  3483. &resp->rx_frag_ind,
  3484. skb);
  3485. }
  3486. case HTT_T2H_MSG_TYPE_TEST:
  3487. break;
  3488. case HTT_T2H_MSG_TYPE_STATS_CONF:
  3489. trace_ath10k_htt_stats(ar, skb->data, skb->len);
  3490. break;
  3491. case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
  3492. /* Firmware can return tx frames if it's unable to fully
  3493. * process them and suspects host may be able to fix it. ath10k
  3494. * sends all tx frames as already inspected so this shouldn't
  3495. * happen unless fw has a bug.
  3496. */
  3497. ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
  3498. break;
  3499. case HTT_T2H_MSG_TYPE_RX_ADDBA:
  3500. ath10k_htt_rx_addba(ar, resp);
  3501. break;
  3502. case HTT_T2H_MSG_TYPE_RX_DELBA:
  3503. ath10k_htt_rx_delba(ar, resp);
  3504. break;
  3505. case HTT_T2H_MSG_TYPE_PKTLOG: {
  3506. trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
  3507. skb->len -
  3508. offsetof(struct htt_resp,
  3509. pktlog_msg.payload));
  3510. if (ath10k_peer_stats_enabled(ar))
  3511. ath10k_fetch_10_2_tx_stats(ar,
  3512. resp->pktlog_msg.payload);
  3513. break;
  3514. }
  3515. case HTT_T2H_MSG_TYPE_RX_FLUSH: {
  3516. /* Ignore this event because mac80211 takes care of Rx
  3517. * aggregation reordering.
  3518. */
  3519. break;
  3520. }
  3521. case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: {
  3522. skb_queue_tail(&htt->rx_in_ord_compl_q, skb);
  3523. return false;
  3524. }
  3525. case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND: {
  3526. struct ath10k_htt *htt = &ar->htt;
  3527. struct ath10k_htc *htc = &ar->htc;
  3528. struct ath10k_htc_ep *ep = &ar->htc.endpoint[htt->eid];
  3529. u32 msg_word = __le32_to_cpu(*(__le32 *)resp);
  3530. int htt_credit_delta;
  3531. htt_credit_delta = HTT_TX_CREDIT_DELTA_ABS_GET(msg_word);
  3532. if (HTT_TX_CREDIT_SIGN_BIT_GET(msg_word))
  3533. htt_credit_delta = -htt_credit_delta;
  3534. ath10k_dbg(ar, ATH10K_DBG_HTT,
  3535. "htt credit update delta %d\n",
  3536. htt_credit_delta);
  3537. if (htt->disable_tx_comp) {
  3538. spin_lock_bh(&htc->tx_lock);
  3539. ep->tx_credits += htt_credit_delta;
  3540. spin_unlock_bh(&htc->tx_lock);
  3541. ath10k_dbg(ar, ATH10K_DBG_HTT,
  3542. "htt credit total %d\n",
  3543. ep->tx_credits);
  3544. ep->ep_ops.ep_tx_credits(htc->ar);
  3545. }
  3546. break;
  3547. }
  3548. case HTT_T2H_MSG_TYPE_CHAN_CHANGE: {
  3549. u32 phymode = __le32_to_cpu(resp->chan_change.phymode);
  3550. u32 freq = __le32_to_cpu(resp->chan_change.freq);
  3551. ar->tgt_oper_chan = ieee80211_get_channel(ar->hw->wiphy, freq);
  3552. ath10k_dbg(ar, ATH10K_DBG_HTT,
  3553. "htt chan change freq %u phymode %s\n",
  3554. freq, ath10k_wmi_phymode_str(phymode));
  3555. break;
  3556. }
  3557. case HTT_T2H_MSG_TYPE_AGGR_CONF:
  3558. break;
  3559. case HTT_T2H_MSG_TYPE_TX_FETCH_IND: {
  3560. struct sk_buff *tx_fetch_ind = skb_copy(skb, GFP_ATOMIC);
  3561. if (!tx_fetch_ind) {
  3562. ath10k_warn(ar, "failed to copy htt tx fetch ind\n");
  3563. break;
  3564. }
  3565. skb_queue_tail(&htt->tx_fetch_ind_q, tx_fetch_ind);
  3566. break;
  3567. }
  3568. case HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM:
  3569. ath10k_htt_rx_tx_fetch_confirm(ar, skb);
  3570. break;
  3571. case HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND:
  3572. ath10k_htt_rx_tx_mode_switch_ind(ar, skb);
  3573. break;
  3574. case HTT_T2H_MSG_TYPE_PEER_STATS:
  3575. ath10k_htt_fetch_peer_stats(ar, skb);
  3576. break;
  3577. case HTT_T2H_MSG_TYPE_EN_STATS:
  3578. default:
  3579. ath10k_warn(ar, "htt event (%d) not handled\n",
  3580. resp->hdr.msg_type);
  3581. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  3582. skb->data, skb->len);
  3583. break;
  3584. }
  3585. return true;
  3586. }
  3587. EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler);
  3588. void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar,
  3589. struct sk_buff *skb)
  3590. {
  3591. trace_ath10k_htt_pktlog(ar, skb->data, skb->len);
  3592. dev_kfree_skb_any(skb);
  3593. }
  3594. EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler);
  3595. static int ath10k_htt_rx_deliver_msdu(struct ath10k *ar, int quota, int budget)
  3596. {
  3597. struct sk_buff *skb;
  3598. while (quota < budget) {
  3599. if (skb_queue_empty(&ar->htt.rx_msdus_q))
  3600. break;
  3601. skb = skb_dequeue(&ar->htt.rx_msdus_q);
  3602. if (!skb)
  3603. break;
  3604. ath10k_process_rx(ar, skb);
  3605. quota++;
  3606. }
  3607. return quota;
  3608. }
  3609. int ath10k_htt_rx_hl_indication(struct ath10k *ar, int budget)
  3610. {
  3611. struct htt_resp *resp;
  3612. struct ath10k_htt *htt = &ar->htt;
  3613. struct sk_buff *skb;
  3614. bool release;
  3615. int quota;
  3616. for (quota = 0; quota < budget; quota++) {
  3617. skb = skb_dequeue(&htt->rx_indication_head);
  3618. if (!skb)
  3619. break;
  3620. resp = (struct htt_resp *)skb->data;
  3621. release = ath10k_htt_rx_proc_rx_ind_hl(htt,
  3622. &resp->rx_ind_hl,
  3623. skb,
  3624. HTT_RX_PN_CHECK,
  3625. HTT_RX_NON_TKIP_MIC);
  3626. if (release)
  3627. dev_kfree_skb_any(skb);
  3628. ath10k_dbg(ar, ATH10K_DBG_HTT, "rx indication poll pending count:%d\n",
  3629. skb_queue_len(&htt->rx_indication_head));
  3630. }
  3631. return quota;
  3632. }
  3633. EXPORT_SYMBOL(ath10k_htt_rx_hl_indication);
  3634. int ath10k_htt_txrx_compl_task(struct ath10k *ar, int budget)
  3635. {
  3636. struct ath10k_htt *htt = &ar->htt;
  3637. struct htt_tx_done tx_done = {};
  3638. struct sk_buff_head tx_ind_q;
  3639. struct sk_buff *skb;
  3640. unsigned long flags;
  3641. int quota = 0, done, ret;
  3642. bool resched_napi = false;
  3643. __skb_queue_head_init(&tx_ind_q);
  3644. /* Process pending frames before dequeuing more data
  3645. * from hardware.
  3646. */
  3647. quota = ath10k_htt_rx_deliver_msdu(ar, quota, budget);
  3648. if (quota == budget) {
  3649. resched_napi = true;
  3650. goto exit;
  3651. }
  3652. while ((skb = skb_dequeue(&htt->rx_in_ord_compl_q))) {
  3653. spin_lock_bh(&htt->rx_ring.lock);
  3654. ret = ath10k_htt_rx_in_ord_ind(ar, skb);
  3655. spin_unlock_bh(&htt->rx_ring.lock);
  3656. dev_kfree_skb_any(skb);
  3657. if (ret == -EIO) {
  3658. resched_napi = true;
  3659. goto exit;
  3660. }
  3661. }
  3662. while (atomic_read(&htt->num_mpdus_ready)) {
  3663. ret = ath10k_htt_rx_handle_amsdu(htt);
  3664. if (ret == -EIO) {
  3665. resched_napi = true;
  3666. goto exit;
  3667. }
  3668. atomic_dec(&htt->num_mpdus_ready);
  3669. }
  3670. /* Deliver received data after processing data from hardware */
  3671. quota = ath10k_htt_rx_deliver_msdu(ar, quota, budget);
  3672. /* From NAPI documentation:
  3673. * The napi poll() function may also process TX completions, in which
  3674. * case if it processes the entire TX ring then it should count that
  3675. * work as the rest of the budget.
  3676. */
  3677. if ((quota < budget) && !kfifo_is_empty(&htt->txdone_fifo))
  3678. quota = budget;
  3679. /* kfifo_get: called only within txrx_tasklet so it's neatly serialized.
  3680. * From kfifo_get() documentation:
  3681. * Note that with only one concurrent reader and one concurrent writer,
  3682. * you don't need extra locking to use these macro.
  3683. */
  3684. while (kfifo_get(&htt->txdone_fifo, &tx_done))
  3685. ath10k_txrx_tx_unref(htt, &tx_done);
  3686. ath10k_mac_tx_push_pending(ar);
  3687. spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags);
  3688. skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q);
  3689. spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags);
  3690. while ((skb = __skb_dequeue(&tx_ind_q))) {
  3691. ath10k_htt_rx_tx_fetch_ind(ar, skb);
  3692. dev_kfree_skb_any(skb);
  3693. }
  3694. exit:
  3695. ath10k_htt_rx_msdu_buff_replenish(htt);
  3696. /* In case of rx failure or more data to read, report budget
  3697. * to reschedule NAPI poll
  3698. */
  3699. done = resched_napi ? budget : quota;
  3700. return done;
  3701. }
  3702. EXPORT_SYMBOL(ath10k_htt_txrx_compl_task);
  3703. static const struct ath10k_htt_rx_ops htt_rx_ops_32 = {
  3704. .htt_get_rx_ring_size = ath10k_htt_get_rx_ring_size_32,
  3705. .htt_config_paddrs_ring = ath10k_htt_config_paddrs_ring_32,
  3706. .htt_set_paddrs_ring = ath10k_htt_set_paddrs_ring_32,
  3707. .htt_get_vaddr_ring = ath10k_htt_get_vaddr_ring_32,
  3708. .htt_reset_paddrs_ring = ath10k_htt_reset_paddrs_ring_32,
  3709. };
  3710. static const struct ath10k_htt_rx_ops htt_rx_ops_64 = {
  3711. .htt_get_rx_ring_size = ath10k_htt_get_rx_ring_size_64,
  3712. .htt_config_paddrs_ring = ath10k_htt_config_paddrs_ring_64,
  3713. .htt_set_paddrs_ring = ath10k_htt_set_paddrs_ring_64,
  3714. .htt_get_vaddr_ring = ath10k_htt_get_vaddr_ring_64,
  3715. .htt_reset_paddrs_ring = ath10k_htt_reset_paddrs_ring_64,
  3716. };
  3717. static const struct ath10k_htt_rx_ops htt_rx_ops_hl = {
  3718. .htt_rx_proc_rx_frag_ind = ath10k_htt_rx_proc_rx_frag_ind_hl,
  3719. };
  3720. void ath10k_htt_set_rx_ops(struct ath10k_htt *htt)
  3721. {
  3722. struct ath10k *ar = htt->ar;
  3723. if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL)
  3724. htt->rx_ops = &htt_rx_ops_hl;
  3725. else if (ar->hw_params.target_64bit)
  3726. htt->rx_ops = &htt_rx_ops_64;
  3727. else
  3728. htt->rx_ops = &htt_rx_ops_32;
  3729. }