phy_common.h 13 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef LINUX_B43_PHY_COMMON_H_
  3. #define LINUX_B43_PHY_COMMON_H_
  4. #include <linux/types.h>
  5. #include <linux/nl80211.h>
  6. struct b43_wldev;
  7. /* PHY register routing bits */
  8. #define B43_PHYROUTE 0x0C00 /* PHY register routing bits mask */
  9. #define B43_PHYROUTE_BASE 0x0000 /* Base registers */
  10. #define B43_PHYROUTE_OFDM_GPHY 0x0400 /* OFDM register routing for G-PHYs */
  11. #define B43_PHYROUTE_EXT_GPHY 0x0800 /* Extended G-PHY registers */
  12. #define B43_PHYROUTE_N_BMODE 0x0C00 /* N-PHY BMODE registers */
  13. /* CCK (B-PHY) registers. */
  14. #define B43_PHY_CCK(reg) ((reg) | B43_PHYROUTE_BASE)
  15. /* N-PHY registers. */
  16. #define B43_PHY_N(reg) ((reg) | B43_PHYROUTE_BASE)
  17. /* N-PHY BMODE registers. */
  18. #define B43_PHY_N_BMODE(reg) ((reg) | B43_PHYROUTE_N_BMODE)
  19. /* OFDM (A-PHY) registers. */
  20. #define B43_PHY_OFDM(reg) ((reg) | B43_PHYROUTE_OFDM_GPHY)
  21. /* Extended G-PHY registers. */
  22. #define B43_PHY_EXTG(reg) ((reg) | B43_PHYROUTE_EXT_GPHY)
  23. /* Masks for the PHY versioning registers. */
  24. #define B43_PHYVER_ANALOG 0xF000
  25. #define B43_PHYVER_ANALOG_SHIFT 12
  26. #define B43_PHYVER_TYPE 0x0F00
  27. #define B43_PHYVER_TYPE_SHIFT 8
  28. #define B43_PHYVER_VERSION 0x00FF
  29. /* PHY writes need to be flushed if we reach limit */
  30. #define B43_MAX_WRITES_IN_ROW 24
  31. /**
  32. * enum b43_interference_mitigation - Interference Mitigation mode
  33. *
  34. * @B43_INTERFMODE_NONE: Disabled
  35. * @B43_INTERFMODE_NONWLAN: Non-WLAN Interference Mitigation
  36. * @B43_INTERFMODE_MANUALWLAN: WLAN Interference Mitigation
  37. * @B43_INTERFMODE_AUTOWLAN: Automatic WLAN Interference Mitigation
  38. */
  39. enum b43_interference_mitigation {
  40. B43_INTERFMODE_NONE,
  41. B43_INTERFMODE_NONWLAN,
  42. B43_INTERFMODE_MANUALWLAN,
  43. B43_INTERFMODE_AUTOWLAN,
  44. };
  45. /* Antenna identifiers */
  46. enum {
  47. B43_ANTENNA0 = 0, /* Antenna 0 */
  48. B43_ANTENNA1 = 1, /* Antenna 1 */
  49. B43_ANTENNA_AUTO0 = 2, /* Automatic, starting with antenna 0 */
  50. B43_ANTENNA_AUTO1 = 3, /* Automatic, starting with antenna 1 */
  51. B43_ANTENNA2 = 4,
  52. B43_ANTENNA3 = 8,
  53. B43_ANTENNA_AUTO = B43_ANTENNA_AUTO0,
  54. B43_ANTENNA_DEFAULT = B43_ANTENNA_AUTO,
  55. };
  56. /**
  57. * enum b43_txpwr_result - Return value for the recalc_txpower PHY op.
  58. *
  59. * @B43_TXPWR_RES_NEED_ADJUST: Values changed. Hardware adjustment is needed.
  60. * @B43_TXPWR_RES_DONE: No more work to do. Everything is done.
  61. */
  62. enum b43_txpwr_result {
  63. B43_TXPWR_RES_NEED_ADJUST,
  64. B43_TXPWR_RES_DONE,
  65. };
  66. /**
  67. * struct b43_phy_operations - Function pointers for PHY ops.
  68. *
  69. * @allocate: Allocate and initialise the PHY data structures.
  70. * Must not be NULL.
  71. * @free: Destroy and free the PHY data structures.
  72. * Must not be NULL.
  73. *
  74. * @prepare_structs: Prepare the PHY data structures.
  75. * The data structures allocated in @allocate are
  76. * initialized here.
  77. * Must not be NULL.
  78. * @prepare_hardware: Prepare the PHY. This is called before b43_chip_init to
  79. * do some early PHY hardware init.
  80. * Can be NULL, if not required.
  81. * @init: Initialize the PHY.
  82. * Must not be NULL.
  83. * @exit: Shutdown the PHY.
  84. * Can be NULL, if not required.
  85. *
  86. * @phy_read: Read from a PHY register.
  87. * Must not be NULL.
  88. * @phy_write: Write to a PHY register.
  89. * Must not be NULL.
  90. * @phy_maskset: Maskset a PHY register, taking shortcuts.
  91. * If it is NULL, a generic algorithm is used.
  92. * @radio_read: Read from a Radio register.
  93. * Must not be NULL.
  94. * @radio_write: Write to a Radio register.
  95. * Must not be NULL.
  96. *
  97. * @supports_hwpctl: Returns a boolean whether Hardware Power Control
  98. * is supported or not.
  99. * If NULL, hwpctl is assumed to be never supported.
  100. * @software_rfkill: Turn the radio ON or OFF.
  101. * Possible state values are
  102. * RFKILL_STATE_SOFT_BLOCKED or
  103. * RFKILL_STATE_UNBLOCKED
  104. * Must not be NULL.
  105. * @switch_analog: Turn the Analog on/off.
  106. * Must not be NULL.
  107. * @switch_channel: Switch the radio to another channel.
  108. * Must not be NULL.
  109. * @get_default_chan: Just returns the default channel number.
  110. * Must not be NULL.
  111. * @set_rx_antenna: Set the antenna used for RX.
  112. * Can be NULL, if not supported.
  113. * @interf_mitigation: Switch the Interference Mitigation mode.
  114. * Can be NULL, if not supported.
  115. *
  116. * @recalc_txpower: Recalculate the transmission power parameters.
  117. * This callback has to recalculate the TX power settings,
  118. * but does not need to write them to the hardware, yet.
  119. * Returns enum b43_txpwr_result to indicate whether the hardware
  120. * needs to be adjusted.
  121. * If B43_TXPWR_NEED_ADJUST is returned, @adjust_txpower
  122. * will be called later.
  123. * If the parameter "ignore_tssi" is true, the TSSI values should
  124. * be ignored and a recalculation of the power settings should be
  125. * done even if the TSSI values did not change.
  126. * This function may sleep, but should not.
  127. * Must not be NULL.
  128. * @adjust_txpower: Write the previously calculated TX power settings
  129. * (from @recalc_txpower) to the hardware.
  130. * This function may sleep.
  131. * Can be NULL, if (and ONLY if) @recalc_txpower _always_
  132. * returns B43_TXPWR_RES_DONE.
  133. *
  134. * @pwork_15sec: Periodic work. Called every 15 seconds.
  135. * Can be NULL, if not required.
  136. * @pwork_60sec: Periodic work. Called every 60 seconds.
  137. * Can be NULL, if not required.
  138. */
  139. struct b43_phy_operations {
  140. /* Initialisation */
  141. int (*allocate)(struct b43_wldev *dev);
  142. void (*free)(struct b43_wldev *dev);
  143. void (*prepare_structs)(struct b43_wldev *dev);
  144. int (*prepare_hardware)(struct b43_wldev *dev);
  145. int (*init)(struct b43_wldev *dev);
  146. void (*exit)(struct b43_wldev *dev);
  147. /* Register access */
  148. u16 (*phy_read)(struct b43_wldev *dev, u16 reg);
  149. void (*phy_write)(struct b43_wldev *dev, u16 reg, u16 value);
  150. void (*phy_maskset)(struct b43_wldev *dev, u16 reg, u16 mask, u16 set);
  151. u16 (*radio_read)(struct b43_wldev *dev, u16 reg);
  152. void (*radio_write)(struct b43_wldev *dev, u16 reg, u16 value);
  153. /* Radio */
  154. bool (*supports_hwpctl)(struct b43_wldev *dev);
  155. void (*software_rfkill)(struct b43_wldev *dev, bool blocked);
  156. void (*switch_analog)(struct b43_wldev *dev, bool on);
  157. int (*switch_channel)(struct b43_wldev *dev, unsigned int new_channel);
  158. unsigned int (*get_default_chan)(struct b43_wldev *dev);
  159. void (*set_rx_antenna)(struct b43_wldev *dev, int antenna);
  160. int (*interf_mitigation)(struct b43_wldev *dev,
  161. enum b43_interference_mitigation new_mode);
  162. /* Transmission power adjustment */
  163. enum b43_txpwr_result (*recalc_txpower)(struct b43_wldev *dev,
  164. bool ignore_tssi);
  165. void (*adjust_txpower)(struct b43_wldev *dev);
  166. /* Misc */
  167. void (*pwork_15sec)(struct b43_wldev *dev);
  168. void (*pwork_60sec)(struct b43_wldev *dev);
  169. };
  170. struct b43_phy_g;
  171. struct b43_phy_n;
  172. struct b43_phy_lp;
  173. struct b43_phy_ht;
  174. struct b43_phy_lcn;
  175. struct b43_phy {
  176. /* Hardware operation callbacks. */
  177. const struct b43_phy_operations *ops;
  178. /* Most hardware context information is stored in the standard-
  179. * specific data structures pointed to by the pointers below.
  180. * Only one of them is valid (the currently enabled PHY). */
  181. #ifdef CONFIG_B43_DEBUG
  182. /* No union for debug build to force NULL derefs in buggy code. */
  183. struct {
  184. #else
  185. union {
  186. #endif
  187. /* G-PHY specific information */
  188. struct b43_phy_g *g;
  189. /* N-PHY specific information */
  190. struct b43_phy_n *n;
  191. /* LP-PHY specific information */
  192. struct b43_phy_lp *lp;
  193. /* HT-PHY specific information */
  194. struct b43_phy_ht *ht;
  195. /* LCN-PHY specific information */
  196. struct b43_phy_lcn *lcn;
  197. /* AC-PHY specific information */
  198. struct b43_phy_ac *ac;
  199. };
  200. /* Band support flags. */
  201. bool supports_2ghz;
  202. bool supports_5ghz;
  203. /* Is GMODE (2 GHz mode) bit enabled? */
  204. bool gmode;
  205. /* After power reset full init has to be performed */
  206. bool do_full_init;
  207. /* Analog Type */
  208. u8 analog;
  209. /* B43_PHYTYPE_ */
  210. u8 type;
  211. /* PHY revision number. */
  212. u8 rev;
  213. /* Count writes since last read */
  214. u8 writes_counter;
  215. /* Radio versioning */
  216. u16 radio_manuf; /* Radio manufacturer */
  217. u16 radio_ver; /* Radio version */
  218. u8 radio_rev; /* Radio revision */
  219. /* Software state of the radio */
  220. bool radio_on;
  221. /* Desired TX power level (in dBm).
  222. * This is set by the user and adjusted in b43_phy_xmitpower(). */
  223. int desired_txpower;
  224. /* Hardware Power Control enabled? */
  225. bool hardware_power_control;
  226. /* The time (in absolute jiffies) when the next TX power output
  227. * check is needed. */
  228. unsigned long next_txpwr_check_time;
  229. /* Current channel */
  230. struct cfg80211_chan_def *chandef;
  231. unsigned int channel;
  232. /* PHY TX errors counter. */
  233. atomic_t txerr_cnt;
  234. #ifdef CONFIG_B43_DEBUG
  235. /* PHY registers locked (w.r.t. firmware) */
  236. bool phy_locked;
  237. /* Radio registers locked (w.r.t. firmware) */
  238. bool radio_locked;
  239. #endif /* B43_DEBUG */
  240. };
  241. /**
  242. * b43_phy_allocate - Allocate PHY structs
  243. * Allocate the PHY data structures, based on the current dev->phy.type
  244. */
  245. int b43_phy_allocate(struct b43_wldev *dev);
  246. /**
  247. * b43_phy_free - Free PHY structs
  248. */
  249. void b43_phy_free(struct b43_wldev *dev);
  250. /**
  251. * b43_phy_init - Initialise the PHY
  252. */
  253. int b43_phy_init(struct b43_wldev *dev);
  254. /**
  255. * b43_phy_exit - Cleanup PHY
  256. */
  257. void b43_phy_exit(struct b43_wldev *dev);
  258. /**
  259. * b43_has_hardware_pctl - Hardware Power Control supported?
  260. * Returns a boolean, whether hardware power control is supported.
  261. */
  262. bool b43_has_hardware_pctl(struct b43_wldev *dev);
  263. /**
  264. * b43_phy_read - 16bit PHY register read access
  265. */
  266. u16 b43_phy_read(struct b43_wldev *dev, u16 reg);
  267. /**
  268. * b43_phy_write - 16bit PHY register write access
  269. */
  270. void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value);
  271. /**
  272. * b43_phy_copy - copy contents of 16bit PHY register to another
  273. */
  274. void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg);
  275. /**
  276. * b43_phy_mask - Mask a PHY register with a mask
  277. */
  278. void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask);
  279. /**
  280. * b43_phy_set - OR a PHY register with a bitmap
  281. */
  282. void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set);
  283. /**
  284. * b43_phy_maskset - Mask and OR a PHY register with a mask and bitmap
  285. */
  286. void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
  287. /**
  288. * b43_radio_read - 16bit Radio register read access
  289. */
  290. u16 b43_radio_read(struct b43_wldev *dev, u16 reg);
  291. #define b43_radio_read16 b43_radio_read /* DEPRECATED */
  292. /**
  293. * b43_radio_write - 16bit Radio register write access
  294. */
  295. void b43_radio_write(struct b43_wldev *dev, u16 reg, u16 value);
  296. #define b43_radio_write16 b43_radio_write /* DEPRECATED */
  297. /**
  298. * b43_radio_mask - Mask a 16bit radio register with a mask
  299. */
  300. void b43_radio_mask(struct b43_wldev *dev, u16 offset, u16 mask);
  301. /**
  302. * b43_radio_set - OR a 16bit radio register with a bitmap
  303. */
  304. void b43_radio_set(struct b43_wldev *dev, u16 offset, u16 set);
  305. /**
  306. * b43_radio_maskset - Mask and OR a radio register with a mask and bitmap
  307. */
  308. void b43_radio_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
  309. /**
  310. * b43_radio_wait_value - Waits for a given value in masked register read
  311. */
  312. bool b43_radio_wait_value(struct b43_wldev *dev, u16 offset, u16 mask,
  313. u16 value, int delay, int timeout);
  314. /**
  315. * b43_radio_lock - Lock firmware radio register access
  316. */
  317. void b43_radio_lock(struct b43_wldev *dev);
  318. /**
  319. * b43_radio_unlock - Unlock firmware radio register access
  320. */
  321. void b43_radio_unlock(struct b43_wldev *dev);
  322. /**
  323. * b43_phy_lock - Lock firmware PHY register access
  324. */
  325. void b43_phy_lock(struct b43_wldev *dev);
  326. /**
  327. * b43_phy_unlock - Unlock firmware PHY register access
  328. */
  329. void b43_phy_unlock(struct b43_wldev *dev);
  330. void b43_phy_put_into_reset(struct b43_wldev *dev);
  331. void b43_phy_take_out_of_reset(struct b43_wldev *dev);
  332. /**
  333. * b43_switch_channel - Switch to another channel
  334. */
  335. int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel);
  336. /**
  337. * b43_software_rfkill - Turn the radio ON or OFF in software.
  338. */
  339. void b43_software_rfkill(struct b43_wldev *dev, bool blocked);
  340. /**
  341. * b43_phy_txpower_check - Check TX power output.
  342. *
  343. * Compare the current TX power output to the desired power emission
  344. * and schedule an adjustment in case it mismatches.
  345. *
  346. * @flags: OR'ed enum b43_phy_txpower_check_flags flags.
  347. * See the docs below.
  348. */
  349. void b43_phy_txpower_check(struct b43_wldev *dev, unsigned int flags);
  350. /**
  351. * enum b43_phy_txpower_check_flags - Flags for b43_phy_txpower_check()
  352. *
  353. * @B43_TXPWR_IGNORE_TIME: Ignore the schedule time and force-redo
  354. * the check now.
  355. * @B43_TXPWR_IGNORE_TSSI: Redo the recalculation, even if the average
  356. * TSSI did not change.
  357. */
  358. enum b43_phy_txpower_check_flags {
  359. B43_TXPWR_IGNORE_TIME = (1 << 0),
  360. B43_TXPWR_IGNORE_TSSI = (1 << 1),
  361. };
  362. struct work_struct;
  363. void b43_phy_txpower_adjust_work(struct work_struct *work);
  364. /**
  365. * b43_phy_shm_tssi_read - Read the average of the last 4 TSSI from SHM.
  366. *
  367. * @shm_offset: The SHM address to read the values from.
  368. *
  369. * Returns the average of the 4 TSSI values, or a negative error code.
  370. */
  371. int b43_phy_shm_tssi_read(struct b43_wldev *dev, u16 shm_offset);
  372. /**
  373. * b43_phy_switch_analog_generic - Generic PHY operation for switching the Analog.
  374. *
  375. * It does the switching based on the PHY0 core register.
  376. * Do _not_ call this directly. Only use it as a switch_analog callback
  377. * for struct b43_phy_operations.
  378. */
  379. void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on);
  380. bool b43_is_40mhz(struct b43_wldev *dev);
  381. void b43_phy_force_clock(struct b43_wldev *dev, bool force);
  382. #endif /* LINUX_B43_PHY_COMMON_H_ */