3945-mac.c 104 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /******************************************************************************
  3. *
  4. * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
  5. *
  6. * Portions of this file are derived from the ipw3945 project, as well
  7. * as portions of the ieee80211 subsystem header files.
  8. *
  9. * Contact Information:
  10. * Intel Linux Wireless <ilw@linux.intel.com>
  11. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  12. *
  13. *****************************************************************************/
  14. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/init.h>
  18. #include <linux/pci.h>
  19. #include <linux/slab.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/delay.h>
  22. #include <linux/sched.h>
  23. #include <linux/skbuff.h>
  24. #include <linux/netdevice.h>
  25. #include <linux/firmware.h>
  26. #include <linux/etherdevice.h>
  27. #include <linux/if_arp.h>
  28. #include <net/ieee80211_radiotap.h>
  29. #include <net/mac80211.h>
  30. #include <asm/div64.h>
  31. #define DRV_NAME "iwl3945"
  32. #include "commands.h"
  33. #include "common.h"
  34. #include "3945.h"
  35. #include "iwl-spectrum.h"
  36. /*
  37. * module name, copyright, version, etc.
  38. */
  39. #define DRV_DESCRIPTION \
  40. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  41. #ifdef CONFIG_IWLEGACY_DEBUG
  42. #define VD "d"
  43. #else
  44. #define VD
  45. #endif
  46. /*
  47. * add "s" to indicate spectrum measurement included.
  48. * we add it here to be consistent with previous releases in which
  49. * this was configurable.
  50. */
  51. #define DRV_VERSION IWLWIFI_VERSION VD "s"
  52. #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
  53. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  54. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  55. MODULE_VERSION(DRV_VERSION);
  56. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  57. MODULE_LICENSE("GPL");
  58. /* module parameters */
  59. struct il_mod_params il3945_mod_params = {
  60. .sw_crypto = 1,
  61. .restart_fw = 1,
  62. .disable_hw_scan = 1,
  63. /* the rest are 0 by default */
  64. };
  65. /**
  66. * il3945_get_antenna_flags - Get antenna flags for RXON command
  67. * @il: eeprom and antenna fields are used to determine antenna flags
  68. *
  69. * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  70. * il3945_mod_params.antenna specifies the antenna diversity mode:
  71. *
  72. * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  73. * IL_ANTENNA_MAIN - Force MAIN antenna
  74. * IL_ANTENNA_AUX - Force AUX antenna
  75. */
  76. __le32
  77. il3945_get_antenna_flags(const struct il_priv *il)
  78. {
  79. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  80. switch (il3945_mod_params.antenna) {
  81. case IL_ANTENNA_DIVERSITY:
  82. return 0;
  83. case IL_ANTENNA_MAIN:
  84. if (eeprom->antenna_switch_type)
  85. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  86. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  87. case IL_ANTENNA_AUX:
  88. if (eeprom->antenna_switch_type)
  89. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  90. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  91. }
  92. /* bad antenna selector value */
  93. IL_ERR("Bad antenna selector value (0x%x)\n",
  94. il3945_mod_params.antenna);
  95. return 0; /* "diversity" is default if error */
  96. }
  97. static int
  98. il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
  99. struct ieee80211_key_conf *keyconf, u8 sta_id)
  100. {
  101. unsigned long flags;
  102. __le16 key_flags = 0;
  103. int ret;
  104. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  105. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  106. if (sta_id == il->hw_params.bcast_id)
  107. key_flags |= STA_KEY_MULTICAST_MSK;
  108. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  109. keyconf->hw_key_idx = keyconf->keyidx;
  110. key_flags &= ~STA_KEY_FLG_INVALID;
  111. spin_lock_irqsave(&il->sta_lock, flags);
  112. il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
  113. il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  114. memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
  115. memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
  116. if ((il->stations[sta_id].sta.key.
  117. key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
  118. il->stations[sta_id].sta.key.key_offset =
  119. il_get_free_ucode_key_idx(il);
  120. /* else, we are overriding an existing key => no need to allocated room
  121. * in uCode. */
  122. WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  123. "no space for a new key");
  124. il->stations[sta_id].sta.key.key_flags = key_flags;
  125. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  126. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  127. D_INFO("hwcrypto: modify ucode station key info\n");
  128. ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
  129. spin_unlock_irqrestore(&il->sta_lock, flags);
  130. return ret;
  131. }
  132. static int
  133. il3945_set_tkip_dynamic_key_info(struct il_priv *il,
  134. struct ieee80211_key_conf *keyconf, u8 sta_id)
  135. {
  136. return -EOPNOTSUPP;
  137. }
  138. static int
  139. il3945_set_wep_dynamic_key_info(struct il_priv *il,
  140. struct ieee80211_key_conf *keyconf, u8 sta_id)
  141. {
  142. return -EOPNOTSUPP;
  143. }
  144. static int
  145. il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
  146. {
  147. unsigned long flags;
  148. struct il_addsta_cmd sta_cmd;
  149. spin_lock_irqsave(&il->sta_lock, flags);
  150. memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
  151. memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
  152. il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  153. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  154. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  155. memcpy(&sta_cmd, &il->stations[sta_id].sta,
  156. sizeof(struct il_addsta_cmd));
  157. spin_unlock_irqrestore(&il->sta_lock, flags);
  158. D_INFO("hwcrypto: clear ucode station key info\n");
  159. return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  160. }
  161. static int
  162. il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
  163. u8 sta_id)
  164. {
  165. int ret = 0;
  166. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  167. switch (keyconf->cipher) {
  168. case WLAN_CIPHER_SUITE_CCMP:
  169. ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
  170. break;
  171. case WLAN_CIPHER_SUITE_TKIP:
  172. ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
  173. break;
  174. case WLAN_CIPHER_SUITE_WEP40:
  175. case WLAN_CIPHER_SUITE_WEP104:
  176. ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
  177. break;
  178. default:
  179. IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher);
  180. ret = -EINVAL;
  181. }
  182. D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
  183. keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
  184. return ret;
  185. }
  186. static int
  187. il3945_remove_static_key(struct il_priv *il)
  188. {
  189. return -EOPNOTSUPP;
  190. }
  191. static int
  192. il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key)
  193. {
  194. if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  195. key->cipher == WLAN_CIPHER_SUITE_WEP104)
  196. return -EOPNOTSUPP;
  197. IL_ERR("Static key invalid: cipher %x\n", key->cipher);
  198. return -EINVAL;
  199. }
  200. static void
  201. il3945_clear_free_frames(struct il_priv *il)
  202. {
  203. struct list_head *element;
  204. D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
  205. while (!list_empty(&il->free_frames)) {
  206. element = il->free_frames.next;
  207. list_del(element);
  208. kfree(list_entry(element, struct il3945_frame, list));
  209. il->frames_count--;
  210. }
  211. if (il->frames_count) {
  212. IL_WARN("%d frames still in use. Did we lose one?\n",
  213. il->frames_count);
  214. il->frames_count = 0;
  215. }
  216. }
  217. static struct il3945_frame *
  218. il3945_get_free_frame(struct il_priv *il)
  219. {
  220. struct il3945_frame *frame;
  221. struct list_head *element;
  222. if (list_empty(&il->free_frames)) {
  223. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  224. if (!frame) {
  225. IL_ERR("Could not allocate frame!\n");
  226. return NULL;
  227. }
  228. il->frames_count++;
  229. return frame;
  230. }
  231. element = il->free_frames.next;
  232. list_del(element);
  233. return list_entry(element, struct il3945_frame, list);
  234. }
  235. static void
  236. il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
  237. {
  238. memset(frame, 0, sizeof(*frame));
  239. list_add(&frame->list, &il->free_frames);
  240. }
  241. unsigned int
  242. il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
  243. int left)
  244. {
  245. if (!il_is_associated(il) || !il->beacon_skb)
  246. return 0;
  247. if (il->beacon_skb->len > left)
  248. return 0;
  249. memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
  250. return il->beacon_skb->len;
  251. }
  252. static int
  253. il3945_send_beacon_cmd(struct il_priv *il)
  254. {
  255. struct il3945_frame *frame;
  256. unsigned int frame_size;
  257. int rc;
  258. u8 rate;
  259. frame = il3945_get_free_frame(il);
  260. if (!frame) {
  261. IL_ERR("Could not obtain free frame buffer for beacon "
  262. "command.\n");
  263. return -ENOMEM;
  264. }
  265. rate = il_get_lowest_plcp(il);
  266. frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
  267. rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
  268. il3945_free_frame(il, frame);
  269. return rc;
  270. }
  271. static void
  272. il3945_unset_hw_params(struct il_priv *il)
  273. {
  274. if (il->_3945.shared_virt)
  275. dma_free_coherent(&il->pci_dev->dev,
  276. sizeof(struct il3945_shared),
  277. il->_3945.shared_virt, il->_3945.shared_phys);
  278. }
  279. static void
  280. il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
  281. struct il_device_cmd *cmd,
  282. struct sk_buff *skb_frag, int sta_id)
  283. {
  284. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  285. struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
  286. tx_cmd->sec_ctl = 0;
  287. switch (keyinfo->cipher) {
  288. case WLAN_CIPHER_SUITE_CCMP:
  289. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  290. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  291. D_TX("tx_cmd with AES hwcrypto\n");
  292. break;
  293. case WLAN_CIPHER_SUITE_TKIP:
  294. break;
  295. case WLAN_CIPHER_SUITE_WEP104:
  296. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  297. fallthrough;
  298. case WLAN_CIPHER_SUITE_WEP40:
  299. tx_cmd->sec_ctl |=
  300. TX_CMD_SEC_WEP | (info->control.hw_key->
  301. hw_key_idx & TX_CMD_SEC_MSK) <<
  302. TX_CMD_SEC_SHIFT;
  303. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  304. D_TX("Configuring packet for WEP encryption " "with key %d\n",
  305. info->control.hw_key->hw_key_idx);
  306. break;
  307. default:
  308. IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
  309. break;
  310. }
  311. }
  312. /*
  313. * handle build C_TX command notification.
  314. */
  315. static void
  316. il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd,
  317. struct ieee80211_tx_info *info,
  318. struct ieee80211_hdr *hdr, u8 std_id)
  319. {
  320. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  321. __le32 tx_flags = tx_cmd->tx_flags;
  322. __le16 fc = hdr->frame_control;
  323. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  324. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  325. tx_flags |= TX_CMD_FLG_ACK_MSK;
  326. if (ieee80211_is_mgmt(fc))
  327. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  328. if (ieee80211_is_probe_resp(fc) &&
  329. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  330. tx_flags |= TX_CMD_FLG_TSF_MSK;
  331. } else {
  332. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  333. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  334. }
  335. tx_cmd->sta_id = std_id;
  336. if (ieee80211_has_morefrags(fc))
  337. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  338. if (ieee80211_is_data_qos(fc)) {
  339. u8 *qc = ieee80211_get_qos_ctl(hdr);
  340. tx_cmd->tid_tspec = qc[0] & 0xf;
  341. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  342. } else {
  343. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  344. }
  345. il_tx_cmd_protection(il, info, fc, &tx_flags);
  346. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  347. if (ieee80211_is_mgmt(fc)) {
  348. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  349. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  350. else
  351. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  352. } else {
  353. tx_cmd->timeout.pm_frame_timeout = 0;
  354. }
  355. tx_cmd->driver_txop = 0;
  356. tx_cmd->tx_flags = tx_flags;
  357. tx_cmd->next_frame_len = 0;
  358. }
  359. /*
  360. * start C_TX command process
  361. */
  362. static int
  363. il3945_tx_skb(struct il_priv *il,
  364. struct ieee80211_sta *sta,
  365. struct sk_buff *skb)
  366. {
  367. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  368. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  369. struct il3945_tx_cmd *tx_cmd;
  370. struct il_tx_queue *txq = NULL;
  371. struct il_queue *q = NULL;
  372. struct il_device_cmd *out_cmd;
  373. struct il_cmd_meta *out_meta;
  374. dma_addr_t phys_addr;
  375. dma_addr_t txcmd_phys;
  376. int txq_id = skb_get_queue_mapping(skb);
  377. u16 len, idx, hdr_len;
  378. u16 firstlen, secondlen;
  379. u8 sta_id;
  380. u8 tid = 0;
  381. __le16 fc;
  382. u8 wait_write_ptr = 0;
  383. unsigned long flags;
  384. spin_lock_irqsave(&il->lock, flags);
  385. if (il_is_rfkill(il)) {
  386. D_DROP("Dropping - RF KILL\n");
  387. goto drop_unlock;
  388. }
  389. if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) ==
  390. IL_INVALID_RATE) {
  391. IL_ERR("ERROR: No TX rate available.\n");
  392. goto drop_unlock;
  393. }
  394. fc = hdr->frame_control;
  395. #ifdef CONFIG_IWLEGACY_DEBUG
  396. if (ieee80211_is_auth(fc))
  397. D_TX("Sending AUTH frame\n");
  398. else if (ieee80211_is_assoc_req(fc))
  399. D_TX("Sending ASSOC frame\n");
  400. else if (ieee80211_is_reassoc_req(fc))
  401. D_TX("Sending REASSOC frame\n");
  402. #endif
  403. spin_unlock_irqrestore(&il->lock, flags);
  404. hdr_len = ieee80211_hdrlen(fc);
  405. /* Find idx into station table for destination station */
  406. sta_id = il_sta_id_or_broadcast(il, sta);
  407. if (sta_id == IL_INVALID_STATION) {
  408. D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
  409. goto drop;
  410. }
  411. D_RATE("station Id %d\n", sta_id);
  412. if (ieee80211_is_data_qos(fc)) {
  413. u8 *qc = ieee80211_get_qos_ctl(hdr);
  414. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  415. if (unlikely(tid >= MAX_TID_COUNT))
  416. goto drop;
  417. }
  418. /* Descriptor for chosen Tx queue */
  419. txq = &il->txq[txq_id];
  420. q = &txq->q;
  421. if ((il_queue_space(q) < q->high_mark))
  422. goto drop;
  423. spin_lock_irqsave(&il->lock, flags);
  424. idx = il_get_cmd_idx(q, q->write_ptr, 0);
  425. txq->skbs[q->write_ptr] = skb;
  426. /* Init first empty entry in queue's array of Tx/cmd buffers */
  427. out_cmd = txq->cmd[idx];
  428. out_meta = &txq->meta[idx];
  429. tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
  430. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  431. memset(tx_cmd, 0, sizeof(*tx_cmd));
  432. /*
  433. * Set up the Tx-command (not MAC!) header.
  434. * Store the chosen Tx queue and TFD idx within the sequence field;
  435. * after Tx, uCode's Tx response will return this value so driver can
  436. * locate the frame within the tx queue and do post-tx processing.
  437. */
  438. out_cmd->hdr.cmd = C_TX;
  439. out_cmd->hdr.sequence =
  440. cpu_to_le16((u16)
  441. (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
  442. /* Copy MAC header from skb into command buffer */
  443. memcpy(tx_cmd->hdr, hdr, hdr_len);
  444. if (info->control.hw_key)
  445. il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
  446. /* TODO need this for burst mode later on */
  447. il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
  448. il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id);
  449. /* Total # bytes to be transmitted */
  450. tx_cmd->len = cpu_to_le16((u16) skb->len);
  451. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  452. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  453. /*
  454. * Use the first empty entry in this queue's command buffer array
  455. * to contain the Tx command and MAC header concatenated together
  456. * (payload data will be in another buffer).
  457. * Size of this varies, due to varying MAC header length.
  458. * If end is not dword aligned, we'll have 2 extra bytes at the end
  459. * of the MAC header (device reads on dword boundaries).
  460. * We'll tell device about this padding later.
  461. */
  462. len =
  463. sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) +
  464. hdr_len;
  465. firstlen = (len + 3) & ~3;
  466. /* Physical address of this Tx command's header (not MAC header!),
  467. * within command buffer array. */
  468. txcmd_phys = dma_map_single(&il->pci_dev->dev, &out_cmd->hdr, firstlen,
  469. DMA_TO_DEVICE);
  470. if (unlikely(dma_mapping_error(&il->pci_dev->dev, txcmd_phys)))
  471. goto drop_unlock;
  472. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  473. * if any (802.11 null frames have no payload). */
  474. secondlen = skb->len - hdr_len;
  475. if (secondlen > 0) {
  476. phys_addr = dma_map_single(&il->pci_dev->dev, skb->data + hdr_len,
  477. secondlen, DMA_TO_DEVICE);
  478. if (unlikely(dma_mapping_error(&il->pci_dev->dev, phys_addr)))
  479. goto drop_unlock;
  480. }
  481. /* Add buffer containing Tx command and MAC(!) header to TFD's
  482. * first entry */
  483. il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, 1, 0);
  484. dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
  485. dma_unmap_len_set(out_meta, len, firstlen);
  486. if (secondlen > 0)
  487. il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, secondlen, 0,
  488. U32_PAD(secondlen));
  489. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  490. txq->need_update = 1;
  491. } else {
  492. wait_write_ptr = 1;
  493. txq->need_update = 0;
  494. }
  495. il_update_stats(il, true, fc, skb->len);
  496. D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
  497. D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
  498. il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  499. il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr,
  500. ieee80211_hdrlen(fc));
  501. /* Tell device the write idx *just past* this latest filled TFD */
  502. q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
  503. il_txq_update_write_ptr(il, txq);
  504. spin_unlock_irqrestore(&il->lock, flags);
  505. if (il_queue_space(q) < q->high_mark && il->mac80211_registered) {
  506. if (wait_write_ptr) {
  507. spin_lock_irqsave(&il->lock, flags);
  508. txq->need_update = 1;
  509. il_txq_update_write_ptr(il, txq);
  510. spin_unlock_irqrestore(&il->lock, flags);
  511. }
  512. il_stop_queue(il, txq);
  513. }
  514. return 0;
  515. drop_unlock:
  516. spin_unlock_irqrestore(&il->lock, flags);
  517. drop:
  518. return -1;
  519. }
  520. static int
  521. il3945_get_measurement(struct il_priv *il,
  522. struct ieee80211_measurement_params *params, u8 type)
  523. {
  524. struct il_spectrum_cmd spectrum;
  525. struct il_rx_pkt *pkt;
  526. struct il_host_cmd cmd = {
  527. .id = C_SPECTRUM_MEASUREMENT,
  528. .data = (void *)&spectrum,
  529. .flags = CMD_WANT_SKB,
  530. };
  531. u32 add_time = le64_to_cpu(params->start_time);
  532. int rc;
  533. int spectrum_resp_status;
  534. int duration = le16_to_cpu(params->duration);
  535. if (il_is_associated(il))
  536. add_time =
  537. il_usecs_to_beacons(il,
  538. le64_to_cpu(params->start_time) -
  539. il->_3945.last_tsf,
  540. le16_to_cpu(il->timing.beacon_interval));
  541. memset(&spectrum, 0, sizeof(spectrum));
  542. spectrum.channel_count = cpu_to_le16(1);
  543. spectrum.flags =
  544. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  545. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  546. cmd.len = sizeof(spectrum);
  547. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  548. if (il_is_associated(il))
  549. spectrum.start_time =
  550. il_add_beacon_time(il, il->_3945.last_beacon_time, add_time,
  551. le16_to_cpu(il->timing.beacon_interval));
  552. else
  553. spectrum.start_time = 0;
  554. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  555. spectrum.channels[0].channel = params->channel;
  556. spectrum.channels[0].type = type;
  557. if (il->active.flags & RXON_FLG_BAND_24G_MSK)
  558. spectrum.flags |=
  559. RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
  560. RXON_FLG_TGG_PROTECT_MSK;
  561. rc = il_send_cmd_sync(il, &cmd);
  562. if (rc)
  563. return rc;
  564. pkt = (struct il_rx_pkt *)cmd.reply_page;
  565. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  566. IL_ERR("Bad return from N_RX_ON_ASSOC command\n");
  567. rc = -EIO;
  568. }
  569. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  570. switch (spectrum_resp_status) {
  571. case 0: /* Command will be handled */
  572. if (pkt->u.spectrum.id != 0xff) {
  573. D_INFO("Replaced existing measurement: %d\n",
  574. pkt->u.spectrum.id);
  575. il->measurement_status &= ~MEASUREMENT_READY;
  576. }
  577. il->measurement_status |= MEASUREMENT_ACTIVE;
  578. rc = 0;
  579. break;
  580. case 1: /* Command will not be handled */
  581. rc = -EAGAIN;
  582. break;
  583. }
  584. il_free_pages(il, cmd.reply_page);
  585. return rc;
  586. }
  587. static void
  588. il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
  589. {
  590. struct il_rx_pkt *pkt = rxb_addr(rxb);
  591. struct il_alive_resp *palive;
  592. struct delayed_work *pwork;
  593. palive = &pkt->u.alive_frame;
  594. D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
  595. palive->is_valid, palive->ver_type, palive->ver_subtype);
  596. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  597. D_INFO("Initialization Alive received.\n");
  598. memcpy(&il->card_alive_init, &pkt->u.alive_frame,
  599. sizeof(struct il_alive_resp));
  600. pwork = &il->init_alive_start;
  601. } else {
  602. D_INFO("Runtime Alive received.\n");
  603. memcpy(&il->card_alive, &pkt->u.alive_frame,
  604. sizeof(struct il_alive_resp));
  605. pwork = &il->alive_start;
  606. il3945_disable_events(il);
  607. }
  608. /* We delay the ALIVE response by 5ms to
  609. * give the HW RF Kill time to activate... */
  610. if (palive->is_valid == UCODE_VALID_OK)
  611. queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
  612. else
  613. IL_WARN("uCode did not respond OK.\n");
  614. }
  615. static void
  616. il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb)
  617. {
  618. struct il_rx_pkt *pkt = rxb_addr(rxb);
  619. D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status);
  620. }
  621. static void
  622. il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
  623. {
  624. struct il_rx_pkt *pkt = rxb_addr(rxb);
  625. struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  626. #ifdef CONFIG_IWLEGACY_DEBUG
  627. u8 rate = beacon->beacon_notify_hdr.rate;
  628. D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n",
  629. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  630. beacon->beacon_notify_hdr.failure_frame,
  631. le32_to_cpu(beacon->ibss_mgr_status),
  632. le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
  633. #endif
  634. il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
  635. }
  636. /* Handle notification from uCode that card's power state is changing
  637. * due to software, hardware, or critical temperature RFKILL */
  638. static void
  639. il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
  640. {
  641. struct il_rx_pkt *pkt = rxb_addr(rxb);
  642. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  643. unsigned long status = il->status;
  644. IL_WARN("Card state received: HW:%s SW:%s\n",
  645. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  646. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  647. _il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  648. if (flags & HW_CARD_DISABLED)
  649. set_bit(S_RFKILL, &il->status);
  650. else
  651. clear_bit(S_RFKILL, &il->status);
  652. il_scan_cancel(il);
  653. if ((test_bit(S_RFKILL, &status) !=
  654. test_bit(S_RFKILL, &il->status)))
  655. wiphy_rfkill_set_hw_state(il->hw->wiphy,
  656. test_bit(S_RFKILL, &il->status));
  657. else
  658. wake_up(&il->wait_command_queue);
  659. }
  660. /*
  661. * il3945_setup_handlers - Initialize Rx handler callbacks
  662. *
  663. * Setup the RX handlers for each of the reply types sent from the uCode
  664. * to the host.
  665. *
  666. * This function chains into the hardware specific files for them to setup
  667. * any hardware specific handlers as well.
  668. */
  669. static void
  670. il3945_setup_handlers(struct il_priv *il)
  671. {
  672. il->handlers[N_ALIVE] = il3945_hdl_alive;
  673. il->handlers[C_ADD_STA] = il3945_hdl_add_sta;
  674. il->handlers[N_ERROR] = il_hdl_error;
  675. il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
  676. il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
  677. il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
  678. il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
  679. il->handlers[N_BEACON] = il3945_hdl_beacon;
  680. /*
  681. * The same handler is used for both the REPLY to a discrete
  682. * stats request from the host as well as for the periodic
  683. * stats notifications (after received beacons) from the uCode.
  684. */
  685. il->handlers[C_STATS] = il3945_hdl_c_stats;
  686. il->handlers[N_STATS] = il3945_hdl_stats;
  687. il_setup_rx_scan_handlers(il);
  688. il->handlers[N_CARD_STATE] = il3945_hdl_card_state;
  689. /* Set up hardware specific Rx handlers */
  690. il3945_hw_handler_setup(il);
  691. }
  692. /************************** RX-FUNCTIONS ****************************/
  693. /*
  694. * Rx theory of operation
  695. *
  696. * The host allocates 32 DMA target addresses and passes the host address
  697. * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is
  698. * 0 to 31
  699. *
  700. * Rx Queue Indexes
  701. * The host/firmware share two idx registers for managing the Rx buffers.
  702. *
  703. * The READ idx maps to the first position that the firmware may be writing
  704. * to -- the driver can read up to (but not including) this position and get
  705. * good data.
  706. * The READ idx is managed by the firmware once the card is enabled.
  707. *
  708. * The WRITE idx maps to the last position the driver has read from -- the
  709. * position preceding WRITE is the last slot the firmware can place a packet.
  710. *
  711. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  712. * WRITE = READ.
  713. *
  714. * During initialization, the host sets up the READ queue position to the first
  715. * IDX position, and WRITE to the last (READ - 1 wrapped)
  716. *
  717. * When the firmware places a packet in a buffer, it will advance the READ idx
  718. * and fire the RX interrupt. The driver can then query the READ idx and
  719. * process as many packets as possible, moving the WRITE idx forward as it
  720. * resets the Rx queue buffers with new memory.
  721. *
  722. * The management in the driver is as follows:
  723. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  724. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  725. * to replenish the iwl->rxq->rx_free.
  726. * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  727. * iwl->rxq is replenished and the READ IDX is updated (updating the
  728. * 'processed' and 'read' driver idxes as well)
  729. * + A received packet is processed and handed to the kernel network stack,
  730. * detached from the iwl->rxq. The driver 'processed' idx is updated.
  731. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  732. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  733. * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
  734. * were enough free buffers and RX_STALLED is set it is cleared.
  735. *
  736. *
  737. * Driver sequence:
  738. *
  739. * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  740. * il3945_rx_queue_restock
  741. * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  742. * queue, updates firmware pointers, and updates
  743. * the WRITE idx. If insufficient rx_free buffers
  744. * are available, schedules il3945_rx_replenish
  745. *
  746. * -- enable interrupts --
  747. * ISR - il3945_rx() Detach il_rx_bufs from pool up to the
  748. * READ IDX, detaching the SKB from the pool.
  749. * Moves the packet buffer from queue to rx_used.
  750. * Calls il3945_rx_queue_restock to refill any empty
  751. * slots.
  752. * ...
  753. *
  754. */
  755. /*
  756. * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  757. */
  758. static inline __le32
  759. il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
  760. {
  761. return cpu_to_le32((u32) dma_addr);
  762. }
  763. /*
  764. * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
  765. *
  766. * If there are slots in the RX queue that need to be restocked,
  767. * and we have free pre-allocated buffers, fill the ranks as much
  768. * as we can, pulling from rx_free.
  769. *
  770. * This moves the 'write' idx forward to catch up with 'processed', and
  771. * also updates the memory address in the firmware to reference the new
  772. * target buffer.
  773. */
  774. static void
  775. il3945_rx_queue_restock(struct il_priv *il)
  776. {
  777. struct il_rx_queue *rxq = &il->rxq;
  778. struct list_head *element;
  779. struct il_rx_buf *rxb;
  780. unsigned long flags;
  781. spin_lock_irqsave(&rxq->lock, flags);
  782. while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
  783. /* Get next free Rx buffer, remove from free list */
  784. element = rxq->rx_free.next;
  785. rxb = list_entry(element, struct il_rx_buf, list);
  786. list_del(element);
  787. /* Point to Rx buffer via next RBD in circular buffer */
  788. rxq->bd[rxq->write] =
  789. il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
  790. rxq->queue[rxq->write] = rxb;
  791. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  792. rxq->free_count--;
  793. }
  794. spin_unlock_irqrestore(&rxq->lock, flags);
  795. /* If the pre-allocated buffer pool is dropping low, schedule to
  796. * refill it */
  797. if (rxq->free_count <= RX_LOW_WATERMARK)
  798. queue_work(il->workqueue, &il->rx_replenish);
  799. /* If we've added more space for the firmware to place data, tell it.
  800. * Increment device's write pointer in multiples of 8. */
  801. if (rxq->write_actual != (rxq->write & ~0x7) ||
  802. abs(rxq->write - rxq->read) > 7) {
  803. spin_lock_irqsave(&rxq->lock, flags);
  804. rxq->need_update = 1;
  805. spin_unlock_irqrestore(&rxq->lock, flags);
  806. il_rx_queue_update_write_ptr(il, rxq);
  807. }
  808. }
  809. /*
  810. * il3945_rx_replenish - Move all used packet from rx_used to rx_free
  811. *
  812. * When moving to rx_free an SKB is allocated for the slot.
  813. *
  814. * Also restock the Rx queue via il3945_rx_queue_restock.
  815. * This is called as a scheduled work item (except for during initialization)
  816. */
  817. static void
  818. il3945_rx_allocate(struct il_priv *il, gfp_t priority)
  819. {
  820. struct il_rx_queue *rxq = &il->rxq;
  821. struct list_head *element;
  822. struct il_rx_buf *rxb;
  823. struct page *page;
  824. dma_addr_t page_dma;
  825. unsigned long flags;
  826. gfp_t gfp_mask = priority;
  827. while (1) {
  828. spin_lock_irqsave(&rxq->lock, flags);
  829. if (list_empty(&rxq->rx_used)) {
  830. spin_unlock_irqrestore(&rxq->lock, flags);
  831. return;
  832. }
  833. spin_unlock_irqrestore(&rxq->lock, flags);
  834. if (rxq->free_count > RX_LOW_WATERMARK)
  835. gfp_mask |= __GFP_NOWARN;
  836. if (il->hw_params.rx_page_order > 0)
  837. gfp_mask |= __GFP_COMP;
  838. /* Alloc a new receive buffer */
  839. page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
  840. if (!page) {
  841. if (net_ratelimit())
  842. D_INFO("Failed to allocate SKB buffer.\n");
  843. if (rxq->free_count <= RX_LOW_WATERMARK &&
  844. net_ratelimit())
  845. IL_ERR("Failed to allocate SKB buffer with %0x."
  846. "Only %u free buffers remaining.\n",
  847. priority, rxq->free_count);
  848. /* We don't reschedule replenish work here -- we will
  849. * call the restock method and if it still needs
  850. * more buffers it will schedule replenish */
  851. break;
  852. }
  853. /* Get physical address of RB/SKB */
  854. page_dma =
  855. dma_map_page(&il->pci_dev->dev, page, 0,
  856. PAGE_SIZE << il->hw_params.rx_page_order,
  857. DMA_FROM_DEVICE);
  858. if (unlikely(dma_mapping_error(&il->pci_dev->dev, page_dma))) {
  859. __free_pages(page, il->hw_params.rx_page_order);
  860. break;
  861. }
  862. spin_lock_irqsave(&rxq->lock, flags);
  863. if (list_empty(&rxq->rx_used)) {
  864. spin_unlock_irqrestore(&rxq->lock, flags);
  865. dma_unmap_page(&il->pci_dev->dev, page_dma,
  866. PAGE_SIZE << il->hw_params.rx_page_order,
  867. DMA_FROM_DEVICE);
  868. __free_pages(page, il->hw_params.rx_page_order);
  869. return;
  870. }
  871. element = rxq->rx_used.next;
  872. rxb = list_entry(element, struct il_rx_buf, list);
  873. list_del(element);
  874. rxb->page = page;
  875. rxb->page_dma = page_dma;
  876. list_add_tail(&rxb->list, &rxq->rx_free);
  877. rxq->free_count++;
  878. il->alloc_rxb_page++;
  879. spin_unlock_irqrestore(&rxq->lock, flags);
  880. }
  881. }
  882. void
  883. il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
  884. {
  885. unsigned long flags;
  886. int i;
  887. spin_lock_irqsave(&rxq->lock, flags);
  888. INIT_LIST_HEAD(&rxq->rx_free);
  889. INIT_LIST_HEAD(&rxq->rx_used);
  890. /* Fill the rx_used queue with _all_ of the Rx buffers */
  891. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  892. /* In the reset function, these buffers may have been allocated
  893. * to an SKB, so we need to unmap and free potential storage */
  894. if (rxq->pool[i].page != NULL) {
  895. dma_unmap_page(&il->pci_dev->dev,
  896. rxq->pool[i].page_dma,
  897. PAGE_SIZE << il->hw_params.rx_page_order,
  898. DMA_FROM_DEVICE);
  899. __il_free_pages(il, rxq->pool[i].page);
  900. rxq->pool[i].page = NULL;
  901. }
  902. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  903. }
  904. /* Set us so that we have processed and used all buffers, but have
  905. * not restocked the Rx queue with fresh buffers */
  906. rxq->read = rxq->write = 0;
  907. rxq->write_actual = 0;
  908. rxq->free_count = 0;
  909. spin_unlock_irqrestore(&rxq->lock, flags);
  910. }
  911. void
  912. il3945_rx_replenish(void *data)
  913. {
  914. struct il_priv *il = data;
  915. unsigned long flags;
  916. il3945_rx_allocate(il, GFP_KERNEL);
  917. spin_lock_irqsave(&il->lock, flags);
  918. il3945_rx_queue_restock(il);
  919. spin_unlock_irqrestore(&il->lock, flags);
  920. }
  921. static void
  922. il3945_rx_replenish_now(struct il_priv *il)
  923. {
  924. il3945_rx_allocate(il, GFP_ATOMIC);
  925. il3945_rx_queue_restock(il);
  926. }
  927. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  928. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  929. * This free routine walks the list of POOL entries and if SKB is set to
  930. * non NULL it is unmapped and freed
  931. */
  932. static void
  933. il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
  934. {
  935. int i;
  936. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  937. if (rxq->pool[i].page != NULL) {
  938. dma_unmap_page(&il->pci_dev->dev,
  939. rxq->pool[i].page_dma,
  940. PAGE_SIZE << il->hw_params.rx_page_order,
  941. DMA_FROM_DEVICE);
  942. __il_free_pages(il, rxq->pool[i].page);
  943. rxq->pool[i].page = NULL;
  944. }
  945. }
  946. dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  947. rxq->bd_dma);
  948. dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
  949. rxq->rb_stts, rxq->rb_stts_dma);
  950. rxq->bd = NULL;
  951. rxq->rb_stts = NULL;
  952. }
  953. /* Convert linear signal-to-noise ratio into dB */
  954. static u8 ratio2dB[100] = {
  955. /* 0 1 2 3 4 5 6 7 8 9 */
  956. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  957. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  958. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  959. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  960. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  961. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  962. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  963. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  964. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  965. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  966. };
  967. /* Calculates a relative dB value from a ratio of linear
  968. * (i.e. not dB) signal levels.
  969. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  970. int
  971. il3945_calc_db_from_ratio(int sig_ratio)
  972. {
  973. /* 1000:1 or higher just report as 60 dB */
  974. if (sig_ratio >= 1000)
  975. return 60;
  976. /* 100:1 or higher, divide by 10 and use table,
  977. * add 20 dB to make up for divide by 10 */
  978. if (sig_ratio >= 100)
  979. return 20 + (int)ratio2dB[sig_ratio / 10];
  980. /* We shouldn't see this */
  981. if (sig_ratio < 1)
  982. return 0;
  983. /* Use table for ratios 1:1 - 99:1 */
  984. return (int)ratio2dB[sig_ratio];
  985. }
  986. /*
  987. * il3945_rx_handle - Main entry function for receiving responses from uCode
  988. *
  989. * Uses the il->handlers callback function array to invoke
  990. * the appropriate handlers, including command responses,
  991. * frame-received notifications, and other notifications.
  992. */
  993. static void
  994. il3945_rx_handle(struct il_priv *il)
  995. {
  996. struct il_rx_buf *rxb;
  997. struct il_rx_pkt *pkt;
  998. struct il_rx_queue *rxq = &il->rxq;
  999. u32 r, i;
  1000. int reclaim;
  1001. unsigned long flags;
  1002. u8 fill_rx = 0;
  1003. u32 count = 8;
  1004. int total_empty = 0;
  1005. /* uCode's read idx (stored in shared DRAM) indicates the last Rx
  1006. * buffer that the driver may process (last buffer filled by ucode). */
  1007. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1008. i = rxq->read;
  1009. /* calculate total frames need to be restock after handling RX */
  1010. total_empty = r - rxq->write_actual;
  1011. if (total_empty < 0)
  1012. total_empty += RX_QUEUE_SIZE;
  1013. if (total_empty > (RX_QUEUE_SIZE / 2))
  1014. fill_rx = 1;
  1015. /* Rx interrupt, but nothing sent from uCode */
  1016. if (i == r)
  1017. D_RX("r = %d, i = %d\n", r, i);
  1018. while (i != r) {
  1019. rxb = rxq->queue[i];
  1020. /* If an RXB doesn't have a Rx queue slot associated with it,
  1021. * then a bug has been introduced in the queue refilling
  1022. * routines -- catch it here */
  1023. BUG_ON(rxb == NULL);
  1024. rxq->queue[i] = NULL;
  1025. dma_unmap_page(&il->pci_dev->dev, rxb->page_dma,
  1026. PAGE_SIZE << il->hw_params.rx_page_order,
  1027. DMA_FROM_DEVICE);
  1028. pkt = rxb_addr(rxb);
  1029. reclaim = il_need_reclaim(il, pkt);
  1030. /* Based on type of command response or notification,
  1031. * handle those that need handling via function in
  1032. * handlers table. See il3945_setup_handlers() */
  1033. if (il->handlers[pkt->hdr.cmd]) {
  1034. D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
  1035. il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1036. il->isr_stats.handlers[pkt->hdr.cmd]++;
  1037. il->handlers[pkt->hdr.cmd] (il, rxb);
  1038. } else {
  1039. /* No handling needed */
  1040. D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
  1041. i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1042. }
  1043. /*
  1044. * XXX: After here, we should always check rxb->page
  1045. * against NULL before touching it or its virtual
  1046. * memory (pkt). Because some handler might have
  1047. * already taken or freed the pages.
  1048. */
  1049. if (reclaim) {
  1050. /* Invoke any callbacks, transfer the buffer to caller,
  1051. * and fire off the (possibly) blocking il_send_cmd()
  1052. * as we reclaim the driver command queue */
  1053. if (rxb->page)
  1054. il_tx_cmd_complete(il, rxb);
  1055. else
  1056. IL_WARN("Claim null rxb?\n");
  1057. }
  1058. /* Reuse the page if possible. For notification packets and
  1059. * SKBs that fail to Rx correctly, add them back into the
  1060. * rx_free list for reuse later. */
  1061. spin_lock_irqsave(&rxq->lock, flags);
  1062. if (rxb->page != NULL) {
  1063. rxb->page_dma =
  1064. dma_map_page(&il->pci_dev->dev, rxb->page, 0,
  1065. PAGE_SIZE << il->hw_params.rx_page_order,
  1066. DMA_FROM_DEVICE);
  1067. if (unlikely(dma_mapping_error(&il->pci_dev->dev,
  1068. rxb->page_dma))) {
  1069. __il_free_pages(il, rxb->page);
  1070. rxb->page = NULL;
  1071. list_add_tail(&rxb->list, &rxq->rx_used);
  1072. } else {
  1073. list_add_tail(&rxb->list, &rxq->rx_free);
  1074. rxq->free_count++;
  1075. }
  1076. } else
  1077. list_add_tail(&rxb->list, &rxq->rx_used);
  1078. spin_unlock_irqrestore(&rxq->lock, flags);
  1079. i = (i + 1) & RX_QUEUE_MASK;
  1080. /* If there are a lot of unused frames,
  1081. * restock the Rx queue so ucode won't assert. */
  1082. if (fill_rx) {
  1083. count++;
  1084. if (count >= 8) {
  1085. rxq->read = i;
  1086. il3945_rx_replenish_now(il);
  1087. count = 0;
  1088. }
  1089. }
  1090. }
  1091. /* Backtrack one entry */
  1092. rxq->read = i;
  1093. if (fill_rx)
  1094. il3945_rx_replenish_now(il);
  1095. else
  1096. il3945_rx_queue_restock(il);
  1097. }
  1098. /* call this function to flush any scheduled tasklet */
  1099. static inline void
  1100. il3945_synchronize_irq(struct il_priv *il)
  1101. {
  1102. /* wait to make sure we flush pending tasklet */
  1103. synchronize_irq(il->pci_dev->irq);
  1104. tasklet_kill(&il->irq_tasklet);
  1105. }
  1106. static const char *
  1107. il3945_desc_lookup(int i)
  1108. {
  1109. switch (i) {
  1110. case 1:
  1111. return "FAIL";
  1112. case 2:
  1113. return "BAD_PARAM";
  1114. case 3:
  1115. return "BAD_CHECKSUM";
  1116. case 4:
  1117. return "NMI_INTERRUPT";
  1118. case 5:
  1119. return "SYSASSERT";
  1120. case 6:
  1121. return "FATAL_ERROR";
  1122. }
  1123. return "UNKNOWN";
  1124. }
  1125. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1126. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1127. void
  1128. il3945_dump_nic_error_log(struct il_priv *il)
  1129. {
  1130. u32 i;
  1131. u32 desc, time, count, base, data1;
  1132. u32 blink1, blink2, ilink1, ilink2;
  1133. base = le32_to_cpu(il->card_alive.error_event_table_ptr);
  1134. if (!il3945_hw_valid_rtc_data_addr(base)) {
  1135. IL_ERR("Not valid error log pointer 0x%08X\n", base);
  1136. return;
  1137. }
  1138. count = il_read_targ_mem(il, base);
  1139. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1140. IL_ERR("Start IWL Error Log Dump:\n");
  1141. IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
  1142. }
  1143. IL_ERR("Desc Time asrtPC blink2 "
  1144. "ilink1 nmiPC Line\n");
  1145. for (i = ERROR_START_OFFSET;
  1146. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1147. i += ERROR_ELEM_SIZE) {
  1148. desc = il_read_targ_mem(il, base + i);
  1149. time = il_read_targ_mem(il, base + i + 1 * sizeof(u32));
  1150. blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32));
  1151. blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32));
  1152. ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32));
  1153. ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32));
  1154. data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32));
  1155. IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1156. il3945_desc_lookup(desc), desc, time, blink1, blink2,
  1157. ilink1, ilink2, data1);
  1158. }
  1159. }
  1160. static void
  1161. il3945_irq_tasklet(struct tasklet_struct *t)
  1162. {
  1163. struct il_priv *il = from_tasklet(il, t, irq_tasklet);
  1164. u32 inta, handled = 0;
  1165. u32 inta_fh;
  1166. unsigned long flags;
  1167. #ifdef CONFIG_IWLEGACY_DEBUG
  1168. u32 inta_mask;
  1169. #endif
  1170. spin_lock_irqsave(&il->lock, flags);
  1171. /* Ack/clear/reset pending uCode interrupts.
  1172. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1173. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1174. inta = _il_rd(il, CSR_INT);
  1175. _il_wr(il, CSR_INT, inta);
  1176. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1177. * Any new interrupts that happen after this, either while we're
  1178. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1179. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1180. _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
  1181. #ifdef CONFIG_IWLEGACY_DEBUG
  1182. if (il_get_debug_level(il) & IL_DL_ISR) {
  1183. /* just for debug */
  1184. inta_mask = _il_rd(il, CSR_INT_MASK);
  1185. D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
  1186. inta_mask, inta_fh);
  1187. }
  1188. #endif
  1189. spin_unlock_irqrestore(&il->lock, flags);
  1190. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1191. * atomic, make sure that inta covers all the interrupts that
  1192. * we've discovered, even if FH interrupt came in just after
  1193. * reading CSR_INT. */
  1194. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1195. inta |= CSR_INT_BIT_FH_RX;
  1196. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1197. inta |= CSR_INT_BIT_FH_TX;
  1198. /* Now service all interrupt bits discovered above. */
  1199. if (inta & CSR_INT_BIT_HW_ERR) {
  1200. IL_ERR("Hardware error detected. Restarting.\n");
  1201. /* Tell the device to stop sending interrupts */
  1202. il_disable_interrupts(il);
  1203. il->isr_stats.hw++;
  1204. il_irq_handle_error(il);
  1205. handled |= CSR_INT_BIT_HW_ERR;
  1206. return;
  1207. }
  1208. #ifdef CONFIG_IWLEGACY_DEBUG
  1209. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1210. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1211. if (inta & CSR_INT_BIT_SCD) {
  1212. D_ISR("Scheduler finished to transmit "
  1213. "the frame/frames.\n");
  1214. il->isr_stats.sch++;
  1215. }
  1216. /* Alive notification via Rx interrupt will do the real work */
  1217. if (inta & CSR_INT_BIT_ALIVE) {
  1218. D_ISR("Alive interrupt\n");
  1219. il->isr_stats.alive++;
  1220. }
  1221. }
  1222. #endif
  1223. /* Safely ignore these bits for debug checks below */
  1224. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1225. /* Error detected by uCode */
  1226. if (inta & CSR_INT_BIT_SW_ERR) {
  1227. IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n",
  1228. inta);
  1229. il->isr_stats.sw++;
  1230. il_irq_handle_error(il);
  1231. handled |= CSR_INT_BIT_SW_ERR;
  1232. }
  1233. /* uCode wakes up after power-down sleep */
  1234. if (inta & CSR_INT_BIT_WAKEUP) {
  1235. D_ISR("Wakeup interrupt\n");
  1236. il_rx_queue_update_write_ptr(il, &il->rxq);
  1237. spin_lock_irqsave(&il->lock, flags);
  1238. il_txq_update_write_ptr(il, &il->txq[0]);
  1239. il_txq_update_write_ptr(il, &il->txq[1]);
  1240. il_txq_update_write_ptr(il, &il->txq[2]);
  1241. il_txq_update_write_ptr(il, &il->txq[3]);
  1242. il_txq_update_write_ptr(il, &il->txq[4]);
  1243. spin_unlock_irqrestore(&il->lock, flags);
  1244. il->isr_stats.wakeup++;
  1245. handled |= CSR_INT_BIT_WAKEUP;
  1246. }
  1247. /* All uCode command responses, including Tx command responses,
  1248. * Rx "responses" (frame-received notification), and other
  1249. * notifications from uCode come through here*/
  1250. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1251. il3945_rx_handle(il);
  1252. il->isr_stats.rx++;
  1253. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1254. }
  1255. if (inta & CSR_INT_BIT_FH_TX) {
  1256. D_ISR("Tx interrupt\n");
  1257. il->isr_stats.tx++;
  1258. _il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
  1259. il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0);
  1260. handled |= CSR_INT_BIT_FH_TX;
  1261. }
  1262. if (inta & ~handled) {
  1263. IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1264. il->isr_stats.unhandled++;
  1265. }
  1266. if (inta & ~il->inta_mask) {
  1267. IL_WARN("Disabled INTA bits 0x%08x were pending\n",
  1268. inta & ~il->inta_mask);
  1269. IL_WARN(" with inta_fh = 0x%08x\n", inta_fh);
  1270. }
  1271. /* Re-enable all interrupts */
  1272. /* only Re-enable if disabled by irq */
  1273. if (test_bit(S_INT_ENABLED, &il->status))
  1274. il_enable_interrupts(il);
  1275. #ifdef CONFIG_IWLEGACY_DEBUG
  1276. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1277. inta = _il_rd(il, CSR_INT);
  1278. inta_mask = _il_rd(il, CSR_INT_MASK);
  1279. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1280. D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1281. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1282. }
  1283. #endif
  1284. }
  1285. static int
  1286. il3945_get_channels_for_scan(struct il_priv *il, enum nl80211_band band,
  1287. u8 is_active, u8 n_probes,
  1288. struct il3945_scan_channel *scan_ch,
  1289. struct ieee80211_vif *vif)
  1290. {
  1291. struct ieee80211_channel *chan;
  1292. const struct ieee80211_supported_band *sband;
  1293. const struct il_channel_info *ch_info;
  1294. u16 passive_dwell = 0;
  1295. u16 active_dwell = 0;
  1296. int added, i;
  1297. sband = il_get_hw_mode(il, band);
  1298. if (!sband)
  1299. return 0;
  1300. active_dwell = il_get_active_dwell_time(il, band, n_probes);
  1301. passive_dwell = il_get_passive_dwell_time(il, band, vif);
  1302. if (passive_dwell <= active_dwell)
  1303. passive_dwell = active_dwell + 1;
  1304. for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
  1305. chan = il->scan_request->channels[i];
  1306. if (chan->band != band)
  1307. continue;
  1308. scan_ch->channel = chan->hw_value;
  1309. ch_info = il_get_channel_info(il, band, scan_ch->channel);
  1310. if (!il_is_channel_valid(ch_info)) {
  1311. D_SCAN("Channel %d is INVALID for this band.\n",
  1312. scan_ch->channel);
  1313. continue;
  1314. }
  1315. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1316. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1317. /* If passive , set up for auto-switch
  1318. * and use long active_dwell time.
  1319. */
  1320. if (!is_active || il_is_channel_passive(ch_info) ||
  1321. (chan->flags & IEEE80211_CHAN_NO_IR)) {
  1322. scan_ch->type = 0; /* passive */
  1323. if (IL_UCODE_API(il->ucode_ver) == 1)
  1324. scan_ch->active_dwell =
  1325. cpu_to_le16(passive_dwell - 1);
  1326. } else {
  1327. scan_ch->type = 1; /* active */
  1328. }
  1329. /* Set direct probe bits. These may be used both for active
  1330. * scan channels (probes gets sent right away),
  1331. * or for passive channels (probes get se sent only after
  1332. * hearing clear Rx packet).*/
  1333. if (IL_UCODE_API(il->ucode_ver) >= 2) {
  1334. if (n_probes)
  1335. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1336. } else {
  1337. /* uCode v1 does not allow setting direct probe bits on
  1338. * passive channel. */
  1339. if ((scan_ch->type & 1) && n_probes)
  1340. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1341. }
  1342. /* Set txpower levels to defaults */
  1343. scan_ch->tpc.dsp_atten = 110;
  1344. /* scan_pwr_info->tpc.dsp_atten; */
  1345. /*scan_pwr_info->tpc.tx_gain; */
  1346. if (band == NL80211_BAND_5GHZ)
  1347. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1348. else {
  1349. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1350. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1351. * power level:
  1352. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1353. */
  1354. }
  1355. D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel,
  1356. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1357. (scan_ch->type & 1) ? active_dwell : passive_dwell);
  1358. scan_ch++;
  1359. added++;
  1360. }
  1361. D_SCAN("total channels to scan %d\n", added);
  1362. return added;
  1363. }
  1364. static void
  1365. il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
  1366. {
  1367. int i;
  1368. for (i = 0; i < RATE_COUNT_LEGACY; i++) {
  1369. rates[i].bitrate = il3945_rates[i].ieee * 5;
  1370. rates[i].hw_value = i; /* Rate scaling will work on idxes */
  1371. rates[i].hw_value_short = i;
  1372. rates[i].flags = 0;
  1373. if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
  1374. /*
  1375. * If CCK != 1M then set short preamble rate flag.
  1376. */
  1377. rates[i].flags |=
  1378. (il3945_rates[i].plcp ==
  1379. 10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1380. }
  1381. }
  1382. }
  1383. /******************************************************************************
  1384. *
  1385. * uCode download functions
  1386. *
  1387. ******************************************************************************/
  1388. static void
  1389. il3945_dealloc_ucode_pci(struct il_priv *il)
  1390. {
  1391. il_free_fw_desc(il->pci_dev, &il->ucode_code);
  1392. il_free_fw_desc(il->pci_dev, &il->ucode_data);
  1393. il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1394. il_free_fw_desc(il->pci_dev, &il->ucode_init);
  1395. il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
  1396. il_free_fw_desc(il->pci_dev, &il->ucode_boot);
  1397. }
  1398. /*
  1399. * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1400. * looking at all data.
  1401. */
  1402. static int
  1403. il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
  1404. {
  1405. u32 val;
  1406. u32 save_len = len;
  1407. int rc = 0;
  1408. u32 errcnt;
  1409. D_INFO("ucode inst image size is %u\n", len);
  1410. il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND);
  1411. errcnt = 0;
  1412. for (; len > 0; len -= sizeof(u32), image++) {
  1413. /* read data comes through single port, auto-incr addr */
  1414. /* NOTE: Use the debugless read so we don't flood kernel log
  1415. * if IL_DL_IO is set */
  1416. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1417. if (val != le32_to_cpu(*image)) {
  1418. IL_ERR("uCode INST section is invalid at "
  1419. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1420. save_len - len, val, le32_to_cpu(*image));
  1421. rc = -EIO;
  1422. errcnt++;
  1423. if (errcnt >= 20)
  1424. break;
  1425. }
  1426. }
  1427. if (!errcnt)
  1428. D_INFO("ucode image in INSTRUCTION memory is good\n");
  1429. return rc;
  1430. }
  1431. /*
  1432. * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1433. * using sample data 100 bytes apart. If these sample points are good,
  1434. * it's a pretty good bet that everything between them is good, too.
  1435. */
  1436. static int
  1437. il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
  1438. {
  1439. u32 val;
  1440. int rc = 0;
  1441. u32 errcnt = 0;
  1442. u32 i;
  1443. D_INFO("ucode inst image size is %u\n", len);
  1444. for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
  1445. /* read data comes through single port, auto-incr addr */
  1446. /* NOTE: Use the debugless read so we don't flood kernel log
  1447. * if IL_DL_IO is set */
  1448. il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND);
  1449. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1450. if (val != le32_to_cpu(*image)) {
  1451. #if 0 /* Enable this if you want to see details */
  1452. IL_ERR("uCode INST section is invalid at "
  1453. "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val,
  1454. *image);
  1455. #endif
  1456. rc = -EIO;
  1457. errcnt++;
  1458. if (errcnt >= 3)
  1459. break;
  1460. }
  1461. }
  1462. return rc;
  1463. }
  1464. /*
  1465. * il3945_verify_ucode - determine which instruction image is in SRAM,
  1466. * and verify its contents
  1467. */
  1468. static int
  1469. il3945_verify_ucode(struct il_priv *il)
  1470. {
  1471. __le32 *image;
  1472. u32 len;
  1473. int rc = 0;
  1474. /* Try bootstrap */
  1475. image = (__le32 *) il->ucode_boot.v_addr;
  1476. len = il->ucode_boot.len;
  1477. rc = il3945_verify_inst_sparse(il, image, len);
  1478. if (rc == 0) {
  1479. D_INFO("Bootstrap uCode is good in inst SRAM\n");
  1480. return 0;
  1481. }
  1482. /* Try initialize */
  1483. image = (__le32 *) il->ucode_init.v_addr;
  1484. len = il->ucode_init.len;
  1485. rc = il3945_verify_inst_sparse(il, image, len);
  1486. if (rc == 0) {
  1487. D_INFO("Initialize uCode is good in inst SRAM\n");
  1488. return 0;
  1489. }
  1490. /* Try runtime/protocol */
  1491. image = (__le32 *) il->ucode_code.v_addr;
  1492. len = il->ucode_code.len;
  1493. rc = il3945_verify_inst_sparse(il, image, len);
  1494. if (rc == 0) {
  1495. D_INFO("Runtime uCode is good in inst SRAM\n");
  1496. return 0;
  1497. }
  1498. IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1499. /* Since nothing seems to match, show first several data entries in
  1500. * instruction SRAM, so maybe visual inspection will give a clue.
  1501. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1502. image = (__le32 *) il->ucode_boot.v_addr;
  1503. len = il->ucode_boot.len;
  1504. rc = il3945_verify_inst_full(il, image, len);
  1505. return rc;
  1506. }
  1507. static void
  1508. il3945_nic_start(struct il_priv *il)
  1509. {
  1510. /* Remove all resets to allow NIC to operate */
  1511. _il_wr(il, CSR_RESET, 0);
  1512. }
  1513. #define IL3945_UCODE_GET(item) \
  1514. static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
  1515. { \
  1516. return le32_to_cpu(ucode->v1.item); \
  1517. }
  1518. static u32
  1519. il3945_ucode_get_header_size(u32 api_ver)
  1520. {
  1521. return 24;
  1522. }
  1523. static u8 *
  1524. il3945_ucode_get_data(const struct il_ucode_header *ucode)
  1525. {
  1526. return (u8 *) ucode->v1.data;
  1527. }
  1528. IL3945_UCODE_GET(inst_size);
  1529. IL3945_UCODE_GET(data_size);
  1530. IL3945_UCODE_GET(init_size);
  1531. IL3945_UCODE_GET(init_data_size);
  1532. IL3945_UCODE_GET(boot_size);
  1533. /*
  1534. * il3945_read_ucode - Read uCode images from disk file.
  1535. *
  1536. * Copy into buffers for card to fetch via bus-mastering
  1537. */
  1538. static int
  1539. il3945_read_ucode(struct il_priv *il)
  1540. {
  1541. const struct il_ucode_header *ucode;
  1542. int ret = -EINVAL, idx;
  1543. const struct firmware *ucode_raw;
  1544. /* firmware file name contains uCode/driver compatibility version */
  1545. const char *name_pre = il->cfg->fw_name_pre;
  1546. const unsigned int api_max = il->cfg->ucode_api_max;
  1547. const unsigned int api_min = il->cfg->ucode_api_min;
  1548. char buf[25];
  1549. u8 *src;
  1550. size_t len;
  1551. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1552. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1553. * request_firmware() is synchronous, file is in memory on return. */
  1554. for (idx = api_max; idx >= api_min; idx--) {
  1555. sprintf(buf, "%s%u%s", name_pre, idx, ".ucode");
  1556. ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
  1557. if (ret < 0) {
  1558. IL_ERR("%s firmware file req failed: %d\n", buf, ret);
  1559. if (ret == -ENOENT)
  1560. continue;
  1561. else
  1562. goto error;
  1563. } else {
  1564. if (idx < api_max)
  1565. IL_ERR("Loaded firmware %s, "
  1566. "which is deprecated. "
  1567. " Please use API v%u instead.\n", buf,
  1568. api_max);
  1569. D_INFO("Got firmware '%s' file "
  1570. "(%zd bytes) from disk\n", buf, ucode_raw->size);
  1571. break;
  1572. }
  1573. }
  1574. if (ret < 0)
  1575. goto error;
  1576. /* Make sure that we got at least our header! */
  1577. if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
  1578. IL_ERR("File size way too small!\n");
  1579. ret = -EINVAL;
  1580. goto err_release;
  1581. }
  1582. /* Data from ucode file: header followed by uCode images */
  1583. ucode = (struct il_ucode_header *)ucode_raw->data;
  1584. il->ucode_ver = le32_to_cpu(ucode->ver);
  1585. api_ver = IL_UCODE_API(il->ucode_ver);
  1586. inst_size = il3945_ucode_get_inst_size(ucode);
  1587. data_size = il3945_ucode_get_data_size(ucode);
  1588. init_size = il3945_ucode_get_init_size(ucode);
  1589. init_data_size = il3945_ucode_get_init_data_size(ucode);
  1590. boot_size = il3945_ucode_get_boot_size(ucode);
  1591. src = il3945_ucode_get_data(ucode);
  1592. /* api_ver should match the api version forming part of the
  1593. * firmware filename ... but we don't check for that and only rely
  1594. * on the API version read from firmware header from here on forward */
  1595. if (api_ver < api_min || api_ver > api_max) {
  1596. IL_ERR("Driver unable to support your firmware API. "
  1597. "Driver supports v%u, firmware is v%u.\n", api_max,
  1598. api_ver);
  1599. il->ucode_ver = 0;
  1600. ret = -EINVAL;
  1601. goto err_release;
  1602. }
  1603. if (api_ver != api_max)
  1604. IL_ERR("Firmware has old API version. Expected %u, "
  1605. "got %u. New firmware can be obtained "
  1606. "from http://www.intellinuxwireless.org.\n", api_max,
  1607. api_ver);
  1608. IL_INFO("loaded firmware version %u.%u.%u.%u\n",
  1609. IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
  1610. IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
  1611. snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
  1612. "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
  1613. IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
  1614. IL_UCODE_SERIAL(il->ucode_ver));
  1615. D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
  1616. D_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
  1617. D_INFO("f/w package hdr runtime data size = %u\n", data_size);
  1618. D_INFO("f/w package hdr init inst size = %u\n", init_size);
  1619. D_INFO("f/w package hdr init data size = %u\n", init_data_size);
  1620. D_INFO("f/w package hdr boot inst size = %u\n", boot_size);
  1621. /* Verify size of file vs. image size info in file's header */
  1622. if (ucode_raw->size !=
  1623. il3945_ucode_get_header_size(api_ver) + inst_size + data_size +
  1624. init_size + init_data_size + boot_size) {
  1625. D_INFO("uCode file size %zd does not match expected size\n",
  1626. ucode_raw->size);
  1627. ret = -EINVAL;
  1628. goto err_release;
  1629. }
  1630. /* Verify that uCode images will fit in card's SRAM */
  1631. if (inst_size > IL39_MAX_INST_SIZE) {
  1632. D_INFO("uCode instr len %d too large to fit in\n", inst_size);
  1633. ret = -EINVAL;
  1634. goto err_release;
  1635. }
  1636. if (data_size > IL39_MAX_DATA_SIZE) {
  1637. D_INFO("uCode data len %d too large to fit in\n", data_size);
  1638. ret = -EINVAL;
  1639. goto err_release;
  1640. }
  1641. if (init_size > IL39_MAX_INST_SIZE) {
  1642. D_INFO("uCode init instr len %d too large to fit in\n",
  1643. init_size);
  1644. ret = -EINVAL;
  1645. goto err_release;
  1646. }
  1647. if (init_data_size > IL39_MAX_DATA_SIZE) {
  1648. D_INFO("uCode init data len %d too large to fit in\n",
  1649. init_data_size);
  1650. ret = -EINVAL;
  1651. goto err_release;
  1652. }
  1653. if (boot_size > IL39_MAX_BSM_SIZE) {
  1654. D_INFO("uCode boot instr len %d too large to fit in\n",
  1655. boot_size);
  1656. ret = -EINVAL;
  1657. goto err_release;
  1658. }
  1659. /* Allocate ucode buffers for card's bus-master loading ... */
  1660. /* Runtime instructions and 2 copies of data:
  1661. * 1) unmodified from disk
  1662. * 2) backup cache for save/restore during power-downs */
  1663. il->ucode_code.len = inst_size;
  1664. il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
  1665. il->ucode_data.len = data_size;
  1666. il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
  1667. il->ucode_data_backup.len = data_size;
  1668. il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1669. if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
  1670. !il->ucode_data_backup.v_addr)
  1671. goto err_pci_alloc;
  1672. /* Initialization instructions and data */
  1673. if (init_size && init_data_size) {
  1674. il->ucode_init.len = init_size;
  1675. il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
  1676. il->ucode_init_data.len = init_data_size;
  1677. il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
  1678. if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
  1679. goto err_pci_alloc;
  1680. }
  1681. /* Bootstrap (instructions only, no data) */
  1682. if (boot_size) {
  1683. il->ucode_boot.len = boot_size;
  1684. il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
  1685. if (!il->ucode_boot.v_addr)
  1686. goto err_pci_alloc;
  1687. }
  1688. /* Copy images into buffers for card's bus-master reads ... */
  1689. /* Runtime instructions (first block of data in file) */
  1690. len = inst_size;
  1691. D_INFO("Copying (but not loading) uCode instr len %zd\n", len);
  1692. memcpy(il->ucode_code.v_addr, src, len);
  1693. src += len;
  1694. D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1695. il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
  1696. /* Runtime data (2nd block)
  1697. * NOTE: Copy into backup buffer will be done in il3945_up() */
  1698. len = data_size;
  1699. D_INFO("Copying (but not loading) uCode data len %zd\n", len);
  1700. memcpy(il->ucode_data.v_addr, src, len);
  1701. memcpy(il->ucode_data_backup.v_addr, src, len);
  1702. src += len;
  1703. /* Initialization instructions (3rd block) */
  1704. if (init_size) {
  1705. len = init_size;
  1706. D_INFO("Copying (but not loading) init instr len %zd\n", len);
  1707. memcpy(il->ucode_init.v_addr, src, len);
  1708. src += len;
  1709. }
  1710. /* Initialization data (4th block) */
  1711. if (init_data_size) {
  1712. len = init_data_size;
  1713. D_INFO("Copying (but not loading) init data len %zd\n", len);
  1714. memcpy(il->ucode_init_data.v_addr, src, len);
  1715. src += len;
  1716. }
  1717. /* Bootstrap instructions (5th block) */
  1718. len = boot_size;
  1719. D_INFO("Copying (but not loading) boot instr len %zd\n", len);
  1720. memcpy(il->ucode_boot.v_addr, src, len);
  1721. /* We have our copies now, allow OS release its copies */
  1722. release_firmware(ucode_raw);
  1723. return 0;
  1724. err_pci_alloc:
  1725. IL_ERR("failed to allocate pci memory\n");
  1726. ret = -ENOMEM;
  1727. il3945_dealloc_ucode_pci(il);
  1728. err_release:
  1729. release_firmware(ucode_raw);
  1730. error:
  1731. return ret;
  1732. }
  1733. /*
  1734. * il3945_set_ucode_ptrs - Set uCode address location
  1735. *
  1736. * Tell initialization uCode where to find runtime uCode.
  1737. *
  1738. * BSM registers initially contain pointers to initialization uCode.
  1739. * We need to replace them to load runtime uCode inst and data,
  1740. * and to save runtime data when powering down.
  1741. */
  1742. static int
  1743. il3945_set_ucode_ptrs(struct il_priv *il)
  1744. {
  1745. dma_addr_t pinst;
  1746. dma_addr_t pdata;
  1747. /* bits 31:0 for 3945 */
  1748. pinst = il->ucode_code.p_addr;
  1749. pdata = il->ucode_data_backup.p_addr;
  1750. /* Tell bootstrap uCode where to find image to load */
  1751. il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
  1752. il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
  1753. il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
  1754. /* Inst byte count must be last to set up, bit 31 signals uCode
  1755. * that all new ptr/size info is in place */
  1756. il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
  1757. il->ucode_code.len | BSM_DRAM_INST_LOAD);
  1758. D_INFO("Runtime uCode pointers are set.\n");
  1759. return 0;
  1760. }
  1761. /*
  1762. * il3945_init_alive_start - Called after N_ALIVE notification received
  1763. *
  1764. * Called after N_ALIVE notification received from "initialize" uCode.
  1765. *
  1766. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  1767. */
  1768. static void
  1769. il3945_init_alive_start(struct il_priv *il)
  1770. {
  1771. /* Check alive response for "valid" sign from uCode */
  1772. if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
  1773. /* We had an error bringing up the hardware, so take it
  1774. * all the way back down so we can try again */
  1775. D_INFO("Initialize Alive failed.\n");
  1776. goto restart;
  1777. }
  1778. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  1779. * This is a paranoid check, because we would not have gotten the
  1780. * "initialize" alive if code weren't properly loaded. */
  1781. if (il3945_verify_ucode(il)) {
  1782. /* Runtime instruction load was bad;
  1783. * take it all the way back down so we can try again */
  1784. D_INFO("Bad \"initialize\" uCode load.\n");
  1785. goto restart;
  1786. }
  1787. /* Send pointers to protocol/runtime uCode image ... init code will
  1788. * load and launch runtime uCode, which will send us another "Alive"
  1789. * notification. */
  1790. D_INFO("Initialization Alive received.\n");
  1791. if (il3945_set_ucode_ptrs(il)) {
  1792. /* Runtime instruction load won't happen;
  1793. * take it all the way back down so we can try again */
  1794. D_INFO("Couldn't set up uCode pointers.\n");
  1795. goto restart;
  1796. }
  1797. return;
  1798. restart:
  1799. queue_work(il->workqueue, &il->restart);
  1800. }
  1801. /*
  1802. * il3945_alive_start - called after N_ALIVE notification received
  1803. * from protocol/runtime uCode (initialization uCode's
  1804. * Alive gets handled by il3945_init_alive_start()).
  1805. */
  1806. static void
  1807. il3945_alive_start(struct il_priv *il)
  1808. {
  1809. int thermal_spin = 0;
  1810. u32 rfkill;
  1811. D_INFO("Runtime Alive received.\n");
  1812. if (il->card_alive.is_valid != UCODE_VALID_OK) {
  1813. /* We had an error bringing up the hardware, so take it
  1814. * all the way back down so we can try again */
  1815. D_INFO("Alive failed.\n");
  1816. goto restart;
  1817. }
  1818. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  1819. * This is a paranoid check, because we would not have gotten the
  1820. * "runtime" alive if code weren't properly loaded. */
  1821. if (il3945_verify_ucode(il)) {
  1822. /* Runtime instruction load was bad;
  1823. * take it all the way back down so we can try again */
  1824. D_INFO("Bad runtime uCode load.\n");
  1825. goto restart;
  1826. }
  1827. rfkill = il_rd_prph(il, APMG_RFKILL_REG);
  1828. D_INFO("RFKILL status: 0x%x\n", rfkill);
  1829. if (rfkill & 0x1) {
  1830. clear_bit(S_RFKILL, &il->status);
  1831. /* if RFKILL is not on, then wait for thermal
  1832. * sensor in adapter to kick in */
  1833. while (il3945_hw_get_temperature(il) == 0) {
  1834. thermal_spin++;
  1835. udelay(10);
  1836. }
  1837. if (thermal_spin)
  1838. D_INFO("Thermal calibration took %dus\n",
  1839. thermal_spin * 10);
  1840. } else
  1841. set_bit(S_RFKILL, &il->status);
  1842. /* After the ALIVE response, we can send commands to 3945 uCode */
  1843. set_bit(S_ALIVE, &il->status);
  1844. /* Enable watchdog to monitor the driver tx queues */
  1845. il_setup_watchdog(il);
  1846. if (il_is_rfkill(il))
  1847. return;
  1848. ieee80211_wake_queues(il->hw);
  1849. il->active_rate = RATES_MASK_3945;
  1850. il_power_update_mode(il, true);
  1851. if (il_is_associated(il)) {
  1852. struct il3945_rxon_cmd *active_rxon =
  1853. (struct il3945_rxon_cmd *)(&il->active);
  1854. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  1855. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1856. } else {
  1857. /* Initialize our rx_config data */
  1858. il_connection_init_rx_config(il);
  1859. }
  1860. /* Configure Bluetooth device coexistence support */
  1861. il_send_bt_config(il);
  1862. set_bit(S_READY, &il->status);
  1863. /* Configure the adapter for unassociated operation */
  1864. il3945_commit_rxon(il);
  1865. il3945_reg_txpower_periodic(il);
  1866. D_INFO("ALIVE processing complete.\n");
  1867. wake_up(&il->wait_command_queue);
  1868. return;
  1869. restart:
  1870. queue_work(il->workqueue, &il->restart);
  1871. }
  1872. static void il3945_cancel_deferred_work(struct il_priv *il);
  1873. static void
  1874. __il3945_down(struct il_priv *il)
  1875. {
  1876. unsigned long flags;
  1877. int exit_pending;
  1878. D_INFO(DRV_NAME " is going down\n");
  1879. il_scan_cancel_timeout(il, 200);
  1880. exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
  1881. /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
  1882. * to prevent rearm timer */
  1883. del_timer_sync(&il->watchdog);
  1884. /* Station information will now be cleared in device */
  1885. il_clear_ucode_stations(il);
  1886. il_dealloc_bcast_stations(il);
  1887. il_clear_driver_stations(il);
  1888. /* Unblock any waiting calls */
  1889. wake_up_all(&il->wait_command_queue);
  1890. /* Wipe out the EXIT_PENDING status bit if we are not actually
  1891. * exiting the module */
  1892. if (!exit_pending)
  1893. clear_bit(S_EXIT_PENDING, &il->status);
  1894. /* stop and reset the on-board processor */
  1895. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  1896. /* tell the device to stop sending interrupts */
  1897. spin_lock_irqsave(&il->lock, flags);
  1898. il_disable_interrupts(il);
  1899. spin_unlock_irqrestore(&il->lock, flags);
  1900. il3945_synchronize_irq(il);
  1901. if (il->mac80211_registered)
  1902. ieee80211_stop_queues(il->hw);
  1903. /* If we have not previously called il3945_init() then
  1904. * clear all bits but the RF Kill bits and return */
  1905. if (!il_is_init(il)) {
  1906. il->status =
  1907. test_bit(S_RFKILL, &il->status) << S_RFKILL |
  1908. test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
  1909. test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
  1910. goto exit;
  1911. }
  1912. /* ...otherwise clear out all the status bits but the RF Kill
  1913. * bit and continue taking the NIC down. */
  1914. il->status &=
  1915. test_bit(S_RFKILL, &il->status) << S_RFKILL |
  1916. test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
  1917. test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR |
  1918. test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
  1919. /*
  1920. * We disabled and synchronized interrupt, and priv->mutex is taken, so
  1921. * here is the only thread which will program device registers, but
  1922. * still have lockdep assertions, so we are taking reg_lock.
  1923. */
  1924. spin_lock_irq(&il->reg_lock);
  1925. /* FIXME: il_grab_nic_access if rfkill is off ? */
  1926. il3945_hw_txq_ctx_stop(il);
  1927. il3945_hw_rxq_stop(il);
  1928. /* Power-down device's busmaster DMA clocks */
  1929. _il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  1930. udelay(5);
  1931. /* Stop the device, and put it in low power state */
  1932. _il_apm_stop(il);
  1933. spin_unlock_irq(&il->reg_lock);
  1934. il3945_hw_txq_ctx_free(il);
  1935. exit:
  1936. memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
  1937. dev_kfree_skb(il->beacon_skb);
  1938. il->beacon_skb = NULL;
  1939. /* clear out any free frames */
  1940. il3945_clear_free_frames(il);
  1941. }
  1942. static void
  1943. il3945_down(struct il_priv *il)
  1944. {
  1945. mutex_lock(&il->mutex);
  1946. __il3945_down(il);
  1947. mutex_unlock(&il->mutex);
  1948. il3945_cancel_deferred_work(il);
  1949. }
  1950. #define MAX_HW_RESTARTS 5
  1951. static int
  1952. il3945_alloc_bcast_station(struct il_priv *il)
  1953. {
  1954. unsigned long flags;
  1955. u8 sta_id;
  1956. spin_lock_irqsave(&il->sta_lock, flags);
  1957. sta_id = il_prep_station(il, il_bcast_addr, false, NULL);
  1958. if (sta_id == IL_INVALID_STATION) {
  1959. IL_ERR("Unable to prepare broadcast station\n");
  1960. spin_unlock_irqrestore(&il->sta_lock, flags);
  1961. return -EINVAL;
  1962. }
  1963. il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
  1964. il->stations[sta_id].used |= IL_STA_BCAST;
  1965. spin_unlock_irqrestore(&il->sta_lock, flags);
  1966. return 0;
  1967. }
  1968. static int
  1969. __il3945_up(struct il_priv *il)
  1970. {
  1971. int rc, i;
  1972. rc = il3945_alloc_bcast_station(il);
  1973. if (rc)
  1974. return rc;
  1975. if (test_bit(S_EXIT_PENDING, &il->status)) {
  1976. IL_WARN("Exit pending; will not bring the NIC up\n");
  1977. return -EIO;
  1978. }
  1979. if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
  1980. IL_ERR("ucode not available for device bring up\n");
  1981. return -EIO;
  1982. }
  1983. /* If platform's RF_KILL switch is NOT set to KILL */
  1984. if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  1985. clear_bit(S_RFKILL, &il->status);
  1986. else {
  1987. set_bit(S_RFKILL, &il->status);
  1988. return -ERFKILL;
  1989. }
  1990. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  1991. rc = il3945_hw_nic_init(il);
  1992. if (rc) {
  1993. IL_ERR("Unable to int nic\n");
  1994. return rc;
  1995. }
  1996. /* make sure rfkill handshake bits are cleared */
  1997. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  1998. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  1999. /* clear (again), then enable host interrupts */
  2000. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2001. il_enable_interrupts(il);
  2002. /* really make sure rfkill handshake bits are cleared */
  2003. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2004. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2005. /* Copy original ucode data image from disk into backup cache.
  2006. * This will be used to initialize the on-board processor's
  2007. * data SRAM for a clean start when the runtime program first loads. */
  2008. memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
  2009. il->ucode_data.len);
  2010. /* We return success when we resume from suspend and rf_kill is on. */
  2011. if (test_bit(S_RFKILL, &il->status))
  2012. return 0;
  2013. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2014. /* load bootstrap state machine,
  2015. * load bootstrap program into processor's memory,
  2016. * prepare to load the "initialize" uCode */
  2017. rc = il->ops->load_ucode(il);
  2018. if (rc) {
  2019. IL_ERR("Unable to set up bootstrap uCode: %d\n", rc);
  2020. continue;
  2021. }
  2022. /* start card; "initialize" will load runtime ucode */
  2023. il3945_nic_start(il);
  2024. D_INFO(DRV_NAME " is coming up\n");
  2025. return 0;
  2026. }
  2027. set_bit(S_EXIT_PENDING, &il->status);
  2028. __il3945_down(il);
  2029. clear_bit(S_EXIT_PENDING, &il->status);
  2030. /* tried to restart and config the device for as long as our
  2031. * patience could withstand */
  2032. IL_ERR("Unable to initialize device after %d attempts.\n", i);
  2033. return -EIO;
  2034. }
  2035. /*****************************************************************************
  2036. *
  2037. * Workqueue callbacks
  2038. *
  2039. *****************************************************************************/
  2040. static void
  2041. il3945_bg_init_alive_start(struct work_struct *data)
  2042. {
  2043. struct il_priv *il =
  2044. container_of(data, struct il_priv, init_alive_start.work);
  2045. mutex_lock(&il->mutex);
  2046. if (test_bit(S_EXIT_PENDING, &il->status))
  2047. goto out;
  2048. il3945_init_alive_start(il);
  2049. out:
  2050. mutex_unlock(&il->mutex);
  2051. }
  2052. static void
  2053. il3945_bg_alive_start(struct work_struct *data)
  2054. {
  2055. struct il_priv *il =
  2056. container_of(data, struct il_priv, alive_start.work);
  2057. mutex_lock(&il->mutex);
  2058. if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL)
  2059. goto out;
  2060. il3945_alive_start(il);
  2061. out:
  2062. mutex_unlock(&il->mutex);
  2063. }
  2064. /*
  2065. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2066. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2067. * *is* readable even when device has been SW_RESET into low power mode
  2068. * (e.g. during RF KILL).
  2069. */
  2070. static void
  2071. il3945_rfkill_poll(struct work_struct *data)
  2072. {
  2073. struct il_priv *il =
  2074. container_of(data, struct il_priv, _3945.rfkill_poll.work);
  2075. bool old_rfkill = test_bit(S_RFKILL, &il->status);
  2076. bool new_rfkill =
  2077. !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2078. if (new_rfkill != old_rfkill) {
  2079. if (new_rfkill)
  2080. set_bit(S_RFKILL, &il->status);
  2081. else
  2082. clear_bit(S_RFKILL, &il->status);
  2083. wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
  2084. D_RF_KILL("RF_KILL bit toggled to %s.\n",
  2085. new_rfkill ? "disable radio" : "enable radio");
  2086. }
  2087. /* Keep this running, even if radio now enabled. This will be
  2088. * cancelled in mac_start() if system decides to start again */
  2089. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2090. round_jiffies_relative(2 * HZ));
  2091. }
  2092. int
  2093. il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
  2094. {
  2095. struct il_host_cmd cmd = {
  2096. .id = C_SCAN,
  2097. .len = sizeof(struct il3945_scan_cmd),
  2098. .flags = CMD_SIZE_HUGE,
  2099. };
  2100. struct il3945_scan_cmd *scan;
  2101. u8 n_probes = 0;
  2102. enum nl80211_band band;
  2103. bool is_active = false;
  2104. int ret;
  2105. u16 len;
  2106. lockdep_assert_held(&il->mutex);
  2107. if (!il->scan_cmd) {
  2108. il->scan_cmd =
  2109. kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE,
  2110. GFP_KERNEL);
  2111. if (!il->scan_cmd) {
  2112. D_SCAN("Fail to allocate scan memory\n");
  2113. return -ENOMEM;
  2114. }
  2115. }
  2116. scan = il->scan_cmd;
  2117. memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
  2118. scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
  2119. scan->quiet_time = IL_ACTIVE_QUIET_TIME;
  2120. if (il_is_associated(il)) {
  2121. u16 interval;
  2122. u32 extra;
  2123. u32 suspend_time = 100;
  2124. u32 scan_suspend_time = 100;
  2125. D_INFO("Scanning while associated...\n");
  2126. interval = vif->bss_conf.beacon_int;
  2127. scan->suspend_time = 0;
  2128. scan->max_out_time = cpu_to_le32(200 * 1024);
  2129. if (!interval)
  2130. interval = suspend_time;
  2131. /*
  2132. * suspend time format:
  2133. * 0-19: beacon interval in usec (time before exec.)
  2134. * 20-23: 0
  2135. * 24-31: number of beacons (suspend between channels)
  2136. */
  2137. extra = (suspend_time / interval) << 24;
  2138. scan_suspend_time =
  2139. 0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024));
  2140. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2141. D_SCAN("suspend_time 0x%X beacon interval %d\n",
  2142. scan_suspend_time, interval);
  2143. }
  2144. if (il->scan_request->n_ssids) {
  2145. int i, p = 0;
  2146. D_SCAN("Kicking off active scan\n");
  2147. for (i = 0; i < il->scan_request->n_ssids; i++) {
  2148. /* always does wildcard anyway */
  2149. if (!il->scan_request->ssids[i].ssid_len)
  2150. continue;
  2151. scan->direct_scan[p].id = WLAN_EID_SSID;
  2152. scan->direct_scan[p].len =
  2153. il->scan_request->ssids[i].ssid_len;
  2154. memcpy(scan->direct_scan[p].ssid,
  2155. il->scan_request->ssids[i].ssid,
  2156. il->scan_request->ssids[i].ssid_len);
  2157. n_probes++;
  2158. p++;
  2159. }
  2160. is_active = true;
  2161. } else
  2162. D_SCAN("Kicking off passive scan.\n");
  2163. /* We don't build a direct scan probe request; the uCode will do
  2164. * that based on the direct_mask added to each channel entry */
  2165. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2166. scan->tx_cmd.sta_id = il->hw_params.bcast_id;
  2167. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2168. /* flags + rate selection */
  2169. switch (il->scan_band) {
  2170. case NL80211_BAND_2GHZ:
  2171. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2172. scan->tx_cmd.rate = RATE_1M_PLCP;
  2173. band = NL80211_BAND_2GHZ;
  2174. break;
  2175. case NL80211_BAND_5GHZ:
  2176. scan->tx_cmd.rate = RATE_6M_PLCP;
  2177. band = NL80211_BAND_5GHZ;
  2178. break;
  2179. default:
  2180. IL_WARN("Invalid scan band\n");
  2181. return -EIO;
  2182. }
  2183. /*
  2184. * If active scaning is requested but a certain channel is marked
  2185. * passive, we can do active scanning if we detect transmissions. For
  2186. * passive only scanning disable switching to active on any channel.
  2187. */
  2188. scan->good_CRC_th =
  2189. is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER;
  2190. len =
  2191. il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
  2192. vif->addr, il->scan_request->ie,
  2193. il->scan_request->ie_len,
  2194. IL_MAX_SCAN_SIZE - sizeof(*scan));
  2195. scan->tx_cmd.len = cpu_to_le16(len);
  2196. /* select Rx antennas */
  2197. scan->flags |= il3945_get_antenna_flags(il);
  2198. scan->channel_count =
  2199. il3945_get_channels_for_scan(il, band, is_active, n_probes,
  2200. (void *)&scan->data[len], vif);
  2201. if (scan->channel_count == 0) {
  2202. D_SCAN("channel count %d\n", scan->channel_count);
  2203. return -EIO;
  2204. }
  2205. cmd.len +=
  2206. le16_to_cpu(scan->tx_cmd.len) +
  2207. scan->channel_count * sizeof(struct il3945_scan_channel);
  2208. cmd.data = scan;
  2209. scan->len = cpu_to_le16(cmd.len);
  2210. set_bit(S_SCAN_HW, &il->status);
  2211. ret = il_send_cmd_sync(il, &cmd);
  2212. if (ret)
  2213. clear_bit(S_SCAN_HW, &il->status);
  2214. return ret;
  2215. }
  2216. void
  2217. il3945_post_scan(struct il_priv *il)
  2218. {
  2219. /*
  2220. * Since setting the RXON may have been deferred while
  2221. * performing the scan, fire one off if needed
  2222. */
  2223. if (memcmp(&il->staging, &il->active, sizeof(il->staging)))
  2224. il3945_commit_rxon(il);
  2225. }
  2226. static void
  2227. il3945_bg_restart(struct work_struct *data)
  2228. {
  2229. struct il_priv *il = container_of(data, struct il_priv, restart);
  2230. if (test_bit(S_EXIT_PENDING, &il->status))
  2231. return;
  2232. if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
  2233. mutex_lock(&il->mutex);
  2234. il->is_open = 0;
  2235. mutex_unlock(&il->mutex);
  2236. il3945_down(il);
  2237. ieee80211_restart_hw(il->hw);
  2238. } else {
  2239. il3945_down(il);
  2240. mutex_lock(&il->mutex);
  2241. if (test_bit(S_EXIT_PENDING, &il->status)) {
  2242. mutex_unlock(&il->mutex);
  2243. return;
  2244. }
  2245. __il3945_up(il);
  2246. mutex_unlock(&il->mutex);
  2247. }
  2248. }
  2249. static void
  2250. il3945_bg_rx_replenish(struct work_struct *data)
  2251. {
  2252. struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
  2253. mutex_lock(&il->mutex);
  2254. if (test_bit(S_EXIT_PENDING, &il->status))
  2255. goto out;
  2256. il3945_rx_replenish(il);
  2257. out:
  2258. mutex_unlock(&il->mutex);
  2259. }
  2260. void
  2261. il3945_post_associate(struct il_priv *il)
  2262. {
  2263. int rc = 0;
  2264. if (!il->vif || !il->is_open)
  2265. return;
  2266. D_ASSOC("Associated as %d to: %pM\n", il->vif->cfg.aid,
  2267. il->active.bssid_addr);
  2268. if (test_bit(S_EXIT_PENDING, &il->status))
  2269. return;
  2270. il_scan_cancel_timeout(il, 200);
  2271. il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2272. il3945_commit_rxon(il);
  2273. rc = il_send_rxon_timing(il);
  2274. if (rc)
  2275. IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n");
  2276. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2277. il->staging.assoc_id = cpu_to_le16(il->vif->cfg.aid);
  2278. D_ASSOC("assoc id %d beacon interval %d\n", il->vif->cfg.aid,
  2279. il->vif->bss_conf.beacon_int);
  2280. if (il->vif->bss_conf.use_short_preamble)
  2281. il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2282. else
  2283. il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2284. if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2285. if (il->vif->bss_conf.use_short_slot)
  2286. il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2287. else
  2288. il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2289. }
  2290. il3945_commit_rxon(il);
  2291. switch (il->vif->type) {
  2292. case NL80211_IFTYPE_STATION:
  2293. il3945_rate_scale_init(il->hw, IL_AP_ID);
  2294. break;
  2295. case NL80211_IFTYPE_ADHOC:
  2296. il3945_send_beacon_cmd(il);
  2297. break;
  2298. default:
  2299. IL_ERR("%s Should not be called in %d mode\n", __func__,
  2300. il->vif->type);
  2301. break;
  2302. }
  2303. }
  2304. /*****************************************************************************
  2305. *
  2306. * mac80211 entry point functions
  2307. *
  2308. *****************************************************************************/
  2309. #define UCODE_READY_TIMEOUT (2 * HZ)
  2310. static int
  2311. il3945_mac_start(struct ieee80211_hw *hw)
  2312. {
  2313. struct il_priv *il = hw->priv;
  2314. int ret;
  2315. /* we should be verifying the device is ready to be opened */
  2316. mutex_lock(&il->mutex);
  2317. D_MAC80211("enter\n");
  2318. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2319. * ucode filename and max sizes are card-specific. */
  2320. if (!il->ucode_code.len) {
  2321. ret = il3945_read_ucode(il);
  2322. if (ret) {
  2323. IL_ERR("Could not read microcode: %d\n", ret);
  2324. mutex_unlock(&il->mutex);
  2325. goto out_release_irq;
  2326. }
  2327. }
  2328. ret = __il3945_up(il);
  2329. mutex_unlock(&il->mutex);
  2330. if (ret)
  2331. goto out_release_irq;
  2332. D_INFO("Start UP work.\n");
  2333. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2334. * mac80211 will not be run successfully. */
  2335. ret = wait_event_timeout(il->wait_command_queue,
  2336. test_bit(S_READY, &il->status),
  2337. UCODE_READY_TIMEOUT);
  2338. if (!ret) {
  2339. if (!test_bit(S_READY, &il->status)) {
  2340. IL_ERR("Wait for START_ALIVE timeout after %dms.\n",
  2341. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2342. ret = -ETIMEDOUT;
  2343. goto out_release_irq;
  2344. }
  2345. }
  2346. /* ucode is running and will send rfkill notifications,
  2347. * no need to poll the killswitch state anymore */
  2348. cancel_delayed_work(&il->_3945.rfkill_poll);
  2349. il->is_open = 1;
  2350. D_MAC80211("leave\n");
  2351. return 0;
  2352. out_release_irq:
  2353. il->is_open = 0;
  2354. D_MAC80211("leave - failed\n");
  2355. return ret;
  2356. }
  2357. static void
  2358. il3945_mac_stop(struct ieee80211_hw *hw, bool suspend)
  2359. {
  2360. struct il_priv *il = hw->priv;
  2361. D_MAC80211("enter\n");
  2362. if (!il->is_open) {
  2363. D_MAC80211("leave - skip\n");
  2364. return;
  2365. }
  2366. il->is_open = 0;
  2367. il3945_down(il);
  2368. flush_workqueue(il->workqueue);
  2369. /* start polling the killswitch state again */
  2370. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2371. round_jiffies_relative(2 * HZ));
  2372. D_MAC80211("leave\n");
  2373. }
  2374. static void
  2375. il3945_mac_tx(struct ieee80211_hw *hw,
  2376. struct ieee80211_tx_control *control,
  2377. struct sk_buff *skb)
  2378. {
  2379. struct il_priv *il = hw->priv;
  2380. D_MAC80211("enter\n");
  2381. D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2382. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2383. if (il3945_tx_skb(il, control->sta, skb))
  2384. dev_kfree_skb_any(skb);
  2385. D_MAC80211("leave\n");
  2386. }
  2387. void
  2388. il3945_config_ap(struct il_priv *il)
  2389. {
  2390. struct ieee80211_vif *vif = il->vif;
  2391. int rc = 0;
  2392. if (test_bit(S_EXIT_PENDING, &il->status))
  2393. return;
  2394. /* The following should be done only at AP bring up */
  2395. if (!(il_is_associated(il))) {
  2396. /* RXON - unassoc (to set timing command) */
  2397. il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2398. il3945_commit_rxon(il);
  2399. /* RXON Timing */
  2400. rc = il_send_rxon_timing(il);
  2401. if (rc)
  2402. IL_WARN("C_RXON_TIMING failed - "
  2403. "Attempting to continue.\n");
  2404. il->staging.assoc_id = 0;
  2405. if (vif->bss_conf.use_short_preamble)
  2406. il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2407. else
  2408. il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2409. if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2410. if (vif->bss_conf.use_short_slot)
  2411. il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2412. else
  2413. il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2414. }
  2415. /* restore RXON assoc */
  2416. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2417. il3945_commit_rxon(il);
  2418. }
  2419. il3945_send_beacon_cmd(il);
  2420. }
  2421. static int
  2422. il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2423. struct ieee80211_vif *vif, struct ieee80211_sta *sta,
  2424. struct ieee80211_key_conf *key)
  2425. {
  2426. struct il_priv *il = hw->priv;
  2427. int ret = 0;
  2428. u8 sta_id = IL_INVALID_STATION;
  2429. u8 static_key;
  2430. D_MAC80211("enter\n");
  2431. if (il3945_mod_params.sw_crypto) {
  2432. D_MAC80211("leave - hwcrypto disabled\n");
  2433. return -EOPNOTSUPP;
  2434. }
  2435. /*
  2436. * To support IBSS RSN, don't program group keys in IBSS, the
  2437. * hardware will then not attempt to decrypt the frames.
  2438. */
  2439. if (vif->type == NL80211_IFTYPE_ADHOC &&
  2440. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  2441. D_MAC80211("leave - IBSS RSN\n");
  2442. return -EOPNOTSUPP;
  2443. }
  2444. static_key = !il_is_associated(il);
  2445. if (!static_key) {
  2446. sta_id = il_sta_id_or_broadcast(il, sta);
  2447. if (sta_id == IL_INVALID_STATION) {
  2448. D_MAC80211("leave - station not found\n");
  2449. return -EINVAL;
  2450. }
  2451. }
  2452. mutex_lock(&il->mutex);
  2453. il_scan_cancel_timeout(il, 100);
  2454. switch (cmd) {
  2455. case SET_KEY:
  2456. if (static_key)
  2457. ret = il3945_set_static_key(il, key);
  2458. else
  2459. ret = il3945_set_dynamic_key(il, key, sta_id);
  2460. D_MAC80211("enable hwcrypto key\n");
  2461. break;
  2462. case DISABLE_KEY:
  2463. if (static_key)
  2464. ret = il3945_remove_static_key(il);
  2465. else
  2466. ret = il3945_clear_sta_key_info(il, sta_id);
  2467. D_MAC80211("disable hwcrypto key\n");
  2468. break;
  2469. default:
  2470. ret = -EINVAL;
  2471. }
  2472. D_MAC80211("leave ret %d\n", ret);
  2473. mutex_unlock(&il->mutex);
  2474. return ret;
  2475. }
  2476. static int
  2477. il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2478. struct ieee80211_sta *sta)
  2479. {
  2480. struct il_priv *il = hw->priv;
  2481. struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
  2482. int ret;
  2483. bool is_ap = vif->type == NL80211_IFTYPE_STATION;
  2484. u8 sta_id;
  2485. mutex_lock(&il->mutex);
  2486. D_INFO("station %pM\n", sta->addr);
  2487. sta_priv->common.sta_id = IL_INVALID_STATION;
  2488. ret = il_add_station_common(il, sta->addr, is_ap, sta, &sta_id);
  2489. if (ret) {
  2490. IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
  2491. /* Should we return success if return code is EEXIST ? */
  2492. mutex_unlock(&il->mutex);
  2493. return ret;
  2494. }
  2495. sta_priv->common.sta_id = sta_id;
  2496. /* Initialize rate scaling */
  2497. D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
  2498. il3945_rs_rate_init(il, sta, sta_id);
  2499. mutex_unlock(&il->mutex);
  2500. return 0;
  2501. }
  2502. static void
  2503. il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
  2504. unsigned int *total_flags, u64 multicast)
  2505. {
  2506. struct il_priv *il = hw->priv;
  2507. __le32 filter_or = 0, filter_nand = 0;
  2508. #define CHK(test, flag) do { \
  2509. if (*total_flags & (test)) \
  2510. filter_or |= (flag); \
  2511. else \
  2512. filter_nand |= (flag); \
  2513. } while (0)
  2514. D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
  2515. *total_flags);
  2516. CHK(FIF_OTHER_BSS, RXON_FILTER_PROMISC_MSK);
  2517. CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
  2518. CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
  2519. #undef CHK
  2520. mutex_lock(&il->mutex);
  2521. il->staging.filter_flags &= ~filter_nand;
  2522. il->staging.filter_flags |= filter_or;
  2523. /*
  2524. * Not committing directly because hardware can perform a scan,
  2525. * but even if hw is ready, committing here breaks for some reason,
  2526. * we'll eventually commit the filter flags change anyway.
  2527. */
  2528. mutex_unlock(&il->mutex);
  2529. /*
  2530. * Receiving all multicast frames is always enabled by the
  2531. * default flags setup in il_connection_init_rx_config()
  2532. * since we currently do not support programming multicast
  2533. * filters into the device.
  2534. */
  2535. *total_flags &=
  2536. FIF_OTHER_BSS | FIF_ALLMULTI |
  2537. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  2538. }
  2539. /*****************************************************************************
  2540. *
  2541. * sysfs attributes
  2542. *
  2543. *****************************************************************************/
  2544. #ifdef CONFIG_IWLEGACY_DEBUG
  2545. /*
  2546. * The following adds a new attribute to the sysfs representation
  2547. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2548. * used for controlling the debug level.
  2549. *
  2550. * See the level definitions in iwl for details.
  2551. *
  2552. * The debug_level being managed using sysfs below is a per device debug
  2553. * level that is used instead of the global debug level if it (the per
  2554. * device debug level) is set.
  2555. */
  2556. static ssize_t
  2557. il3945_show_debug_level(struct device *d, struct device_attribute *attr,
  2558. char *buf)
  2559. {
  2560. struct il_priv *il = dev_get_drvdata(d);
  2561. return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
  2562. }
  2563. static ssize_t
  2564. il3945_store_debug_level(struct device *d, struct device_attribute *attr,
  2565. const char *buf, size_t count)
  2566. {
  2567. struct il_priv *il = dev_get_drvdata(d);
  2568. unsigned long val;
  2569. int ret;
  2570. ret = kstrtoul(buf, 0, &val);
  2571. if (ret)
  2572. IL_INFO("%s is not in hex or decimal form.\n", buf);
  2573. else
  2574. il->debug_level = val;
  2575. return strnlen(buf, count);
  2576. }
  2577. static DEVICE_ATTR(debug_level, 0644, il3945_show_debug_level,
  2578. il3945_store_debug_level);
  2579. #endif /* CONFIG_IWLEGACY_DEBUG */
  2580. static ssize_t
  2581. il3945_show_temperature(struct device *d, struct device_attribute *attr,
  2582. char *buf)
  2583. {
  2584. struct il_priv *il = dev_get_drvdata(d);
  2585. if (!il_is_alive(il))
  2586. return -EAGAIN;
  2587. return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
  2588. }
  2589. static DEVICE_ATTR(temperature, 0444, il3945_show_temperature, NULL);
  2590. static ssize_t
  2591. il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
  2592. {
  2593. struct il_priv *il = dev_get_drvdata(d);
  2594. return sprintf(buf, "%d\n", il->tx_power_user_lmt);
  2595. }
  2596. static ssize_t
  2597. il3945_store_tx_power(struct device *d, struct device_attribute *attr,
  2598. const char *buf, size_t count)
  2599. {
  2600. struct il_priv *il = dev_get_drvdata(d);
  2601. char *p = (char *)buf;
  2602. u32 val;
  2603. val = simple_strtoul(p, &p, 10);
  2604. if (p == buf)
  2605. IL_INFO(": %s is not in decimal form.\n", buf);
  2606. else
  2607. il3945_hw_reg_set_txpower(il, val);
  2608. return count;
  2609. }
  2610. static DEVICE_ATTR(tx_power, 0644, il3945_show_tx_power, il3945_store_tx_power);
  2611. static ssize_t
  2612. il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf)
  2613. {
  2614. struct il_priv *il = dev_get_drvdata(d);
  2615. return sprintf(buf, "0x%04X\n", il->active.flags);
  2616. }
  2617. static ssize_t
  2618. il3945_store_flags(struct device *d, struct device_attribute *attr,
  2619. const char *buf, size_t count)
  2620. {
  2621. struct il_priv *il = dev_get_drvdata(d);
  2622. u32 flags = simple_strtoul(buf, NULL, 0);
  2623. mutex_lock(&il->mutex);
  2624. if (le32_to_cpu(il->staging.flags) != flags) {
  2625. /* Cancel any currently running scans... */
  2626. if (il_scan_cancel_timeout(il, 100))
  2627. IL_WARN("Could not cancel scan.\n");
  2628. else {
  2629. D_INFO("Committing rxon.flags = 0x%04X\n", flags);
  2630. il->staging.flags = cpu_to_le32(flags);
  2631. il3945_commit_rxon(il);
  2632. }
  2633. }
  2634. mutex_unlock(&il->mutex);
  2635. return count;
  2636. }
  2637. static DEVICE_ATTR(flags, 0644, il3945_show_flags, il3945_store_flags);
  2638. static ssize_t
  2639. il3945_show_filter_flags(struct device *d, struct device_attribute *attr,
  2640. char *buf)
  2641. {
  2642. struct il_priv *il = dev_get_drvdata(d);
  2643. return sprintf(buf, "0x%04X\n", le32_to_cpu(il->active.filter_flags));
  2644. }
  2645. static ssize_t
  2646. il3945_store_filter_flags(struct device *d, struct device_attribute *attr,
  2647. const char *buf, size_t count)
  2648. {
  2649. struct il_priv *il = dev_get_drvdata(d);
  2650. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2651. mutex_lock(&il->mutex);
  2652. if (le32_to_cpu(il->staging.filter_flags) != filter_flags) {
  2653. /* Cancel any currently running scans... */
  2654. if (il_scan_cancel_timeout(il, 100))
  2655. IL_WARN("Could not cancel scan.\n");
  2656. else {
  2657. D_INFO("Committing rxon.filter_flags = " "0x%04X\n",
  2658. filter_flags);
  2659. il->staging.filter_flags = cpu_to_le32(filter_flags);
  2660. il3945_commit_rxon(il);
  2661. }
  2662. }
  2663. mutex_unlock(&il->mutex);
  2664. return count;
  2665. }
  2666. static DEVICE_ATTR(filter_flags, 0644, il3945_show_filter_flags,
  2667. il3945_store_filter_flags);
  2668. static ssize_t
  2669. il3945_show_measurement(struct device *d, struct device_attribute *attr,
  2670. char *buf)
  2671. {
  2672. struct il_priv *il = dev_get_drvdata(d);
  2673. struct il_spectrum_notification measure_report;
  2674. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2675. u8 *data = (u8 *) &measure_report;
  2676. unsigned long flags;
  2677. spin_lock_irqsave(&il->lock, flags);
  2678. if (!(il->measurement_status & MEASUREMENT_READY)) {
  2679. spin_unlock_irqrestore(&il->lock, flags);
  2680. return 0;
  2681. }
  2682. memcpy(&measure_report, &il->measure_report, size);
  2683. il->measurement_status = 0;
  2684. spin_unlock_irqrestore(&il->lock, flags);
  2685. while (size && PAGE_SIZE - len) {
  2686. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2687. PAGE_SIZE - len, true);
  2688. len = strlen(buf);
  2689. if (PAGE_SIZE - len)
  2690. buf[len++] = '\n';
  2691. ofs += 16;
  2692. size -= min(size, 16U);
  2693. }
  2694. return len;
  2695. }
  2696. static ssize_t
  2697. il3945_store_measurement(struct device *d, struct device_attribute *attr,
  2698. const char *buf, size_t count)
  2699. {
  2700. struct il_priv *il = dev_get_drvdata(d);
  2701. struct ieee80211_measurement_params params = {
  2702. .channel = le16_to_cpu(il->active.channel),
  2703. .start_time = cpu_to_le64(il->_3945.last_tsf),
  2704. .duration = cpu_to_le16(1),
  2705. };
  2706. u8 type = IL_MEASURE_BASIC;
  2707. u8 buffer[32];
  2708. u8 channel;
  2709. if (count) {
  2710. char *p = buffer;
  2711. strscpy(buffer, buf, sizeof(buffer));
  2712. channel = simple_strtoul(p, NULL, 0);
  2713. if (channel)
  2714. params.channel = channel;
  2715. p = buffer;
  2716. while (*p && *p != ' ')
  2717. p++;
  2718. if (*p)
  2719. type = simple_strtoul(p + 1, NULL, 0);
  2720. }
  2721. D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n",
  2722. type, params.channel, buf);
  2723. il3945_get_measurement(il, &params, type);
  2724. return count;
  2725. }
  2726. static DEVICE_ATTR(measurement, 0600, il3945_show_measurement,
  2727. il3945_store_measurement);
  2728. static ssize_t
  2729. il3945_store_retry_rate(struct device *d, struct device_attribute *attr,
  2730. const char *buf, size_t count)
  2731. {
  2732. struct il_priv *il = dev_get_drvdata(d);
  2733. il->retry_rate = simple_strtoul(buf, NULL, 0);
  2734. if (il->retry_rate <= 0)
  2735. il->retry_rate = 1;
  2736. return count;
  2737. }
  2738. static ssize_t
  2739. il3945_show_retry_rate(struct device *d, struct device_attribute *attr,
  2740. char *buf)
  2741. {
  2742. struct il_priv *il = dev_get_drvdata(d);
  2743. return sprintf(buf, "%d", il->retry_rate);
  2744. }
  2745. static DEVICE_ATTR(retry_rate, 0600, il3945_show_retry_rate,
  2746. il3945_store_retry_rate);
  2747. static ssize_t
  2748. il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf)
  2749. {
  2750. /* all this shit doesn't belong into sysfs anyway */
  2751. return 0;
  2752. }
  2753. static DEVICE_ATTR(channels, 0400, il3945_show_channels, NULL);
  2754. static ssize_t
  2755. il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf)
  2756. {
  2757. struct il_priv *il = dev_get_drvdata(d);
  2758. if (!il_is_alive(il))
  2759. return -EAGAIN;
  2760. return sprintf(buf, "%d\n", il3945_mod_params.antenna);
  2761. }
  2762. static ssize_t
  2763. il3945_store_antenna(struct device *d, struct device_attribute *attr,
  2764. const char *buf, size_t count)
  2765. {
  2766. struct il_priv *il __maybe_unused = dev_get_drvdata(d);
  2767. int ant;
  2768. if (count == 0)
  2769. return 0;
  2770. if (sscanf(buf, "%1i", &ant) != 1) {
  2771. D_INFO("not in hex or decimal form.\n");
  2772. return count;
  2773. }
  2774. if (ant >= 0 && ant <= 2) {
  2775. D_INFO("Setting antenna select to %d.\n", ant);
  2776. il3945_mod_params.antenna = (enum il3945_antenna)ant;
  2777. } else
  2778. D_INFO("Bad antenna select value %d.\n", ant);
  2779. return count;
  2780. }
  2781. static DEVICE_ATTR(antenna, 0644, il3945_show_antenna, il3945_store_antenna);
  2782. static ssize_t
  2783. il3945_show_status(struct device *d, struct device_attribute *attr, char *buf)
  2784. {
  2785. struct il_priv *il = dev_get_drvdata(d);
  2786. if (!il_is_alive(il))
  2787. return -EAGAIN;
  2788. return sprintf(buf, "0x%08x\n", (int)il->status);
  2789. }
  2790. static DEVICE_ATTR(status, 0444, il3945_show_status, NULL);
  2791. static ssize_t
  2792. il3945_dump_error_log(struct device *d, struct device_attribute *attr,
  2793. const char *buf, size_t count)
  2794. {
  2795. struct il_priv *il = dev_get_drvdata(d);
  2796. char *p = (char *)buf;
  2797. if (p[0] == '1')
  2798. il3945_dump_nic_error_log(il);
  2799. return strnlen(buf, count);
  2800. }
  2801. static DEVICE_ATTR(dump_errors, 0200, NULL, il3945_dump_error_log);
  2802. /*****************************************************************************
  2803. *
  2804. * driver setup and tear down
  2805. *
  2806. *****************************************************************************/
  2807. static int
  2808. il3945_setup_deferred_work(struct il_priv *il)
  2809. {
  2810. il->workqueue = create_singlethread_workqueue(DRV_NAME);
  2811. if (!il->workqueue)
  2812. return -ENOMEM;
  2813. init_waitqueue_head(&il->wait_command_queue);
  2814. INIT_WORK(&il->restart, il3945_bg_restart);
  2815. INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
  2816. INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
  2817. INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
  2818. INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
  2819. il_setup_scan_deferred_work(il);
  2820. il3945_hw_setup_deferred_work(il);
  2821. timer_setup(&il->watchdog, il_bg_watchdog, 0);
  2822. tasklet_setup(&il->irq_tasklet, il3945_irq_tasklet);
  2823. return 0;
  2824. }
  2825. static void
  2826. il3945_cancel_deferred_work(struct il_priv *il)
  2827. {
  2828. il3945_hw_cancel_deferred_work(il);
  2829. cancel_delayed_work_sync(&il->init_alive_start);
  2830. cancel_delayed_work(&il->alive_start);
  2831. il_cancel_scan_deferred_work(il);
  2832. }
  2833. static struct attribute *il3945_sysfs_entries[] = {
  2834. &dev_attr_antenna.attr,
  2835. &dev_attr_channels.attr,
  2836. &dev_attr_dump_errors.attr,
  2837. &dev_attr_flags.attr,
  2838. &dev_attr_filter_flags.attr,
  2839. &dev_attr_measurement.attr,
  2840. &dev_attr_retry_rate.attr,
  2841. &dev_attr_status.attr,
  2842. &dev_attr_temperature.attr,
  2843. &dev_attr_tx_power.attr,
  2844. #ifdef CONFIG_IWLEGACY_DEBUG
  2845. &dev_attr_debug_level.attr,
  2846. #endif
  2847. NULL
  2848. };
  2849. static const struct attribute_group il3945_attribute_group = {
  2850. .name = NULL, /* put in device directory */
  2851. .attrs = il3945_sysfs_entries,
  2852. };
  2853. static struct ieee80211_ops il3945_mac_ops __ro_after_init = {
  2854. .add_chanctx = ieee80211_emulate_add_chanctx,
  2855. .remove_chanctx = ieee80211_emulate_remove_chanctx,
  2856. .change_chanctx = ieee80211_emulate_change_chanctx,
  2857. .switch_vif_chanctx = ieee80211_emulate_switch_vif_chanctx,
  2858. .tx = il3945_mac_tx,
  2859. .wake_tx_queue = ieee80211_handle_wake_tx_queue,
  2860. .start = il3945_mac_start,
  2861. .stop = il3945_mac_stop,
  2862. .add_interface = il_mac_add_interface,
  2863. .remove_interface = il_mac_remove_interface,
  2864. .change_interface = il_mac_change_interface,
  2865. .config = il_mac_config,
  2866. .configure_filter = il3945_configure_filter,
  2867. .set_key = il3945_mac_set_key,
  2868. .conf_tx = il_mac_conf_tx,
  2869. .reset_tsf = il_mac_reset_tsf,
  2870. .bss_info_changed = il_mac_bss_info_changed,
  2871. .hw_scan = il_mac_hw_scan,
  2872. .sta_add = il3945_mac_sta_add,
  2873. .sta_remove = il_mac_sta_remove,
  2874. .tx_last_beacon = il_mac_tx_last_beacon,
  2875. .flush = il_mac_flush,
  2876. };
  2877. static int
  2878. il3945_init_drv(struct il_priv *il)
  2879. {
  2880. int ret;
  2881. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  2882. il->retry_rate = 1;
  2883. il->beacon_skb = NULL;
  2884. spin_lock_init(&il->sta_lock);
  2885. spin_lock_init(&il->hcmd_lock);
  2886. INIT_LIST_HEAD(&il->free_frames);
  2887. mutex_init(&il->mutex);
  2888. il->ieee_channels = NULL;
  2889. il->ieee_rates = NULL;
  2890. il->band = NL80211_BAND_2GHZ;
  2891. il->iw_mode = NL80211_IFTYPE_STATION;
  2892. il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
  2893. /* initialize force reset */
  2894. il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
  2895. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  2896. IL_WARN("Unsupported EEPROM version: 0x%04X\n",
  2897. eeprom->version);
  2898. ret = -EINVAL;
  2899. goto err;
  2900. }
  2901. ret = il_init_channel_map(il);
  2902. if (ret) {
  2903. IL_ERR("initializing regulatory failed: %d\n", ret);
  2904. goto err;
  2905. }
  2906. /* Set up txpower settings in driver for all channels */
  2907. if (il3945_txpower_set_from_eeprom(il)) {
  2908. ret = -EIO;
  2909. goto err_free_channel_map;
  2910. }
  2911. ret = il_init_geos(il);
  2912. if (ret) {
  2913. IL_ERR("initializing geos failed: %d\n", ret);
  2914. goto err_free_channel_map;
  2915. }
  2916. il3945_init_hw_rates(il, il->ieee_rates);
  2917. return 0;
  2918. err_free_channel_map:
  2919. il_free_channel_map(il);
  2920. err:
  2921. return ret;
  2922. }
  2923. #define IL3945_MAX_PROBE_REQUEST 200
  2924. static int
  2925. il3945_setup_mac(struct il_priv *il)
  2926. {
  2927. int ret;
  2928. struct ieee80211_hw *hw = il->hw;
  2929. hw->rate_control_algorithm = "iwl-3945-rs";
  2930. hw->sta_data_size = sizeof(struct il3945_sta_priv);
  2931. hw->vif_data_size = sizeof(struct il_vif_priv);
  2932. /* Tell mac80211 our characteristics */
  2933. ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
  2934. ieee80211_hw_set(hw, SUPPORTS_PS);
  2935. ieee80211_hw_set(hw, SIGNAL_DBM);
  2936. ieee80211_hw_set(hw, SPECTRUM_MGMT);
  2937. hw->wiphy->interface_modes =
  2938. BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
  2939. hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN;
  2940. hw->wiphy->regulatory_flags |= REGULATORY_CUSTOM_REG |
  2941. REGULATORY_DISABLE_BEACON_HINTS;
  2942. hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
  2943. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  2944. /* we create the 802.11 header and a zero-length SSID element */
  2945. hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
  2946. /* Default value; 4 EDCA QOS priorities */
  2947. hw->queues = 4;
  2948. if (il->bands[NL80211_BAND_2GHZ].n_channels)
  2949. il->hw->wiphy->bands[NL80211_BAND_2GHZ] =
  2950. &il->bands[NL80211_BAND_2GHZ];
  2951. if (il->bands[NL80211_BAND_5GHZ].n_channels)
  2952. il->hw->wiphy->bands[NL80211_BAND_5GHZ] =
  2953. &il->bands[NL80211_BAND_5GHZ];
  2954. il_leds_init(il);
  2955. wiphy_ext_feature_set(il->hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
  2956. ret = ieee80211_register_hw(il->hw);
  2957. if (ret) {
  2958. IL_ERR("Failed to register hw (error %d)\n", ret);
  2959. return ret;
  2960. }
  2961. il->mac80211_registered = 1;
  2962. return 0;
  2963. }
  2964. static int
  2965. il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  2966. {
  2967. int err = 0;
  2968. struct il_priv *il;
  2969. struct ieee80211_hw *hw;
  2970. struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
  2971. struct il3945_eeprom *eeprom;
  2972. unsigned long flags;
  2973. /***********************
  2974. * 1. Allocating HW data
  2975. * ********************/
  2976. hw = ieee80211_alloc_hw(sizeof(struct il_priv), &il3945_mac_ops);
  2977. if (!hw) {
  2978. err = -ENOMEM;
  2979. goto out;
  2980. }
  2981. il = hw->priv;
  2982. il->hw = hw;
  2983. SET_IEEE80211_DEV(hw, &pdev->dev);
  2984. il->cmd_queue = IL39_CMD_QUEUE_NUM;
  2985. D_INFO("*** LOAD DRIVER ***\n");
  2986. il->cfg = cfg;
  2987. il->ops = &il3945_ops;
  2988. #ifdef CONFIG_IWLEGACY_DEBUGFS
  2989. il->debugfs_ops = &il3945_debugfs_ops;
  2990. #endif
  2991. il->pci_dev = pdev;
  2992. il->inta_mask = CSR_INI_SET_MASK;
  2993. /***************************
  2994. * 2. Initializing PCI bus
  2995. * *************************/
  2996. pci_disable_link_state(pdev,
  2997. PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
  2998. PCIE_LINK_STATE_CLKPM);
  2999. if (pci_enable_device(pdev)) {
  3000. err = -ENODEV;
  3001. goto out_ieee80211_free_hw;
  3002. }
  3003. pci_set_master(pdev);
  3004. err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
  3005. if (err) {
  3006. IL_WARN("No suitable DMA available.\n");
  3007. goto out_pci_disable_device;
  3008. }
  3009. pci_set_drvdata(pdev, il);
  3010. err = pci_request_regions(pdev, DRV_NAME);
  3011. if (err)
  3012. goto out_pci_disable_device;
  3013. /***********************
  3014. * 3. Read REV Register
  3015. * ********************/
  3016. il->hw_base = pci_ioremap_bar(pdev, 0);
  3017. if (!il->hw_base) {
  3018. err = -ENODEV;
  3019. goto out_pci_release_regions;
  3020. }
  3021. D_INFO("pci_resource_len = 0x%08llx\n",
  3022. (unsigned long long)pci_resource_len(pdev, 0));
  3023. D_INFO("pci_resource_base = %p\n", il->hw_base);
  3024. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3025. * PCI Tx retries from interfering with C3 CPU state */
  3026. pci_write_config_byte(pdev, 0x41, 0x00);
  3027. /* these spin locks will be used in apm_init and EEPROM access
  3028. * we should init now
  3029. */
  3030. spin_lock_init(&il->reg_lock);
  3031. spin_lock_init(&il->lock);
  3032. /*
  3033. * stop and reset the on-board processor just in case it is in a
  3034. * strange state ... like being left stranded by a primary kernel
  3035. * and this is now the kdump kernel trying to start up
  3036. */
  3037. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  3038. /***********************
  3039. * 4. Read EEPROM
  3040. * ********************/
  3041. /* Read the EEPROM */
  3042. err = il_eeprom_init(il);
  3043. if (err) {
  3044. IL_ERR("Unable to init EEPROM\n");
  3045. goto out_iounmap;
  3046. }
  3047. /* MAC Address location in EEPROM same for 3945/4965 */
  3048. eeprom = (struct il3945_eeprom *)il->eeprom;
  3049. D_INFO("MAC address: %pM\n", eeprom->mac_address);
  3050. SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
  3051. /***********************
  3052. * 5. Setup HW Constants
  3053. * ********************/
  3054. /* Device-specific setup */
  3055. err = il3945_hw_set_hw_params(il);
  3056. if (err) {
  3057. IL_ERR("failed to set hw settings\n");
  3058. goto out_eeprom_free;
  3059. }
  3060. /***********************
  3061. * 6. Setup il
  3062. * ********************/
  3063. err = il3945_init_drv(il);
  3064. if (err) {
  3065. IL_ERR("initializing driver failed\n");
  3066. goto out_unset_hw_params;
  3067. }
  3068. IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name);
  3069. /***********************
  3070. * 7. Setup Services
  3071. * ********************/
  3072. spin_lock_irqsave(&il->lock, flags);
  3073. il_disable_interrupts(il);
  3074. spin_unlock_irqrestore(&il->lock, flags);
  3075. pci_enable_msi(il->pci_dev);
  3076. err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
  3077. if (err) {
  3078. IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
  3079. goto out_disable_msi;
  3080. }
  3081. err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
  3082. if (err) {
  3083. IL_ERR("failed to create sysfs device attributes\n");
  3084. goto out_release_irq;
  3085. }
  3086. il_set_rxon_channel(il, &il->bands[NL80211_BAND_2GHZ].channels[5]);
  3087. err = il3945_setup_deferred_work(il);
  3088. if (err)
  3089. goto out_remove_sysfs;
  3090. il3945_setup_handlers(il);
  3091. il_power_initialize(il);
  3092. /*********************************
  3093. * 8. Setup and Register mac80211
  3094. * *******************************/
  3095. il_enable_interrupts(il);
  3096. err = il3945_setup_mac(il);
  3097. if (err)
  3098. goto out_destroy_workqueue;
  3099. il_dbgfs_register(il, DRV_NAME);
  3100. /* Start monitoring the killswitch */
  3101. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ);
  3102. return 0;
  3103. out_destroy_workqueue:
  3104. destroy_workqueue(il->workqueue);
  3105. il->workqueue = NULL;
  3106. out_remove_sysfs:
  3107. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3108. out_release_irq:
  3109. free_irq(il->pci_dev->irq, il);
  3110. out_disable_msi:
  3111. pci_disable_msi(il->pci_dev);
  3112. il_free_geos(il);
  3113. il_free_channel_map(il);
  3114. out_unset_hw_params:
  3115. il3945_unset_hw_params(il);
  3116. out_eeprom_free:
  3117. il_eeprom_free(il);
  3118. out_iounmap:
  3119. iounmap(il->hw_base);
  3120. out_pci_release_regions:
  3121. pci_release_regions(pdev);
  3122. out_pci_disable_device:
  3123. pci_disable_device(pdev);
  3124. out_ieee80211_free_hw:
  3125. ieee80211_free_hw(il->hw);
  3126. out:
  3127. return err;
  3128. }
  3129. static void
  3130. il3945_pci_remove(struct pci_dev *pdev)
  3131. {
  3132. struct il_priv *il = pci_get_drvdata(pdev);
  3133. unsigned long flags;
  3134. if (!il)
  3135. return;
  3136. D_INFO("*** UNLOAD DRIVER ***\n");
  3137. il_dbgfs_unregister(il);
  3138. set_bit(S_EXIT_PENDING, &il->status);
  3139. il_leds_exit(il);
  3140. if (il->mac80211_registered) {
  3141. ieee80211_unregister_hw(il->hw);
  3142. il->mac80211_registered = 0;
  3143. } else {
  3144. il3945_down(il);
  3145. }
  3146. /*
  3147. * Make sure device is reset to low power before unloading driver.
  3148. * This may be redundant with il_down(), but there are paths to
  3149. * run il_down() without calling apm_ops.stop(), and there are
  3150. * paths to avoid running il_down() at all before leaving driver.
  3151. * This (inexpensive) call *makes sure* device is reset.
  3152. */
  3153. il_apm_stop(il);
  3154. /* make sure we flush any pending irq or
  3155. * tasklet for the driver
  3156. */
  3157. spin_lock_irqsave(&il->lock, flags);
  3158. il_disable_interrupts(il);
  3159. spin_unlock_irqrestore(&il->lock, flags);
  3160. il3945_synchronize_irq(il);
  3161. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3162. cancel_delayed_work_sync(&il->_3945.rfkill_poll);
  3163. il3945_dealloc_ucode_pci(il);
  3164. if (il->rxq.bd)
  3165. il3945_rx_queue_free(il, &il->rxq);
  3166. il3945_hw_txq_ctx_free(il);
  3167. il3945_unset_hw_params(il);
  3168. /*netif_stop_queue(dev); */
  3169. /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
  3170. * il->workqueue... so we can't take down the workqueue
  3171. * until now... */
  3172. destroy_workqueue(il->workqueue);
  3173. il->workqueue = NULL;
  3174. free_irq(pdev->irq, il);
  3175. pci_disable_msi(pdev);
  3176. iounmap(il->hw_base);
  3177. pci_release_regions(pdev);
  3178. pci_disable_device(pdev);
  3179. il_free_channel_map(il);
  3180. il_free_geos(il);
  3181. kfree(il->scan_cmd);
  3182. dev_kfree_skb(il->beacon_skb);
  3183. ieee80211_free_hw(il->hw);
  3184. }
  3185. /*****************************************************************************
  3186. *
  3187. * driver and module entry point
  3188. *
  3189. *****************************************************************************/
  3190. static struct pci_driver il3945_driver = {
  3191. .name = DRV_NAME,
  3192. .id_table = il3945_hw_card_ids,
  3193. .probe = il3945_pci_probe,
  3194. .remove = il3945_pci_remove,
  3195. .driver.pm = IL_LEGACY_PM_OPS,
  3196. };
  3197. static int __init
  3198. il3945_init(void)
  3199. {
  3200. int ret;
  3201. pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3202. pr_info(DRV_COPYRIGHT "\n");
  3203. /*
  3204. * Disabling hardware scan means that mac80211 will perform scans
  3205. * "the hard way", rather than using device's scan.
  3206. */
  3207. if (il3945_mod_params.disable_hw_scan) {
  3208. pr_info("hw_scan is disabled\n");
  3209. il3945_mac_ops.hw_scan = NULL;
  3210. }
  3211. ret = il3945_rate_control_register();
  3212. if (ret) {
  3213. pr_err("Unable to register rate control algorithm: %d\n", ret);
  3214. return ret;
  3215. }
  3216. ret = pci_register_driver(&il3945_driver);
  3217. if (ret) {
  3218. pr_err("Unable to initialize PCI module\n");
  3219. goto error_register;
  3220. }
  3221. return ret;
  3222. error_register:
  3223. il3945_rate_control_unregister();
  3224. return ret;
  3225. }
  3226. static void __exit
  3227. il3945_exit(void)
  3228. {
  3229. pci_unregister_driver(&il3945_driver);
  3230. il3945_rate_control_unregister();
  3231. }
  3232. MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX));
  3233. module_param_named(antenna, il3945_mod_params.antenna, int, 0444);
  3234. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3235. module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, 0444);
  3236. MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])");
  3237. module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int,
  3238. 0444);
  3239. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
  3240. #ifdef CONFIG_IWLEGACY_DEBUG
  3241. module_param_named(debug, il_debug_level, uint, 0644);
  3242. MODULE_PARM_DESC(debug, "debug output mask");
  3243. #endif
  3244. module_param_named(fw_restart, il3945_mod_params.restart_fw, int, 0444);
  3245. MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
  3246. module_exit(il3945_exit);
  3247. module_init(il3945_init);