mmio.c 2.3 KB

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  1. // SPDX-License-Identifier: ISC
  2. /*
  3. * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
  4. */
  5. #include "mt76.h"
  6. #include "dma.h"
  7. #include "trace.h"
  8. static u32 mt76_mmio_rr(struct mt76_dev *dev, u32 offset)
  9. {
  10. u32 val;
  11. val = readl(dev->mmio.regs + offset);
  12. trace_reg_rr(dev, offset, val);
  13. return val;
  14. }
  15. static void mt76_mmio_wr(struct mt76_dev *dev, u32 offset, u32 val)
  16. {
  17. trace_reg_wr(dev, offset, val);
  18. writel(val, dev->mmio.regs + offset);
  19. }
  20. static u32 mt76_mmio_rmw(struct mt76_dev *dev, u32 offset, u32 mask, u32 val)
  21. {
  22. val |= mt76_mmio_rr(dev, offset) & ~mask;
  23. mt76_mmio_wr(dev, offset, val);
  24. return val;
  25. }
  26. static void mt76_mmio_write_copy(struct mt76_dev *dev, u32 offset,
  27. const void *data, int len)
  28. {
  29. __iowrite32_copy(dev->mmio.regs + offset, data, DIV_ROUND_UP(len, 4));
  30. }
  31. static void mt76_mmio_read_copy(struct mt76_dev *dev, u32 offset,
  32. void *data, int len)
  33. {
  34. __ioread32_copy(data, dev->mmio.regs + offset, DIV_ROUND_UP(len, 4));
  35. }
  36. static int mt76_mmio_wr_rp(struct mt76_dev *dev, u32 base,
  37. const struct mt76_reg_pair *data, int len)
  38. {
  39. while (len > 0) {
  40. mt76_mmio_wr(dev, data->reg, data->value);
  41. data++;
  42. len--;
  43. }
  44. return 0;
  45. }
  46. static int mt76_mmio_rd_rp(struct mt76_dev *dev, u32 base,
  47. struct mt76_reg_pair *data, int len)
  48. {
  49. while (len > 0) {
  50. data->value = mt76_mmio_rr(dev, data->reg);
  51. data++;
  52. len--;
  53. }
  54. return 0;
  55. }
  56. void mt76_set_irq_mask(struct mt76_dev *dev, u32 addr,
  57. u32 clear, u32 set)
  58. {
  59. unsigned long flags;
  60. spin_lock_irqsave(&dev->mmio.irq_lock, flags);
  61. dev->mmio.irqmask &= ~clear;
  62. dev->mmio.irqmask |= set;
  63. if (addr) {
  64. if (mtk_wed_device_active(&dev->mmio.wed))
  65. mtk_wed_device_irq_set_mask(&dev->mmio.wed,
  66. dev->mmio.irqmask);
  67. else
  68. mt76_mmio_wr(dev, addr, dev->mmio.irqmask);
  69. }
  70. spin_unlock_irqrestore(&dev->mmio.irq_lock, flags);
  71. }
  72. EXPORT_SYMBOL_GPL(mt76_set_irq_mask);
  73. void mt76_mmio_init(struct mt76_dev *dev, void __iomem *regs)
  74. {
  75. static const struct mt76_bus_ops mt76_mmio_ops = {
  76. .rr = mt76_mmio_rr,
  77. .rmw = mt76_mmio_rmw,
  78. .wr = mt76_mmio_wr,
  79. .write_copy = mt76_mmio_write_copy,
  80. .read_copy = mt76_mmio_read_copy,
  81. .wr_rp = mt76_mmio_wr_rp,
  82. .rd_rp = mt76_mmio_rd_rp,
  83. .type = MT76_BUS_MMIO,
  84. };
  85. dev->bus = &mt76_mmio_ops;
  86. dev->mmio.regs = regs;
  87. spin_lock_init(&dev->mmio.irq_lock);
  88. }
  89. EXPORT_SYMBOL_GPL(mt76_mmio_init);