mac.c 39 KB

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  1. // SPDX-License-Identifier: ISC
  2. /* Copyright (C) 2023 MediaTek Inc. */
  3. #include <linux/devcoredump.h>
  4. #include <linux/etherdevice.h>
  5. #include <linux/timekeeping.h>
  6. #include "mt7925.h"
  7. #include "../dma.h"
  8. #include "mac.h"
  9. #include "mcu.h"
  10. bool mt7925_mac_wtbl_update(struct mt792x_dev *dev, int idx, u32 mask)
  11. {
  12. mt76_rmw(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_WLAN_IDX,
  13. FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, idx) | mask);
  14. return mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY,
  15. 0, 5000);
  16. }
  17. static void mt7925_mac_sta_poll(struct mt792x_dev *dev)
  18. {
  19. static const u8 ac_to_tid[] = {
  20. [IEEE80211_AC_BE] = 0,
  21. [IEEE80211_AC_BK] = 1,
  22. [IEEE80211_AC_VI] = 4,
  23. [IEEE80211_AC_VO] = 6
  24. };
  25. struct ieee80211_sta *sta;
  26. struct mt792x_sta *msta;
  27. struct mt792x_link_sta *mlink;
  28. u32 tx_time[IEEE80211_NUM_ACS], rx_time[IEEE80211_NUM_ACS];
  29. LIST_HEAD(sta_poll_list);
  30. struct rate_info *rate;
  31. s8 rssi[4];
  32. int i;
  33. spin_lock_bh(&dev->mt76.sta_poll_lock);
  34. list_splice_init(&dev->mt76.sta_poll_list, &sta_poll_list);
  35. spin_unlock_bh(&dev->mt76.sta_poll_lock);
  36. while (true) {
  37. bool clear = false;
  38. u32 addr, val;
  39. u16 idx;
  40. u8 bw;
  41. if (list_empty(&sta_poll_list))
  42. break;
  43. mlink = list_first_entry(&sta_poll_list,
  44. struct mt792x_link_sta, wcid.poll_list);
  45. msta = mlink->sta;
  46. spin_lock_bh(&dev->mt76.sta_poll_lock);
  47. list_del_init(&mlink->wcid.poll_list);
  48. spin_unlock_bh(&dev->mt76.sta_poll_lock);
  49. idx = mlink->wcid.idx;
  50. addr = mt7925_mac_wtbl_lmac_addr(dev, idx, MT_WTBL_AC0_CTT_OFFSET);
  51. for (i = 0; i < IEEE80211_NUM_ACS; i++) {
  52. u32 tx_last = mlink->airtime_ac[i];
  53. u32 rx_last = mlink->airtime_ac[i + 4];
  54. mlink->airtime_ac[i] = mt76_rr(dev, addr);
  55. mlink->airtime_ac[i + 4] = mt76_rr(dev, addr + 4);
  56. tx_time[i] = mlink->airtime_ac[i] - tx_last;
  57. rx_time[i] = mlink->airtime_ac[i + 4] - rx_last;
  58. if ((tx_last | rx_last) & BIT(30))
  59. clear = true;
  60. addr += 8;
  61. }
  62. if (clear) {
  63. mt7925_mac_wtbl_update(dev, idx,
  64. MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
  65. memset(mlink->airtime_ac, 0, sizeof(mlink->airtime_ac));
  66. }
  67. if (!mlink->wcid.sta)
  68. continue;
  69. sta = container_of((void *)msta, struct ieee80211_sta,
  70. drv_priv);
  71. for (i = 0; i < IEEE80211_NUM_ACS; i++) {
  72. u8 q = mt76_connac_lmac_mapping(i);
  73. u32 tx_cur = tx_time[q];
  74. u32 rx_cur = rx_time[q];
  75. u8 tid = ac_to_tid[i];
  76. if (!tx_cur && !rx_cur)
  77. continue;
  78. ieee80211_sta_register_airtime(sta, tid, tx_cur,
  79. rx_cur);
  80. }
  81. /* We don't support reading GI info from txs packets.
  82. * For accurate tx status reporting and AQL improvement,
  83. * we need to make sure that flags match so polling GI
  84. * from per-sta counters directly.
  85. */
  86. rate = &mlink->wcid.rate;
  87. switch (rate->bw) {
  88. case RATE_INFO_BW_160:
  89. bw = IEEE80211_STA_RX_BW_160;
  90. break;
  91. case RATE_INFO_BW_80:
  92. bw = IEEE80211_STA_RX_BW_80;
  93. break;
  94. case RATE_INFO_BW_40:
  95. bw = IEEE80211_STA_RX_BW_40;
  96. break;
  97. default:
  98. bw = IEEE80211_STA_RX_BW_20;
  99. break;
  100. }
  101. addr = mt7925_mac_wtbl_lmac_addr(dev, idx, 6);
  102. val = mt76_rr(dev, addr);
  103. if (rate->flags & RATE_INFO_FLAGS_EHT_MCS) {
  104. addr = mt7925_mac_wtbl_lmac_addr(dev, idx, 5);
  105. val = mt76_rr(dev, addr);
  106. rate->eht_gi = FIELD_GET(GENMASK(25, 24), val);
  107. } else if (rate->flags & RATE_INFO_FLAGS_HE_MCS) {
  108. u8 offs = MT_WTBL_TXRX_RATE_G2_HE + 2 * bw;
  109. rate->he_gi = (val & (0x3 << offs)) >> offs;
  110. } else if (rate->flags &
  111. (RATE_INFO_FLAGS_VHT_MCS | RATE_INFO_FLAGS_MCS)) {
  112. if (val & BIT(MT_WTBL_TXRX_RATE_G2 + bw))
  113. rate->flags |= RATE_INFO_FLAGS_SHORT_GI;
  114. else
  115. rate->flags &= ~RATE_INFO_FLAGS_SHORT_GI;
  116. }
  117. /* get signal strength of resp frames (CTS/BA/ACK) */
  118. addr = mt7925_mac_wtbl_lmac_addr(dev, idx, 34);
  119. val = mt76_rr(dev, addr);
  120. rssi[0] = to_rssi(GENMASK(7, 0), val);
  121. rssi[1] = to_rssi(GENMASK(15, 8), val);
  122. rssi[2] = to_rssi(GENMASK(23, 16), val);
  123. rssi[3] = to_rssi(GENMASK(31, 14), val);
  124. mlink->ack_signal =
  125. mt76_rx_signal(msta->vif->phy->mt76->antenna_mask, rssi);
  126. ewma_avg_signal_add(&mlink->avg_ack_signal, -mlink->ack_signal);
  127. }
  128. }
  129. void mt7925_mac_set_fixed_rate_table(struct mt792x_dev *dev,
  130. u8 tbl_idx, u16 rate_idx)
  131. {
  132. u32 ctrl = MT_WTBL_ITCR_WR | MT_WTBL_ITCR_EXEC | tbl_idx;
  133. mt76_wr(dev, MT_WTBL_ITDR0, rate_idx);
  134. /* use wtbl spe idx */
  135. mt76_wr(dev, MT_WTBL_ITDR1, MT_WTBL_SPE_IDX_SEL);
  136. mt76_wr(dev, MT_WTBL_ITCR, ctrl);
  137. }
  138. /* The HW does not translate the mac header to 802.3 for mesh point */
  139. static int mt7925_reverse_frag0_hdr_trans(struct sk_buff *skb, u16 hdr_gap)
  140. {
  141. struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
  142. struct ethhdr *eth_hdr = (struct ethhdr *)(skb->data + hdr_gap);
  143. struct mt792x_sta *msta = (struct mt792x_sta *)status->wcid;
  144. __le32 *rxd = (__le32 *)skb->data;
  145. struct ieee80211_sta *sta;
  146. struct ieee80211_vif *vif;
  147. struct ieee80211_hdr hdr;
  148. u16 frame_control;
  149. if (le32_get_bits(rxd[3], MT_RXD3_NORMAL_ADDR_TYPE) !=
  150. MT_RXD3_NORMAL_U2M)
  151. return -EINVAL;
  152. if (!(le32_to_cpu(rxd[1]) & MT_RXD1_NORMAL_GROUP_4))
  153. return -EINVAL;
  154. if (!msta || !msta->vif)
  155. return -EINVAL;
  156. sta = container_of((void *)msta, struct ieee80211_sta, drv_priv);
  157. vif = container_of((void *)msta->vif, struct ieee80211_vif, drv_priv);
  158. /* store the info from RXD and ethhdr to avoid being overridden */
  159. frame_control = le32_get_bits(rxd[8], MT_RXD8_FRAME_CONTROL);
  160. hdr.frame_control = cpu_to_le16(frame_control);
  161. hdr.seq_ctrl = cpu_to_le16(le32_get_bits(rxd[10], MT_RXD10_SEQ_CTRL));
  162. hdr.duration_id = 0;
  163. ether_addr_copy(hdr.addr1, vif->addr);
  164. ether_addr_copy(hdr.addr2, sta->addr);
  165. switch (frame_control & (IEEE80211_FCTL_TODS |
  166. IEEE80211_FCTL_FROMDS)) {
  167. case 0:
  168. ether_addr_copy(hdr.addr3, vif->bss_conf.bssid);
  169. break;
  170. case IEEE80211_FCTL_FROMDS:
  171. ether_addr_copy(hdr.addr3, eth_hdr->h_source);
  172. break;
  173. case IEEE80211_FCTL_TODS:
  174. ether_addr_copy(hdr.addr3, eth_hdr->h_dest);
  175. break;
  176. case IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS:
  177. ether_addr_copy(hdr.addr3, eth_hdr->h_dest);
  178. ether_addr_copy(hdr.addr4, eth_hdr->h_source);
  179. break;
  180. default:
  181. break;
  182. }
  183. skb_pull(skb, hdr_gap + sizeof(struct ethhdr) - 2);
  184. if (eth_hdr->h_proto == cpu_to_be16(ETH_P_AARP) ||
  185. eth_hdr->h_proto == cpu_to_be16(ETH_P_IPX))
  186. ether_addr_copy(skb_push(skb, ETH_ALEN), bridge_tunnel_header);
  187. else if (be16_to_cpu(eth_hdr->h_proto) >= ETH_P_802_3_MIN)
  188. ether_addr_copy(skb_push(skb, ETH_ALEN), rfc1042_header);
  189. else
  190. skb_pull(skb, 2);
  191. if (ieee80211_has_order(hdr.frame_control))
  192. memcpy(skb_push(skb, IEEE80211_HT_CTL_LEN), &rxd[11],
  193. IEEE80211_HT_CTL_LEN);
  194. if (ieee80211_is_data_qos(hdr.frame_control)) {
  195. __le16 qos_ctrl;
  196. qos_ctrl = cpu_to_le16(le32_get_bits(rxd[10], MT_RXD10_QOS_CTL));
  197. memcpy(skb_push(skb, IEEE80211_QOS_CTL_LEN), &qos_ctrl,
  198. IEEE80211_QOS_CTL_LEN);
  199. }
  200. if (ieee80211_has_a4(hdr.frame_control))
  201. memcpy(skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr));
  202. else
  203. memcpy(skb_push(skb, sizeof(hdr) - 6), &hdr, sizeof(hdr) - 6);
  204. return 0;
  205. }
  206. static int
  207. mt7925_mac_fill_rx_rate(struct mt792x_dev *dev,
  208. struct mt76_rx_status *status,
  209. struct ieee80211_supported_band *sband,
  210. __le32 *rxv, u8 *mode)
  211. {
  212. u32 v0, v2;
  213. u8 stbc, gi, bw, dcm, nss;
  214. int i, idx;
  215. bool cck = false;
  216. v0 = le32_to_cpu(rxv[0]);
  217. v2 = le32_to_cpu(rxv[2]);
  218. idx = FIELD_GET(MT_PRXV_TX_RATE, v0);
  219. i = idx;
  220. nss = FIELD_GET(MT_PRXV_NSTS, v0) + 1;
  221. stbc = FIELD_GET(MT_PRXV_HT_STBC, v2);
  222. gi = FIELD_GET(MT_PRXV_HT_SHORT_GI, v2);
  223. *mode = FIELD_GET(MT_PRXV_TX_MODE, v2);
  224. dcm = FIELD_GET(MT_PRXV_DCM, v2);
  225. bw = FIELD_GET(MT_PRXV_FRAME_MODE, v2);
  226. switch (*mode) {
  227. case MT_PHY_TYPE_CCK:
  228. cck = true;
  229. fallthrough;
  230. case MT_PHY_TYPE_OFDM:
  231. i = mt76_get_rate(&dev->mt76, sband, i, cck);
  232. break;
  233. case MT_PHY_TYPE_HT_GF:
  234. case MT_PHY_TYPE_HT:
  235. status->encoding = RX_ENC_HT;
  236. if (gi)
  237. status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
  238. if (i > 31)
  239. return -EINVAL;
  240. break;
  241. case MT_PHY_TYPE_VHT:
  242. status->nss = nss;
  243. status->encoding = RX_ENC_VHT;
  244. if (gi)
  245. status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
  246. if (i > 11)
  247. return -EINVAL;
  248. break;
  249. case MT_PHY_TYPE_HE_MU:
  250. case MT_PHY_TYPE_HE_SU:
  251. case MT_PHY_TYPE_HE_EXT_SU:
  252. case MT_PHY_TYPE_HE_TB:
  253. status->nss = nss;
  254. status->encoding = RX_ENC_HE;
  255. i &= GENMASK(3, 0);
  256. if (gi <= NL80211_RATE_INFO_HE_GI_3_2)
  257. status->he_gi = gi;
  258. status->he_dcm = dcm;
  259. break;
  260. case MT_PHY_TYPE_EHT_SU:
  261. case MT_PHY_TYPE_EHT_TRIG:
  262. case MT_PHY_TYPE_EHT_MU:
  263. status->nss = nss;
  264. status->encoding = RX_ENC_EHT;
  265. i &= GENMASK(3, 0);
  266. if (gi <= NL80211_RATE_INFO_EHT_GI_3_2)
  267. status->eht.gi = gi;
  268. break;
  269. default:
  270. return -EINVAL;
  271. }
  272. status->rate_idx = i;
  273. switch (bw) {
  274. case IEEE80211_STA_RX_BW_20:
  275. break;
  276. case IEEE80211_STA_RX_BW_40:
  277. if (*mode & MT_PHY_TYPE_HE_EXT_SU &&
  278. (idx & MT_PRXV_TX_ER_SU_106T)) {
  279. status->bw = RATE_INFO_BW_HE_RU;
  280. status->he_ru =
  281. NL80211_RATE_INFO_HE_RU_ALLOC_106;
  282. } else {
  283. status->bw = RATE_INFO_BW_40;
  284. }
  285. break;
  286. case IEEE80211_STA_RX_BW_80:
  287. status->bw = RATE_INFO_BW_80;
  288. break;
  289. case IEEE80211_STA_RX_BW_160:
  290. status->bw = RATE_INFO_BW_160;
  291. break;
  292. default:
  293. return -EINVAL;
  294. }
  295. status->enc_flags |= RX_ENC_FLAG_STBC_MASK * stbc;
  296. if (*mode < MT_PHY_TYPE_HE_SU && gi)
  297. status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
  298. return 0;
  299. }
  300. static int
  301. mt7925_mac_fill_rx(struct mt792x_dev *dev, struct sk_buff *skb)
  302. {
  303. u32 csum_mask = MT_RXD3_NORMAL_IP_SUM | MT_RXD3_NORMAL_UDP_TCP_SUM;
  304. struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
  305. bool hdr_trans, unicast, insert_ccmp_hdr = false;
  306. u8 chfreq, qos_ctl = 0, remove_pad, amsdu_info;
  307. u16 hdr_gap;
  308. __le32 *rxv = NULL, *rxd = (__le32 *)skb->data;
  309. struct mt76_phy *mphy = &dev->mt76.phy;
  310. struct mt792x_phy *phy = &dev->phy;
  311. struct ieee80211_supported_band *sband;
  312. u32 csum_status = *(u32 *)skb->cb;
  313. u32 rxd1 = le32_to_cpu(rxd[1]);
  314. u32 rxd2 = le32_to_cpu(rxd[2]);
  315. u32 rxd3 = le32_to_cpu(rxd[3]);
  316. u32 rxd4 = le32_to_cpu(rxd[4]);
  317. struct mt792x_link_sta *mlink;
  318. u8 mode = 0; /* , band_idx; */
  319. u16 seq_ctrl = 0;
  320. __le16 fc = 0;
  321. int idx;
  322. memset(status, 0, sizeof(*status));
  323. if (!test_bit(MT76_STATE_RUNNING, &mphy->state))
  324. return -EINVAL;
  325. if (rxd2 & MT_RXD2_NORMAL_AMSDU_ERR)
  326. return -EINVAL;
  327. hdr_trans = rxd2 & MT_RXD2_NORMAL_HDR_TRANS;
  328. if (hdr_trans && (rxd1 & MT_RXD1_NORMAL_CM))
  329. return -EINVAL;
  330. /* ICV error or CCMP/BIP/WPI MIC error */
  331. if (rxd1 & MT_RXD1_NORMAL_ICV_ERR)
  332. status->flag |= RX_FLAG_ONLY_MONITOR;
  333. chfreq = FIELD_GET(MT_RXD3_NORMAL_CH_FREQ, rxd3);
  334. unicast = FIELD_GET(MT_RXD3_NORMAL_ADDR_TYPE, rxd3) == MT_RXD3_NORMAL_U2M;
  335. idx = FIELD_GET(MT_RXD1_NORMAL_WLAN_IDX, rxd1);
  336. status->wcid = mt792x_rx_get_wcid(dev, idx, unicast);
  337. if (status->wcid) {
  338. mlink = container_of(status->wcid, struct mt792x_link_sta, wcid);
  339. spin_lock_bh(&dev->mt76.sta_poll_lock);
  340. if (list_empty(&mlink->wcid.poll_list))
  341. list_add_tail(&mlink->wcid.poll_list,
  342. &dev->mt76.sta_poll_list);
  343. spin_unlock_bh(&dev->mt76.sta_poll_lock);
  344. }
  345. mt792x_get_status_freq_info(status, chfreq);
  346. switch (status->band) {
  347. case NL80211_BAND_5GHZ:
  348. sband = &mphy->sband_5g.sband;
  349. break;
  350. case NL80211_BAND_6GHZ:
  351. sband = &mphy->sband_6g.sband;
  352. break;
  353. default:
  354. sband = &mphy->sband_2g.sband;
  355. break;
  356. }
  357. if (!sband->channels)
  358. return -EINVAL;
  359. if (mt76_is_mmio(&dev->mt76) && (rxd3 & csum_mask) == csum_mask &&
  360. !(csum_status & (BIT(0) | BIT(2) | BIT(3))))
  361. skb->ip_summed = CHECKSUM_UNNECESSARY;
  362. if (rxd3 & MT_RXD3_NORMAL_FCS_ERR)
  363. status->flag |= RX_FLAG_FAILED_FCS_CRC;
  364. if (rxd1 & MT_RXD1_NORMAL_TKIP_MIC_ERR)
  365. status->flag |= RX_FLAG_MMIC_ERROR;
  366. if (FIELD_GET(MT_RXD2_NORMAL_SEC_MODE, rxd2) != 0 &&
  367. !(rxd1 & (MT_RXD1_NORMAL_CLM | MT_RXD1_NORMAL_CM))) {
  368. status->flag |= RX_FLAG_DECRYPTED;
  369. status->flag |= RX_FLAG_IV_STRIPPED;
  370. status->flag |= RX_FLAG_MMIC_STRIPPED | RX_FLAG_MIC_STRIPPED;
  371. }
  372. remove_pad = FIELD_GET(MT_RXD2_NORMAL_HDR_OFFSET, rxd2);
  373. if (rxd2 & MT_RXD2_NORMAL_MAX_LEN_ERROR)
  374. return -EINVAL;
  375. rxd += 8;
  376. if (rxd1 & MT_RXD1_NORMAL_GROUP_4) {
  377. u32 v0 = le32_to_cpu(rxd[0]);
  378. u32 v2 = le32_to_cpu(rxd[2]);
  379. /* TODO: need to map rxd address */
  380. fc = cpu_to_le16(FIELD_GET(MT_RXD8_FRAME_CONTROL, v0));
  381. seq_ctrl = FIELD_GET(MT_RXD10_SEQ_CTRL, v2);
  382. qos_ctl = FIELD_GET(MT_RXD10_QOS_CTL, v2);
  383. rxd += 4;
  384. if ((u8 *)rxd - skb->data >= skb->len)
  385. return -EINVAL;
  386. }
  387. if (rxd1 & MT_RXD1_NORMAL_GROUP_1) {
  388. u8 *data = (u8 *)rxd;
  389. if (status->flag & RX_FLAG_DECRYPTED) {
  390. switch (FIELD_GET(MT_RXD2_NORMAL_SEC_MODE, rxd2)) {
  391. case MT_CIPHER_AES_CCMP:
  392. case MT_CIPHER_CCMP_CCX:
  393. case MT_CIPHER_CCMP_256:
  394. insert_ccmp_hdr =
  395. FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2);
  396. fallthrough;
  397. case MT_CIPHER_TKIP:
  398. case MT_CIPHER_TKIP_NO_MIC:
  399. case MT_CIPHER_GCMP:
  400. case MT_CIPHER_GCMP_256:
  401. status->iv[0] = data[5];
  402. status->iv[1] = data[4];
  403. status->iv[2] = data[3];
  404. status->iv[3] = data[2];
  405. status->iv[4] = data[1];
  406. status->iv[5] = data[0];
  407. break;
  408. default:
  409. break;
  410. }
  411. }
  412. rxd += 4;
  413. if ((u8 *)rxd - skb->data >= skb->len)
  414. return -EINVAL;
  415. }
  416. if (rxd1 & MT_RXD1_NORMAL_GROUP_2) {
  417. status->timestamp = le32_to_cpu(rxd[0]);
  418. status->flag |= RX_FLAG_MACTIME_START;
  419. if (!(rxd2 & MT_RXD2_NORMAL_NON_AMPDU)) {
  420. status->flag |= RX_FLAG_AMPDU_DETAILS;
  421. /* all subframes of an A-MPDU have the same timestamp */
  422. if (phy->rx_ampdu_ts != status->timestamp) {
  423. if (!++phy->ampdu_ref)
  424. phy->ampdu_ref++;
  425. }
  426. phy->rx_ampdu_ts = status->timestamp;
  427. status->ampdu_ref = phy->ampdu_ref;
  428. }
  429. rxd += 4;
  430. if ((u8 *)rxd - skb->data >= skb->len)
  431. return -EINVAL;
  432. }
  433. /* RXD Group 3 - P-RXV */
  434. if (rxd1 & MT_RXD1_NORMAL_GROUP_3) {
  435. u32 v3;
  436. int ret;
  437. rxv = rxd;
  438. rxd += 4;
  439. if ((u8 *)rxd - skb->data >= skb->len)
  440. return -EINVAL;
  441. v3 = le32_to_cpu(rxv[3]);
  442. status->chains = mphy->antenna_mask;
  443. status->chain_signal[0] = to_rssi(MT_PRXV_RCPI0, v3);
  444. status->chain_signal[1] = to_rssi(MT_PRXV_RCPI1, v3);
  445. status->chain_signal[2] = to_rssi(MT_PRXV_RCPI2, v3);
  446. status->chain_signal[3] = to_rssi(MT_PRXV_RCPI3, v3);
  447. /* RXD Group 5 - C-RXV */
  448. if (rxd1 & MT_RXD1_NORMAL_GROUP_5) {
  449. rxd += 24;
  450. if ((u8 *)rxd - skb->data >= skb->len)
  451. return -EINVAL;
  452. }
  453. ret = mt7925_mac_fill_rx_rate(dev, status, sband, rxv, &mode);
  454. if (ret < 0)
  455. return ret;
  456. }
  457. amsdu_info = FIELD_GET(MT_RXD4_NORMAL_PAYLOAD_FORMAT, rxd4);
  458. status->amsdu = !!amsdu_info;
  459. if (status->amsdu) {
  460. status->first_amsdu = amsdu_info == MT_RXD4_FIRST_AMSDU_FRAME;
  461. status->last_amsdu = amsdu_info == MT_RXD4_LAST_AMSDU_FRAME;
  462. }
  463. hdr_gap = (u8 *)rxd - skb->data + 2 * remove_pad;
  464. if (hdr_trans && ieee80211_has_morefrags(fc)) {
  465. if (mt7925_reverse_frag0_hdr_trans(skb, hdr_gap))
  466. return -EINVAL;
  467. hdr_trans = false;
  468. } else {
  469. int pad_start = 0;
  470. skb_pull(skb, hdr_gap);
  471. if (!hdr_trans && status->amsdu) {
  472. pad_start = ieee80211_get_hdrlen_from_skb(skb);
  473. } else if (hdr_trans && (rxd2 & MT_RXD2_NORMAL_HDR_TRANS_ERROR)) {
  474. /* When header translation failure is indicated,
  475. * the hardware will insert an extra 2-byte field
  476. * containing the data length after the protocol
  477. * type field.
  478. */
  479. pad_start = 12;
  480. if (get_unaligned_be16(skb->data + pad_start) == ETH_P_8021Q)
  481. pad_start += 4;
  482. else
  483. pad_start = 0;
  484. }
  485. if (pad_start) {
  486. memmove(skb->data + 2, skb->data, pad_start);
  487. skb_pull(skb, 2);
  488. }
  489. }
  490. if (!hdr_trans) {
  491. struct ieee80211_hdr *hdr;
  492. if (insert_ccmp_hdr) {
  493. u8 key_id = FIELD_GET(MT_RXD1_NORMAL_KEY_ID, rxd1);
  494. mt76_insert_ccmp_hdr(skb, key_id);
  495. }
  496. hdr = mt76_skb_get_hdr(skb);
  497. fc = hdr->frame_control;
  498. if (ieee80211_is_data_qos(fc)) {
  499. seq_ctrl = le16_to_cpu(hdr->seq_ctrl);
  500. qos_ctl = *ieee80211_get_qos_ctl(hdr);
  501. }
  502. skb_set_mac_header(skb, (unsigned char *)hdr - skb->data);
  503. } else {
  504. status->flag |= RX_FLAG_8023;
  505. }
  506. mt792x_mac_assoc_rssi(dev, skb);
  507. if (rxv && !(status->flag & RX_FLAG_8023)) {
  508. switch (status->encoding) {
  509. case RX_ENC_EHT:
  510. mt76_connac3_mac_decode_eht_radiotap(skb, rxv, mode);
  511. break;
  512. case RX_ENC_HE:
  513. mt76_connac3_mac_decode_he_radiotap(skb, rxv, mode);
  514. break;
  515. default:
  516. break;
  517. }
  518. }
  519. if (!status->wcid || !ieee80211_is_data_qos(fc))
  520. return 0;
  521. status->aggr = unicast && !ieee80211_is_qos_nullfunc(fc);
  522. status->seqno = IEEE80211_SEQ_TO_SN(seq_ctrl);
  523. status->qos_ctl = qos_ctl;
  524. return 0;
  525. }
  526. static void
  527. mt7925_mac_write_txwi_8023(__le32 *txwi, struct sk_buff *skb,
  528. struct mt76_wcid *wcid)
  529. {
  530. u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK;
  531. u8 fc_type, fc_stype;
  532. u16 ethertype;
  533. bool wmm = false;
  534. u32 val;
  535. if (wcid->sta) {
  536. struct ieee80211_sta *sta;
  537. sta = container_of((void *)wcid, struct ieee80211_sta, drv_priv);
  538. wmm = sta->wme;
  539. }
  540. val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_3) |
  541. FIELD_PREP(MT_TXD1_TID, tid);
  542. ethertype = get_unaligned_be16(&skb->data[12]);
  543. if (ethertype >= ETH_P_802_3_MIN)
  544. val |= MT_TXD1_ETH_802_3;
  545. txwi[1] |= cpu_to_le32(val);
  546. fc_type = IEEE80211_FTYPE_DATA >> 2;
  547. fc_stype = wmm ? IEEE80211_STYPE_QOS_DATA >> 4 : 0;
  548. val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) |
  549. FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype);
  550. txwi[2] |= cpu_to_le32(val);
  551. }
  552. static void
  553. mt7925_mac_write_txwi_80211(struct mt76_dev *dev, __le32 *txwi,
  554. struct sk_buff *skb,
  555. struct ieee80211_key_conf *key)
  556. {
  557. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  558. struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
  559. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  560. bool multicast = is_multicast_ether_addr(hdr->addr1);
  561. u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK;
  562. __le16 fc = hdr->frame_control;
  563. u8 fc_type, fc_stype;
  564. u32 val;
  565. if (ieee80211_is_action(fc) &&
  566. mgmt->u.action.category == WLAN_CATEGORY_BACK &&
  567. mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ)
  568. tid = MT_TX_ADDBA;
  569. else if (ieee80211_is_mgmt(hdr->frame_control))
  570. tid = MT_TX_NORMAL;
  571. val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_11) |
  572. FIELD_PREP(MT_TXD1_HDR_INFO,
  573. ieee80211_get_hdrlen_from_skb(skb) / 2) |
  574. FIELD_PREP(MT_TXD1_TID, tid);
  575. if (!ieee80211_is_data(fc) || multicast ||
  576. info->flags & IEEE80211_TX_CTL_USE_MINRATE)
  577. val |= MT_TXD1_FIXED_RATE;
  578. if (key && multicast && ieee80211_is_robust_mgmt_frame(skb) &&
  579. key->cipher == WLAN_CIPHER_SUITE_AES_CMAC) {
  580. val |= MT_TXD1_BIP;
  581. txwi[3] &= ~cpu_to_le32(MT_TXD3_PROTECT_FRAME);
  582. }
  583. txwi[1] |= cpu_to_le32(val);
  584. fc_type = (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE) >> 2;
  585. fc_stype = (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE) >> 4;
  586. val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) |
  587. FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype);
  588. txwi[2] |= cpu_to_le32(val);
  589. txwi[3] |= cpu_to_le32(FIELD_PREP(MT_TXD3_BCM, multicast));
  590. if (ieee80211_is_beacon(fc))
  591. txwi[3] |= cpu_to_le32(MT_TXD3_REM_TX_COUNT);
  592. if (info->flags & IEEE80211_TX_CTL_INJECTED) {
  593. u16 seqno = le16_to_cpu(hdr->seq_ctrl);
  594. if (ieee80211_is_back_req(hdr->frame_control)) {
  595. struct ieee80211_bar *bar;
  596. bar = (struct ieee80211_bar *)skb->data;
  597. seqno = le16_to_cpu(bar->start_seq_num);
  598. }
  599. val = MT_TXD3_SN_VALID |
  600. FIELD_PREP(MT_TXD3_SEQ, IEEE80211_SEQ_TO_SN(seqno));
  601. txwi[3] |= cpu_to_le32(val);
  602. txwi[3] &= ~cpu_to_le32(MT_TXD3_HW_AMSDU);
  603. }
  604. }
  605. void
  606. mt7925_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi,
  607. struct sk_buff *skb, struct mt76_wcid *wcid,
  608. struct ieee80211_key_conf *key, int pid,
  609. enum mt76_txq_id qid, u32 changed)
  610. {
  611. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  612. struct ieee80211_vif *vif = info->control.vif;
  613. u8 p_fmt, q_idx, omac_idx = 0, wmm_idx = 0, band_idx = 0;
  614. u32 val, sz_txd = mt76_is_mmio(dev) ? MT_TXD_SIZE : MT_SDIO_TXD_SIZE;
  615. bool is_8023 = info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP;
  616. struct mt76_vif *mvif;
  617. bool beacon = !!(changed & (BSS_CHANGED_BEACON |
  618. BSS_CHANGED_BEACON_ENABLED));
  619. bool inband_disc = !!(changed & (BSS_CHANGED_UNSOL_BCAST_PROBE_RESP |
  620. BSS_CHANGED_FILS_DISCOVERY));
  621. struct mt792x_bss_conf *mconf;
  622. mconf = vif ? mt792x_vif_to_link((struct mt792x_vif *)vif->drv_priv,
  623. wcid->link_id) : NULL;
  624. mvif = mconf ? (struct mt76_vif *)&mconf->mt76 : NULL;
  625. if (mvif) {
  626. omac_idx = mvif->omac_idx;
  627. wmm_idx = mvif->wmm_idx;
  628. band_idx = mvif->band_idx;
  629. }
  630. if (inband_disc) {
  631. p_fmt = MT_TX_TYPE_FW;
  632. q_idx = MT_LMAC_ALTX0;
  633. } else if (beacon) {
  634. p_fmt = MT_TX_TYPE_FW;
  635. q_idx = MT_LMAC_BCN0;
  636. } else if (qid >= MT_TXQ_PSD) {
  637. p_fmt = mt76_is_mmio(dev) ? MT_TX_TYPE_CT : MT_TX_TYPE_SF;
  638. q_idx = MT_LMAC_ALTX0;
  639. } else {
  640. p_fmt = mt76_is_mmio(dev) ? MT_TX_TYPE_CT : MT_TX_TYPE_SF;
  641. q_idx = wmm_idx * MT76_CONNAC_MAX_WMM_SETS +
  642. mt76_connac_lmac_mapping(skb_get_queue_mapping(skb));
  643. /* counting non-offloading skbs */
  644. wcid->stats.tx_bytes += skb->len;
  645. wcid->stats.tx_packets++;
  646. }
  647. val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + sz_txd) |
  648. FIELD_PREP(MT_TXD0_PKT_FMT, p_fmt) |
  649. FIELD_PREP(MT_TXD0_Q_IDX, q_idx);
  650. txwi[0] = cpu_to_le32(val);
  651. val = FIELD_PREP(MT_TXD1_WLAN_IDX, wcid->idx) |
  652. FIELD_PREP(MT_TXD1_OWN_MAC, omac_idx);
  653. if (band_idx)
  654. val |= FIELD_PREP(MT_TXD1_TGID, band_idx);
  655. txwi[1] = cpu_to_le32(val);
  656. txwi[2] = 0;
  657. val = FIELD_PREP(MT_TXD3_REM_TX_COUNT, 15);
  658. if (key)
  659. val |= MT_TXD3_PROTECT_FRAME;
  660. if (info->flags & IEEE80211_TX_CTL_NO_ACK)
  661. val |= MT_TXD3_NO_ACK;
  662. if (wcid->amsdu)
  663. val |= MT_TXD3_HW_AMSDU;
  664. txwi[3] = cpu_to_le32(val);
  665. txwi[4] = 0;
  666. val = FIELD_PREP(MT_TXD5_PID, pid);
  667. if (pid >= MT_PACKET_ID_FIRST) {
  668. val |= MT_TXD5_TX_STATUS_HOST;
  669. txwi[3] |= cpu_to_le32(MT_TXD3_BA_DISABLE);
  670. txwi[3] &= ~cpu_to_le32(MT_TXD3_HW_AMSDU);
  671. }
  672. txwi[5] = cpu_to_le32(val);
  673. val = MT_TXD6_DAS | FIELD_PREP(MT_TXD6_MSDU_CNT, 1);
  674. if (!ieee80211_vif_is_mld(vif) ||
  675. (q_idx >= MT_LMAC_ALTX0 && q_idx <= MT_LMAC_BCN0))
  676. val |= MT_TXD6_DIS_MAT;
  677. txwi[6] = cpu_to_le32(val);
  678. txwi[7] = 0;
  679. if (is_8023)
  680. mt7925_mac_write_txwi_8023(txwi, skb, wcid);
  681. else
  682. mt7925_mac_write_txwi_80211(dev, txwi, skb, key);
  683. if (txwi[1] & cpu_to_le32(MT_TXD1_FIXED_RATE)) {
  684. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  685. bool mcast = ieee80211_is_data(hdr->frame_control) &&
  686. is_multicast_ether_addr(hdr->addr1);
  687. u8 idx = MT792x_BASIC_RATES_TBL;
  688. if (mvif) {
  689. if (mcast && mvif->mcast_rates_idx)
  690. idx = mvif->mcast_rates_idx;
  691. else if (beacon && mvif->beacon_rates_idx)
  692. idx = mvif->beacon_rates_idx;
  693. else
  694. idx = mvif->basic_rates_idx;
  695. }
  696. txwi[6] |= cpu_to_le32(FIELD_PREP(MT_TXD6_TX_RATE, idx));
  697. txwi[3] |= cpu_to_le32(MT_TXD3_BA_DISABLE);
  698. }
  699. }
  700. EXPORT_SYMBOL_GPL(mt7925_mac_write_txwi);
  701. static void mt7925_tx_check_aggr(struct ieee80211_sta *sta, struct sk_buff *skb,
  702. struct mt76_wcid *wcid)
  703. {
  704. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  705. struct ieee80211_link_sta *link_sta;
  706. struct mt792x_link_sta *mlink;
  707. struct mt792x_sta *msta;
  708. bool is_8023;
  709. u16 fc, tid;
  710. link_sta = rcu_dereference(sta->link[wcid->link_id]);
  711. if (!link_sta)
  712. return;
  713. if (!sta || !(link_sta->ht_cap.ht_supported || link_sta->he_cap.has_he))
  714. return;
  715. tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK;
  716. is_8023 = info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP;
  717. if (is_8023) {
  718. fc = IEEE80211_FTYPE_DATA |
  719. (sta->wme ? IEEE80211_STYPE_QOS_DATA :
  720. IEEE80211_STYPE_DATA);
  721. } else {
  722. /* No need to get precise TID for Action/Management Frame,
  723. * since it will not meet the following Frame Control
  724. * condition anyway.
  725. */
  726. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  727. fc = le16_to_cpu(hdr->frame_control) &
  728. (IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE);
  729. }
  730. if (unlikely(fc != (IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_DATA)))
  731. return;
  732. msta = (struct mt792x_sta *)sta->drv_priv;
  733. if (sta->mlo && msta->deflink_id != IEEE80211_LINK_UNSPECIFIED)
  734. mlink = rcu_dereference(msta->link[msta->deflink_id]);
  735. else
  736. mlink = &msta->deflink;
  737. if (!test_and_set_bit(tid, &mlink->wcid.ampdu_state))
  738. ieee80211_start_tx_ba_session(sta, tid, 0);
  739. }
  740. static bool
  741. mt7925_mac_add_txs_skb(struct mt792x_dev *dev, struct mt76_wcid *wcid,
  742. int pid, __le32 *txs_data)
  743. {
  744. struct mt76_sta_stats *stats = &wcid->stats;
  745. struct ieee80211_supported_band *sband;
  746. struct mt76_dev *mdev = &dev->mt76;
  747. struct mt76_phy *mphy;
  748. struct ieee80211_tx_info *info;
  749. struct sk_buff_head list;
  750. struct rate_info rate = {};
  751. struct sk_buff *skb;
  752. bool cck = false;
  753. u32 txrate, txs, mode, stbc;
  754. mt76_tx_status_lock(mdev, &list);
  755. skb = mt76_tx_status_skb_get(mdev, wcid, pid, &list);
  756. if (!skb)
  757. goto out_no_skb;
  758. txs = le32_to_cpu(txs_data[0]);
  759. info = IEEE80211_SKB_CB(skb);
  760. if (!(txs & MT_TXS0_ACK_ERROR_MASK))
  761. info->flags |= IEEE80211_TX_STAT_ACK;
  762. info->status.ampdu_len = 1;
  763. info->status.ampdu_ack_len = !!(info->flags &
  764. IEEE80211_TX_STAT_ACK);
  765. info->status.rates[0].idx = -1;
  766. txrate = FIELD_GET(MT_TXS0_TX_RATE, txs);
  767. rate.mcs = FIELD_GET(MT_TX_RATE_IDX, txrate);
  768. rate.nss = FIELD_GET(MT_TX_RATE_NSS, txrate) + 1;
  769. stbc = le32_get_bits(txs_data[3], MT_TXS3_RATE_STBC);
  770. if (stbc && rate.nss > 1)
  771. rate.nss >>= 1;
  772. if (rate.nss - 1 < ARRAY_SIZE(stats->tx_nss))
  773. stats->tx_nss[rate.nss - 1]++;
  774. if (rate.mcs < ARRAY_SIZE(stats->tx_mcs))
  775. stats->tx_mcs[rate.mcs]++;
  776. mode = FIELD_GET(MT_TX_RATE_MODE, txrate);
  777. switch (mode) {
  778. case MT_PHY_TYPE_CCK:
  779. cck = true;
  780. fallthrough;
  781. case MT_PHY_TYPE_OFDM:
  782. mphy = mt76_dev_phy(mdev, wcid->phy_idx);
  783. if (mphy->chandef.chan->band == NL80211_BAND_5GHZ)
  784. sband = &mphy->sband_5g.sband;
  785. else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ)
  786. sband = &mphy->sband_6g.sband;
  787. else
  788. sband = &mphy->sband_2g.sband;
  789. rate.mcs = mt76_get_rate(mphy->dev, sband, rate.mcs, cck);
  790. rate.legacy = sband->bitrates[rate.mcs].bitrate;
  791. break;
  792. case MT_PHY_TYPE_HT:
  793. case MT_PHY_TYPE_HT_GF:
  794. if (rate.mcs > 31)
  795. goto out;
  796. rate.flags = RATE_INFO_FLAGS_MCS;
  797. if (wcid->rate.flags & RATE_INFO_FLAGS_SHORT_GI)
  798. rate.flags |= RATE_INFO_FLAGS_SHORT_GI;
  799. break;
  800. case MT_PHY_TYPE_VHT:
  801. if (rate.mcs > 9)
  802. goto out;
  803. rate.flags = RATE_INFO_FLAGS_VHT_MCS;
  804. break;
  805. case MT_PHY_TYPE_HE_SU:
  806. case MT_PHY_TYPE_HE_EXT_SU:
  807. case MT_PHY_TYPE_HE_TB:
  808. case MT_PHY_TYPE_HE_MU:
  809. if (rate.mcs > 11)
  810. goto out;
  811. rate.he_gi = wcid->rate.he_gi;
  812. rate.he_dcm = FIELD_GET(MT_TX_RATE_DCM, txrate);
  813. rate.flags = RATE_INFO_FLAGS_HE_MCS;
  814. break;
  815. case MT_PHY_TYPE_EHT_SU:
  816. case MT_PHY_TYPE_EHT_TRIG:
  817. case MT_PHY_TYPE_EHT_MU:
  818. if (rate.mcs > 13)
  819. goto out;
  820. rate.eht_gi = wcid->rate.eht_gi;
  821. rate.flags = RATE_INFO_FLAGS_EHT_MCS;
  822. break;
  823. default:
  824. goto out;
  825. }
  826. stats->tx_mode[mode]++;
  827. switch (FIELD_GET(MT_TXS0_BW, txs)) {
  828. case IEEE80211_STA_RX_BW_160:
  829. rate.bw = RATE_INFO_BW_160;
  830. stats->tx_bw[3]++;
  831. break;
  832. case IEEE80211_STA_RX_BW_80:
  833. rate.bw = RATE_INFO_BW_80;
  834. stats->tx_bw[2]++;
  835. break;
  836. case IEEE80211_STA_RX_BW_40:
  837. rate.bw = RATE_INFO_BW_40;
  838. stats->tx_bw[1]++;
  839. break;
  840. default:
  841. rate.bw = RATE_INFO_BW_20;
  842. stats->tx_bw[0]++;
  843. break;
  844. }
  845. wcid->rate = rate;
  846. out:
  847. mt76_tx_status_skb_done(mdev, skb, &list);
  848. out_no_skb:
  849. mt76_tx_status_unlock(mdev, &list);
  850. return !!skb;
  851. }
  852. void mt7925_mac_add_txs(struct mt792x_dev *dev, void *data)
  853. {
  854. struct mt792x_link_sta *mlink = NULL;
  855. struct mt76_wcid *wcid;
  856. __le32 *txs_data = data;
  857. u16 wcidx;
  858. u8 pid;
  859. if (le32_get_bits(txs_data[0], MT_TXS0_TXS_FORMAT) > 1)
  860. return;
  861. wcidx = le32_get_bits(txs_data[2], MT_TXS2_WCID);
  862. pid = le32_get_bits(txs_data[3], MT_TXS3_PID);
  863. if (pid < MT_PACKET_ID_FIRST)
  864. return;
  865. if (wcidx >= MT792x_WTBL_SIZE)
  866. return;
  867. rcu_read_lock();
  868. wcid = rcu_dereference(dev->mt76.wcid[wcidx]);
  869. if (!wcid)
  870. goto out;
  871. mlink = container_of(wcid, struct mt792x_link_sta, wcid);
  872. mt7925_mac_add_txs_skb(dev, wcid, pid, txs_data);
  873. if (!wcid->sta)
  874. goto out;
  875. spin_lock_bh(&dev->mt76.sta_poll_lock);
  876. if (list_empty(&mlink->wcid.poll_list))
  877. list_add_tail(&mlink->wcid.poll_list, &dev->mt76.sta_poll_list);
  878. spin_unlock_bh(&dev->mt76.sta_poll_lock);
  879. out:
  880. rcu_read_unlock();
  881. }
  882. void mt7925_txwi_free(struct mt792x_dev *dev, struct mt76_txwi_cache *t,
  883. struct ieee80211_sta *sta, struct mt76_wcid *wcid,
  884. struct list_head *free_list)
  885. {
  886. struct mt76_dev *mdev = &dev->mt76;
  887. __le32 *txwi;
  888. u16 wcid_idx;
  889. mt76_connac_txp_skb_unmap(mdev, t);
  890. if (!t->skb)
  891. goto out;
  892. txwi = (__le32 *)mt76_get_txwi_ptr(mdev, t);
  893. if (sta) {
  894. if (likely(t->skb->protocol != cpu_to_be16(ETH_P_PAE)))
  895. mt7925_tx_check_aggr(sta, t->skb, wcid);
  896. wcid_idx = wcid->idx;
  897. } else {
  898. wcid_idx = le32_get_bits(txwi[1], MT_TXD1_WLAN_IDX);
  899. }
  900. __mt76_tx_complete_skb(mdev, wcid_idx, t->skb, free_list);
  901. out:
  902. t->skb = NULL;
  903. mt76_put_txwi(mdev, t);
  904. }
  905. EXPORT_SYMBOL_GPL(mt7925_txwi_free);
  906. static void
  907. mt7925_mac_tx_free(struct mt792x_dev *dev, void *data, int len)
  908. {
  909. __le32 *tx_free = (__le32 *)data, *cur_info;
  910. struct mt76_dev *mdev = &dev->mt76;
  911. struct mt76_txwi_cache *txwi;
  912. struct ieee80211_sta *sta = NULL;
  913. struct mt76_wcid *wcid = NULL;
  914. LIST_HEAD(free_list);
  915. struct sk_buff *skb, *tmp;
  916. void *end = data + len;
  917. bool wake = false;
  918. u16 total, count = 0;
  919. /* clean DMA queues and unmap buffers first */
  920. mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_PSD], false);
  921. mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_BE], false);
  922. if (WARN_ON_ONCE(le32_get_bits(tx_free[1], MT_TXFREE1_VER) < 4))
  923. return;
  924. total = le32_get_bits(tx_free[0], MT_TXFREE0_MSDU_CNT);
  925. for (cur_info = &tx_free[2]; count < total; cur_info++) {
  926. u32 msdu, info;
  927. u8 i;
  928. if (WARN_ON_ONCE((void *)cur_info >= end))
  929. return;
  930. /* 1'b1: new wcid pair.
  931. * 1'b0: msdu_id with the same 'wcid pair' as above.
  932. */
  933. info = le32_to_cpu(*cur_info);
  934. if (info & MT_TXFREE_INFO_PAIR) {
  935. struct mt792x_link_sta *mlink;
  936. u16 idx;
  937. idx = FIELD_GET(MT_TXFREE_INFO_WLAN_ID, info);
  938. wcid = rcu_dereference(dev->mt76.wcid[idx]);
  939. sta = wcid_to_sta(wcid);
  940. if (!sta)
  941. continue;
  942. mlink = container_of(wcid, struct mt792x_link_sta, wcid);
  943. spin_lock_bh(&mdev->sta_poll_lock);
  944. if (list_empty(&mlink->wcid.poll_list))
  945. list_add_tail(&mlink->wcid.poll_list,
  946. &mdev->sta_poll_list);
  947. spin_unlock_bh(&mdev->sta_poll_lock);
  948. continue;
  949. }
  950. if (info & MT_TXFREE_INFO_HEADER) {
  951. if (wcid) {
  952. wcid->stats.tx_retries +=
  953. FIELD_GET(MT_TXFREE_INFO_COUNT, info) - 1;
  954. wcid->stats.tx_failed +=
  955. !!FIELD_GET(MT_TXFREE_INFO_STAT, info);
  956. }
  957. continue;
  958. }
  959. for (i = 0; i < 2; i++) {
  960. msdu = (info >> (15 * i)) & MT_TXFREE_INFO_MSDU_ID;
  961. if (msdu == MT_TXFREE_INFO_MSDU_ID)
  962. continue;
  963. count++;
  964. txwi = mt76_token_release(mdev, msdu, &wake);
  965. if (!txwi)
  966. continue;
  967. mt7925_txwi_free(dev, txwi, sta, wcid, &free_list);
  968. }
  969. }
  970. mt7925_mac_sta_poll(dev);
  971. if (wake)
  972. mt76_set_tx_blocked(&dev->mt76, false);
  973. mt76_worker_schedule(&dev->mt76.tx_worker);
  974. list_for_each_entry_safe(skb, tmp, &free_list, list) {
  975. skb_list_del_init(skb);
  976. napi_consume_skb(skb, 1);
  977. }
  978. }
  979. bool mt7925_rx_check(struct mt76_dev *mdev, void *data, int len)
  980. {
  981. struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
  982. __le32 *rxd = (__le32 *)data;
  983. __le32 *end = (__le32 *)&rxd[len / 4];
  984. enum rx_pkt_type type;
  985. type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE);
  986. if (type != PKT_TYPE_NORMAL) {
  987. u32 sw_type = le32_get_bits(rxd[0], MT_RXD0_SW_PKT_TYPE_MASK);
  988. if (unlikely((sw_type & MT_RXD0_SW_PKT_TYPE_MAP) ==
  989. MT_RXD0_SW_PKT_TYPE_FRAME))
  990. return true;
  991. }
  992. switch (type) {
  993. case PKT_TYPE_TXRX_NOTIFY:
  994. /* PKT_TYPE_TXRX_NOTIFY can be received only by mmio devices */
  995. mt7925_mac_tx_free(dev, data, len); /* mmio */
  996. return false;
  997. case PKT_TYPE_TXS:
  998. for (rxd += 4; rxd + 12 <= end; rxd += 12)
  999. mt7925_mac_add_txs(dev, rxd);
  1000. return false;
  1001. default:
  1002. return true;
  1003. }
  1004. }
  1005. EXPORT_SYMBOL_GPL(mt7925_rx_check);
  1006. void mt7925_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
  1007. struct sk_buff *skb, u32 *info)
  1008. {
  1009. struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
  1010. __le32 *rxd = (__le32 *)skb->data;
  1011. __le32 *end = (__le32 *)&skb->data[skb->len];
  1012. enum rx_pkt_type type;
  1013. u16 flag;
  1014. type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE);
  1015. flag = le32_get_bits(rxd[0], MT_RXD0_PKT_FLAG);
  1016. if (type != PKT_TYPE_NORMAL) {
  1017. u32 sw_type = le32_get_bits(rxd[0], MT_RXD0_SW_PKT_TYPE_MASK);
  1018. if (unlikely((sw_type & MT_RXD0_SW_PKT_TYPE_MAP) ==
  1019. MT_RXD0_SW_PKT_TYPE_FRAME))
  1020. type = PKT_TYPE_NORMAL;
  1021. }
  1022. if (type == PKT_TYPE_RX_EVENT && flag == 0x1)
  1023. type = PKT_TYPE_NORMAL_MCU;
  1024. switch (type) {
  1025. case PKT_TYPE_TXRX_NOTIFY:
  1026. /* PKT_TYPE_TXRX_NOTIFY can be received only by mmio devices */
  1027. mt7925_mac_tx_free(dev, skb->data, skb->len);
  1028. napi_consume_skb(skb, 1);
  1029. break;
  1030. case PKT_TYPE_RX_EVENT:
  1031. mt7925_mcu_rx_event(dev, skb);
  1032. break;
  1033. case PKT_TYPE_TXS:
  1034. for (rxd += 2; rxd + 8 <= end; rxd += 8)
  1035. mt7925_mac_add_txs(dev, rxd);
  1036. dev_kfree_skb(skb);
  1037. break;
  1038. case PKT_TYPE_NORMAL_MCU:
  1039. case PKT_TYPE_NORMAL:
  1040. if (!mt7925_mac_fill_rx(dev, skb)) {
  1041. mt76_rx(&dev->mt76, q, skb);
  1042. return;
  1043. }
  1044. fallthrough;
  1045. default:
  1046. dev_kfree_skb(skb);
  1047. break;
  1048. }
  1049. }
  1050. EXPORT_SYMBOL_GPL(mt7925_queue_rx_skb);
  1051. static void
  1052. mt7925_vif_connect_iter(void *priv, u8 *mac,
  1053. struct ieee80211_vif *vif)
  1054. {
  1055. struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
  1056. unsigned long valid = ieee80211_vif_is_mld(vif) ?
  1057. mvif->valid_links : BIT(0);
  1058. struct mt792x_dev *dev = mvif->phy->dev;
  1059. struct ieee80211_hw *hw = mt76_hw(dev);
  1060. struct ieee80211_bss_conf *bss_conf;
  1061. struct mt792x_bss_conf *mconf;
  1062. int i;
  1063. if (vif->type == NL80211_IFTYPE_STATION)
  1064. ieee80211_disconnect(vif, true);
  1065. for_each_set_bit(i, &valid, IEEE80211_MLD_MAX_NUM_LINKS) {
  1066. bss_conf = mt792x_vif_to_bss_conf(vif, i);
  1067. mconf = mt792x_vif_to_link(mvif, i);
  1068. mt76_connac_mcu_uni_add_dev(&dev->mphy, bss_conf, &mconf->mt76,
  1069. &mvif->sta.deflink.wcid, true);
  1070. mt7925_mcu_set_tx(dev, bss_conf);
  1071. }
  1072. if (vif->type == NL80211_IFTYPE_AP) {
  1073. mt76_connac_mcu_uni_add_bss(dev->phy.mt76, vif, &mvif->sta.deflink.wcid,
  1074. true, NULL);
  1075. mt7925_mcu_sta_update(dev, NULL, vif, true,
  1076. MT76_STA_INFO_STATE_NONE);
  1077. mt7925_mcu_uni_add_beacon_offload(dev, hw, vif, true);
  1078. }
  1079. }
  1080. /* system error recovery */
  1081. void mt7925_mac_reset_work(struct work_struct *work)
  1082. {
  1083. struct mt792x_dev *dev = container_of(work, struct mt792x_dev,
  1084. reset_work);
  1085. struct ieee80211_hw *hw = mt76_hw(dev);
  1086. struct mt76_connac_pm *pm = &dev->pm;
  1087. int i, ret;
  1088. dev_dbg(dev->mt76.dev, "chip reset\n");
  1089. dev->hw_full_reset = true;
  1090. ieee80211_stop_queues(hw);
  1091. cancel_delayed_work_sync(&dev->mphy.mac_work);
  1092. cancel_delayed_work_sync(&pm->ps_work);
  1093. cancel_work_sync(&pm->wake_work);
  1094. for (i = 0; i < 10; i++) {
  1095. mutex_lock(&dev->mt76.mutex);
  1096. ret = mt792x_dev_reset(dev);
  1097. mutex_unlock(&dev->mt76.mutex);
  1098. if (!ret)
  1099. break;
  1100. }
  1101. if (i == 10)
  1102. dev_err(dev->mt76.dev, "chip reset failed\n");
  1103. if (test_and_clear_bit(MT76_HW_SCANNING, &dev->mphy.state)) {
  1104. struct cfg80211_scan_info info = {
  1105. .aborted = true,
  1106. };
  1107. ieee80211_scan_completed(dev->mphy.hw, &info);
  1108. }
  1109. dev->hw_full_reset = false;
  1110. pm->suspended = false;
  1111. ieee80211_wake_queues(hw);
  1112. ieee80211_iterate_active_interfaces(hw,
  1113. IEEE80211_IFACE_ITER_RESUME_ALL,
  1114. mt7925_vif_connect_iter, NULL);
  1115. mt76_connac_power_save_sched(&dev->mt76.phy, pm);
  1116. }
  1117. void mt7925_coredump_work(struct work_struct *work)
  1118. {
  1119. struct mt792x_dev *dev;
  1120. char *dump, *data;
  1121. dev = (struct mt792x_dev *)container_of(work, struct mt792x_dev,
  1122. coredump.work.work);
  1123. if (time_is_after_jiffies(dev->coredump.last_activity +
  1124. 4 * MT76_CONNAC_COREDUMP_TIMEOUT)) {
  1125. queue_delayed_work(dev->mt76.wq, &dev->coredump.work,
  1126. MT76_CONNAC_COREDUMP_TIMEOUT);
  1127. return;
  1128. }
  1129. dump = vzalloc(MT76_CONNAC_COREDUMP_SZ);
  1130. data = dump;
  1131. while (true) {
  1132. struct sk_buff *skb;
  1133. spin_lock_bh(&dev->mt76.lock);
  1134. skb = __skb_dequeue(&dev->coredump.msg_list);
  1135. spin_unlock_bh(&dev->mt76.lock);
  1136. if (!skb)
  1137. break;
  1138. skb_pull(skb, sizeof(struct mt7925_mcu_rxd) + 8);
  1139. if (!dump || data + skb->len - dump > MT76_CONNAC_COREDUMP_SZ) {
  1140. dev_kfree_skb(skb);
  1141. continue;
  1142. }
  1143. memcpy(data, skb->data, skb->len);
  1144. data += skb->len;
  1145. dev_kfree_skb(skb);
  1146. }
  1147. if (dump)
  1148. dev_coredumpv(dev->mt76.dev, dump, MT76_CONNAC_COREDUMP_SZ,
  1149. GFP_KERNEL);
  1150. mt792x_reset(&dev->mt76);
  1151. }
  1152. /* usb_sdio */
  1153. static void
  1154. mt7925_usb_sdio_write_txwi(struct mt792x_dev *dev, struct mt76_wcid *wcid,
  1155. enum mt76_txq_id qid, struct ieee80211_sta *sta,
  1156. struct ieee80211_key_conf *key, int pid,
  1157. struct sk_buff *skb)
  1158. {
  1159. __le32 *txwi = (__le32 *)(skb->data - MT_SDIO_TXD_SIZE);
  1160. memset(txwi, 0, MT_SDIO_TXD_SIZE);
  1161. mt7925_mac_write_txwi(&dev->mt76, txwi, skb, wcid, key, pid, qid, 0);
  1162. skb_push(skb, MT_SDIO_TXD_SIZE);
  1163. }
  1164. int mt7925_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
  1165. enum mt76_txq_id qid, struct mt76_wcid *wcid,
  1166. struct ieee80211_sta *sta,
  1167. struct mt76_tx_info *tx_info)
  1168. {
  1169. struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
  1170. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb);
  1171. struct ieee80211_key_conf *key = info->control.hw_key;
  1172. struct sk_buff *skb = tx_info->skb;
  1173. int err, pad, pktid;
  1174. if (unlikely(tx_info->skb->len <= ETH_HLEN))
  1175. return -EINVAL;
  1176. if (!wcid)
  1177. wcid = &dev->mt76.global_wcid;
  1178. if (sta) {
  1179. struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv;
  1180. if (time_after(jiffies, msta->deflink.last_txs + HZ / 4)) {
  1181. info->flags |= IEEE80211_TX_CTL_REQ_TX_STATUS;
  1182. msta->deflink.last_txs = jiffies;
  1183. }
  1184. }
  1185. pktid = mt76_tx_status_skb_add(&dev->mt76, wcid, skb);
  1186. mt7925_usb_sdio_write_txwi(dev, wcid, qid, sta, key, pktid, skb);
  1187. mt792x_skb_add_usb_sdio_hdr(dev, skb, 0);
  1188. pad = round_up(skb->len, 4) - skb->len;
  1189. if (mt76_is_usb(mdev))
  1190. pad += 4;
  1191. err = mt76_skb_adjust_pad(skb, pad);
  1192. if (err)
  1193. /* Release pktid in case of error. */
  1194. idr_remove(&wcid->pktid, pktid);
  1195. return err;
  1196. }
  1197. EXPORT_SYMBOL_GPL(mt7925_usb_sdio_tx_prepare_skb);
  1198. void mt7925_usb_sdio_tx_complete_skb(struct mt76_dev *mdev,
  1199. struct mt76_queue_entry *e)
  1200. {
  1201. __le32 *txwi = (__le32 *)(e->skb->data + MT_SDIO_HDR_SIZE);
  1202. unsigned int headroom = MT_SDIO_TXD_SIZE + MT_SDIO_HDR_SIZE;
  1203. struct ieee80211_sta *sta;
  1204. struct mt76_wcid *wcid;
  1205. u16 idx;
  1206. idx = le32_get_bits(txwi[1], MT_TXD1_WLAN_IDX);
  1207. wcid = rcu_dereference(mdev->wcid[idx]);
  1208. sta = wcid_to_sta(wcid);
  1209. if (sta && likely(e->skb->protocol != cpu_to_be16(ETH_P_PAE)))
  1210. mt7925_tx_check_aggr(sta, e->skb, wcid);
  1211. skb_pull(e->skb, headroom);
  1212. mt76_tx_complete_skb(mdev, e->wcid, e->skb);
  1213. }
  1214. EXPORT_SYMBOL_GPL(mt7925_usb_sdio_tx_complete_skb);
  1215. bool mt7925_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update)
  1216. {
  1217. struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
  1218. mt792x_mutex_acquire(dev);
  1219. mt7925_mac_sta_poll(dev);
  1220. mt792x_mutex_release(dev);
  1221. return false;
  1222. }
  1223. EXPORT_SYMBOL_GPL(mt7925_usb_sdio_tx_status_data);
  1224. #if IS_ENABLED(CONFIG_IPV6)
  1225. void mt7925_set_ipv6_ns_work(struct work_struct *work)
  1226. {
  1227. struct mt792x_dev *dev = container_of(work, struct mt792x_dev,
  1228. ipv6_ns_work);
  1229. struct sk_buff *skb;
  1230. int ret = 0;
  1231. do {
  1232. skb = skb_dequeue(&dev->ipv6_ns_list);
  1233. if (!skb)
  1234. break;
  1235. mt792x_mutex_acquire(dev);
  1236. ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
  1237. MCU_UNI_CMD(OFFLOAD), true);
  1238. mt792x_mutex_release(dev);
  1239. } while (!ret);
  1240. if (ret)
  1241. skb_queue_purge(&dev->ipv6_ns_list);
  1242. }
  1243. #endif