tx.c 21 KB

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  1. // SPDX-License-Identifier: ISC
  2. /*
  3. * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
  4. */
  5. #include "mt76.h"
  6. static int
  7. mt76_txq_get_qid(struct ieee80211_txq *txq)
  8. {
  9. if (!txq->sta)
  10. return MT_TXQ_BE;
  11. return txq->ac;
  12. }
  13. void
  14. mt76_tx_check_agg_ssn(struct ieee80211_sta *sta, struct sk_buff *skb)
  15. {
  16. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  17. struct ieee80211_txq *txq;
  18. struct mt76_txq *mtxq;
  19. u8 tid;
  20. if (!sta || !ieee80211_is_data_qos(hdr->frame_control) ||
  21. !ieee80211_is_data_present(hdr->frame_control))
  22. return;
  23. tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
  24. txq = sta->txq[tid];
  25. mtxq = (struct mt76_txq *)txq->drv_priv;
  26. if (!mtxq->aggr)
  27. return;
  28. mtxq->agg_ssn = le16_to_cpu(hdr->seq_ctrl) + 0x10;
  29. }
  30. EXPORT_SYMBOL_GPL(mt76_tx_check_agg_ssn);
  31. void
  32. mt76_tx_status_lock(struct mt76_dev *dev, struct sk_buff_head *list)
  33. __acquires(&dev->status_lock)
  34. {
  35. __skb_queue_head_init(list);
  36. spin_lock_bh(&dev->status_lock);
  37. }
  38. EXPORT_SYMBOL_GPL(mt76_tx_status_lock);
  39. void
  40. mt76_tx_status_unlock(struct mt76_dev *dev, struct sk_buff_head *list)
  41. __releases(&dev->status_lock)
  42. {
  43. struct ieee80211_hw *hw;
  44. struct sk_buff *skb;
  45. spin_unlock_bh(&dev->status_lock);
  46. rcu_read_lock();
  47. while ((skb = __skb_dequeue(list)) != NULL) {
  48. struct ieee80211_tx_status status = {
  49. .skb = skb,
  50. .info = IEEE80211_SKB_CB(skb),
  51. };
  52. struct ieee80211_rate_status rs = {};
  53. struct mt76_tx_cb *cb = mt76_tx_skb_cb(skb);
  54. struct mt76_wcid *wcid;
  55. wcid = rcu_dereference(dev->wcid[cb->wcid]);
  56. if (wcid) {
  57. status.sta = wcid_to_sta(wcid);
  58. if (status.sta && (wcid->rate.flags || wcid->rate.legacy)) {
  59. rs.rate_idx = wcid->rate;
  60. status.rates = &rs;
  61. status.n_rates = 1;
  62. } else {
  63. status.n_rates = 0;
  64. }
  65. }
  66. hw = mt76_tx_status_get_hw(dev, skb);
  67. spin_lock_bh(&dev->rx_lock);
  68. ieee80211_tx_status_ext(hw, &status);
  69. spin_unlock_bh(&dev->rx_lock);
  70. }
  71. rcu_read_unlock();
  72. }
  73. EXPORT_SYMBOL_GPL(mt76_tx_status_unlock);
  74. static void
  75. __mt76_tx_status_skb_done(struct mt76_dev *dev, struct sk_buff *skb, u8 flags,
  76. struct sk_buff_head *list)
  77. {
  78. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  79. struct mt76_tx_cb *cb = mt76_tx_skb_cb(skb);
  80. u8 done = MT_TX_CB_DMA_DONE | MT_TX_CB_TXS_DONE;
  81. flags |= cb->flags;
  82. cb->flags = flags;
  83. if ((flags & done) != done)
  84. return;
  85. /* Tx status can be unreliable. if it fails, mark the frame as ACKed */
  86. if (flags & MT_TX_CB_TXS_FAILED &&
  87. (dev->drv->drv_flags & MT_DRV_IGNORE_TXS_FAILED)) {
  88. info->status.rates[0].count = 0;
  89. info->status.rates[0].idx = -1;
  90. info->flags |= IEEE80211_TX_STAT_ACK;
  91. }
  92. __skb_queue_tail(list, skb);
  93. }
  94. void
  95. mt76_tx_status_skb_done(struct mt76_dev *dev, struct sk_buff *skb,
  96. struct sk_buff_head *list)
  97. {
  98. __mt76_tx_status_skb_done(dev, skb, MT_TX_CB_TXS_DONE, list);
  99. }
  100. EXPORT_SYMBOL_GPL(mt76_tx_status_skb_done);
  101. int
  102. mt76_tx_status_skb_add(struct mt76_dev *dev, struct mt76_wcid *wcid,
  103. struct sk_buff *skb)
  104. {
  105. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  106. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  107. struct mt76_tx_cb *cb = mt76_tx_skb_cb(skb);
  108. int pid;
  109. memset(cb, 0, sizeof(*cb));
  110. if (!wcid || !rcu_access_pointer(dev->wcid[wcid->idx]))
  111. return MT_PACKET_ID_NO_ACK;
  112. if (info->flags & IEEE80211_TX_CTL_NO_ACK)
  113. return MT_PACKET_ID_NO_ACK;
  114. if (!(info->flags & (IEEE80211_TX_CTL_REQ_TX_STATUS |
  115. IEEE80211_TX_CTL_RATE_CTRL_PROBE))) {
  116. if (mtk_wed_device_active(&dev->mmio.wed) &&
  117. ((info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP) ||
  118. ieee80211_is_data(hdr->frame_control)))
  119. return MT_PACKET_ID_WED;
  120. return MT_PACKET_ID_NO_SKB;
  121. }
  122. spin_lock_bh(&dev->status_lock);
  123. pid = idr_alloc(&wcid->pktid, skb, MT_PACKET_ID_FIRST,
  124. MT_PACKET_ID_MASK, GFP_ATOMIC);
  125. if (pid < 0) {
  126. pid = MT_PACKET_ID_NO_SKB;
  127. goto out;
  128. }
  129. cb->wcid = wcid->idx;
  130. cb->pktid = pid;
  131. if (list_empty(&wcid->list))
  132. list_add_tail(&wcid->list, &dev->wcid_list);
  133. out:
  134. spin_unlock_bh(&dev->status_lock);
  135. return pid;
  136. }
  137. EXPORT_SYMBOL_GPL(mt76_tx_status_skb_add);
  138. struct sk_buff *
  139. mt76_tx_status_skb_get(struct mt76_dev *dev, struct mt76_wcid *wcid, int pktid,
  140. struct sk_buff_head *list)
  141. {
  142. struct sk_buff *skb;
  143. int id;
  144. lockdep_assert_held(&dev->status_lock);
  145. skb = idr_remove(&wcid->pktid, pktid);
  146. if (skb)
  147. goto out;
  148. /* look for stale entries in the wcid idr queue */
  149. idr_for_each_entry(&wcid->pktid, skb, id) {
  150. struct mt76_tx_cb *cb = mt76_tx_skb_cb(skb);
  151. if (pktid >= 0) {
  152. if (!(cb->flags & MT_TX_CB_DMA_DONE))
  153. continue;
  154. if (time_is_after_jiffies(cb->jiffies +
  155. MT_TX_STATUS_SKB_TIMEOUT))
  156. continue;
  157. }
  158. /* It has been too long since DMA_DONE, time out this packet
  159. * and stop waiting for TXS callback.
  160. */
  161. idr_remove(&wcid->pktid, cb->pktid);
  162. __mt76_tx_status_skb_done(dev, skb, MT_TX_CB_TXS_FAILED |
  163. MT_TX_CB_TXS_DONE, list);
  164. }
  165. out:
  166. if (idr_is_empty(&wcid->pktid))
  167. list_del_init(&wcid->list);
  168. return skb;
  169. }
  170. EXPORT_SYMBOL_GPL(mt76_tx_status_skb_get);
  171. void
  172. mt76_tx_status_check(struct mt76_dev *dev, bool flush)
  173. {
  174. struct mt76_wcid *wcid, *tmp;
  175. struct sk_buff_head list;
  176. mt76_tx_status_lock(dev, &list);
  177. list_for_each_entry_safe(wcid, tmp, &dev->wcid_list, list)
  178. mt76_tx_status_skb_get(dev, wcid, flush ? -1 : 0, &list);
  179. mt76_tx_status_unlock(dev, &list);
  180. }
  181. EXPORT_SYMBOL_GPL(mt76_tx_status_check);
  182. static void
  183. mt76_tx_check_non_aql(struct mt76_dev *dev, struct mt76_wcid *wcid,
  184. struct sk_buff *skb)
  185. {
  186. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  187. int pending;
  188. if (!wcid || info->tx_time_est)
  189. return;
  190. pending = atomic_dec_return(&wcid->non_aql_packets);
  191. if (pending < 0)
  192. atomic_cmpxchg(&wcid->non_aql_packets, pending, 0);
  193. }
  194. void __mt76_tx_complete_skb(struct mt76_dev *dev, u16 wcid_idx, struct sk_buff *skb,
  195. struct list_head *free_list)
  196. {
  197. struct mt76_tx_cb *cb = mt76_tx_skb_cb(skb);
  198. struct ieee80211_tx_status status = {
  199. .skb = skb,
  200. .free_list = free_list,
  201. };
  202. struct mt76_wcid *wcid = NULL;
  203. struct ieee80211_hw *hw;
  204. struct sk_buff_head list;
  205. rcu_read_lock();
  206. if (wcid_idx < ARRAY_SIZE(dev->wcid))
  207. wcid = rcu_dereference(dev->wcid[wcid_idx]);
  208. mt76_tx_check_non_aql(dev, wcid, skb);
  209. #ifdef CONFIG_NL80211_TESTMODE
  210. if (mt76_is_testmode_skb(dev, skb, &hw)) {
  211. struct mt76_phy *phy = hw->priv;
  212. if (skb == phy->test.tx_skb)
  213. phy->test.tx_done++;
  214. if (phy->test.tx_queued == phy->test.tx_done)
  215. wake_up(&dev->tx_wait);
  216. dev_kfree_skb_any(skb);
  217. goto out;
  218. }
  219. #endif
  220. if (cb->pktid < MT_PACKET_ID_FIRST) {
  221. struct ieee80211_rate_status rs = {};
  222. hw = mt76_tx_status_get_hw(dev, skb);
  223. status.sta = wcid_to_sta(wcid);
  224. if (status.sta && (wcid->rate.flags || wcid->rate.legacy)) {
  225. rs.rate_idx = wcid->rate;
  226. status.rates = &rs;
  227. status.n_rates = 1;
  228. }
  229. spin_lock_bh(&dev->rx_lock);
  230. ieee80211_tx_status_ext(hw, &status);
  231. spin_unlock_bh(&dev->rx_lock);
  232. goto out;
  233. }
  234. mt76_tx_status_lock(dev, &list);
  235. cb->jiffies = jiffies;
  236. __mt76_tx_status_skb_done(dev, skb, MT_TX_CB_DMA_DONE, &list);
  237. mt76_tx_status_unlock(dev, &list);
  238. out:
  239. rcu_read_unlock();
  240. }
  241. EXPORT_SYMBOL_GPL(__mt76_tx_complete_skb);
  242. static int
  243. __mt76_tx_queue_skb(struct mt76_phy *phy, int qid, struct sk_buff *skb,
  244. struct mt76_wcid *wcid, struct ieee80211_sta *sta,
  245. bool *stop)
  246. {
  247. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  248. struct mt76_queue *q = phy->q_tx[qid];
  249. struct mt76_dev *dev = phy->dev;
  250. bool non_aql;
  251. int pending;
  252. int idx;
  253. non_aql = !info->tx_time_est;
  254. idx = dev->queue_ops->tx_queue_skb(phy, q, qid, skb, wcid, sta);
  255. if (idx < 0 || !sta)
  256. return idx;
  257. wcid = (struct mt76_wcid *)sta->drv_priv;
  258. if (!wcid->sta)
  259. return idx;
  260. q->entry[idx].wcid = wcid->idx;
  261. if (!non_aql)
  262. return idx;
  263. pending = atomic_inc_return(&wcid->non_aql_packets);
  264. if (stop && pending >= MT_MAX_NON_AQL_PKT)
  265. *stop = true;
  266. return idx;
  267. }
  268. void
  269. mt76_tx(struct mt76_phy *phy, struct ieee80211_sta *sta,
  270. struct mt76_wcid *wcid, struct sk_buff *skb)
  271. {
  272. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  273. struct ieee80211_hdr *hdr = (void *)skb->data;
  274. struct sk_buff_head *head;
  275. if (mt76_testmode_enabled(phy)) {
  276. ieee80211_free_txskb(phy->hw, skb);
  277. return;
  278. }
  279. if (WARN_ON(skb_get_queue_mapping(skb) >= MT_TXQ_PSD))
  280. skb_set_queue_mapping(skb, MT_TXQ_BE);
  281. if (wcid && !(wcid->tx_info & MT_WCID_TX_INFO_SET))
  282. ieee80211_get_tx_rates(info->control.vif, sta, skb,
  283. info->control.rates, 1);
  284. info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->band_idx);
  285. if ((info->flags & IEEE80211_TX_CTL_TX_OFFCHAN) ||
  286. ((info->control.flags & IEEE80211_TX_CTRL_DONT_USE_RATE_MASK) &&
  287. ieee80211_is_probe_req(hdr->frame_control)))
  288. head = &wcid->tx_offchannel;
  289. else
  290. head = &wcid->tx_pending;
  291. spin_lock_bh(&head->lock);
  292. __skb_queue_tail(head, skb);
  293. spin_unlock_bh(&head->lock);
  294. spin_lock_bh(&phy->tx_lock);
  295. if (list_empty(&wcid->tx_list))
  296. list_add_tail(&wcid->tx_list, &phy->tx_list);
  297. spin_unlock_bh(&phy->tx_lock);
  298. mt76_worker_schedule(&phy->dev->tx_worker);
  299. }
  300. EXPORT_SYMBOL_GPL(mt76_tx);
  301. static struct sk_buff *
  302. mt76_txq_dequeue(struct mt76_phy *phy, struct mt76_txq *mtxq)
  303. {
  304. struct ieee80211_txq *txq = mtxq_to_txq(mtxq);
  305. struct ieee80211_tx_info *info;
  306. struct sk_buff *skb;
  307. skb = ieee80211_tx_dequeue(phy->hw, txq);
  308. if (!skb)
  309. return NULL;
  310. info = IEEE80211_SKB_CB(skb);
  311. info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->band_idx);
  312. return skb;
  313. }
  314. static void
  315. mt76_queue_ps_skb(struct mt76_phy *phy, struct ieee80211_sta *sta,
  316. struct sk_buff *skb, bool last)
  317. {
  318. struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
  319. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  320. info->control.flags |= IEEE80211_TX_CTRL_PS_RESPONSE;
  321. if (last)
  322. info->flags |= IEEE80211_TX_STATUS_EOSP |
  323. IEEE80211_TX_CTL_REQ_TX_STATUS;
  324. mt76_skb_set_moredata(skb, !last);
  325. __mt76_tx_queue_skb(phy, MT_TXQ_PSD, skb, wcid, sta, NULL);
  326. }
  327. void
  328. mt76_release_buffered_frames(struct ieee80211_hw *hw, struct ieee80211_sta *sta,
  329. u16 tids, int nframes,
  330. enum ieee80211_frame_release_type reason,
  331. bool more_data)
  332. {
  333. struct mt76_phy *phy = hw->priv;
  334. struct mt76_dev *dev = phy->dev;
  335. struct sk_buff *last_skb = NULL;
  336. struct mt76_queue *hwq = phy->q_tx[MT_TXQ_PSD];
  337. int i;
  338. spin_lock_bh(&hwq->lock);
  339. for (i = 0; tids && nframes; i++, tids >>= 1) {
  340. struct ieee80211_txq *txq = sta->txq[i];
  341. struct mt76_txq *mtxq = (struct mt76_txq *)txq->drv_priv;
  342. struct sk_buff *skb;
  343. if (!(tids & 1))
  344. continue;
  345. do {
  346. skb = mt76_txq_dequeue(phy, mtxq);
  347. if (!skb)
  348. break;
  349. nframes--;
  350. if (last_skb)
  351. mt76_queue_ps_skb(phy, sta, last_skb, false);
  352. last_skb = skb;
  353. } while (nframes);
  354. }
  355. if (last_skb) {
  356. mt76_queue_ps_skb(phy, sta, last_skb, true);
  357. dev->queue_ops->kick(dev, hwq);
  358. } else {
  359. ieee80211_sta_eosp(sta);
  360. }
  361. spin_unlock_bh(&hwq->lock);
  362. }
  363. EXPORT_SYMBOL_GPL(mt76_release_buffered_frames);
  364. static bool
  365. mt76_txq_stopped(struct mt76_queue *q)
  366. {
  367. return q->stopped || q->blocked ||
  368. q->queued + MT_TXQ_FREE_THR >= q->ndesc;
  369. }
  370. static int
  371. mt76_txq_send_burst(struct mt76_phy *phy, struct mt76_queue *q,
  372. struct mt76_txq *mtxq, struct mt76_wcid *wcid)
  373. {
  374. struct mt76_dev *dev = phy->dev;
  375. struct ieee80211_txq *txq = mtxq_to_txq(mtxq);
  376. enum mt76_txq_id qid = mt76_txq_get_qid(txq);
  377. struct ieee80211_tx_info *info;
  378. struct sk_buff *skb;
  379. int n_frames = 1;
  380. bool stop = false;
  381. int idx;
  382. if (test_bit(MT_WCID_FLAG_PS, &wcid->flags))
  383. return 0;
  384. if (atomic_read(&wcid->non_aql_packets) >= MT_MAX_NON_AQL_PKT)
  385. return 0;
  386. skb = mt76_txq_dequeue(phy, mtxq);
  387. if (!skb)
  388. return 0;
  389. info = IEEE80211_SKB_CB(skb);
  390. if (!(wcid->tx_info & MT_WCID_TX_INFO_SET))
  391. ieee80211_get_tx_rates(txq->vif, txq->sta, skb,
  392. info->control.rates, 1);
  393. spin_lock(&q->lock);
  394. idx = __mt76_tx_queue_skb(phy, qid, skb, wcid, txq->sta, &stop);
  395. spin_unlock(&q->lock);
  396. if (idx < 0)
  397. return idx;
  398. do {
  399. if (test_bit(MT76_RESET, &phy->state) || phy->offchannel)
  400. return -EBUSY;
  401. if (stop || mt76_txq_stopped(q))
  402. break;
  403. skb = mt76_txq_dequeue(phy, mtxq);
  404. if (!skb)
  405. break;
  406. info = IEEE80211_SKB_CB(skb);
  407. if (!(wcid->tx_info & MT_WCID_TX_INFO_SET))
  408. ieee80211_get_tx_rates(txq->vif, txq->sta, skb,
  409. info->control.rates, 1);
  410. spin_lock(&q->lock);
  411. idx = __mt76_tx_queue_skb(phy, qid, skb, wcid, txq->sta, &stop);
  412. spin_unlock(&q->lock);
  413. if (idx < 0)
  414. break;
  415. n_frames++;
  416. } while (1);
  417. spin_lock(&q->lock);
  418. dev->queue_ops->kick(dev, q);
  419. spin_unlock(&q->lock);
  420. return n_frames;
  421. }
  422. static int
  423. mt76_txq_schedule_list(struct mt76_phy *phy, enum mt76_txq_id qid)
  424. {
  425. struct mt76_queue *q = phy->q_tx[qid];
  426. struct mt76_dev *dev = phy->dev;
  427. struct ieee80211_txq *txq;
  428. struct mt76_txq *mtxq;
  429. struct mt76_wcid *wcid;
  430. int ret = 0;
  431. while (1) {
  432. int n_frames = 0;
  433. if (test_bit(MT76_RESET, &phy->state) || phy->offchannel)
  434. return -EBUSY;
  435. if (dev->queue_ops->tx_cleanup &&
  436. q->queued + 2 * MT_TXQ_FREE_THR >= q->ndesc) {
  437. dev->queue_ops->tx_cleanup(dev, q, false);
  438. }
  439. txq = ieee80211_next_txq(phy->hw, qid);
  440. if (!txq)
  441. break;
  442. mtxq = (struct mt76_txq *)txq->drv_priv;
  443. wcid = rcu_dereference(dev->wcid[mtxq->wcid]);
  444. if (!wcid || test_bit(MT_WCID_FLAG_PS, &wcid->flags))
  445. continue;
  446. if (mtxq->send_bar && mtxq->aggr) {
  447. struct ieee80211_txq *txq = mtxq_to_txq(mtxq);
  448. struct ieee80211_sta *sta = txq->sta;
  449. struct ieee80211_vif *vif = txq->vif;
  450. u16 agg_ssn = mtxq->agg_ssn;
  451. u8 tid = txq->tid;
  452. mtxq->send_bar = false;
  453. ieee80211_send_bar(vif, sta->addr, tid, agg_ssn);
  454. }
  455. if (!mt76_txq_stopped(q))
  456. n_frames = mt76_txq_send_burst(phy, q, mtxq, wcid);
  457. ieee80211_return_txq(phy->hw, txq, false);
  458. if (unlikely(n_frames < 0))
  459. return n_frames;
  460. ret += n_frames;
  461. }
  462. return ret;
  463. }
  464. void mt76_txq_schedule(struct mt76_phy *phy, enum mt76_txq_id qid)
  465. {
  466. int len;
  467. if (qid >= 4 || phy->offchannel)
  468. return;
  469. local_bh_disable();
  470. rcu_read_lock();
  471. do {
  472. ieee80211_txq_schedule_start(phy->hw, qid);
  473. len = mt76_txq_schedule_list(phy, qid);
  474. ieee80211_txq_schedule_end(phy->hw, qid);
  475. } while (len > 0);
  476. rcu_read_unlock();
  477. local_bh_enable();
  478. }
  479. EXPORT_SYMBOL_GPL(mt76_txq_schedule);
  480. static int
  481. mt76_txq_schedule_pending_wcid(struct mt76_phy *phy, struct mt76_wcid *wcid,
  482. struct sk_buff_head *head)
  483. {
  484. struct mt76_dev *dev = phy->dev;
  485. struct ieee80211_sta *sta;
  486. struct mt76_queue *q;
  487. struct sk_buff *skb;
  488. int ret = 0;
  489. spin_lock(&head->lock);
  490. while ((skb = skb_peek(head)) != NULL) {
  491. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  492. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  493. int qid = skb_get_queue_mapping(skb);
  494. if ((dev->drv->drv_flags & MT_DRV_HW_MGMT_TXQ) &&
  495. !(info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP) &&
  496. !ieee80211_is_data(hdr->frame_control) &&
  497. !ieee80211_is_bufferable_mmpdu(skb))
  498. qid = MT_TXQ_PSD;
  499. q = phy->q_tx[qid];
  500. if (mt76_txq_stopped(q) || test_bit(MT76_RESET, &phy->state)) {
  501. ret = -1;
  502. break;
  503. }
  504. __skb_unlink(skb, head);
  505. spin_unlock(&head->lock);
  506. sta = wcid_to_sta(wcid);
  507. spin_lock(&q->lock);
  508. __mt76_tx_queue_skb(phy, qid, skb, wcid, sta, NULL);
  509. dev->queue_ops->kick(dev, q);
  510. spin_unlock(&q->lock);
  511. spin_lock(&head->lock);
  512. }
  513. spin_unlock(&head->lock);
  514. return ret;
  515. }
  516. static void mt76_txq_schedule_pending(struct mt76_phy *phy)
  517. {
  518. LIST_HEAD(tx_list);
  519. int ret = 0;
  520. if (list_empty(&phy->tx_list))
  521. return;
  522. local_bh_disable();
  523. rcu_read_lock();
  524. spin_lock(&phy->tx_lock);
  525. list_splice_init(&phy->tx_list, &tx_list);
  526. while (!list_empty(&tx_list)) {
  527. struct mt76_wcid *wcid;
  528. wcid = list_first_entry(&tx_list, struct mt76_wcid, tx_list);
  529. list_del_init(&wcid->tx_list);
  530. spin_unlock(&phy->tx_lock);
  531. if (ret >= 0)
  532. ret = mt76_txq_schedule_pending_wcid(phy, wcid, &wcid->tx_offchannel);
  533. if (ret >= 0 && !phy->offchannel)
  534. ret = mt76_txq_schedule_pending_wcid(phy, wcid, &wcid->tx_pending);
  535. spin_lock(&phy->tx_lock);
  536. if (!skb_queue_empty(&wcid->tx_pending) &&
  537. !skb_queue_empty(&wcid->tx_offchannel) &&
  538. list_empty(&wcid->tx_list))
  539. list_add_tail(&wcid->tx_list, &phy->tx_list);
  540. }
  541. spin_unlock(&phy->tx_lock);
  542. rcu_read_unlock();
  543. local_bh_enable();
  544. }
  545. void mt76_txq_schedule_all(struct mt76_phy *phy)
  546. {
  547. int i;
  548. mt76_txq_schedule_pending(phy);
  549. for (i = 0; i <= MT_TXQ_BK; i++)
  550. mt76_txq_schedule(phy, i);
  551. }
  552. EXPORT_SYMBOL_GPL(mt76_txq_schedule_all);
  553. void mt76_tx_worker_run(struct mt76_dev *dev)
  554. {
  555. struct mt76_phy *phy;
  556. int i;
  557. for (i = 0; i < ARRAY_SIZE(dev->phys); i++) {
  558. phy = dev->phys[i];
  559. if (!phy)
  560. continue;
  561. mt76_txq_schedule_all(phy);
  562. }
  563. #ifdef CONFIG_NL80211_TESTMODE
  564. for (i = 0; i < ARRAY_SIZE(dev->phys); i++) {
  565. phy = dev->phys[i];
  566. if (!phy || !phy->test.tx_pending)
  567. continue;
  568. mt76_testmode_tx_pending(phy);
  569. }
  570. #endif
  571. }
  572. EXPORT_SYMBOL_GPL(mt76_tx_worker_run);
  573. void mt76_tx_worker(struct mt76_worker *w)
  574. {
  575. struct mt76_dev *dev = container_of(w, struct mt76_dev, tx_worker);
  576. mt76_tx_worker_run(dev);
  577. }
  578. void mt76_stop_tx_queues(struct mt76_phy *phy, struct ieee80211_sta *sta,
  579. bool send_bar)
  580. {
  581. int i;
  582. for (i = 0; i < ARRAY_SIZE(sta->txq); i++) {
  583. struct ieee80211_txq *txq = sta->txq[i];
  584. struct mt76_queue *hwq;
  585. struct mt76_txq *mtxq;
  586. if (!txq)
  587. continue;
  588. hwq = phy->q_tx[mt76_txq_get_qid(txq)];
  589. mtxq = (struct mt76_txq *)txq->drv_priv;
  590. spin_lock_bh(&hwq->lock);
  591. mtxq->send_bar = mtxq->aggr && send_bar;
  592. spin_unlock_bh(&hwq->lock);
  593. }
  594. }
  595. EXPORT_SYMBOL_GPL(mt76_stop_tx_queues);
  596. void mt76_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq)
  597. {
  598. struct mt76_phy *phy = hw->priv;
  599. struct mt76_dev *dev = phy->dev;
  600. if (!test_bit(MT76_STATE_RUNNING, &phy->state))
  601. return;
  602. mt76_worker_schedule(&dev->tx_worker);
  603. }
  604. EXPORT_SYMBOL_GPL(mt76_wake_tx_queue);
  605. u8 mt76_ac_to_hwq(u8 ac)
  606. {
  607. static const u8 wmm_queue_map[] = {
  608. [IEEE80211_AC_BE] = 0,
  609. [IEEE80211_AC_BK] = 1,
  610. [IEEE80211_AC_VI] = 2,
  611. [IEEE80211_AC_VO] = 3,
  612. };
  613. if (WARN_ON(ac >= IEEE80211_NUM_ACS))
  614. return 0;
  615. return wmm_queue_map[ac];
  616. }
  617. EXPORT_SYMBOL_GPL(mt76_ac_to_hwq);
  618. int mt76_skb_adjust_pad(struct sk_buff *skb, int pad)
  619. {
  620. struct sk_buff *iter, *last = skb;
  621. /* First packet of a A-MSDU burst keeps track of the whole burst
  622. * length, need to update length of it and the last packet.
  623. */
  624. skb_walk_frags(skb, iter) {
  625. last = iter;
  626. if (!iter->next) {
  627. skb->data_len += pad;
  628. skb->len += pad;
  629. break;
  630. }
  631. }
  632. if (skb_pad(last, pad))
  633. return -ENOMEM;
  634. __skb_put(last, pad);
  635. return 0;
  636. }
  637. EXPORT_SYMBOL_GPL(mt76_skb_adjust_pad);
  638. void mt76_queue_tx_complete(struct mt76_dev *dev, struct mt76_queue *q,
  639. struct mt76_queue_entry *e)
  640. {
  641. if (e->skb)
  642. dev->drv->tx_complete_skb(dev, e);
  643. spin_lock_bh(&q->lock);
  644. q->tail = (q->tail + 1) % q->ndesc;
  645. q->queued--;
  646. spin_unlock_bh(&q->lock);
  647. }
  648. EXPORT_SYMBOL_GPL(mt76_queue_tx_complete);
  649. void __mt76_set_tx_blocked(struct mt76_dev *dev, bool blocked)
  650. {
  651. struct mt76_phy *phy = &dev->phy;
  652. struct mt76_queue *q = phy->q_tx[0];
  653. if (blocked == q->blocked)
  654. return;
  655. q->blocked = blocked;
  656. phy = dev->phys[MT_BAND1];
  657. if (phy) {
  658. q = phy->q_tx[0];
  659. q->blocked = blocked;
  660. }
  661. phy = dev->phys[MT_BAND2];
  662. if (phy) {
  663. q = phy->q_tx[0];
  664. q->blocked = blocked;
  665. }
  666. if (!blocked)
  667. mt76_worker_schedule(&dev->tx_worker);
  668. }
  669. EXPORT_SYMBOL_GPL(__mt76_set_tx_blocked);
  670. int mt76_token_consume(struct mt76_dev *dev, struct mt76_txwi_cache **ptxwi)
  671. {
  672. int token;
  673. spin_lock_bh(&dev->token_lock);
  674. token = idr_alloc(&dev->token, *ptxwi, 0, dev->token_size, GFP_ATOMIC);
  675. if (token >= 0)
  676. dev->token_count++;
  677. #ifdef CONFIG_NET_MEDIATEK_SOC_WED
  678. if (mtk_wed_device_active(&dev->mmio.wed) &&
  679. token >= dev->mmio.wed.wlan.token_start)
  680. dev->wed_token_count++;
  681. #endif
  682. if (dev->token_count >= dev->token_size - MT76_TOKEN_FREE_THR)
  683. __mt76_set_tx_blocked(dev, true);
  684. spin_unlock_bh(&dev->token_lock);
  685. return token;
  686. }
  687. EXPORT_SYMBOL_GPL(mt76_token_consume);
  688. int mt76_rx_token_consume(struct mt76_dev *dev, void *ptr,
  689. struct mt76_txwi_cache *t, dma_addr_t phys)
  690. {
  691. int token;
  692. spin_lock_bh(&dev->rx_token_lock);
  693. token = idr_alloc(&dev->rx_token, t, 0, dev->rx_token_size,
  694. GFP_ATOMIC);
  695. if (token >= 0) {
  696. t->ptr = ptr;
  697. t->dma_addr = phys;
  698. }
  699. spin_unlock_bh(&dev->rx_token_lock);
  700. return token;
  701. }
  702. EXPORT_SYMBOL_GPL(mt76_rx_token_consume);
  703. struct mt76_txwi_cache *
  704. mt76_token_release(struct mt76_dev *dev, int token, bool *wake)
  705. {
  706. struct mt76_txwi_cache *txwi;
  707. spin_lock_bh(&dev->token_lock);
  708. txwi = idr_remove(&dev->token, token);
  709. if (txwi) {
  710. dev->token_count--;
  711. #ifdef CONFIG_NET_MEDIATEK_SOC_WED
  712. if (mtk_wed_device_active(&dev->mmio.wed) &&
  713. token >= dev->mmio.wed.wlan.token_start &&
  714. --dev->wed_token_count == 0)
  715. wake_up(&dev->tx_wait);
  716. #endif
  717. }
  718. if (dev->token_count < dev->token_size - MT76_TOKEN_FREE_THR &&
  719. dev->phy.q_tx[0]->blocked)
  720. *wake = true;
  721. spin_unlock_bh(&dev->token_lock);
  722. return txwi;
  723. }
  724. EXPORT_SYMBOL_GPL(mt76_token_release);
  725. struct mt76_txwi_cache *
  726. mt76_rx_token_release(struct mt76_dev *dev, int token)
  727. {
  728. struct mt76_txwi_cache *t;
  729. spin_lock_bh(&dev->rx_token_lock);
  730. t = idr_remove(&dev->rx_token, token);
  731. spin_unlock_bh(&dev->rx_token_lock);
  732. return t;
  733. }
  734. EXPORT_SYMBOL_GPL(mt76_rx_token_release);