admin-cmd.c 26 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * NVMe admin command implementation.
  4. * Copyright (c) 2015-2016 HGST, a Western Digital Company.
  5. */
  6. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  7. #include <linux/module.h>
  8. #include <linux/rculist.h>
  9. #include <linux/part_stat.h>
  10. #include <generated/utsrelease.h>
  11. #include <linux/unaligned.h>
  12. #include "nvmet.h"
  13. u32 nvmet_get_log_page_len(struct nvme_command *cmd)
  14. {
  15. u32 len = le16_to_cpu(cmd->get_log_page.numdu);
  16. len <<= 16;
  17. len += le16_to_cpu(cmd->get_log_page.numdl);
  18. /* NUMD is a 0's based value */
  19. len += 1;
  20. len *= sizeof(u32);
  21. return len;
  22. }
  23. static u32 nvmet_feat_data_len(struct nvmet_req *req, u32 cdw10)
  24. {
  25. switch (cdw10 & 0xff) {
  26. case NVME_FEAT_HOST_ID:
  27. return sizeof(req->sq->ctrl->hostid);
  28. default:
  29. return 0;
  30. }
  31. }
  32. u64 nvmet_get_log_page_offset(struct nvme_command *cmd)
  33. {
  34. return le64_to_cpu(cmd->get_log_page.lpo);
  35. }
  36. static void nvmet_execute_get_log_page_noop(struct nvmet_req *req)
  37. {
  38. nvmet_req_complete(req, nvmet_zero_sgl(req, 0, req->transfer_len));
  39. }
  40. static void nvmet_execute_get_log_page_error(struct nvmet_req *req)
  41. {
  42. struct nvmet_ctrl *ctrl = req->sq->ctrl;
  43. unsigned long flags;
  44. off_t offset = 0;
  45. u64 slot;
  46. u64 i;
  47. spin_lock_irqsave(&ctrl->error_lock, flags);
  48. slot = ctrl->err_counter % NVMET_ERROR_LOG_SLOTS;
  49. for (i = 0; i < NVMET_ERROR_LOG_SLOTS; i++) {
  50. if (nvmet_copy_to_sgl(req, offset, &ctrl->slots[slot],
  51. sizeof(struct nvme_error_slot)))
  52. break;
  53. if (slot == 0)
  54. slot = NVMET_ERROR_LOG_SLOTS - 1;
  55. else
  56. slot--;
  57. offset += sizeof(struct nvme_error_slot);
  58. }
  59. spin_unlock_irqrestore(&ctrl->error_lock, flags);
  60. nvmet_req_complete(req, 0);
  61. }
  62. static u16 nvmet_get_smart_log_nsid(struct nvmet_req *req,
  63. struct nvme_smart_log *slog)
  64. {
  65. u64 host_reads, host_writes, data_units_read, data_units_written;
  66. u16 status;
  67. status = nvmet_req_find_ns(req);
  68. if (status)
  69. return status;
  70. /* we don't have the right data for file backed ns */
  71. if (!req->ns->bdev)
  72. return NVME_SC_SUCCESS;
  73. host_reads = part_stat_read(req->ns->bdev, ios[READ]);
  74. data_units_read =
  75. DIV_ROUND_UP(part_stat_read(req->ns->bdev, sectors[READ]), 1000);
  76. host_writes = part_stat_read(req->ns->bdev, ios[WRITE]);
  77. data_units_written =
  78. DIV_ROUND_UP(part_stat_read(req->ns->bdev, sectors[WRITE]), 1000);
  79. put_unaligned_le64(host_reads, &slog->host_reads[0]);
  80. put_unaligned_le64(data_units_read, &slog->data_units_read[0]);
  81. put_unaligned_le64(host_writes, &slog->host_writes[0]);
  82. put_unaligned_le64(data_units_written, &slog->data_units_written[0]);
  83. return NVME_SC_SUCCESS;
  84. }
  85. static u16 nvmet_get_smart_log_all(struct nvmet_req *req,
  86. struct nvme_smart_log *slog)
  87. {
  88. u64 host_reads = 0, host_writes = 0;
  89. u64 data_units_read = 0, data_units_written = 0;
  90. struct nvmet_ns *ns;
  91. struct nvmet_ctrl *ctrl;
  92. unsigned long idx;
  93. ctrl = req->sq->ctrl;
  94. xa_for_each(&ctrl->subsys->namespaces, idx, ns) {
  95. /* we don't have the right data for file backed ns */
  96. if (!ns->bdev)
  97. continue;
  98. host_reads += part_stat_read(ns->bdev, ios[READ]);
  99. data_units_read += DIV_ROUND_UP(
  100. part_stat_read(ns->bdev, sectors[READ]), 1000);
  101. host_writes += part_stat_read(ns->bdev, ios[WRITE]);
  102. data_units_written += DIV_ROUND_UP(
  103. part_stat_read(ns->bdev, sectors[WRITE]), 1000);
  104. }
  105. put_unaligned_le64(host_reads, &slog->host_reads[0]);
  106. put_unaligned_le64(data_units_read, &slog->data_units_read[0]);
  107. put_unaligned_le64(host_writes, &slog->host_writes[0]);
  108. put_unaligned_le64(data_units_written, &slog->data_units_written[0]);
  109. return NVME_SC_SUCCESS;
  110. }
  111. static void nvmet_execute_get_log_page_smart(struct nvmet_req *req)
  112. {
  113. struct nvme_smart_log *log;
  114. u16 status = NVME_SC_INTERNAL;
  115. unsigned long flags;
  116. if (req->transfer_len != sizeof(*log))
  117. goto out;
  118. log = kzalloc(sizeof(*log), GFP_KERNEL);
  119. if (!log)
  120. goto out;
  121. if (req->cmd->get_log_page.nsid == cpu_to_le32(NVME_NSID_ALL))
  122. status = nvmet_get_smart_log_all(req, log);
  123. else
  124. status = nvmet_get_smart_log_nsid(req, log);
  125. if (status)
  126. goto out_free_log;
  127. spin_lock_irqsave(&req->sq->ctrl->error_lock, flags);
  128. put_unaligned_le64(req->sq->ctrl->err_counter,
  129. &log->num_err_log_entries);
  130. spin_unlock_irqrestore(&req->sq->ctrl->error_lock, flags);
  131. status = nvmet_copy_to_sgl(req, 0, log, sizeof(*log));
  132. out_free_log:
  133. kfree(log);
  134. out:
  135. nvmet_req_complete(req, status);
  136. }
  137. static void nvmet_get_cmd_effects_nvm(struct nvme_effects_log *log)
  138. {
  139. log->acs[nvme_admin_get_log_page] =
  140. log->acs[nvme_admin_identify] =
  141. log->acs[nvme_admin_abort_cmd] =
  142. log->acs[nvme_admin_set_features] =
  143. log->acs[nvme_admin_get_features] =
  144. log->acs[nvme_admin_async_event] =
  145. log->acs[nvme_admin_keep_alive] =
  146. cpu_to_le32(NVME_CMD_EFFECTS_CSUPP);
  147. log->iocs[nvme_cmd_read] =
  148. log->iocs[nvme_cmd_flush] =
  149. log->iocs[nvme_cmd_dsm] =
  150. cpu_to_le32(NVME_CMD_EFFECTS_CSUPP);
  151. log->iocs[nvme_cmd_write] =
  152. log->iocs[nvme_cmd_write_zeroes] =
  153. cpu_to_le32(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC);
  154. }
  155. static void nvmet_get_cmd_effects_zns(struct nvme_effects_log *log)
  156. {
  157. log->iocs[nvme_cmd_zone_append] =
  158. log->iocs[nvme_cmd_zone_mgmt_send] =
  159. cpu_to_le32(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC);
  160. log->iocs[nvme_cmd_zone_mgmt_recv] =
  161. cpu_to_le32(NVME_CMD_EFFECTS_CSUPP);
  162. }
  163. static void nvmet_execute_get_log_cmd_effects_ns(struct nvmet_req *req)
  164. {
  165. struct nvme_effects_log *log;
  166. u16 status = NVME_SC_SUCCESS;
  167. log = kzalloc(sizeof(*log), GFP_KERNEL);
  168. if (!log) {
  169. status = NVME_SC_INTERNAL;
  170. goto out;
  171. }
  172. switch (req->cmd->get_log_page.csi) {
  173. case NVME_CSI_NVM:
  174. nvmet_get_cmd_effects_nvm(log);
  175. break;
  176. case NVME_CSI_ZNS:
  177. if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) {
  178. status = NVME_SC_INVALID_IO_CMD_SET;
  179. goto free;
  180. }
  181. nvmet_get_cmd_effects_nvm(log);
  182. nvmet_get_cmd_effects_zns(log);
  183. break;
  184. default:
  185. status = NVME_SC_INVALID_LOG_PAGE;
  186. goto free;
  187. }
  188. status = nvmet_copy_to_sgl(req, 0, log, sizeof(*log));
  189. free:
  190. kfree(log);
  191. out:
  192. nvmet_req_complete(req, status);
  193. }
  194. static void nvmet_execute_get_log_changed_ns(struct nvmet_req *req)
  195. {
  196. struct nvmet_ctrl *ctrl = req->sq->ctrl;
  197. u16 status = NVME_SC_INTERNAL;
  198. size_t len;
  199. if (req->transfer_len != NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32))
  200. goto out;
  201. mutex_lock(&ctrl->lock);
  202. if (ctrl->nr_changed_ns == U32_MAX)
  203. len = sizeof(__le32);
  204. else
  205. len = ctrl->nr_changed_ns * sizeof(__le32);
  206. status = nvmet_copy_to_sgl(req, 0, ctrl->changed_ns_list, len);
  207. if (!status)
  208. status = nvmet_zero_sgl(req, len, req->transfer_len - len);
  209. ctrl->nr_changed_ns = 0;
  210. nvmet_clear_aen_bit(req, NVME_AEN_BIT_NS_ATTR);
  211. mutex_unlock(&ctrl->lock);
  212. out:
  213. nvmet_req_complete(req, status);
  214. }
  215. static u32 nvmet_format_ana_group(struct nvmet_req *req, u32 grpid,
  216. struct nvme_ana_group_desc *desc)
  217. {
  218. struct nvmet_ctrl *ctrl = req->sq->ctrl;
  219. struct nvmet_ns *ns;
  220. unsigned long idx;
  221. u32 count = 0;
  222. if (!(req->cmd->get_log_page.lsp & NVME_ANA_LOG_RGO)) {
  223. xa_for_each(&ctrl->subsys->namespaces, idx, ns)
  224. if (ns->anagrpid == grpid)
  225. desc->nsids[count++] = cpu_to_le32(ns->nsid);
  226. }
  227. desc->grpid = cpu_to_le32(grpid);
  228. desc->nnsids = cpu_to_le32(count);
  229. desc->chgcnt = cpu_to_le64(nvmet_ana_chgcnt);
  230. desc->state = req->port->ana_state[grpid];
  231. memset(desc->rsvd17, 0, sizeof(desc->rsvd17));
  232. return struct_size(desc, nsids, count);
  233. }
  234. static void nvmet_execute_get_log_page_ana(struct nvmet_req *req)
  235. {
  236. struct nvme_ana_rsp_hdr hdr = { 0, };
  237. struct nvme_ana_group_desc *desc;
  238. size_t offset = sizeof(struct nvme_ana_rsp_hdr); /* start beyond hdr */
  239. size_t len;
  240. u32 grpid;
  241. u16 ngrps = 0;
  242. u16 status;
  243. status = NVME_SC_INTERNAL;
  244. desc = kmalloc(struct_size(desc, nsids, NVMET_MAX_NAMESPACES),
  245. GFP_KERNEL);
  246. if (!desc)
  247. goto out;
  248. down_read(&nvmet_ana_sem);
  249. for (grpid = 1; grpid <= NVMET_MAX_ANAGRPS; grpid++) {
  250. if (!nvmet_ana_group_enabled[grpid])
  251. continue;
  252. len = nvmet_format_ana_group(req, grpid, desc);
  253. status = nvmet_copy_to_sgl(req, offset, desc, len);
  254. if (status)
  255. break;
  256. offset += len;
  257. ngrps++;
  258. }
  259. for ( ; grpid <= NVMET_MAX_ANAGRPS; grpid++) {
  260. if (nvmet_ana_group_enabled[grpid])
  261. ngrps++;
  262. }
  263. hdr.chgcnt = cpu_to_le64(nvmet_ana_chgcnt);
  264. hdr.ngrps = cpu_to_le16(ngrps);
  265. nvmet_clear_aen_bit(req, NVME_AEN_BIT_ANA_CHANGE);
  266. up_read(&nvmet_ana_sem);
  267. kfree(desc);
  268. /* copy the header last once we know the number of groups */
  269. status = nvmet_copy_to_sgl(req, 0, &hdr, sizeof(hdr));
  270. out:
  271. nvmet_req_complete(req, status);
  272. }
  273. static void nvmet_execute_get_log_page(struct nvmet_req *req)
  274. {
  275. if (!nvmet_check_transfer_len(req, nvmet_get_log_page_len(req->cmd)))
  276. return;
  277. switch (req->cmd->get_log_page.lid) {
  278. case NVME_LOG_ERROR:
  279. return nvmet_execute_get_log_page_error(req);
  280. case NVME_LOG_SMART:
  281. return nvmet_execute_get_log_page_smart(req);
  282. case NVME_LOG_FW_SLOT:
  283. /*
  284. * We only support a single firmware slot which always is
  285. * active, so we can zero out the whole firmware slot log and
  286. * still claim to fully implement this mandatory log page.
  287. */
  288. return nvmet_execute_get_log_page_noop(req);
  289. case NVME_LOG_CHANGED_NS:
  290. return nvmet_execute_get_log_changed_ns(req);
  291. case NVME_LOG_CMD_EFFECTS:
  292. return nvmet_execute_get_log_cmd_effects_ns(req);
  293. case NVME_LOG_ANA:
  294. return nvmet_execute_get_log_page_ana(req);
  295. }
  296. pr_debug("unhandled lid %d on qid %d\n",
  297. req->cmd->get_log_page.lid, req->sq->qid);
  298. req->error_loc = offsetof(struct nvme_get_log_page_command, lid);
  299. nvmet_req_complete(req, NVME_SC_INVALID_FIELD | NVME_STATUS_DNR);
  300. }
  301. static void nvmet_execute_identify_ctrl(struct nvmet_req *req)
  302. {
  303. struct nvmet_ctrl *ctrl = req->sq->ctrl;
  304. struct nvmet_subsys *subsys = ctrl->subsys;
  305. struct nvme_id_ctrl *id;
  306. u32 cmd_capsule_size;
  307. u16 status = 0;
  308. if (!subsys->subsys_discovered) {
  309. mutex_lock(&subsys->lock);
  310. subsys->subsys_discovered = true;
  311. mutex_unlock(&subsys->lock);
  312. }
  313. id = kzalloc(sizeof(*id), GFP_KERNEL);
  314. if (!id) {
  315. status = NVME_SC_INTERNAL;
  316. goto out;
  317. }
  318. /* XXX: figure out how to assign real vendors IDs. */
  319. id->vid = 0;
  320. id->ssvid = 0;
  321. memcpy(id->sn, ctrl->subsys->serial, NVMET_SN_MAX_SIZE);
  322. memcpy_and_pad(id->mn, sizeof(id->mn), subsys->model_number,
  323. strlen(subsys->model_number), ' ');
  324. memcpy_and_pad(id->fr, sizeof(id->fr),
  325. subsys->firmware_rev, strlen(subsys->firmware_rev), ' ');
  326. put_unaligned_le24(subsys->ieee_oui, id->ieee);
  327. id->rab = 6;
  328. if (nvmet_is_disc_subsys(ctrl->subsys))
  329. id->cntrltype = NVME_CTRL_DISC;
  330. else
  331. id->cntrltype = NVME_CTRL_IO;
  332. /* we support multiple ports, multiples hosts and ANA: */
  333. id->cmic = NVME_CTRL_CMIC_MULTI_PORT | NVME_CTRL_CMIC_MULTI_CTRL |
  334. NVME_CTRL_CMIC_ANA;
  335. /* Limit MDTS according to transport capability */
  336. if (ctrl->ops->get_mdts)
  337. id->mdts = ctrl->ops->get_mdts(ctrl);
  338. else
  339. id->mdts = 0;
  340. id->cntlid = cpu_to_le16(ctrl->cntlid);
  341. id->ver = cpu_to_le32(ctrl->subsys->ver);
  342. /* XXX: figure out what to do about RTD3R/RTD3 */
  343. id->oaes = cpu_to_le32(NVMET_AEN_CFG_OPTIONAL);
  344. id->ctratt = cpu_to_le32(NVME_CTRL_ATTR_HID_128_BIT |
  345. NVME_CTRL_ATTR_TBKAS);
  346. id->oacs = 0;
  347. /*
  348. * We don't really have a practical limit on the number of abort
  349. * comands. But we don't do anything useful for abort either, so
  350. * no point in allowing more abort commands than the spec requires.
  351. */
  352. id->acl = 3;
  353. id->aerl = NVMET_ASYNC_EVENTS - 1;
  354. /* first slot is read-only, only one slot supported */
  355. id->frmw = (1 << 0) | (1 << 1);
  356. id->lpa = (1 << 0) | (1 << 1) | (1 << 2);
  357. id->elpe = NVMET_ERROR_LOG_SLOTS - 1;
  358. id->npss = 0;
  359. /* We support keep-alive timeout in granularity of seconds */
  360. id->kas = cpu_to_le16(NVMET_KAS);
  361. id->sqes = (0x6 << 4) | 0x6;
  362. id->cqes = (0x4 << 4) | 0x4;
  363. /* no enforcement soft-limit for maxcmd - pick arbitrary high value */
  364. id->maxcmd = cpu_to_le16(NVMET_MAX_CMD(ctrl));
  365. id->nn = cpu_to_le32(NVMET_MAX_NAMESPACES);
  366. id->mnan = cpu_to_le32(NVMET_MAX_NAMESPACES);
  367. id->oncs = cpu_to_le16(NVME_CTRL_ONCS_DSM |
  368. NVME_CTRL_ONCS_WRITE_ZEROES);
  369. /* XXX: don't report vwc if the underlying device is write through */
  370. id->vwc = NVME_CTRL_VWC_PRESENT;
  371. /*
  372. * We can't support atomic writes bigger than a LBA without support
  373. * from the backend device.
  374. */
  375. id->awun = 0;
  376. id->awupf = 0;
  377. id->sgls = cpu_to_le32(1 << 0); /* we always support SGLs */
  378. if (ctrl->ops->flags & NVMF_KEYED_SGLS)
  379. id->sgls |= cpu_to_le32(1 << 2);
  380. if (req->port->inline_data_size)
  381. id->sgls |= cpu_to_le32(1 << 20);
  382. strscpy(id->subnqn, ctrl->subsys->subsysnqn, sizeof(id->subnqn));
  383. /*
  384. * Max command capsule size is sqe + in-capsule data size.
  385. * Disable in-capsule data for Metadata capable controllers.
  386. */
  387. cmd_capsule_size = sizeof(struct nvme_command);
  388. if (!ctrl->pi_support)
  389. cmd_capsule_size += req->port->inline_data_size;
  390. id->ioccsz = cpu_to_le32(cmd_capsule_size / 16);
  391. /* Max response capsule size is cqe */
  392. id->iorcsz = cpu_to_le32(sizeof(struct nvme_completion) / 16);
  393. id->msdbd = ctrl->ops->msdbd;
  394. id->anacap = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4);
  395. id->anatt = 10; /* random value */
  396. id->anagrpmax = cpu_to_le32(NVMET_MAX_ANAGRPS);
  397. id->nanagrpid = cpu_to_le32(NVMET_MAX_ANAGRPS);
  398. /*
  399. * Meh, we don't really support any power state. Fake up the same
  400. * values that qemu does.
  401. */
  402. id->psd[0].max_power = cpu_to_le16(0x9c4);
  403. id->psd[0].entry_lat = cpu_to_le32(0x10);
  404. id->psd[0].exit_lat = cpu_to_le32(0x4);
  405. id->nwpc = 1 << 0; /* write protect and no write protect */
  406. status = nvmet_copy_to_sgl(req, 0, id, sizeof(*id));
  407. kfree(id);
  408. out:
  409. nvmet_req_complete(req, status);
  410. }
  411. static void nvmet_execute_identify_ns(struct nvmet_req *req)
  412. {
  413. struct nvme_id_ns *id;
  414. u16 status;
  415. if (le32_to_cpu(req->cmd->identify.nsid) == NVME_NSID_ALL) {
  416. req->error_loc = offsetof(struct nvme_identify, nsid);
  417. status = NVME_SC_INVALID_NS | NVME_STATUS_DNR;
  418. goto out;
  419. }
  420. id = kzalloc(sizeof(*id), GFP_KERNEL);
  421. if (!id) {
  422. status = NVME_SC_INTERNAL;
  423. goto out;
  424. }
  425. /* return an all zeroed buffer if we can't find an active namespace */
  426. status = nvmet_req_find_ns(req);
  427. if (status) {
  428. status = 0;
  429. goto done;
  430. }
  431. if (nvmet_ns_revalidate(req->ns)) {
  432. mutex_lock(&req->ns->subsys->lock);
  433. nvmet_ns_changed(req->ns->subsys, req->ns->nsid);
  434. mutex_unlock(&req->ns->subsys->lock);
  435. }
  436. /*
  437. * nuse = ncap = nsze isn't always true, but we have no way to find
  438. * that out from the underlying device.
  439. */
  440. id->ncap = id->nsze =
  441. cpu_to_le64(req->ns->size >> req->ns->blksize_shift);
  442. switch (req->port->ana_state[req->ns->anagrpid]) {
  443. case NVME_ANA_INACCESSIBLE:
  444. case NVME_ANA_PERSISTENT_LOSS:
  445. break;
  446. default:
  447. id->nuse = id->nsze;
  448. break;
  449. }
  450. if (req->ns->bdev)
  451. nvmet_bdev_set_limits(req->ns->bdev, id);
  452. /*
  453. * We just provide a single LBA format that matches what the
  454. * underlying device reports.
  455. */
  456. id->nlbaf = 0;
  457. id->flbas = 0;
  458. /*
  459. * Our namespace might always be shared. Not just with other
  460. * controllers, but also with any other user of the block device.
  461. */
  462. id->nmic = NVME_NS_NMIC_SHARED;
  463. id->anagrpid = cpu_to_le32(req->ns->anagrpid);
  464. memcpy(&id->nguid, &req->ns->nguid, sizeof(id->nguid));
  465. id->lbaf[0].ds = req->ns->blksize_shift;
  466. if (req->sq->ctrl->pi_support && nvmet_ns_has_pi(req->ns)) {
  467. id->dpc = NVME_NS_DPC_PI_FIRST | NVME_NS_DPC_PI_LAST |
  468. NVME_NS_DPC_PI_TYPE1 | NVME_NS_DPC_PI_TYPE2 |
  469. NVME_NS_DPC_PI_TYPE3;
  470. id->mc = NVME_MC_EXTENDED_LBA;
  471. id->dps = req->ns->pi_type;
  472. id->flbas = NVME_NS_FLBAS_META_EXT;
  473. id->lbaf[0].ms = cpu_to_le16(req->ns->metadata_size);
  474. }
  475. if (req->ns->readonly)
  476. id->nsattr |= NVME_NS_ATTR_RO;
  477. done:
  478. if (!status)
  479. status = nvmet_copy_to_sgl(req, 0, id, sizeof(*id));
  480. kfree(id);
  481. out:
  482. nvmet_req_complete(req, status);
  483. }
  484. static void nvmet_execute_identify_nslist(struct nvmet_req *req)
  485. {
  486. static const int buf_size = NVME_IDENTIFY_DATA_SIZE;
  487. struct nvmet_ctrl *ctrl = req->sq->ctrl;
  488. struct nvmet_ns *ns;
  489. unsigned long idx;
  490. u32 min_nsid = le32_to_cpu(req->cmd->identify.nsid);
  491. __le32 *list;
  492. u16 status = 0;
  493. int i = 0;
  494. /*
  495. * NSID values 0xFFFFFFFE and NVME_NSID_ALL are invalid
  496. * See NVMe Base Specification, Active Namespace ID list (CNS 02h).
  497. */
  498. if (min_nsid == 0xFFFFFFFE || min_nsid == NVME_NSID_ALL) {
  499. req->error_loc = offsetof(struct nvme_identify, nsid);
  500. status = NVME_SC_INVALID_NS | NVME_STATUS_DNR;
  501. goto out;
  502. }
  503. list = kzalloc(buf_size, GFP_KERNEL);
  504. if (!list) {
  505. status = NVME_SC_INTERNAL;
  506. goto out;
  507. }
  508. xa_for_each(&ctrl->subsys->namespaces, idx, ns) {
  509. if (ns->nsid <= min_nsid)
  510. continue;
  511. list[i++] = cpu_to_le32(ns->nsid);
  512. if (i == buf_size / sizeof(__le32))
  513. break;
  514. }
  515. status = nvmet_copy_to_sgl(req, 0, list, buf_size);
  516. kfree(list);
  517. out:
  518. nvmet_req_complete(req, status);
  519. }
  520. static u16 nvmet_copy_ns_identifier(struct nvmet_req *req, u8 type, u8 len,
  521. void *id, off_t *off)
  522. {
  523. struct nvme_ns_id_desc desc = {
  524. .nidt = type,
  525. .nidl = len,
  526. };
  527. u16 status;
  528. status = nvmet_copy_to_sgl(req, *off, &desc, sizeof(desc));
  529. if (status)
  530. return status;
  531. *off += sizeof(desc);
  532. status = nvmet_copy_to_sgl(req, *off, id, len);
  533. if (status)
  534. return status;
  535. *off += len;
  536. return 0;
  537. }
  538. static void nvmet_execute_identify_desclist(struct nvmet_req *req)
  539. {
  540. off_t off = 0;
  541. u16 status;
  542. status = nvmet_req_find_ns(req);
  543. if (status)
  544. goto out;
  545. if (memchr_inv(&req->ns->uuid, 0, sizeof(req->ns->uuid))) {
  546. status = nvmet_copy_ns_identifier(req, NVME_NIDT_UUID,
  547. NVME_NIDT_UUID_LEN,
  548. &req->ns->uuid, &off);
  549. if (status)
  550. goto out;
  551. }
  552. if (memchr_inv(req->ns->nguid, 0, sizeof(req->ns->nguid))) {
  553. status = nvmet_copy_ns_identifier(req, NVME_NIDT_NGUID,
  554. NVME_NIDT_NGUID_LEN,
  555. &req->ns->nguid, &off);
  556. if (status)
  557. goto out;
  558. }
  559. status = nvmet_copy_ns_identifier(req, NVME_NIDT_CSI,
  560. NVME_NIDT_CSI_LEN,
  561. &req->ns->csi, &off);
  562. if (status)
  563. goto out;
  564. if (sg_zero_buffer(req->sg, req->sg_cnt, NVME_IDENTIFY_DATA_SIZE - off,
  565. off) != NVME_IDENTIFY_DATA_SIZE - off)
  566. status = NVME_SC_INTERNAL | NVME_STATUS_DNR;
  567. out:
  568. nvmet_req_complete(req, status);
  569. }
  570. static void nvmet_execute_identify_ctrl_nvm(struct nvmet_req *req)
  571. {
  572. /* Not supported: return zeroes */
  573. nvmet_req_complete(req,
  574. nvmet_zero_sgl(req, 0, sizeof(struct nvme_id_ctrl_nvm)));
  575. }
  576. static void nvmet_execute_identify(struct nvmet_req *req)
  577. {
  578. if (!nvmet_check_transfer_len(req, NVME_IDENTIFY_DATA_SIZE))
  579. return;
  580. switch (req->cmd->identify.cns) {
  581. case NVME_ID_CNS_NS:
  582. nvmet_execute_identify_ns(req);
  583. return;
  584. case NVME_ID_CNS_CTRL:
  585. nvmet_execute_identify_ctrl(req);
  586. return;
  587. case NVME_ID_CNS_NS_ACTIVE_LIST:
  588. nvmet_execute_identify_nslist(req);
  589. return;
  590. case NVME_ID_CNS_NS_DESC_LIST:
  591. nvmet_execute_identify_desclist(req);
  592. return;
  593. case NVME_ID_CNS_CS_NS:
  594. switch (req->cmd->identify.csi) {
  595. case NVME_CSI_NVM:
  596. /* Not supported */
  597. break;
  598. case NVME_CSI_ZNS:
  599. if (IS_ENABLED(CONFIG_BLK_DEV_ZONED)) {
  600. nvmet_execute_identify_ns_zns(req);
  601. return;
  602. }
  603. break;
  604. }
  605. break;
  606. case NVME_ID_CNS_CS_CTRL:
  607. switch (req->cmd->identify.csi) {
  608. case NVME_CSI_NVM:
  609. nvmet_execute_identify_ctrl_nvm(req);
  610. return;
  611. case NVME_CSI_ZNS:
  612. if (IS_ENABLED(CONFIG_BLK_DEV_ZONED)) {
  613. nvmet_execute_identify_ctrl_zns(req);
  614. return;
  615. }
  616. break;
  617. }
  618. break;
  619. }
  620. pr_debug("unhandled identify cns %d on qid %d\n",
  621. req->cmd->identify.cns, req->sq->qid);
  622. req->error_loc = offsetof(struct nvme_identify, cns);
  623. nvmet_req_complete(req, NVME_SC_INVALID_FIELD | NVME_STATUS_DNR);
  624. }
  625. /*
  626. * A "minimum viable" abort implementation: the command is mandatory in the
  627. * spec, but we are not required to do any useful work. We couldn't really
  628. * do a useful abort, so don't bother even with waiting for the command
  629. * to be exectuted and return immediately telling the command to abort
  630. * wasn't found.
  631. */
  632. static void nvmet_execute_abort(struct nvmet_req *req)
  633. {
  634. if (!nvmet_check_transfer_len(req, 0))
  635. return;
  636. nvmet_set_result(req, 1);
  637. nvmet_req_complete(req, 0);
  638. }
  639. static u16 nvmet_write_protect_flush_sync(struct nvmet_req *req)
  640. {
  641. u16 status;
  642. if (req->ns->file)
  643. status = nvmet_file_flush(req);
  644. else
  645. status = nvmet_bdev_flush(req);
  646. if (status)
  647. pr_err("write protect flush failed nsid: %u\n", req->ns->nsid);
  648. return status;
  649. }
  650. static u16 nvmet_set_feat_write_protect(struct nvmet_req *req)
  651. {
  652. u32 write_protect = le32_to_cpu(req->cmd->common.cdw11);
  653. struct nvmet_subsys *subsys = nvmet_req_subsys(req);
  654. u16 status;
  655. status = nvmet_req_find_ns(req);
  656. if (status)
  657. return status;
  658. mutex_lock(&subsys->lock);
  659. switch (write_protect) {
  660. case NVME_NS_WRITE_PROTECT:
  661. req->ns->readonly = true;
  662. status = nvmet_write_protect_flush_sync(req);
  663. if (status)
  664. req->ns->readonly = false;
  665. break;
  666. case NVME_NS_NO_WRITE_PROTECT:
  667. req->ns->readonly = false;
  668. status = 0;
  669. break;
  670. default:
  671. break;
  672. }
  673. if (!status)
  674. nvmet_ns_changed(subsys, req->ns->nsid);
  675. mutex_unlock(&subsys->lock);
  676. return status;
  677. }
  678. u16 nvmet_set_feat_kato(struct nvmet_req *req)
  679. {
  680. u32 val32 = le32_to_cpu(req->cmd->common.cdw11);
  681. nvmet_stop_keep_alive_timer(req->sq->ctrl);
  682. req->sq->ctrl->kato = DIV_ROUND_UP(val32, 1000);
  683. nvmet_start_keep_alive_timer(req->sq->ctrl);
  684. nvmet_set_result(req, req->sq->ctrl->kato);
  685. return 0;
  686. }
  687. u16 nvmet_set_feat_async_event(struct nvmet_req *req, u32 mask)
  688. {
  689. u32 val32 = le32_to_cpu(req->cmd->common.cdw11);
  690. if (val32 & ~mask) {
  691. req->error_loc = offsetof(struct nvme_common_command, cdw11);
  692. return NVME_SC_INVALID_FIELD | NVME_STATUS_DNR;
  693. }
  694. WRITE_ONCE(req->sq->ctrl->aen_enabled, val32);
  695. nvmet_set_result(req, val32);
  696. return 0;
  697. }
  698. void nvmet_execute_set_features(struct nvmet_req *req)
  699. {
  700. struct nvmet_subsys *subsys = nvmet_req_subsys(req);
  701. u32 cdw10 = le32_to_cpu(req->cmd->common.cdw10);
  702. u32 cdw11 = le32_to_cpu(req->cmd->common.cdw11);
  703. u16 status = 0;
  704. u16 nsqr;
  705. u16 ncqr;
  706. if (!nvmet_check_data_len_lte(req, 0))
  707. return;
  708. switch (cdw10 & 0xff) {
  709. case NVME_FEAT_NUM_QUEUES:
  710. ncqr = (cdw11 >> 16) & 0xffff;
  711. nsqr = cdw11 & 0xffff;
  712. if (ncqr == 0xffff || nsqr == 0xffff) {
  713. status = NVME_SC_INVALID_FIELD | NVME_STATUS_DNR;
  714. break;
  715. }
  716. nvmet_set_result(req,
  717. (subsys->max_qid - 1) | ((subsys->max_qid - 1) << 16));
  718. break;
  719. case NVME_FEAT_KATO:
  720. status = nvmet_set_feat_kato(req);
  721. break;
  722. case NVME_FEAT_ASYNC_EVENT:
  723. status = nvmet_set_feat_async_event(req, NVMET_AEN_CFG_ALL);
  724. break;
  725. case NVME_FEAT_HOST_ID:
  726. status = NVME_SC_CMD_SEQ_ERROR | NVME_STATUS_DNR;
  727. break;
  728. case NVME_FEAT_WRITE_PROTECT:
  729. status = nvmet_set_feat_write_protect(req);
  730. break;
  731. default:
  732. req->error_loc = offsetof(struct nvme_common_command, cdw10);
  733. status = NVME_SC_INVALID_FIELD | NVME_STATUS_DNR;
  734. break;
  735. }
  736. nvmet_req_complete(req, status);
  737. }
  738. static u16 nvmet_get_feat_write_protect(struct nvmet_req *req)
  739. {
  740. struct nvmet_subsys *subsys = nvmet_req_subsys(req);
  741. u32 result;
  742. result = nvmet_req_find_ns(req);
  743. if (result)
  744. return result;
  745. mutex_lock(&subsys->lock);
  746. if (req->ns->readonly == true)
  747. result = NVME_NS_WRITE_PROTECT;
  748. else
  749. result = NVME_NS_NO_WRITE_PROTECT;
  750. nvmet_set_result(req, result);
  751. mutex_unlock(&subsys->lock);
  752. return 0;
  753. }
  754. void nvmet_get_feat_kato(struct nvmet_req *req)
  755. {
  756. nvmet_set_result(req, req->sq->ctrl->kato * 1000);
  757. }
  758. void nvmet_get_feat_async_event(struct nvmet_req *req)
  759. {
  760. nvmet_set_result(req, READ_ONCE(req->sq->ctrl->aen_enabled));
  761. }
  762. void nvmet_execute_get_features(struct nvmet_req *req)
  763. {
  764. struct nvmet_subsys *subsys = nvmet_req_subsys(req);
  765. u32 cdw10 = le32_to_cpu(req->cmd->common.cdw10);
  766. u16 status = 0;
  767. if (!nvmet_check_transfer_len(req, nvmet_feat_data_len(req, cdw10)))
  768. return;
  769. switch (cdw10 & 0xff) {
  770. /*
  771. * These features are mandatory in the spec, but we don't
  772. * have a useful way to implement them. We'll eventually
  773. * need to come up with some fake values for these.
  774. */
  775. #if 0
  776. case NVME_FEAT_ARBITRATION:
  777. break;
  778. case NVME_FEAT_POWER_MGMT:
  779. break;
  780. case NVME_FEAT_TEMP_THRESH:
  781. break;
  782. case NVME_FEAT_ERR_RECOVERY:
  783. break;
  784. case NVME_FEAT_IRQ_COALESCE:
  785. break;
  786. case NVME_FEAT_IRQ_CONFIG:
  787. break;
  788. case NVME_FEAT_WRITE_ATOMIC:
  789. break;
  790. #endif
  791. case NVME_FEAT_ASYNC_EVENT:
  792. nvmet_get_feat_async_event(req);
  793. break;
  794. case NVME_FEAT_VOLATILE_WC:
  795. nvmet_set_result(req, 1);
  796. break;
  797. case NVME_FEAT_NUM_QUEUES:
  798. nvmet_set_result(req,
  799. (subsys->max_qid-1) | ((subsys->max_qid-1) << 16));
  800. break;
  801. case NVME_FEAT_KATO:
  802. nvmet_get_feat_kato(req);
  803. break;
  804. case NVME_FEAT_HOST_ID:
  805. /* need 128-bit host identifier flag */
  806. if (!(req->cmd->common.cdw11 & cpu_to_le32(1 << 0))) {
  807. req->error_loc =
  808. offsetof(struct nvme_common_command, cdw11);
  809. status = NVME_SC_INVALID_FIELD | NVME_STATUS_DNR;
  810. break;
  811. }
  812. status = nvmet_copy_to_sgl(req, 0, &req->sq->ctrl->hostid,
  813. sizeof(req->sq->ctrl->hostid));
  814. break;
  815. case NVME_FEAT_WRITE_PROTECT:
  816. status = nvmet_get_feat_write_protect(req);
  817. break;
  818. default:
  819. req->error_loc =
  820. offsetof(struct nvme_common_command, cdw10);
  821. status = NVME_SC_INVALID_FIELD | NVME_STATUS_DNR;
  822. break;
  823. }
  824. nvmet_req_complete(req, status);
  825. }
  826. void nvmet_execute_async_event(struct nvmet_req *req)
  827. {
  828. struct nvmet_ctrl *ctrl = req->sq->ctrl;
  829. if (!nvmet_check_transfer_len(req, 0))
  830. return;
  831. mutex_lock(&ctrl->lock);
  832. if (ctrl->nr_async_event_cmds >= NVMET_ASYNC_EVENTS) {
  833. mutex_unlock(&ctrl->lock);
  834. nvmet_req_complete(req, NVME_SC_ASYNC_LIMIT | NVME_STATUS_DNR);
  835. return;
  836. }
  837. ctrl->async_event_cmds[ctrl->nr_async_event_cmds++] = req;
  838. mutex_unlock(&ctrl->lock);
  839. queue_work(nvmet_wq, &ctrl->async_event_work);
  840. }
  841. void nvmet_execute_keep_alive(struct nvmet_req *req)
  842. {
  843. struct nvmet_ctrl *ctrl = req->sq->ctrl;
  844. u16 status = 0;
  845. if (!nvmet_check_transfer_len(req, 0))
  846. return;
  847. if (!ctrl->kato) {
  848. status = NVME_SC_KA_TIMEOUT_INVALID;
  849. goto out;
  850. }
  851. pr_debug("ctrl %d update keep-alive timer for %d secs\n",
  852. ctrl->cntlid, ctrl->kato);
  853. mod_delayed_work(system_wq, &ctrl->ka_work, ctrl->kato * HZ);
  854. out:
  855. nvmet_req_complete(req, status);
  856. }
  857. u16 nvmet_parse_admin_cmd(struct nvmet_req *req)
  858. {
  859. struct nvme_command *cmd = req->cmd;
  860. u16 ret;
  861. if (nvme_is_fabrics(cmd))
  862. return nvmet_parse_fabrics_admin_cmd(req);
  863. if (nvmet_is_disc_subsys(nvmet_req_subsys(req)))
  864. return nvmet_parse_discovery_cmd(req);
  865. ret = nvmet_check_ctrl_status(req);
  866. if (unlikely(ret))
  867. return ret;
  868. if (nvmet_is_passthru_req(req))
  869. return nvmet_parse_passthru_admin_cmd(req);
  870. switch (cmd->common.opcode) {
  871. case nvme_admin_get_log_page:
  872. req->execute = nvmet_execute_get_log_page;
  873. return 0;
  874. case nvme_admin_identify:
  875. req->execute = nvmet_execute_identify;
  876. return 0;
  877. case nvme_admin_abort_cmd:
  878. req->execute = nvmet_execute_abort;
  879. return 0;
  880. case nvme_admin_set_features:
  881. req->execute = nvmet_execute_set_features;
  882. return 0;
  883. case nvme_admin_get_features:
  884. req->execute = nvmet_execute_get_features;
  885. return 0;
  886. case nvme_admin_async_event:
  887. req->execute = nvmet_execute_async_event;
  888. return 0;
  889. case nvme_admin_keep_alive:
  890. req->execute = nvmet_execute_keep_alive;
  891. return 0;
  892. default:
  893. return nvmet_report_invalid_opcode(req);
  894. }
  895. }