rdma.c 53 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * NVMe over Fabrics RDMA target.
  4. * Copyright (c) 2015-2016 HGST, a Western Digital Company.
  5. */
  6. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  7. #include <linux/atomic.h>
  8. #include <linux/blk-integrity.h>
  9. #include <linux/ctype.h>
  10. #include <linux/delay.h>
  11. #include <linux/err.h>
  12. #include <linux/init.h>
  13. #include <linux/module.h>
  14. #include <linux/nvme.h>
  15. #include <linux/slab.h>
  16. #include <linux/string.h>
  17. #include <linux/wait.h>
  18. #include <linux/inet.h>
  19. #include <linux/unaligned.h>
  20. #include <rdma/ib_verbs.h>
  21. #include <rdma/rdma_cm.h>
  22. #include <rdma/rw.h>
  23. #include <rdma/ib_cm.h>
  24. #include <linux/nvme-rdma.h>
  25. #include "nvmet.h"
  26. /*
  27. * We allow at least 1 page, up to 4 SGEs, and up to 16KB of inline data
  28. */
  29. #define NVMET_RDMA_DEFAULT_INLINE_DATA_SIZE PAGE_SIZE
  30. #define NVMET_RDMA_MAX_INLINE_SGE 4
  31. #define NVMET_RDMA_MAX_INLINE_DATA_SIZE max_t(int, SZ_16K, PAGE_SIZE)
  32. /* Assume mpsmin == device_page_size == 4KB */
  33. #define NVMET_RDMA_MAX_MDTS 8
  34. #define NVMET_RDMA_MAX_METADATA_MDTS 5
  35. #define NVMET_RDMA_BACKLOG 128
  36. #define NVMET_RDMA_DISCRETE_RSP_TAG -1
  37. struct nvmet_rdma_srq;
  38. struct nvmet_rdma_cmd {
  39. struct ib_sge sge[NVMET_RDMA_MAX_INLINE_SGE + 1];
  40. struct ib_cqe cqe;
  41. struct ib_recv_wr wr;
  42. struct scatterlist inline_sg[NVMET_RDMA_MAX_INLINE_SGE];
  43. struct nvme_command *nvme_cmd;
  44. struct nvmet_rdma_queue *queue;
  45. struct nvmet_rdma_srq *nsrq;
  46. };
  47. enum {
  48. NVMET_RDMA_REQ_INLINE_DATA = (1 << 0),
  49. };
  50. struct nvmet_rdma_rsp {
  51. struct ib_sge send_sge;
  52. struct ib_cqe send_cqe;
  53. struct ib_send_wr send_wr;
  54. struct nvmet_rdma_cmd *cmd;
  55. struct nvmet_rdma_queue *queue;
  56. struct ib_cqe read_cqe;
  57. struct ib_cqe write_cqe;
  58. struct rdma_rw_ctx rw;
  59. struct nvmet_req req;
  60. bool allocated;
  61. u8 n_rdma;
  62. u32 flags;
  63. u32 invalidate_rkey;
  64. struct list_head wait_list;
  65. int tag;
  66. };
  67. enum nvmet_rdma_queue_state {
  68. NVMET_RDMA_Q_CONNECTING,
  69. NVMET_RDMA_Q_LIVE,
  70. NVMET_RDMA_Q_DISCONNECTING,
  71. };
  72. struct nvmet_rdma_queue {
  73. struct rdma_cm_id *cm_id;
  74. struct ib_qp *qp;
  75. struct nvmet_port *port;
  76. struct ib_cq *cq;
  77. atomic_t sq_wr_avail;
  78. struct nvmet_rdma_device *dev;
  79. struct nvmet_rdma_srq *nsrq;
  80. spinlock_t state_lock;
  81. enum nvmet_rdma_queue_state state;
  82. struct nvmet_cq nvme_cq;
  83. struct nvmet_sq nvme_sq;
  84. struct nvmet_rdma_rsp *rsps;
  85. struct sbitmap rsp_tags;
  86. struct nvmet_rdma_cmd *cmds;
  87. struct work_struct release_work;
  88. struct list_head rsp_wait_list;
  89. struct list_head rsp_wr_wait_list;
  90. spinlock_t rsp_wr_wait_lock;
  91. int idx;
  92. int host_qid;
  93. int comp_vector;
  94. int recv_queue_size;
  95. int send_queue_size;
  96. struct list_head queue_list;
  97. };
  98. struct nvmet_rdma_port {
  99. struct nvmet_port *nport;
  100. struct sockaddr_storage addr;
  101. struct rdma_cm_id *cm_id;
  102. struct delayed_work repair_work;
  103. };
  104. struct nvmet_rdma_srq {
  105. struct ib_srq *srq;
  106. struct nvmet_rdma_cmd *cmds;
  107. struct nvmet_rdma_device *ndev;
  108. };
  109. struct nvmet_rdma_device {
  110. struct ib_device *device;
  111. struct ib_pd *pd;
  112. struct nvmet_rdma_srq **srqs;
  113. int srq_count;
  114. size_t srq_size;
  115. struct kref ref;
  116. struct list_head entry;
  117. int inline_data_size;
  118. int inline_page_count;
  119. };
  120. static bool nvmet_rdma_use_srq;
  121. module_param_named(use_srq, nvmet_rdma_use_srq, bool, 0444);
  122. MODULE_PARM_DESC(use_srq, "Use shared receive queue.");
  123. static int srq_size_set(const char *val, const struct kernel_param *kp);
  124. static const struct kernel_param_ops srq_size_ops = {
  125. .set = srq_size_set,
  126. .get = param_get_int,
  127. };
  128. static int nvmet_rdma_srq_size = 1024;
  129. module_param_cb(srq_size, &srq_size_ops, &nvmet_rdma_srq_size, 0644);
  130. MODULE_PARM_DESC(srq_size, "set Shared Receive Queue (SRQ) size, should >= 256 (default: 1024)");
  131. static DEFINE_IDA(nvmet_rdma_queue_ida);
  132. static LIST_HEAD(nvmet_rdma_queue_list);
  133. static DEFINE_MUTEX(nvmet_rdma_queue_mutex);
  134. static LIST_HEAD(device_list);
  135. static DEFINE_MUTEX(device_list_mutex);
  136. static bool nvmet_rdma_execute_command(struct nvmet_rdma_rsp *rsp);
  137. static void nvmet_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc);
  138. static void nvmet_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
  139. static void nvmet_rdma_read_data_done(struct ib_cq *cq, struct ib_wc *wc);
  140. static void nvmet_rdma_write_data_done(struct ib_cq *cq, struct ib_wc *wc);
  141. static void nvmet_rdma_qp_event(struct ib_event *event, void *priv);
  142. static void nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue);
  143. static void nvmet_rdma_free_rsp(struct nvmet_rdma_device *ndev,
  144. struct nvmet_rdma_rsp *r);
  145. static int nvmet_rdma_alloc_rsp(struct nvmet_rdma_device *ndev,
  146. struct nvmet_rdma_rsp *r,
  147. int tag);
  148. static const struct nvmet_fabrics_ops nvmet_rdma_ops;
  149. static int srq_size_set(const char *val, const struct kernel_param *kp)
  150. {
  151. int n = 0, ret;
  152. ret = kstrtoint(val, 10, &n);
  153. if (ret != 0 || n < 256)
  154. return -EINVAL;
  155. return param_set_int(val, kp);
  156. }
  157. static int num_pages(int len)
  158. {
  159. return 1 + (((len - 1) & PAGE_MASK) >> PAGE_SHIFT);
  160. }
  161. static inline bool nvmet_rdma_need_data_in(struct nvmet_rdma_rsp *rsp)
  162. {
  163. return nvme_is_write(rsp->req.cmd) &&
  164. rsp->req.transfer_len &&
  165. !(rsp->flags & NVMET_RDMA_REQ_INLINE_DATA);
  166. }
  167. static inline bool nvmet_rdma_need_data_out(struct nvmet_rdma_rsp *rsp)
  168. {
  169. return !nvme_is_write(rsp->req.cmd) &&
  170. rsp->req.transfer_len &&
  171. !rsp->req.cqe->status &&
  172. !(rsp->flags & NVMET_RDMA_REQ_INLINE_DATA);
  173. }
  174. static inline struct nvmet_rdma_rsp *
  175. nvmet_rdma_get_rsp(struct nvmet_rdma_queue *queue)
  176. {
  177. struct nvmet_rdma_rsp *rsp = NULL;
  178. int tag;
  179. tag = sbitmap_get(&queue->rsp_tags);
  180. if (tag >= 0)
  181. rsp = &queue->rsps[tag];
  182. if (unlikely(!rsp)) {
  183. int ret;
  184. rsp = kzalloc(sizeof(*rsp), GFP_KERNEL);
  185. if (unlikely(!rsp))
  186. return NULL;
  187. ret = nvmet_rdma_alloc_rsp(queue->dev, rsp,
  188. NVMET_RDMA_DISCRETE_RSP_TAG);
  189. if (unlikely(ret)) {
  190. kfree(rsp);
  191. return NULL;
  192. }
  193. }
  194. return rsp;
  195. }
  196. static inline void
  197. nvmet_rdma_put_rsp(struct nvmet_rdma_rsp *rsp)
  198. {
  199. if (unlikely(rsp->tag == NVMET_RDMA_DISCRETE_RSP_TAG)) {
  200. nvmet_rdma_free_rsp(rsp->queue->dev, rsp);
  201. kfree(rsp);
  202. return;
  203. }
  204. sbitmap_clear_bit(&rsp->queue->rsp_tags, rsp->tag);
  205. }
  206. static void nvmet_rdma_free_inline_pages(struct nvmet_rdma_device *ndev,
  207. struct nvmet_rdma_cmd *c)
  208. {
  209. struct scatterlist *sg;
  210. struct ib_sge *sge;
  211. int i;
  212. if (!ndev->inline_data_size)
  213. return;
  214. sg = c->inline_sg;
  215. sge = &c->sge[1];
  216. for (i = 0; i < ndev->inline_page_count; i++, sg++, sge++) {
  217. if (sge->length)
  218. ib_dma_unmap_page(ndev->device, sge->addr,
  219. sge->length, DMA_FROM_DEVICE);
  220. if (sg_page(sg))
  221. __free_page(sg_page(sg));
  222. }
  223. }
  224. static int nvmet_rdma_alloc_inline_pages(struct nvmet_rdma_device *ndev,
  225. struct nvmet_rdma_cmd *c)
  226. {
  227. struct scatterlist *sg;
  228. struct ib_sge *sge;
  229. struct page *pg;
  230. int len;
  231. int i;
  232. if (!ndev->inline_data_size)
  233. return 0;
  234. sg = c->inline_sg;
  235. sg_init_table(sg, ndev->inline_page_count);
  236. sge = &c->sge[1];
  237. len = ndev->inline_data_size;
  238. for (i = 0; i < ndev->inline_page_count; i++, sg++, sge++) {
  239. pg = alloc_page(GFP_KERNEL);
  240. if (!pg)
  241. goto out_err;
  242. sg_assign_page(sg, pg);
  243. sge->addr = ib_dma_map_page(ndev->device,
  244. pg, 0, PAGE_SIZE, DMA_FROM_DEVICE);
  245. if (ib_dma_mapping_error(ndev->device, sge->addr))
  246. goto out_err;
  247. sge->length = min_t(int, len, PAGE_SIZE);
  248. sge->lkey = ndev->pd->local_dma_lkey;
  249. len -= sge->length;
  250. }
  251. return 0;
  252. out_err:
  253. for (; i >= 0; i--, sg--, sge--) {
  254. if (sge->length)
  255. ib_dma_unmap_page(ndev->device, sge->addr,
  256. sge->length, DMA_FROM_DEVICE);
  257. if (sg_page(sg))
  258. __free_page(sg_page(sg));
  259. }
  260. return -ENOMEM;
  261. }
  262. static int nvmet_rdma_alloc_cmd(struct nvmet_rdma_device *ndev,
  263. struct nvmet_rdma_cmd *c, bool admin)
  264. {
  265. /* NVMe command / RDMA RECV */
  266. c->nvme_cmd = kmalloc(sizeof(*c->nvme_cmd), GFP_KERNEL);
  267. if (!c->nvme_cmd)
  268. goto out;
  269. c->sge[0].addr = ib_dma_map_single(ndev->device, c->nvme_cmd,
  270. sizeof(*c->nvme_cmd), DMA_FROM_DEVICE);
  271. if (ib_dma_mapping_error(ndev->device, c->sge[0].addr))
  272. goto out_free_cmd;
  273. c->sge[0].length = sizeof(*c->nvme_cmd);
  274. c->sge[0].lkey = ndev->pd->local_dma_lkey;
  275. if (!admin && nvmet_rdma_alloc_inline_pages(ndev, c))
  276. goto out_unmap_cmd;
  277. c->cqe.done = nvmet_rdma_recv_done;
  278. c->wr.wr_cqe = &c->cqe;
  279. c->wr.sg_list = c->sge;
  280. c->wr.num_sge = admin ? 1 : ndev->inline_page_count + 1;
  281. return 0;
  282. out_unmap_cmd:
  283. ib_dma_unmap_single(ndev->device, c->sge[0].addr,
  284. sizeof(*c->nvme_cmd), DMA_FROM_DEVICE);
  285. out_free_cmd:
  286. kfree(c->nvme_cmd);
  287. out:
  288. return -ENOMEM;
  289. }
  290. static void nvmet_rdma_free_cmd(struct nvmet_rdma_device *ndev,
  291. struct nvmet_rdma_cmd *c, bool admin)
  292. {
  293. if (!admin)
  294. nvmet_rdma_free_inline_pages(ndev, c);
  295. ib_dma_unmap_single(ndev->device, c->sge[0].addr,
  296. sizeof(*c->nvme_cmd), DMA_FROM_DEVICE);
  297. kfree(c->nvme_cmd);
  298. }
  299. static struct nvmet_rdma_cmd *
  300. nvmet_rdma_alloc_cmds(struct nvmet_rdma_device *ndev,
  301. int nr_cmds, bool admin)
  302. {
  303. struct nvmet_rdma_cmd *cmds;
  304. int ret = -EINVAL, i;
  305. cmds = kcalloc(nr_cmds, sizeof(struct nvmet_rdma_cmd), GFP_KERNEL);
  306. if (!cmds)
  307. goto out;
  308. for (i = 0; i < nr_cmds; i++) {
  309. ret = nvmet_rdma_alloc_cmd(ndev, cmds + i, admin);
  310. if (ret)
  311. goto out_free;
  312. }
  313. return cmds;
  314. out_free:
  315. while (--i >= 0)
  316. nvmet_rdma_free_cmd(ndev, cmds + i, admin);
  317. kfree(cmds);
  318. out:
  319. return ERR_PTR(ret);
  320. }
  321. static void nvmet_rdma_free_cmds(struct nvmet_rdma_device *ndev,
  322. struct nvmet_rdma_cmd *cmds, int nr_cmds, bool admin)
  323. {
  324. int i;
  325. for (i = 0; i < nr_cmds; i++)
  326. nvmet_rdma_free_cmd(ndev, cmds + i, admin);
  327. kfree(cmds);
  328. }
  329. static int nvmet_rdma_alloc_rsp(struct nvmet_rdma_device *ndev,
  330. struct nvmet_rdma_rsp *r, int tag)
  331. {
  332. /* NVMe CQE / RDMA SEND */
  333. r->req.cqe = kmalloc(sizeof(*r->req.cqe), GFP_KERNEL);
  334. if (!r->req.cqe)
  335. goto out;
  336. r->send_sge.addr = ib_dma_map_single(ndev->device, r->req.cqe,
  337. sizeof(*r->req.cqe), DMA_TO_DEVICE);
  338. if (ib_dma_mapping_error(ndev->device, r->send_sge.addr))
  339. goto out_free_rsp;
  340. if (ib_dma_pci_p2p_dma_supported(ndev->device))
  341. r->req.p2p_client = &ndev->device->dev;
  342. r->send_sge.length = sizeof(*r->req.cqe);
  343. r->send_sge.lkey = ndev->pd->local_dma_lkey;
  344. r->send_cqe.done = nvmet_rdma_send_done;
  345. r->send_wr.wr_cqe = &r->send_cqe;
  346. r->send_wr.sg_list = &r->send_sge;
  347. r->send_wr.num_sge = 1;
  348. r->send_wr.send_flags = IB_SEND_SIGNALED;
  349. /* Data In / RDMA READ */
  350. r->read_cqe.done = nvmet_rdma_read_data_done;
  351. /* Data Out / RDMA WRITE */
  352. r->write_cqe.done = nvmet_rdma_write_data_done;
  353. r->tag = tag;
  354. return 0;
  355. out_free_rsp:
  356. kfree(r->req.cqe);
  357. out:
  358. return -ENOMEM;
  359. }
  360. static void nvmet_rdma_free_rsp(struct nvmet_rdma_device *ndev,
  361. struct nvmet_rdma_rsp *r)
  362. {
  363. ib_dma_unmap_single(ndev->device, r->send_sge.addr,
  364. sizeof(*r->req.cqe), DMA_TO_DEVICE);
  365. kfree(r->req.cqe);
  366. }
  367. static int
  368. nvmet_rdma_alloc_rsps(struct nvmet_rdma_queue *queue)
  369. {
  370. struct nvmet_rdma_device *ndev = queue->dev;
  371. int nr_rsps = queue->recv_queue_size * 2;
  372. int ret = -ENOMEM, i;
  373. if (sbitmap_init_node(&queue->rsp_tags, nr_rsps, -1, GFP_KERNEL,
  374. NUMA_NO_NODE, false, true))
  375. goto out;
  376. queue->rsps = kcalloc(nr_rsps, sizeof(struct nvmet_rdma_rsp),
  377. GFP_KERNEL);
  378. if (!queue->rsps)
  379. goto out_free_sbitmap;
  380. for (i = 0; i < nr_rsps; i++) {
  381. struct nvmet_rdma_rsp *rsp = &queue->rsps[i];
  382. ret = nvmet_rdma_alloc_rsp(ndev, rsp, i);
  383. if (ret)
  384. goto out_free;
  385. }
  386. return 0;
  387. out_free:
  388. while (--i >= 0)
  389. nvmet_rdma_free_rsp(ndev, &queue->rsps[i]);
  390. kfree(queue->rsps);
  391. out_free_sbitmap:
  392. sbitmap_free(&queue->rsp_tags);
  393. out:
  394. return ret;
  395. }
  396. static void nvmet_rdma_free_rsps(struct nvmet_rdma_queue *queue)
  397. {
  398. struct nvmet_rdma_device *ndev = queue->dev;
  399. int i, nr_rsps = queue->recv_queue_size * 2;
  400. for (i = 0; i < nr_rsps; i++)
  401. nvmet_rdma_free_rsp(ndev, &queue->rsps[i]);
  402. kfree(queue->rsps);
  403. sbitmap_free(&queue->rsp_tags);
  404. }
  405. static int nvmet_rdma_post_recv(struct nvmet_rdma_device *ndev,
  406. struct nvmet_rdma_cmd *cmd)
  407. {
  408. int ret;
  409. ib_dma_sync_single_for_device(ndev->device,
  410. cmd->sge[0].addr, cmd->sge[0].length,
  411. DMA_FROM_DEVICE);
  412. if (cmd->nsrq)
  413. ret = ib_post_srq_recv(cmd->nsrq->srq, &cmd->wr, NULL);
  414. else
  415. ret = ib_post_recv(cmd->queue->qp, &cmd->wr, NULL);
  416. if (unlikely(ret))
  417. pr_err("post_recv cmd failed\n");
  418. return ret;
  419. }
  420. static void nvmet_rdma_process_wr_wait_list(struct nvmet_rdma_queue *queue)
  421. {
  422. spin_lock(&queue->rsp_wr_wait_lock);
  423. while (!list_empty(&queue->rsp_wr_wait_list)) {
  424. struct nvmet_rdma_rsp *rsp;
  425. bool ret;
  426. rsp = list_entry(queue->rsp_wr_wait_list.next,
  427. struct nvmet_rdma_rsp, wait_list);
  428. list_del(&rsp->wait_list);
  429. spin_unlock(&queue->rsp_wr_wait_lock);
  430. ret = nvmet_rdma_execute_command(rsp);
  431. spin_lock(&queue->rsp_wr_wait_lock);
  432. if (!ret) {
  433. list_add(&rsp->wait_list, &queue->rsp_wr_wait_list);
  434. break;
  435. }
  436. }
  437. spin_unlock(&queue->rsp_wr_wait_lock);
  438. }
  439. static u16 nvmet_rdma_check_pi_status(struct ib_mr *sig_mr)
  440. {
  441. struct ib_mr_status mr_status;
  442. int ret;
  443. u16 status = 0;
  444. ret = ib_check_mr_status(sig_mr, IB_MR_CHECK_SIG_STATUS, &mr_status);
  445. if (ret) {
  446. pr_err("ib_check_mr_status failed, ret %d\n", ret);
  447. return NVME_SC_INVALID_PI;
  448. }
  449. if (mr_status.fail_status & IB_MR_CHECK_SIG_STATUS) {
  450. switch (mr_status.sig_err.err_type) {
  451. case IB_SIG_BAD_GUARD:
  452. status = NVME_SC_GUARD_CHECK;
  453. break;
  454. case IB_SIG_BAD_REFTAG:
  455. status = NVME_SC_REFTAG_CHECK;
  456. break;
  457. case IB_SIG_BAD_APPTAG:
  458. status = NVME_SC_APPTAG_CHECK;
  459. break;
  460. }
  461. pr_err("PI error found type %d expected 0x%x vs actual 0x%x\n",
  462. mr_status.sig_err.err_type,
  463. mr_status.sig_err.expected,
  464. mr_status.sig_err.actual);
  465. }
  466. return status;
  467. }
  468. static void nvmet_rdma_set_sig_domain(struct blk_integrity *bi,
  469. struct nvme_command *cmd, struct ib_sig_domain *domain,
  470. u16 control, u8 pi_type)
  471. {
  472. domain->sig_type = IB_SIG_TYPE_T10_DIF;
  473. domain->sig.dif.bg_type = IB_T10DIF_CRC;
  474. domain->sig.dif.pi_interval = 1 << bi->interval_exp;
  475. domain->sig.dif.ref_tag = le32_to_cpu(cmd->rw.reftag);
  476. if (control & NVME_RW_PRINFO_PRCHK_REF)
  477. domain->sig.dif.ref_remap = true;
  478. domain->sig.dif.app_tag = le16_to_cpu(cmd->rw.lbat);
  479. domain->sig.dif.apptag_check_mask = le16_to_cpu(cmd->rw.lbatm);
  480. domain->sig.dif.app_escape = true;
  481. if (pi_type == NVME_NS_DPS_PI_TYPE3)
  482. domain->sig.dif.ref_escape = true;
  483. }
  484. static void nvmet_rdma_set_sig_attrs(struct nvmet_req *req,
  485. struct ib_sig_attrs *sig_attrs)
  486. {
  487. struct nvme_command *cmd = req->cmd;
  488. u16 control = le16_to_cpu(cmd->rw.control);
  489. u8 pi_type = req->ns->pi_type;
  490. struct blk_integrity *bi;
  491. bi = bdev_get_integrity(req->ns->bdev);
  492. memset(sig_attrs, 0, sizeof(*sig_attrs));
  493. if (control & NVME_RW_PRINFO_PRACT) {
  494. /* for WRITE_INSERT/READ_STRIP no wire domain */
  495. sig_attrs->wire.sig_type = IB_SIG_TYPE_NONE;
  496. nvmet_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control,
  497. pi_type);
  498. /* Clear the PRACT bit since HCA will generate/verify the PI */
  499. control &= ~NVME_RW_PRINFO_PRACT;
  500. cmd->rw.control = cpu_to_le16(control);
  501. /* PI is added by the HW */
  502. req->transfer_len += req->metadata_len;
  503. } else {
  504. /* for WRITE_PASS/READ_PASS both wire/memory domains exist */
  505. nvmet_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control,
  506. pi_type);
  507. nvmet_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control,
  508. pi_type);
  509. }
  510. if (control & NVME_RW_PRINFO_PRCHK_REF)
  511. sig_attrs->check_mask |= IB_SIG_CHECK_REFTAG;
  512. if (control & NVME_RW_PRINFO_PRCHK_GUARD)
  513. sig_attrs->check_mask |= IB_SIG_CHECK_GUARD;
  514. if (control & NVME_RW_PRINFO_PRCHK_APP)
  515. sig_attrs->check_mask |= IB_SIG_CHECK_APPTAG;
  516. }
  517. static int nvmet_rdma_rw_ctx_init(struct nvmet_rdma_rsp *rsp, u64 addr, u32 key,
  518. struct ib_sig_attrs *sig_attrs)
  519. {
  520. struct rdma_cm_id *cm_id = rsp->queue->cm_id;
  521. struct nvmet_req *req = &rsp->req;
  522. int ret;
  523. if (req->metadata_len)
  524. ret = rdma_rw_ctx_signature_init(&rsp->rw, cm_id->qp,
  525. cm_id->port_num, req->sg, req->sg_cnt,
  526. req->metadata_sg, req->metadata_sg_cnt, sig_attrs,
  527. addr, key, nvmet_data_dir(req));
  528. else
  529. ret = rdma_rw_ctx_init(&rsp->rw, cm_id->qp, cm_id->port_num,
  530. req->sg, req->sg_cnt, 0, addr, key,
  531. nvmet_data_dir(req));
  532. return ret;
  533. }
  534. static void nvmet_rdma_rw_ctx_destroy(struct nvmet_rdma_rsp *rsp)
  535. {
  536. struct rdma_cm_id *cm_id = rsp->queue->cm_id;
  537. struct nvmet_req *req = &rsp->req;
  538. if (req->metadata_len)
  539. rdma_rw_ctx_destroy_signature(&rsp->rw, cm_id->qp,
  540. cm_id->port_num, req->sg, req->sg_cnt,
  541. req->metadata_sg, req->metadata_sg_cnt,
  542. nvmet_data_dir(req));
  543. else
  544. rdma_rw_ctx_destroy(&rsp->rw, cm_id->qp, cm_id->port_num,
  545. req->sg, req->sg_cnt, nvmet_data_dir(req));
  546. }
  547. static void nvmet_rdma_release_rsp(struct nvmet_rdma_rsp *rsp)
  548. {
  549. struct nvmet_rdma_queue *queue = rsp->queue;
  550. atomic_add(1 + rsp->n_rdma, &queue->sq_wr_avail);
  551. if (rsp->n_rdma)
  552. nvmet_rdma_rw_ctx_destroy(rsp);
  553. if (rsp->req.sg != rsp->cmd->inline_sg)
  554. nvmet_req_free_sgls(&rsp->req);
  555. if (unlikely(!list_empty_careful(&queue->rsp_wr_wait_list)))
  556. nvmet_rdma_process_wr_wait_list(queue);
  557. nvmet_rdma_put_rsp(rsp);
  558. }
  559. static void nvmet_rdma_error_comp(struct nvmet_rdma_queue *queue)
  560. {
  561. if (queue->nvme_sq.ctrl) {
  562. nvmet_ctrl_fatal_error(queue->nvme_sq.ctrl);
  563. } else {
  564. /*
  565. * we didn't setup the controller yet in case
  566. * of admin connect error, just disconnect and
  567. * cleanup the queue
  568. */
  569. nvmet_rdma_queue_disconnect(queue);
  570. }
  571. }
  572. static void nvmet_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
  573. {
  574. struct nvmet_rdma_rsp *rsp =
  575. container_of(wc->wr_cqe, struct nvmet_rdma_rsp, send_cqe);
  576. struct nvmet_rdma_queue *queue = wc->qp->qp_context;
  577. nvmet_rdma_release_rsp(rsp);
  578. if (unlikely(wc->status != IB_WC_SUCCESS &&
  579. wc->status != IB_WC_WR_FLUSH_ERR)) {
  580. pr_err("SEND for CQE 0x%p failed with status %s (%d).\n",
  581. wc->wr_cqe, ib_wc_status_msg(wc->status), wc->status);
  582. nvmet_rdma_error_comp(queue);
  583. }
  584. }
  585. static void nvmet_rdma_queue_response(struct nvmet_req *req)
  586. {
  587. struct nvmet_rdma_rsp *rsp =
  588. container_of(req, struct nvmet_rdma_rsp, req);
  589. struct rdma_cm_id *cm_id = rsp->queue->cm_id;
  590. struct ib_send_wr *first_wr;
  591. if (rsp->invalidate_rkey) {
  592. rsp->send_wr.opcode = IB_WR_SEND_WITH_INV;
  593. rsp->send_wr.ex.invalidate_rkey = rsp->invalidate_rkey;
  594. } else {
  595. rsp->send_wr.opcode = IB_WR_SEND;
  596. }
  597. if (nvmet_rdma_need_data_out(rsp)) {
  598. if (rsp->req.metadata_len)
  599. first_wr = rdma_rw_ctx_wrs(&rsp->rw, cm_id->qp,
  600. cm_id->port_num, &rsp->write_cqe, NULL);
  601. else
  602. first_wr = rdma_rw_ctx_wrs(&rsp->rw, cm_id->qp,
  603. cm_id->port_num, NULL, &rsp->send_wr);
  604. } else {
  605. first_wr = &rsp->send_wr;
  606. }
  607. nvmet_rdma_post_recv(rsp->queue->dev, rsp->cmd);
  608. ib_dma_sync_single_for_device(rsp->queue->dev->device,
  609. rsp->send_sge.addr, rsp->send_sge.length,
  610. DMA_TO_DEVICE);
  611. if (unlikely(ib_post_send(cm_id->qp, first_wr, NULL))) {
  612. pr_err("sending cmd response failed\n");
  613. nvmet_rdma_release_rsp(rsp);
  614. }
  615. }
  616. static void nvmet_rdma_read_data_done(struct ib_cq *cq, struct ib_wc *wc)
  617. {
  618. struct nvmet_rdma_rsp *rsp =
  619. container_of(wc->wr_cqe, struct nvmet_rdma_rsp, read_cqe);
  620. struct nvmet_rdma_queue *queue = wc->qp->qp_context;
  621. u16 status = 0;
  622. WARN_ON(rsp->n_rdma <= 0);
  623. atomic_add(rsp->n_rdma, &queue->sq_wr_avail);
  624. rsp->n_rdma = 0;
  625. if (unlikely(wc->status != IB_WC_SUCCESS)) {
  626. nvmet_rdma_rw_ctx_destroy(rsp);
  627. nvmet_req_uninit(&rsp->req);
  628. nvmet_rdma_release_rsp(rsp);
  629. if (wc->status != IB_WC_WR_FLUSH_ERR) {
  630. pr_info("RDMA READ for CQE 0x%p failed with status %s (%d).\n",
  631. wc->wr_cqe, ib_wc_status_msg(wc->status), wc->status);
  632. nvmet_rdma_error_comp(queue);
  633. }
  634. return;
  635. }
  636. if (rsp->req.metadata_len)
  637. status = nvmet_rdma_check_pi_status(rsp->rw.reg->mr);
  638. nvmet_rdma_rw_ctx_destroy(rsp);
  639. if (unlikely(status))
  640. nvmet_req_complete(&rsp->req, status);
  641. else
  642. rsp->req.execute(&rsp->req);
  643. }
  644. static void nvmet_rdma_write_data_done(struct ib_cq *cq, struct ib_wc *wc)
  645. {
  646. struct nvmet_rdma_rsp *rsp =
  647. container_of(wc->wr_cqe, struct nvmet_rdma_rsp, write_cqe);
  648. struct nvmet_rdma_queue *queue = wc->qp->qp_context;
  649. struct rdma_cm_id *cm_id = rsp->queue->cm_id;
  650. u16 status;
  651. if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY))
  652. return;
  653. WARN_ON(rsp->n_rdma <= 0);
  654. atomic_add(rsp->n_rdma, &queue->sq_wr_avail);
  655. rsp->n_rdma = 0;
  656. if (unlikely(wc->status != IB_WC_SUCCESS)) {
  657. nvmet_rdma_rw_ctx_destroy(rsp);
  658. nvmet_req_uninit(&rsp->req);
  659. nvmet_rdma_release_rsp(rsp);
  660. if (wc->status != IB_WC_WR_FLUSH_ERR) {
  661. pr_info("RDMA WRITE for CQE failed with status %s (%d).\n",
  662. ib_wc_status_msg(wc->status), wc->status);
  663. nvmet_rdma_error_comp(queue);
  664. }
  665. return;
  666. }
  667. /*
  668. * Upon RDMA completion check the signature status
  669. * - if succeeded send good NVMe response
  670. * - if failed send bad NVMe response with appropriate error
  671. */
  672. status = nvmet_rdma_check_pi_status(rsp->rw.reg->mr);
  673. if (unlikely(status))
  674. rsp->req.cqe->status = cpu_to_le16(status << 1);
  675. nvmet_rdma_rw_ctx_destroy(rsp);
  676. if (unlikely(ib_post_send(cm_id->qp, &rsp->send_wr, NULL))) {
  677. pr_err("sending cmd response failed\n");
  678. nvmet_rdma_release_rsp(rsp);
  679. }
  680. }
  681. static void nvmet_rdma_use_inline_sg(struct nvmet_rdma_rsp *rsp, u32 len,
  682. u64 off)
  683. {
  684. int sg_count = num_pages(len);
  685. struct scatterlist *sg;
  686. int i;
  687. sg = rsp->cmd->inline_sg;
  688. for (i = 0; i < sg_count; i++, sg++) {
  689. if (i < sg_count - 1)
  690. sg_unmark_end(sg);
  691. else
  692. sg_mark_end(sg);
  693. sg->offset = off;
  694. sg->length = min_t(int, len, PAGE_SIZE - off);
  695. len -= sg->length;
  696. if (!i)
  697. off = 0;
  698. }
  699. rsp->req.sg = rsp->cmd->inline_sg;
  700. rsp->req.sg_cnt = sg_count;
  701. }
  702. static u16 nvmet_rdma_map_sgl_inline(struct nvmet_rdma_rsp *rsp)
  703. {
  704. struct nvme_sgl_desc *sgl = &rsp->req.cmd->common.dptr.sgl;
  705. u64 off = le64_to_cpu(sgl->addr);
  706. u32 len = le32_to_cpu(sgl->length);
  707. if (!nvme_is_write(rsp->req.cmd)) {
  708. rsp->req.error_loc =
  709. offsetof(struct nvme_common_command, opcode);
  710. return NVME_SC_INVALID_FIELD | NVME_STATUS_DNR;
  711. }
  712. if (off + len > rsp->queue->dev->inline_data_size) {
  713. pr_err("invalid inline data offset!\n");
  714. return NVME_SC_SGL_INVALID_OFFSET | NVME_STATUS_DNR;
  715. }
  716. /* no data command? */
  717. if (!len)
  718. return 0;
  719. nvmet_rdma_use_inline_sg(rsp, len, off);
  720. rsp->flags |= NVMET_RDMA_REQ_INLINE_DATA;
  721. rsp->req.transfer_len += len;
  722. return 0;
  723. }
  724. static u16 nvmet_rdma_map_sgl_keyed(struct nvmet_rdma_rsp *rsp,
  725. struct nvme_keyed_sgl_desc *sgl, bool invalidate)
  726. {
  727. u64 addr = le64_to_cpu(sgl->addr);
  728. u32 key = get_unaligned_le32(sgl->key);
  729. struct ib_sig_attrs sig_attrs;
  730. int ret;
  731. rsp->req.transfer_len = get_unaligned_le24(sgl->length);
  732. /* no data command? */
  733. if (!rsp->req.transfer_len)
  734. return 0;
  735. if (rsp->req.metadata_len)
  736. nvmet_rdma_set_sig_attrs(&rsp->req, &sig_attrs);
  737. ret = nvmet_req_alloc_sgls(&rsp->req);
  738. if (unlikely(ret < 0))
  739. goto error_out;
  740. ret = nvmet_rdma_rw_ctx_init(rsp, addr, key, &sig_attrs);
  741. if (unlikely(ret < 0))
  742. goto error_out;
  743. rsp->n_rdma += ret;
  744. if (invalidate)
  745. rsp->invalidate_rkey = key;
  746. return 0;
  747. error_out:
  748. rsp->req.transfer_len = 0;
  749. return NVME_SC_INTERNAL;
  750. }
  751. static u16 nvmet_rdma_map_sgl(struct nvmet_rdma_rsp *rsp)
  752. {
  753. struct nvme_keyed_sgl_desc *sgl = &rsp->req.cmd->common.dptr.ksgl;
  754. switch (sgl->type >> 4) {
  755. case NVME_SGL_FMT_DATA_DESC:
  756. switch (sgl->type & 0xf) {
  757. case NVME_SGL_FMT_OFFSET:
  758. return nvmet_rdma_map_sgl_inline(rsp);
  759. default:
  760. pr_err("invalid SGL subtype: %#x\n", sgl->type);
  761. rsp->req.error_loc =
  762. offsetof(struct nvme_common_command, dptr);
  763. return NVME_SC_INVALID_FIELD | NVME_STATUS_DNR;
  764. }
  765. case NVME_KEY_SGL_FMT_DATA_DESC:
  766. switch (sgl->type & 0xf) {
  767. case NVME_SGL_FMT_ADDRESS | NVME_SGL_FMT_INVALIDATE:
  768. return nvmet_rdma_map_sgl_keyed(rsp, sgl, true);
  769. case NVME_SGL_FMT_ADDRESS:
  770. return nvmet_rdma_map_sgl_keyed(rsp, sgl, false);
  771. default:
  772. pr_err("invalid SGL subtype: %#x\n", sgl->type);
  773. rsp->req.error_loc =
  774. offsetof(struct nvme_common_command, dptr);
  775. return NVME_SC_INVALID_FIELD | NVME_STATUS_DNR;
  776. }
  777. default:
  778. pr_err("invalid SGL type: %#x\n", sgl->type);
  779. rsp->req.error_loc = offsetof(struct nvme_common_command, dptr);
  780. return NVME_SC_SGL_INVALID_TYPE | NVME_STATUS_DNR;
  781. }
  782. }
  783. static bool nvmet_rdma_execute_command(struct nvmet_rdma_rsp *rsp)
  784. {
  785. struct nvmet_rdma_queue *queue = rsp->queue;
  786. if (unlikely(atomic_sub_return(1 + rsp->n_rdma,
  787. &queue->sq_wr_avail) < 0)) {
  788. pr_debug("IB send queue full (needed %d): queue %u cntlid %u\n",
  789. 1 + rsp->n_rdma, queue->idx,
  790. queue->nvme_sq.ctrl->cntlid);
  791. atomic_add(1 + rsp->n_rdma, &queue->sq_wr_avail);
  792. return false;
  793. }
  794. if (nvmet_rdma_need_data_in(rsp)) {
  795. if (rdma_rw_ctx_post(&rsp->rw, queue->qp,
  796. queue->cm_id->port_num, &rsp->read_cqe, NULL))
  797. nvmet_req_complete(&rsp->req, NVME_SC_DATA_XFER_ERROR);
  798. } else {
  799. rsp->req.execute(&rsp->req);
  800. }
  801. return true;
  802. }
  803. static void nvmet_rdma_handle_command(struct nvmet_rdma_queue *queue,
  804. struct nvmet_rdma_rsp *cmd)
  805. {
  806. u16 status;
  807. ib_dma_sync_single_for_cpu(queue->dev->device,
  808. cmd->cmd->sge[0].addr, cmd->cmd->sge[0].length,
  809. DMA_FROM_DEVICE);
  810. ib_dma_sync_single_for_cpu(queue->dev->device,
  811. cmd->send_sge.addr, cmd->send_sge.length,
  812. DMA_TO_DEVICE);
  813. if (!nvmet_req_init(&cmd->req, &queue->nvme_cq,
  814. &queue->nvme_sq, &nvmet_rdma_ops))
  815. return;
  816. status = nvmet_rdma_map_sgl(cmd);
  817. if (status)
  818. goto out_err;
  819. if (unlikely(!nvmet_rdma_execute_command(cmd))) {
  820. spin_lock(&queue->rsp_wr_wait_lock);
  821. list_add_tail(&cmd->wait_list, &queue->rsp_wr_wait_list);
  822. spin_unlock(&queue->rsp_wr_wait_lock);
  823. }
  824. return;
  825. out_err:
  826. nvmet_req_complete(&cmd->req, status);
  827. }
  828. static bool nvmet_rdma_recv_not_live(struct nvmet_rdma_queue *queue,
  829. struct nvmet_rdma_rsp *rsp)
  830. {
  831. unsigned long flags;
  832. bool ret = true;
  833. spin_lock_irqsave(&queue->state_lock, flags);
  834. /*
  835. * recheck queue state is not live to prevent a race condition
  836. * with RDMA_CM_EVENT_ESTABLISHED handler.
  837. */
  838. if (queue->state == NVMET_RDMA_Q_LIVE)
  839. ret = false;
  840. else if (queue->state == NVMET_RDMA_Q_CONNECTING)
  841. list_add_tail(&rsp->wait_list, &queue->rsp_wait_list);
  842. else
  843. nvmet_rdma_put_rsp(rsp);
  844. spin_unlock_irqrestore(&queue->state_lock, flags);
  845. return ret;
  846. }
  847. static void nvmet_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
  848. {
  849. struct nvmet_rdma_cmd *cmd =
  850. container_of(wc->wr_cqe, struct nvmet_rdma_cmd, cqe);
  851. struct nvmet_rdma_queue *queue = wc->qp->qp_context;
  852. struct nvmet_rdma_rsp *rsp;
  853. if (unlikely(wc->status != IB_WC_SUCCESS)) {
  854. if (wc->status != IB_WC_WR_FLUSH_ERR) {
  855. pr_err("RECV for CQE 0x%p failed with status %s (%d)\n",
  856. wc->wr_cqe, ib_wc_status_msg(wc->status),
  857. wc->status);
  858. nvmet_rdma_error_comp(queue);
  859. }
  860. return;
  861. }
  862. if (unlikely(wc->byte_len < sizeof(struct nvme_command))) {
  863. pr_err("Ctrl Fatal Error: capsule size less than 64 bytes\n");
  864. nvmet_rdma_error_comp(queue);
  865. return;
  866. }
  867. cmd->queue = queue;
  868. rsp = nvmet_rdma_get_rsp(queue);
  869. if (unlikely(!rsp)) {
  870. /*
  871. * we get here only under memory pressure,
  872. * silently drop and have the host retry
  873. * as we can't even fail it.
  874. */
  875. nvmet_rdma_post_recv(queue->dev, cmd);
  876. return;
  877. }
  878. rsp->queue = queue;
  879. rsp->cmd = cmd;
  880. rsp->flags = 0;
  881. rsp->req.cmd = cmd->nvme_cmd;
  882. rsp->req.port = queue->port;
  883. rsp->n_rdma = 0;
  884. rsp->invalidate_rkey = 0;
  885. if (unlikely(queue->state != NVMET_RDMA_Q_LIVE) &&
  886. nvmet_rdma_recv_not_live(queue, rsp))
  887. return;
  888. nvmet_rdma_handle_command(queue, rsp);
  889. }
  890. static void nvmet_rdma_destroy_srq(struct nvmet_rdma_srq *nsrq)
  891. {
  892. nvmet_rdma_free_cmds(nsrq->ndev, nsrq->cmds, nsrq->ndev->srq_size,
  893. false);
  894. ib_destroy_srq(nsrq->srq);
  895. kfree(nsrq);
  896. }
  897. static void nvmet_rdma_destroy_srqs(struct nvmet_rdma_device *ndev)
  898. {
  899. int i;
  900. if (!ndev->srqs)
  901. return;
  902. for (i = 0; i < ndev->srq_count; i++)
  903. nvmet_rdma_destroy_srq(ndev->srqs[i]);
  904. kfree(ndev->srqs);
  905. }
  906. static struct nvmet_rdma_srq *
  907. nvmet_rdma_init_srq(struct nvmet_rdma_device *ndev)
  908. {
  909. struct ib_srq_init_attr srq_attr = { NULL, };
  910. size_t srq_size = ndev->srq_size;
  911. struct nvmet_rdma_srq *nsrq;
  912. struct ib_srq *srq;
  913. int ret, i;
  914. nsrq = kzalloc(sizeof(*nsrq), GFP_KERNEL);
  915. if (!nsrq)
  916. return ERR_PTR(-ENOMEM);
  917. srq_attr.attr.max_wr = srq_size;
  918. srq_attr.attr.max_sge = 1 + ndev->inline_page_count;
  919. srq_attr.attr.srq_limit = 0;
  920. srq_attr.srq_type = IB_SRQT_BASIC;
  921. srq = ib_create_srq(ndev->pd, &srq_attr);
  922. if (IS_ERR(srq)) {
  923. ret = PTR_ERR(srq);
  924. goto out_free;
  925. }
  926. nsrq->cmds = nvmet_rdma_alloc_cmds(ndev, srq_size, false);
  927. if (IS_ERR(nsrq->cmds)) {
  928. ret = PTR_ERR(nsrq->cmds);
  929. goto out_destroy_srq;
  930. }
  931. nsrq->srq = srq;
  932. nsrq->ndev = ndev;
  933. for (i = 0; i < srq_size; i++) {
  934. nsrq->cmds[i].nsrq = nsrq;
  935. ret = nvmet_rdma_post_recv(ndev, &nsrq->cmds[i]);
  936. if (ret)
  937. goto out_free_cmds;
  938. }
  939. return nsrq;
  940. out_free_cmds:
  941. nvmet_rdma_free_cmds(ndev, nsrq->cmds, srq_size, false);
  942. out_destroy_srq:
  943. ib_destroy_srq(srq);
  944. out_free:
  945. kfree(nsrq);
  946. return ERR_PTR(ret);
  947. }
  948. static int nvmet_rdma_init_srqs(struct nvmet_rdma_device *ndev)
  949. {
  950. int i, ret;
  951. if (!ndev->device->attrs.max_srq_wr || !ndev->device->attrs.max_srq) {
  952. /*
  953. * If SRQs aren't supported we just go ahead and use normal
  954. * non-shared receive queues.
  955. */
  956. pr_info("SRQ requested but not supported.\n");
  957. return 0;
  958. }
  959. ndev->srq_size = min(ndev->device->attrs.max_srq_wr,
  960. nvmet_rdma_srq_size);
  961. ndev->srq_count = min(ndev->device->num_comp_vectors,
  962. ndev->device->attrs.max_srq);
  963. ndev->srqs = kcalloc(ndev->srq_count, sizeof(*ndev->srqs), GFP_KERNEL);
  964. if (!ndev->srqs)
  965. return -ENOMEM;
  966. for (i = 0; i < ndev->srq_count; i++) {
  967. ndev->srqs[i] = nvmet_rdma_init_srq(ndev);
  968. if (IS_ERR(ndev->srqs[i])) {
  969. ret = PTR_ERR(ndev->srqs[i]);
  970. goto err_srq;
  971. }
  972. }
  973. return 0;
  974. err_srq:
  975. while (--i >= 0)
  976. nvmet_rdma_destroy_srq(ndev->srqs[i]);
  977. kfree(ndev->srqs);
  978. return ret;
  979. }
  980. static void nvmet_rdma_free_dev(struct kref *ref)
  981. {
  982. struct nvmet_rdma_device *ndev =
  983. container_of(ref, struct nvmet_rdma_device, ref);
  984. mutex_lock(&device_list_mutex);
  985. list_del(&ndev->entry);
  986. mutex_unlock(&device_list_mutex);
  987. nvmet_rdma_destroy_srqs(ndev);
  988. ib_dealloc_pd(ndev->pd);
  989. kfree(ndev);
  990. }
  991. static struct nvmet_rdma_device *
  992. nvmet_rdma_find_get_device(struct rdma_cm_id *cm_id)
  993. {
  994. struct nvmet_rdma_port *port = cm_id->context;
  995. struct nvmet_port *nport = port->nport;
  996. struct nvmet_rdma_device *ndev;
  997. int inline_page_count;
  998. int inline_sge_count;
  999. int ret;
  1000. mutex_lock(&device_list_mutex);
  1001. list_for_each_entry(ndev, &device_list, entry) {
  1002. if (ndev->device->node_guid == cm_id->device->node_guid &&
  1003. kref_get_unless_zero(&ndev->ref))
  1004. goto out_unlock;
  1005. }
  1006. ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
  1007. if (!ndev)
  1008. goto out_err;
  1009. inline_page_count = num_pages(nport->inline_data_size);
  1010. inline_sge_count = max(cm_id->device->attrs.max_sge_rd,
  1011. cm_id->device->attrs.max_recv_sge) - 1;
  1012. if (inline_page_count > inline_sge_count) {
  1013. pr_warn("inline_data_size %d cannot be supported by device %s. Reducing to %lu.\n",
  1014. nport->inline_data_size, cm_id->device->name,
  1015. inline_sge_count * PAGE_SIZE);
  1016. nport->inline_data_size = inline_sge_count * PAGE_SIZE;
  1017. inline_page_count = inline_sge_count;
  1018. }
  1019. ndev->inline_data_size = nport->inline_data_size;
  1020. ndev->inline_page_count = inline_page_count;
  1021. if (nport->pi_enable && !(cm_id->device->attrs.kernel_cap_flags &
  1022. IBK_INTEGRITY_HANDOVER)) {
  1023. pr_warn("T10-PI is not supported by device %s. Disabling it\n",
  1024. cm_id->device->name);
  1025. nport->pi_enable = false;
  1026. }
  1027. ndev->device = cm_id->device;
  1028. kref_init(&ndev->ref);
  1029. ndev->pd = ib_alloc_pd(ndev->device, 0);
  1030. if (IS_ERR(ndev->pd))
  1031. goto out_free_dev;
  1032. if (nvmet_rdma_use_srq) {
  1033. ret = nvmet_rdma_init_srqs(ndev);
  1034. if (ret)
  1035. goto out_free_pd;
  1036. }
  1037. list_add(&ndev->entry, &device_list);
  1038. out_unlock:
  1039. mutex_unlock(&device_list_mutex);
  1040. pr_debug("added %s.\n", ndev->device->name);
  1041. return ndev;
  1042. out_free_pd:
  1043. ib_dealloc_pd(ndev->pd);
  1044. out_free_dev:
  1045. kfree(ndev);
  1046. out_err:
  1047. mutex_unlock(&device_list_mutex);
  1048. return NULL;
  1049. }
  1050. static int nvmet_rdma_create_queue_ib(struct nvmet_rdma_queue *queue)
  1051. {
  1052. struct ib_qp_init_attr qp_attr = { };
  1053. struct nvmet_rdma_device *ndev = queue->dev;
  1054. int nr_cqe, ret, i, factor;
  1055. /*
  1056. * Reserve CQ slots for RECV + RDMA_READ/RDMA_WRITE + RDMA_SEND.
  1057. */
  1058. nr_cqe = queue->recv_queue_size + 2 * queue->send_queue_size;
  1059. queue->cq = ib_cq_pool_get(ndev->device, nr_cqe + 1,
  1060. queue->comp_vector, IB_POLL_WORKQUEUE);
  1061. if (IS_ERR(queue->cq)) {
  1062. ret = PTR_ERR(queue->cq);
  1063. pr_err("failed to create CQ cqe= %d ret= %d\n",
  1064. nr_cqe + 1, ret);
  1065. goto out;
  1066. }
  1067. qp_attr.qp_context = queue;
  1068. qp_attr.event_handler = nvmet_rdma_qp_event;
  1069. qp_attr.send_cq = queue->cq;
  1070. qp_attr.recv_cq = queue->cq;
  1071. qp_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
  1072. qp_attr.qp_type = IB_QPT_RC;
  1073. /* +1 for drain */
  1074. qp_attr.cap.max_send_wr = queue->send_queue_size + 1;
  1075. factor = rdma_rw_mr_factor(ndev->device, queue->cm_id->port_num,
  1076. 1 << NVMET_RDMA_MAX_MDTS);
  1077. qp_attr.cap.max_rdma_ctxs = queue->send_queue_size * factor;
  1078. qp_attr.cap.max_send_sge = max(ndev->device->attrs.max_sge_rd,
  1079. ndev->device->attrs.max_send_sge);
  1080. if (queue->nsrq) {
  1081. qp_attr.srq = queue->nsrq->srq;
  1082. } else {
  1083. /* +1 for drain */
  1084. qp_attr.cap.max_recv_wr = 1 + queue->recv_queue_size;
  1085. qp_attr.cap.max_recv_sge = 1 + ndev->inline_page_count;
  1086. }
  1087. if (queue->port->pi_enable && queue->host_qid)
  1088. qp_attr.create_flags |= IB_QP_CREATE_INTEGRITY_EN;
  1089. ret = rdma_create_qp(queue->cm_id, ndev->pd, &qp_attr);
  1090. if (ret) {
  1091. pr_err("failed to create_qp ret= %d\n", ret);
  1092. goto err_destroy_cq;
  1093. }
  1094. queue->qp = queue->cm_id->qp;
  1095. atomic_set(&queue->sq_wr_avail, qp_attr.cap.max_send_wr);
  1096. pr_debug("%s: max_cqe= %d max_sge= %d sq_size = %d cm_id= %p\n",
  1097. __func__, queue->cq->cqe, qp_attr.cap.max_send_sge,
  1098. qp_attr.cap.max_send_wr, queue->cm_id);
  1099. if (!queue->nsrq) {
  1100. for (i = 0; i < queue->recv_queue_size; i++) {
  1101. queue->cmds[i].queue = queue;
  1102. ret = nvmet_rdma_post_recv(ndev, &queue->cmds[i]);
  1103. if (ret)
  1104. goto err_destroy_qp;
  1105. }
  1106. }
  1107. out:
  1108. return ret;
  1109. err_destroy_qp:
  1110. rdma_destroy_qp(queue->cm_id);
  1111. err_destroy_cq:
  1112. ib_cq_pool_put(queue->cq, nr_cqe + 1);
  1113. goto out;
  1114. }
  1115. static void nvmet_rdma_destroy_queue_ib(struct nvmet_rdma_queue *queue)
  1116. {
  1117. ib_drain_qp(queue->qp);
  1118. if (queue->cm_id)
  1119. rdma_destroy_id(queue->cm_id);
  1120. ib_destroy_qp(queue->qp);
  1121. ib_cq_pool_put(queue->cq, queue->recv_queue_size + 2 *
  1122. queue->send_queue_size + 1);
  1123. }
  1124. static void nvmet_rdma_free_queue(struct nvmet_rdma_queue *queue)
  1125. {
  1126. pr_debug("freeing queue %d\n", queue->idx);
  1127. nvmet_sq_destroy(&queue->nvme_sq);
  1128. nvmet_rdma_destroy_queue_ib(queue);
  1129. if (!queue->nsrq) {
  1130. nvmet_rdma_free_cmds(queue->dev, queue->cmds,
  1131. queue->recv_queue_size,
  1132. !queue->host_qid);
  1133. }
  1134. nvmet_rdma_free_rsps(queue);
  1135. ida_free(&nvmet_rdma_queue_ida, queue->idx);
  1136. kfree(queue);
  1137. }
  1138. static void nvmet_rdma_release_queue_work(struct work_struct *w)
  1139. {
  1140. struct nvmet_rdma_queue *queue =
  1141. container_of(w, struct nvmet_rdma_queue, release_work);
  1142. struct nvmet_rdma_device *dev = queue->dev;
  1143. nvmet_rdma_free_queue(queue);
  1144. kref_put(&dev->ref, nvmet_rdma_free_dev);
  1145. }
  1146. static int
  1147. nvmet_rdma_parse_cm_connect_req(struct rdma_conn_param *conn,
  1148. struct nvmet_rdma_queue *queue)
  1149. {
  1150. struct nvme_rdma_cm_req *req;
  1151. req = (struct nvme_rdma_cm_req *)conn->private_data;
  1152. if (!req || conn->private_data_len == 0)
  1153. return NVME_RDMA_CM_INVALID_LEN;
  1154. if (le16_to_cpu(req->recfmt) != NVME_RDMA_CM_FMT_1_0)
  1155. return NVME_RDMA_CM_INVALID_RECFMT;
  1156. queue->host_qid = le16_to_cpu(req->qid);
  1157. /*
  1158. * req->hsqsize corresponds to our recv queue size plus 1
  1159. * req->hrqsize corresponds to our send queue size
  1160. */
  1161. queue->recv_queue_size = le16_to_cpu(req->hsqsize) + 1;
  1162. queue->send_queue_size = le16_to_cpu(req->hrqsize);
  1163. if (!queue->host_qid && queue->recv_queue_size > NVME_AQ_DEPTH)
  1164. return NVME_RDMA_CM_INVALID_HSQSIZE;
  1165. /* XXX: Should we enforce some kind of max for IO queues? */
  1166. return 0;
  1167. }
  1168. static int nvmet_rdma_cm_reject(struct rdma_cm_id *cm_id,
  1169. enum nvme_rdma_cm_status status)
  1170. {
  1171. struct nvme_rdma_cm_rej rej;
  1172. pr_debug("rejecting connect request: status %d (%s)\n",
  1173. status, nvme_rdma_cm_msg(status));
  1174. rej.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
  1175. rej.sts = cpu_to_le16(status);
  1176. return rdma_reject(cm_id, (void *)&rej, sizeof(rej),
  1177. IB_CM_REJ_CONSUMER_DEFINED);
  1178. }
  1179. static struct nvmet_rdma_queue *
  1180. nvmet_rdma_alloc_queue(struct nvmet_rdma_device *ndev,
  1181. struct rdma_cm_id *cm_id,
  1182. struct rdma_cm_event *event)
  1183. {
  1184. struct nvmet_rdma_port *port = cm_id->context;
  1185. struct nvmet_rdma_queue *queue;
  1186. int ret;
  1187. queue = kzalloc(sizeof(*queue), GFP_KERNEL);
  1188. if (!queue) {
  1189. ret = NVME_RDMA_CM_NO_RSC;
  1190. goto out_reject;
  1191. }
  1192. ret = nvmet_sq_init(&queue->nvme_sq);
  1193. if (ret) {
  1194. ret = NVME_RDMA_CM_NO_RSC;
  1195. goto out_free_queue;
  1196. }
  1197. ret = nvmet_rdma_parse_cm_connect_req(&event->param.conn, queue);
  1198. if (ret)
  1199. goto out_destroy_sq;
  1200. /*
  1201. * Schedules the actual release because calling rdma_destroy_id from
  1202. * inside a CM callback would trigger a deadlock. (great API design..)
  1203. */
  1204. INIT_WORK(&queue->release_work, nvmet_rdma_release_queue_work);
  1205. queue->dev = ndev;
  1206. queue->cm_id = cm_id;
  1207. queue->port = port->nport;
  1208. spin_lock_init(&queue->state_lock);
  1209. queue->state = NVMET_RDMA_Q_CONNECTING;
  1210. INIT_LIST_HEAD(&queue->rsp_wait_list);
  1211. INIT_LIST_HEAD(&queue->rsp_wr_wait_list);
  1212. spin_lock_init(&queue->rsp_wr_wait_lock);
  1213. INIT_LIST_HEAD(&queue->queue_list);
  1214. queue->idx = ida_alloc(&nvmet_rdma_queue_ida, GFP_KERNEL);
  1215. if (queue->idx < 0) {
  1216. ret = NVME_RDMA_CM_NO_RSC;
  1217. goto out_destroy_sq;
  1218. }
  1219. /*
  1220. * Spread the io queues across completion vectors,
  1221. * but still keep all admin queues on vector 0.
  1222. */
  1223. queue->comp_vector = !queue->host_qid ? 0 :
  1224. queue->idx % ndev->device->num_comp_vectors;
  1225. ret = nvmet_rdma_alloc_rsps(queue);
  1226. if (ret) {
  1227. ret = NVME_RDMA_CM_NO_RSC;
  1228. goto out_ida_remove;
  1229. }
  1230. if (ndev->srqs) {
  1231. queue->nsrq = ndev->srqs[queue->comp_vector % ndev->srq_count];
  1232. } else {
  1233. queue->cmds = nvmet_rdma_alloc_cmds(ndev,
  1234. queue->recv_queue_size,
  1235. !queue->host_qid);
  1236. if (IS_ERR(queue->cmds)) {
  1237. ret = NVME_RDMA_CM_NO_RSC;
  1238. goto out_free_responses;
  1239. }
  1240. }
  1241. ret = nvmet_rdma_create_queue_ib(queue);
  1242. if (ret) {
  1243. pr_err("%s: creating RDMA queue failed (%d).\n",
  1244. __func__, ret);
  1245. ret = NVME_RDMA_CM_NO_RSC;
  1246. goto out_free_cmds;
  1247. }
  1248. return queue;
  1249. out_free_cmds:
  1250. if (!queue->nsrq) {
  1251. nvmet_rdma_free_cmds(queue->dev, queue->cmds,
  1252. queue->recv_queue_size,
  1253. !queue->host_qid);
  1254. }
  1255. out_free_responses:
  1256. nvmet_rdma_free_rsps(queue);
  1257. out_ida_remove:
  1258. ida_free(&nvmet_rdma_queue_ida, queue->idx);
  1259. out_destroy_sq:
  1260. nvmet_sq_destroy(&queue->nvme_sq);
  1261. out_free_queue:
  1262. kfree(queue);
  1263. out_reject:
  1264. nvmet_rdma_cm_reject(cm_id, ret);
  1265. return NULL;
  1266. }
  1267. static void nvmet_rdma_qp_event(struct ib_event *event, void *priv)
  1268. {
  1269. struct nvmet_rdma_queue *queue = priv;
  1270. switch (event->event) {
  1271. case IB_EVENT_COMM_EST:
  1272. rdma_notify(queue->cm_id, event->event);
  1273. break;
  1274. case IB_EVENT_QP_LAST_WQE_REACHED:
  1275. pr_debug("received last WQE reached event for queue=0x%p\n",
  1276. queue);
  1277. break;
  1278. default:
  1279. pr_err("received IB QP event: %s (%d)\n",
  1280. ib_event_msg(event->event), event->event);
  1281. break;
  1282. }
  1283. }
  1284. static int nvmet_rdma_cm_accept(struct rdma_cm_id *cm_id,
  1285. struct nvmet_rdma_queue *queue,
  1286. struct rdma_conn_param *p)
  1287. {
  1288. struct rdma_conn_param param = { };
  1289. struct nvme_rdma_cm_rep priv = { };
  1290. int ret = -ENOMEM;
  1291. param.rnr_retry_count = 7;
  1292. param.flow_control = 1;
  1293. param.initiator_depth = min_t(u8, p->initiator_depth,
  1294. queue->dev->device->attrs.max_qp_init_rd_atom);
  1295. param.private_data = &priv;
  1296. param.private_data_len = sizeof(priv);
  1297. priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
  1298. priv.crqsize = cpu_to_le16(queue->recv_queue_size);
  1299. ret = rdma_accept(cm_id, &param);
  1300. if (ret)
  1301. pr_err("rdma_accept failed (error code = %d)\n", ret);
  1302. return ret;
  1303. }
  1304. static int nvmet_rdma_queue_connect(struct rdma_cm_id *cm_id,
  1305. struct rdma_cm_event *event)
  1306. {
  1307. struct nvmet_rdma_device *ndev;
  1308. struct nvmet_rdma_queue *queue;
  1309. int ret = -EINVAL;
  1310. ndev = nvmet_rdma_find_get_device(cm_id);
  1311. if (!ndev) {
  1312. nvmet_rdma_cm_reject(cm_id, NVME_RDMA_CM_NO_RSC);
  1313. return -ECONNREFUSED;
  1314. }
  1315. queue = nvmet_rdma_alloc_queue(ndev, cm_id, event);
  1316. if (!queue) {
  1317. ret = -ENOMEM;
  1318. goto put_device;
  1319. }
  1320. if (queue->host_qid == 0) {
  1321. struct nvmet_rdma_queue *q;
  1322. int pending = 0;
  1323. /* Check for pending controller teardown */
  1324. mutex_lock(&nvmet_rdma_queue_mutex);
  1325. list_for_each_entry(q, &nvmet_rdma_queue_list, queue_list) {
  1326. if (q->nvme_sq.ctrl == queue->nvme_sq.ctrl &&
  1327. q->state == NVMET_RDMA_Q_DISCONNECTING)
  1328. pending++;
  1329. }
  1330. mutex_unlock(&nvmet_rdma_queue_mutex);
  1331. if (pending > NVMET_RDMA_BACKLOG)
  1332. return NVME_SC_CONNECT_CTRL_BUSY;
  1333. }
  1334. ret = nvmet_rdma_cm_accept(cm_id, queue, &event->param.conn);
  1335. if (ret) {
  1336. /*
  1337. * Don't destroy the cm_id in free path, as we implicitly
  1338. * destroy the cm_id here with non-zero ret code.
  1339. */
  1340. queue->cm_id = NULL;
  1341. goto free_queue;
  1342. }
  1343. mutex_lock(&nvmet_rdma_queue_mutex);
  1344. list_add_tail(&queue->queue_list, &nvmet_rdma_queue_list);
  1345. mutex_unlock(&nvmet_rdma_queue_mutex);
  1346. return 0;
  1347. free_queue:
  1348. nvmet_rdma_free_queue(queue);
  1349. put_device:
  1350. kref_put(&ndev->ref, nvmet_rdma_free_dev);
  1351. return ret;
  1352. }
  1353. static void nvmet_rdma_queue_established(struct nvmet_rdma_queue *queue)
  1354. {
  1355. unsigned long flags;
  1356. spin_lock_irqsave(&queue->state_lock, flags);
  1357. if (queue->state != NVMET_RDMA_Q_CONNECTING) {
  1358. pr_warn("trying to establish a connected queue\n");
  1359. goto out_unlock;
  1360. }
  1361. queue->state = NVMET_RDMA_Q_LIVE;
  1362. while (!list_empty(&queue->rsp_wait_list)) {
  1363. struct nvmet_rdma_rsp *cmd;
  1364. cmd = list_first_entry(&queue->rsp_wait_list,
  1365. struct nvmet_rdma_rsp, wait_list);
  1366. list_del(&cmd->wait_list);
  1367. spin_unlock_irqrestore(&queue->state_lock, flags);
  1368. nvmet_rdma_handle_command(queue, cmd);
  1369. spin_lock_irqsave(&queue->state_lock, flags);
  1370. }
  1371. out_unlock:
  1372. spin_unlock_irqrestore(&queue->state_lock, flags);
  1373. }
  1374. static void __nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue)
  1375. {
  1376. bool disconnect = false;
  1377. unsigned long flags;
  1378. pr_debug("cm_id= %p queue->state= %d\n", queue->cm_id, queue->state);
  1379. spin_lock_irqsave(&queue->state_lock, flags);
  1380. switch (queue->state) {
  1381. case NVMET_RDMA_Q_CONNECTING:
  1382. while (!list_empty(&queue->rsp_wait_list)) {
  1383. struct nvmet_rdma_rsp *rsp;
  1384. rsp = list_first_entry(&queue->rsp_wait_list,
  1385. struct nvmet_rdma_rsp,
  1386. wait_list);
  1387. list_del(&rsp->wait_list);
  1388. nvmet_rdma_put_rsp(rsp);
  1389. }
  1390. fallthrough;
  1391. case NVMET_RDMA_Q_LIVE:
  1392. queue->state = NVMET_RDMA_Q_DISCONNECTING;
  1393. disconnect = true;
  1394. break;
  1395. case NVMET_RDMA_Q_DISCONNECTING:
  1396. break;
  1397. }
  1398. spin_unlock_irqrestore(&queue->state_lock, flags);
  1399. if (disconnect) {
  1400. rdma_disconnect(queue->cm_id);
  1401. queue_work(nvmet_wq, &queue->release_work);
  1402. }
  1403. }
  1404. static void nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue)
  1405. {
  1406. bool disconnect = false;
  1407. mutex_lock(&nvmet_rdma_queue_mutex);
  1408. if (!list_empty(&queue->queue_list)) {
  1409. list_del_init(&queue->queue_list);
  1410. disconnect = true;
  1411. }
  1412. mutex_unlock(&nvmet_rdma_queue_mutex);
  1413. if (disconnect)
  1414. __nvmet_rdma_queue_disconnect(queue);
  1415. }
  1416. static void nvmet_rdma_queue_connect_fail(struct rdma_cm_id *cm_id,
  1417. struct nvmet_rdma_queue *queue)
  1418. {
  1419. WARN_ON_ONCE(queue->state != NVMET_RDMA_Q_CONNECTING);
  1420. mutex_lock(&nvmet_rdma_queue_mutex);
  1421. if (!list_empty(&queue->queue_list))
  1422. list_del_init(&queue->queue_list);
  1423. mutex_unlock(&nvmet_rdma_queue_mutex);
  1424. pr_err("failed to connect queue %d\n", queue->idx);
  1425. queue_work(nvmet_wq, &queue->release_work);
  1426. }
  1427. /**
  1428. * nvmet_rdma_device_removal() - Handle RDMA device removal
  1429. * @cm_id: rdma_cm id, used for nvmet port
  1430. * @queue: nvmet rdma queue (cm id qp_context)
  1431. *
  1432. * DEVICE_REMOVAL event notifies us that the RDMA device is about
  1433. * to unplug. Note that this event can be generated on a normal
  1434. * queue cm_id and/or a device bound listener cm_id (where in this
  1435. * case queue will be null).
  1436. *
  1437. * We registered an ib_client to handle device removal for queues,
  1438. * so we only need to handle the listening port cm_ids. In this case
  1439. * we nullify the priv to prevent double cm_id destruction and destroying
  1440. * the cm_id implicitely by returning a non-zero rc to the callout.
  1441. */
  1442. static int nvmet_rdma_device_removal(struct rdma_cm_id *cm_id,
  1443. struct nvmet_rdma_queue *queue)
  1444. {
  1445. struct nvmet_rdma_port *port;
  1446. if (queue) {
  1447. /*
  1448. * This is a queue cm_id. we have registered
  1449. * an ib_client to handle queues removal
  1450. * so don't interfear and just return.
  1451. */
  1452. return 0;
  1453. }
  1454. port = cm_id->context;
  1455. /*
  1456. * This is a listener cm_id. Make sure that
  1457. * future remove_port won't invoke a double
  1458. * cm_id destroy. use atomic xchg to make sure
  1459. * we don't compete with remove_port.
  1460. */
  1461. if (xchg(&port->cm_id, NULL) != cm_id)
  1462. return 0;
  1463. /*
  1464. * We need to return 1 so that the core will destroy
  1465. * it's own ID. What a great API design..
  1466. */
  1467. return 1;
  1468. }
  1469. static int nvmet_rdma_cm_handler(struct rdma_cm_id *cm_id,
  1470. struct rdma_cm_event *event)
  1471. {
  1472. struct nvmet_rdma_queue *queue = NULL;
  1473. int ret = 0;
  1474. if (cm_id->qp)
  1475. queue = cm_id->qp->qp_context;
  1476. pr_debug("%s (%d): status %d id %p\n",
  1477. rdma_event_msg(event->event), event->event,
  1478. event->status, cm_id);
  1479. switch (event->event) {
  1480. case RDMA_CM_EVENT_CONNECT_REQUEST:
  1481. ret = nvmet_rdma_queue_connect(cm_id, event);
  1482. break;
  1483. case RDMA_CM_EVENT_ESTABLISHED:
  1484. nvmet_rdma_queue_established(queue);
  1485. break;
  1486. case RDMA_CM_EVENT_ADDR_CHANGE:
  1487. if (!queue) {
  1488. struct nvmet_rdma_port *port = cm_id->context;
  1489. queue_delayed_work(nvmet_wq, &port->repair_work, 0);
  1490. break;
  1491. }
  1492. fallthrough;
  1493. case RDMA_CM_EVENT_DISCONNECTED:
  1494. case RDMA_CM_EVENT_TIMEWAIT_EXIT:
  1495. nvmet_rdma_queue_disconnect(queue);
  1496. break;
  1497. case RDMA_CM_EVENT_DEVICE_REMOVAL:
  1498. ret = nvmet_rdma_device_removal(cm_id, queue);
  1499. break;
  1500. case RDMA_CM_EVENT_REJECTED:
  1501. pr_debug("Connection rejected: %s\n",
  1502. rdma_reject_msg(cm_id, event->status));
  1503. fallthrough;
  1504. case RDMA_CM_EVENT_UNREACHABLE:
  1505. case RDMA_CM_EVENT_CONNECT_ERROR:
  1506. nvmet_rdma_queue_connect_fail(cm_id, queue);
  1507. break;
  1508. default:
  1509. pr_err("received unrecognized RDMA CM event %d\n",
  1510. event->event);
  1511. break;
  1512. }
  1513. return ret;
  1514. }
  1515. static void nvmet_rdma_delete_ctrl(struct nvmet_ctrl *ctrl)
  1516. {
  1517. struct nvmet_rdma_queue *queue, *n;
  1518. mutex_lock(&nvmet_rdma_queue_mutex);
  1519. list_for_each_entry_safe(queue, n, &nvmet_rdma_queue_list, queue_list) {
  1520. if (queue->nvme_sq.ctrl != ctrl)
  1521. continue;
  1522. list_del_init(&queue->queue_list);
  1523. __nvmet_rdma_queue_disconnect(queue);
  1524. }
  1525. mutex_unlock(&nvmet_rdma_queue_mutex);
  1526. }
  1527. static void nvmet_rdma_destroy_port_queues(struct nvmet_rdma_port *port)
  1528. {
  1529. struct nvmet_rdma_queue *queue, *tmp;
  1530. struct nvmet_port *nport = port->nport;
  1531. mutex_lock(&nvmet_rdma_queue_mutex);
  1532. list_for_each_entry_safe(queue, tmp, &nvmet_rdma_queue_list,
  1533. queue_list) {
  1534. if (queue->port != nport)
  1535. continue;
  1536. list_del_init(&queue->queue_list);
  1537. __nvmet_rdma_queue_disconnect(queue);
  1538. }
  1539. mutex_unlock(&nvmet_rdma_queue_mutex);
  1540. }
  1541. static void nvmet_rdma_disable_port(struct nvmet_rdma_port *port)
  1542. {
  1543. struct rdma_cm_id *cm_id = xchg(&port->cm_id, NULL);
  1544. if (cm_id)
  1545. rdma_destroy_id(cm_id);
  1546. /*
  1547. * Destroy the remaining queues, which are not belong to any
  1548. * controller yet. Do it here after the RDMA-CM was destroyed
  1549. * guarantees that no new queue will be created.
  1550. */
  1551. nvmet_rdma_destroy_port_queues(port);
  1552. }
  1553. static int nvmet_rdma_enable_port(struct nvmet_rdma_port *port)
  1554. {
  1555. struct sockaddr *addr = (struct sockaddr *)&port->addr;
  1556. struct rdma_cm_id *cm_id;
  1557. int ret;
  1558. cm_id = rdma_create_id(&init_net, nvmet_rdma_cm_handler, port,
  1559. RDMA_PS_TCP, IB_QPT_RC);
  1560. if (IS_ERR(cm_id)) {
  1561. pr_err("CM ID creation failed\n");
  1562. return PTR_ERR(cm_id);
  1563. }
  1564. /*
  1565. * Allow both IPv4 and IPv6 sockets to bind a single port
  1566. * at the same time.
  1567. */
  1568. ret = rdma_set_afonly(cm_id, 1);
  1569. if (ret) {
  1570. pr_err("rdma_set_afonly failed (%d)\n", ret);
  1571. goto out_destroy_id;
  1572. }
  1573. ret = rdma_bind_addr(cm_id, addr);
  1574. if (ret) {
  1575. pr_err("binding CM ID to %pISpcs failed (%d)\n", addr, ret);
  1576. goto out_destroy_id;
  1577. }
  1578. ret = rdma_listen(cm_id, NVMET_RDMA_BACKLOG);
  1579. if (ret) {
  1580. pr_err("listening to %pISpcs failed (%d)\n", addr, ret);
  1581. goto out_destroy_id;
  1582. }
  1583. port->cm_id = cm_id;
  1584. return 0;
  1585. out_destroy_id:
  1586. rdma_destroy_id(cm_id);
  1587. return ret;
  1588. }
  1589. static void nvmet_rdma_repair_port_work(struct work_struct *w)
  1590. {
  1591. struct nvmet_rdma_port *port = container_of(to_delayed_work(w),
  1592. struct nvmet_rdma_port, repair_work);
  1593. int ret;
  1594. nvmet_rdma_disable_port(port);
  1595. ret = nvmet_rdma_enable_port(port);
  1596. if (ret)
  1597. queue_delayed_work(nvmet_wq, &port->repair_work, 5 * HZ);
  1598. }
  1599. static int nvmet_rdma_add_port(struct nvmet_port *nport)
  1600. {
  1601. struct nvmet_rdma_port *port;
  1602. __kernel_sa_family_t af;
  1603. int ret;
  1604. port = kzalloc(sizeof(*port), GFP_KERNEL);
  1605. if (!port)
  1606. return -ENOMEM;
  1607. nport->priv = port;
  1608. port->nport = nport;
  1609. INIT_DELAYED_WORK(&port->repair_work, nvmet_rdma_repair_port_work);
  1610. switch (nport->disc_addr.adrfam) {
  1611. case NVMF_ADDR_FAMILY_IP4:
  1612. af = AF_INET;
  1613. break;
  1614. case NVMF_ADDR_FAMILY_IP6:
  1615. af = AF_INET6;
  1616. break;
  1617. default:
  1618. pr_err("address family %d not supported\n",
  1619. nport->disc_addr.adrfam);
  1620. ret = -EINVAL;
  1621. goto out_free_port;
  1622. }
  1623. if (nport->inline_data_size < 0) {
  1624. nport->inline_data_size = NVMET_RDMA_DEFAULT_INLINE_DATA_SIZE;
  1625. } else if (nport->inline_data_size > NVMET_RDMA_MAX_INLINE_DATA_SIZE) {
  1626. pr_warn("inline_data_size %u is too large, reducing to %u\n",
  1627. nport->inline_data_size,
  1628. NVMET_RDMA_MAX_INLINE_DATA_SIZE);
  1629. nport->inline_data_size = NVMET_RDMA_MAX_INLINE_DATA_SIZE;
  1630. }
  1631. if (nport->max_queue_size < 0) {
  1632. nport->max_queue_size = NVME_RDMA_DEFAULT_QUEUE_SIZE;
  1633. } else if (nport->max_queue_size > NVME_RDMA_MAX_QUEUE_SIZE) {
  1634. pr_warn("max_queue_size %u is too large, reducing to %u\n",
  1635. nport->max_queue_size, NVME_RDMA_MAX_QUEUE_SIZE);
  1636. nport->max_queue_size = NVME_RDMA_MAX_QUEUE_SIZE;
  1637. }
  1638. ret = inet_pton_with_scope(&init_net, af, nport->disc_addr.traddr,
  1639. nport->disc_addr.trsvcid, &port->addr);
  1640. if (ret) {
  1641. pr_err("malformed ip/port passed: %s:%s\n",
  1642. nport->disc_addr.traddr, nport->disc_addr.trsvcid);
  1643. goto out_free_port;
  1644. }
  1645. ret = nvmet_rdma_enable_port(port);
  1646. if (ret)
  1647. goto out_free_port;
  1648. pr_info("enabling port %d (%pISpcs)\n",
  1649. le16_to_cpu(nport->disc_addr.portid),
  1650. (struct sockaddr *)&port->addr);
  1651. return 0;
  1652. out_free_port:
  1653. kfree(port);
  1654. return ret;
  1655. }
  1656. static void nvmet_rdma_remove_port(struct nvmet_port *nport)
  1657. {
  1658. struct nvmet_rdma_port *port = nport->priv;
  1659. cancel_delayed_work_sync(&port->repair_work);
  1660. nvmet_rdma_disable_port(port);
  1661. kfree(port);
  1662. }
  1663. static void nvmet_rdma_disc_port_addr(struct nvmet_req *req,
  1664. struct nvmet_port *nport, char *traddr)
  1665. {
  1666. struct nvmet_rdma_port *port = nport->priv;
  1667. struct rdma_cm_id *cm_id = port->cm_id;
  1668. if (inet_addr_is_any((struct sockaddr *)&cm_id->route.addr.src_addr)) {
  1669. struct nvmet_rdma_rsp *rsp =
  1670. container_of(req, struct nvmet_rdma_rsp, req);
  1671. struct rdma_cm_id *req_cm_id = rsp->queue->cm_id;
  1672. struct sockaddr *addr = (void *)&req_cm_id->route.addr.src_addr;
  1673. sprintf(traddr, "%pISc", addr);
  1674. } else {
  1675. memcpy(traddr, nport->disc_addr.traddr, NVMF_TRADDR_SIZE);
  1676. }
  1677. }
  1678. static ssize_t nvmet_rdma_host_port_addr(struct nvmet_ctrl *ctrl,
  1679. char *traddr, size_t traddr_len)
  1680. {
  1681. struct nvmet_sq *nvme_sq = ctrl->sqs[0];
  1682. struct nvmet_rdma_queue *queue =
  1683. container_of(nvme_sq, struct nvmet_rdma_queue, nvme_sq);
  1684. return snprintf(traddr, traddr_len, "%pISc",
  1685. (struct sockaddr *)&queue->cm_id->route.addr.dst_addr);
  1686. }
  1687. static u8 nvmet_rdma_get_mdts(const struct nvmet_ctrl *ctrl)
  1688. {
  1689. if (ctrl->pi_support)
  1690. return NVMET_RDMA_MAX_METADATA_MDTS;
  1691. return NVMET_RDMA_MAX_MDTS;
  1692. }
  1693. static u16 nvmet_rdma_get_max_queue_size(const struct nvmet_ctrl *ctrl)
  1694. {
  1695. if (ctrl->pi_support)
  1696. return NVME_RDMA_MAX_METADATA_QUEUE_SIZE;
  1697. return NVME_RDMA_MAX_QUEUE_SIZE;
  1698. }
  1699. static const struct nvmet_fabrics_ops nvmet_rdma_ops = {
  1700. .owner = THIS_MODULE,
  1701. .type = NVMF_TRTYPE_RDMA,
  1702. .msdbd = 1,
  1703. .flags = NVMF_KEYED_SGLS | NVMF_METADATA_SUPPORTED,
  1704. .add_port = nvmet_rdma_add_port,
  1705. .remove_port = nvmet_rdma_remove_port,
  1706. .queue_response = nvmet_rdma_queue_response,
  1707. .delete_ctrl = nvmet_rdma_delete_ctrl,
  1708. .disc_traddr = nvmet_rdma_disc_port_addr,
  1709. .host_traddr = nvmet_rdma_host_port_addr,
  1710. .get_mdts = nvmet_rdma_get_mdts,
  1711. .get_max_queue_size = nvmet_rdma_get_max_queue_size,
  1712. };
  1713. static void nvmet_rdma_remove_one(struct ib_device *ib_device, void *client_data)
  1714. {
  1715. struct nvmet_rdma_queue *queue, *tmp;
  1716. struct nvmet_rdma_device *ndev;
  1717. bool found = false;
  1718. mutex_lock(&device_list_mutex);
  1719. list_for_each_entry(ndev, &device_list, entry) {
  1720. if (ndev->device == ib_device) {
  1721. found = true;
  1722. break;
  1723. }
  1724. }
  1725. mutex_unlock(&device_list_mutex);
  1726. if (!found)
  1727. return;
  1728. /*
  1729. * IB Device that is used by nvmet controllers is being removed,
  1730. * delete all queues using this device.
  1731. */
  1732. mutex_lock(&nvmet_rdma_queue_mutex);
  1733. list_for_each_entry_safe(queue, tmp, &nvmet_rdma_queue_list,
  1734. queue_list) {
  1735. if (queue->dev->device != ib_device)
  1736. continue;
  1737. pr_info("Removing queue %d\n", queue->idx);
  1738. list_del_init(&queue->queue_list);
  1739. __nvmet_rdma_queue_disconnect(queue);
  1740. }
  1741. mutex_unlock(&nvmet_rdma_queue_mutex);
  1742. flush_workqueue(nvmet_wq);
  1743. }
  1744. static struct ib_client nvmet_rdma_ib_client = {
  1745. .name = "nvmet_rdma",
  1746. .remove = nvmet_rdma_remove_one
  1747. };
  1748. static int __init nvmet_rdma_init(void)
  1749. {
  1750. int ret;
  1751. ret = ib_register_client(&nvmet_rdma_ib_client);
  1752. if (ret)
  1753. return ret;
  1754. ret = nvmet_register_transport(&nvmet_rdma_ops);
  1755. if (ret)
  1756. goto err_ib_client;
  1757. return 0;
  1758. err_ib_client:
  1759. ib_unregister_client(&nvmet_rdma_ib_client);
  1760. return ret;
  1761. }
  1762. static void __exit nvmet_rdma_exit(void)
  1763. {
  1764. nvmet_unregister_transport(&nvmet_rdma_ops);
  1765. ib_unregister_client(&nvmet_rdma_ib_client);
  1766. WARN_ON_ONCE(!list_empty(&nvmet_rdma_queue_list));
  1767. ida_destroy(&nvmet_rdma_queue_ida);
  1768. }
  1769. module_init(nvmet_rdma_init);
  1770. module_exit(nvmet_rdma_exit);
  1771. MODULE_DESCRIPTION("NVMe target RDMA transport driver");
  1772. MODULE_LICENSE("GPL v2");
  1773. MODULE_ALIAS("nvmet-transport-1"); /* 1 == NVMF_TRTYPE_RDMA */