pinctrl-scu.c 3.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2016 Freescale Semiconductor, Inc.
  4. * Copyright 2017-2018 NXP
  5. * Dong Aisheng <aisheng.dong@nxp.com>
  6. */
  7. #include <linux/err.h>
  8. #include <linux/firmware/imx/sci.h>
  9. #include <linux/module.h>
  10. #include <linux/of_address.h>
  11. #include <linux/pinctrl/pinctrl.h>
  12. #include <linux/platform_device.h>
  13. #include "../core.h"
  14. #include "pinctrl-imx.h"
  15. #define IMX_SC_PAD_FUNC_GET_WAKEUP 9
  16. #define IMX_SC_PAD_FUNC_SET_WAKEUP 4
  17. #define IMX_SC_IRQ_GROUP_WAKE 3 /* Wakeup interrupts */
  18. #define IMX_SC_IRQ_PAD 2 /* Pad wakeup */
  19. enum pad_func_e {
  20. IMX_SC_PAD_FUNC_SET = 15,
  21. IMX_SC_PAD_FUNC_GET = 16,
  22. };
  23. struct imx_sc_msg_req_pad_set {
  24. struct imx_sc_rpc_msg hdr;
  25. u32 val;
  26. u16 pad;
  27. } __packed __aligned(4);
  28. struct imx_sc_msg_req_pad_get {
  29. struct imx_sc_rpc_msg hdr;
  30. u16 pad;
  31. } __packed __aligned(4);
  32. struct imx_sc_msg_resp_pad_get {
  33. struct imx_sc_rpc_msg hdr;
  34. u32 val;
  35. } __packed;
  36. struct imx_sc_msg_gpio_set_pad_wakeup {
  37. struct imx_sc_rpc_msg hdr;
  38. u16 pad;
  39. u8 wakeup;
  40. } __packed __aligned(4);
  41. static struct imx_sc_ipc *pinctrl_ipc_handle;
  42. int imx_pinctrl_sc_ipc_init(struct platform_device *pdev)
  43. {
  44. imx_scu_irq_group_enable(IMX_SC_IRQ_GROUP_WAKE,
  45. IMX_SC_IRQ_PAD, true);
  46. return imx_scu_get_handle(&pinctrl_ipc_handle);
  47. }
  48. EXPORT_SYMBOL_GPL(imx_pinctrl_sc_ipc_init);
  49. int imx_pinconf_get_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
  50. unsigned long *config)
  51. {
  52. struct imx_sc_msg_req_pad_get msg;
  53. struct imx_sc_msg_resp_pad_get *resp;
  54. struct imx_sc_rpc_msg *hdr = &msg.hdr;
  55. int ret;
  56. hdr->ver = IMX_SC_RPC_VERSION;
  57. hdr->svc = IMX_SC_RPC_SVC_PAD;
  58. hdr->func = IMX_SC_PAD_FUNC_GET;
  59. hdr->size = 2;
  60. msg.pad = pin_id;
  61. ret = imx_scu_call_rpc(pinctrl_ipc_handle, &msg, true);
  62. if (ret)
  63. return ret;
  64. resp = (struct imx_sc_msg_resp_pad_get *)&msg;
  65. *config = resp->val;
  66. return 0;
  67. }
  68. EXPORT_SYMBOL_GPL(imx_pinconf_get_scu);
  69. int imx_pinconf_set_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
  70. unsigned long *configs, unsigned num_configs)
  71. {
  72. struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
  73. struct imx_sc_msg_req_pad_set msg;
  74. struct imx_sc_rpc_msg *hdr = &msg.hdr;
  75. unsigned int mux = configs[0];
  76. unsigned int conf;
  77. unsigned int val;
  78. int ret;
  79. if (num_configs == 1) {
  80. struct imx_sc_msg_gpio_set_pad_wakeup wmsg;
  81. hdr = &wmsg.hdr;
  82. hdr->ver = IMX_SC_RPC_VERSION;
  83. hdr->svc = IMX_SC_RPC_SVC_PAD;
  84. hdr->func = IMX_SC_PAD_FUNC_SET_WAKEUP;
  85. hdr->size = 2;
  86. wmsg.pad = pin_id;
  87. wmsg.wakeup = *configs;
  88. ret = imx_scu_call_rpc(pinctrl_ipc_handle, &wmsg, true);
  89. dev_dbg(ipctl->dev, "wakeup pin_id: %d type: %ld\n",
  90. pin_id, *configs);
  91. return ret;
  92. }
  93. /*
  94. * Set mux and conf together in one IPC call
  95. */
  96. WARN_ON(num_configs != 2);
  97. conf = configs[1];
  98. val = conf | BM_PAD_CTL_IFMUX_ENABLE | BM_PAD_CTL_GP_ENABLE;
  99. val |= mux << BP_PAD_CTL_IFMUX;
  100. hdr->ver = IMX_SC_RPC_VERSION;
  101. hdr->svc = IMX_SC_RPC_SVC_PAD;
  102. hdr->func = IMX_SC_PAD_FUNC_SET;
  103. hdr->size = 3;
  104. msg.pad = pin_id;
  105. msg.val = val;
  106. ret = imx_scu_call_rpc(pinctrl_ipc_handle, &msg, true);
  107. dev_dbg(ipctl->dev, "write: pin_id %u config 0x%x val 0x%x\n",
  108. pin_id, conf, val);
  109. return ret;
  110. }
  111. EXPORT_SYMBOL_GPL(imx_pinconf_set_scu);
  112. void imx_pinctrl_parse_pin_scu(struct imx_pinctrl *ipctl,
  113. unsigned int *pin_id, struct imx_pin *pin,
  114. const __be32 **list_p)
  115. {
  116. const struct imx_pinctrl_soc_info *info = ipctl->info;
  117. struct imx_pin_scu *pin_scu = &pin->conf.scu;
  118. const __be32 *list = *list_p;
  119. pin->pin = be32_to_cpu(*list++);
  120. *pin_id = pin->pin;
  121. pin_scu->mux_mode = be32_to_cpu(*list++);
  122. pin_scu->config = be32_to_cpu(*list++);
  123. *list_p = list;
  124. dev_dbg(ipctl->dev, "%s: 0x%x 0x%08lx", info->pins[pin->pin].name,
  125. pin_scu->mux_mode, pin_scu->config);
  126. }
  127. EXPORT_SYMBOL_GPL(imx_pinctrl_parse_pin_scu);
  128. MODULE_AUTHOR("Dong Aisheng <aisheng.dong@nxp.com>");
  129. MODULE_DESCRIPTION("NXP i.MX SCU common pinctrl driver");
  130. MODULE_LICENSE("GPL v2");