pinctrl-mt6397.c 1.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015 MediaTek Inc.
  4. * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com>
  5. */
  6. #include <linux/init.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/of.h>
  9. #include <linux/pinctrl/pinctrl.h>
  10. #include <linux/pinctrl/pinconf-generic.h>
  11. #include <linux/mfd/mt6397/core.h>
  12. #include "pinctrl-mtk-common.h"
  13. #include "pinctrl-mtk-mt6397.h"
  14. #define MT6397_PIN_REG_BASE 0xc000
  15. static const struct mtk_pinctrl_devdata mt6397_pinctrl_data = {
  16. .pins = mtk_pins_mt6397,
  17. .npins = ARRAY_SIZE(mtk_pins_mt6397),
  18. .dir_offset = (MT6397_PIN_REG_BASE + 0x000),
  19. .ies_offset = MTK_PINCTRL_NOT_SUPPORT,
  20. .smt_offset = MTK_PINCTRL_NOT_SUPPORT,
  21. .pullen_offset = (MT6397_PIN_REG_BASE + 0x020),
  22. .pullsel_offset = (MT6397_PIN_REG_BASE + 0x040),
  23. .dout_offset = (MT6397_PIN_REG_BASE + 0x080),
  24. .din_offset = (MT6397_PIN_REG_BASE + 0x0a0),
  25. .pinmux_offset = (MT6397_PIN_REG_BASE + 0x0c0),
  26. .type1_start = 41,
  27. .type1_end = 41,
  28. .port_shf = 3,
  29. .port_mask = 0x3,
  30. .port_align = 2,
  31. .mode_mask = 0xf,
  32. .mode_per_reg = 5,
  33. .mode_shf = 4,
  34. };
  35. static int mt6397_pinctrl_probe(struct platform_device *pdev)
  36. {
  37. struct mt6397_chip *mt6397;
  38. mt6397 = dev_get_drvdata(pdev->dev.parent);
  39. return mtk_pctrl_init(pdev, &mt6397_pinctrl_data, mt6397->regmap);
  40. }
  41. static const struct of_device_id mt6397_pctrl_match[] = {
  42. { .compatible = "mediatek,mt6397-pinctrl", },
  43. { }
  44. };
  45. static struct platform_driver mtk_pinctrl_driver = {
  46. .probe = mt6397_pinctrl_probe,
  47. .driver = {
  48. .name = "mediatek-mt6397-pinctrl",
  49. .of_match_table = mt6397_pctrl_match,
  50. },
  51. };
  52. builtin_platform_driver(mtk_pinctrl_driver);