pinctrl-ac5.c 7.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Marvell ac5 pinctrl driver based on mvebu pinctrl core
  4. *
  5. * Copyright (C) 2021 Marvell
  6. *
  7. * Noam Liron <lnoam@marvell.com>
  8. */
  9. #include <linux/err.h>
  10. #include <linux/init.h>
  11. #include <linux/io.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/of.h>
  14. #include <linux/pinctrl/pinctrl.h>
  15. #include "pinctrl-mvebu.h"
  16. static struct mvebu_mpp_mode ac5_mpp_modes[] = {
  17. MPP_MODE(0,
  18. MPP_FUNCTION(0, "gpio", NULL),
  19. MPP_FUNCTION(1, "sdio", "d0"),
  20. MPP_FUNCTION(2, "nand", "io4")),
  21. MPP_MODE(1,
  22. MPP_FUNCTION(0, "gpio", NULL),
  23. MPP_FUNCTION(1, "sdio", "d1"),
  24. MPP_FUNCTION(2, "nand", "io3")),
  25. MPP_MODE(2,
  26. MPP_FUNCTION(0, "gpio", NULL),
  27. MPP_FUNCTION(1, "sdio", "d2"),
  28. MPP_FUNCTION(2, "nand", "io2")),
  29. MPP_MODE(3,
  30. MPP_FUNCTION(0, "gpio", NULL),
  31. MPP_FUNCTION(1, "sdio", "d3"),
  32. MPP_FUNCTION(2, "nand", "io7")),
  33. MPP_MODE(4,
  34. MPP_FUNCTION(0, "gpio", NULL),
  35. MPP_FUNCTION(1, "sdio", "d4"),
  36. MPP_FUNCTION(2, "nand", "io6"),
  37. MPP_FUNCTION(3, "uart3", "txd"),
  38. MPP_FUNCTION(4, "uart2", "txd")),
  39. MPP_MODE(5,
  40. MPP_FUNCTION(0, "gpio", NULL),
  41. MPP_FUNCTION(1, "sdio", "d5"),
  42. MPP_FUNCTION(2, "nand", "io5"),
  43. MPP_FUNCTION(3, "uart3", "rxd"),
  44. MPP_FUNCTION(4, "uart2", "rxd")),
  45. MPP_MODE(6,
  46. MPP_FUNCTION(0, "gpio", NULL),
  47. MPP_FUNCTION(1, "sdio", "d6"),
  48. MPP_FUNCTION(2, "nand", "io0"),
  49. MPP_FUNCTION(3, "i2c1", "sck")),
  50. MPP_MODE(7,
  51. MPP_FUNCTION(0, "gpio", NULL),
  52. MPP_FUNCTION(1, "sdio", "d7"),
  53. MPP_FUNCTION(2, "nand", "io1"),
  54. MPP_FUNCTION(3, "i2c1", "sda")),
  55. MPP_MODE(8,
  56. MPP_FUNCTION(0, "gpio", NULL),
  57. MPP_FUNCTION(1, "sdio", "clk"),
  58. MPP_FUNCTION(2, "nand", "wen")),
  59. MPP_MODE(9,
  60. MPP_FUNCTION(0, "gpio", NULL),
  61. MPP_FUNCTION(1, "sdio", "cmd"),
  62. MPP_FUNCTION(2, "nand", "ale")),
  63. MPP_MODE(10,
  64. MPP_FUNCTION(0, "gpio", NULL),
  65. MPP_FUNCTION(1, "sdio", "ds"),
  66. MPP_FUNCTION(2, "nand", "cle")),
  67. MPP_MODE(11,
  68. MPP_FUNCTION(0, "gpio", NULL),
  69. MPP_FUNCTION(1, "sdio", "rst"),
  70. MPP_FUNCTION(2, "nand", "cen")),
  71. MPP_MODE(12,
  72. MPP_FUNCTION(0, "gpio", NULL),
  73. MPP_FUNCTION(1, "spi0", "clk")),
  74. MPP_MODE(13,
  75. MPP_FUNCTION(0, "gpio", NULL),
  76. MPP_FUNCTION(1, "spi0", "csn")),
  77. MPP_MODE(14,
  78. MPP_FUNCTION(0, "gpio", NULL),
  79. MPP_FUNCTION(1, "spi0", "mosi")),
  80. MPP_MODE(15,
  81. MPP_FUNCTION(0, "gpio", NULL),
  82. MPP_FUNCTION(1, "spi0", "miso")),
  83. MPP_MODE(16,
  84. MPP_FUNCTION(0, "gpio", NULL),
  85. MPP_FUNCTION(1, "spi0", "wpn"),
  86. MPP_FUNCTION(2, "nand", "ren"),
  87. MPP_FUNCTION(3, "uart1", "txd")),
  88. MPP_MODE(17,
  89. MPP_FUNCTION(0, "gpio", NULL),
  90. MPP_FUNCTION(1, "spi0", "hold"),
  91. MPP_FUNCTION(2, "nand", "rb"),
  92. MPP_FUNCTION(3, "uart1", "rxd")),
  93. MPP_MODE(18,
  94. MPP_FUNCTION(0, "gpio", NULL),
  95. MPP_FUNCTION(1, "tsen_int", NULL),
  96. MPP_FUNCTION(2, "uart2", "rxd"),
  97. MPP_FUNCTION(3, "wd_int", NULL)),
  98. MPP_MODE(19,
  99. MPP_FUNCTION(0, "gpio", NULL),
  100. MPP_FUNCTION(1, "dev_init_done", NULL),
  101. MPP_FUNCTION(2, "uart2", "txd")),
  102. MPP_MODE(20,
  103. MPP_FUNCTION(0, "gpio", NULL),
  104. MPP_FUNCTION(2, "i2c1", "sck"),
  105. MPP_FUNCTION(3, "spi1", "clk"),
  106. MPP_FUNCTION(4, "uart3", "txd")),
  107. MPP_MODE(21,
  108. MPP_FUNCTION(0, "gpio", NULL),
  109. MPP_FUNCTION(2, "i2c1", "sda"),
  110. MPP_FUNCTION(3, "spi1", "csn"),
  111. MPP_FUNCTION(4, "uart3", "rxd")),
  112. MPP_MODE(22,
  113. MPP_FUNCTION(0, "gpio", NULL),
  114. MPP_FUNCTION(3, "spi1", "mosi")),
  115. MPP_MODE(23,
  116. MPP_FUNCTION(0, "gpio", NULL),
  117. MPP_FUNCTION(3, "spi1", "miso")),
  118. MPP_MODE(24,
  119. MPP_FUNCTION(0, "gpio", NULL),
  120. MPP_FUNCTION(1, "wd_int", NULL),
  121. MPP_FUNCTION(2, "uart2", "txd"),
  122. MPP_FUNCTION(3, "uartsd", "txd")),
  123. MPP_MODE(25,
  124. MPP_FUNCTION(0, "gpio", NULL),
  125. MPP_FUNCTION(1, "int_out", NULL),
  126. MPP_FUNCTION(2, "uart2", "rxd"),
  127. MPP_FUNCTION(3, "uartsd", "rxd")),
  128. MPP_MODE(26,
  129. MPP_FUNCTION(0, "gpio", NULL),
  130. MPP_FUNCTION(1, "i2c0", "sck"),
  131. MPP_FUNCTION(2, "ptp", "clk1"),
  132. MPP_FUNCTION(3, "uart3", "txd")),
  133. MPP_MODE(27,
  134. MPP_FUNCTION(0, "gpio", NULL),
  135. MPP_FUNCTION(1, "i2c0", "sda"),
  136. MPP_FUNCTION(2, "ptp", "pulse"),
  137. MPP_FUNCTION(3, "uart3", "rxd")),
  138. MPP_MODE(28,
  139. MPP_FUNCTION(0, "gpio", NULL),
  140. MPP_FUNCTION(1, "xg", "mdio"),
  141. MPP_FUNCTION(2, "ge", "mdio"),
  142. MPP_FUNCTION(3, "uart3", "txd")),
  143. MPP_MODE(29,
  144. MPP_FUNCTION(0, "gpio", NULL),
  145. MPP_FUNCTION(1, "xg", "mdio"),
  146. MPP_FUNCTION(2, "ge", "mdio"),
  147. MPP_FUNCTION(3, "uart3", "rxd")),
  148. MPP_MODE(30,
  149. MPP_FUNCTION(0, "gpio", NULL),
  150. MPP_FUNCTION(1, "xg", "mdio"),
  151. MPP_FUNCTION(2, "ge", "mdio"),
  152. MPP_FUNCTION(3, "ge", "mdio")),
  153. MPP_MODE(31,
  154. MPP_FUNCTION(0, "gpio", NULL),
  155. MPP_FUNCTION(1, "xg", "mdio"),
  156. MPP_FUNCTION(2, "ge", "mdio"),
  157. MPP_FUNCTION(3, "ge", "mdio")),
  158. MPP_MODE(32,
  159. MPP_FUNCTION(0, "gpio", NULL),
  160. MPP_FUNCTION(1, "uart0", "txd")),
  161. MPP_MODE(33,
  162. MPP_FUNCTION(0, "gpio", NULL),
  163. MPP_FUNCTION(1, "uart0", "rxd"),
  164. MPP_FUNCTION(2, "ptp", "clk1"),
  165. MPP_FUNCTION(3, "ptp", "pulse")),
  166. MPP_MODE(34,
  167. MPP_FUNCTION(0, "gpio", NULL),
  168. MPP_FUNCTION(1, "ge", "mdio"),
  169. MPP_FUNCTION(2, "uart3", "rxd")),
  170. MPP_MODE(35,
  171. MPP_FUNCTION(0, "gpio", NULL),
  172. MPP_FUNCTION(1, "ge", "mdio"),
  173. MPP_FUNCTION(2, "uart3", "txd"),
  174. MPP_FUNCTION(3, "pcie", "rstoutn")),
  175. MPP_MODE(36,
  176. MPP_FUNCTION(0, "gpio", NULL),
  177. MPP_FUNCTION(1, "ptp", "clk0_tp"),
  178. MPP_FUNCTION(2, "ptp", "clk1_tp")),
  179. MPP_MODE(37,
  180. MPP_FUNCTION(0, "gpio", NULL),
  181. MPP_FUNCTION(1, "ptp", "pulse_tp"),
  182. MPP_FUNCTION(2, "wd_int", NULL)),
  183. MPP_MODE(38,
  184. MPP_FUNCTION(0, "gpio", NULL),
  185. MPP_FUNCTION(1, "synce", "clk_out0")),
  186. MPP_MODE(39,
  187. MPP_FUNCTION(0, "gpio", NULL),
  188. MPP_FUNCTION(1, "synce", "clk_out1")),
  189. MPP_MODE(40,
  190. MPP_FUNCTION(0, "gpio", NULL),
  191. MPP_FUNCTION(1, "ptp", "pclk_out0"),
  192. MPP_FUNCTION(2, "ptp", "pclk_out1")),
  193. MPP_MODE(41,
  194. MPP_FUNCTION(0, "gpio", NULL),
  195. MPP_FUNCTION(1, "ptp", "ref_clk"),
  196. MPP_FUNCTION(2, "ptp", "clk1"),
  197. MPP_FUNCTION(3, "ptp", "pulse"),
  198. MPP_FUNCTION(4, "uart2", "txd"),
  199. MPP_FUNCTION(5, "i2c1", "sck")),
  200. MPP_MODE(42,
  201. MPP_FUNCTION(0, "gpio", NULL),
  202. MPP_FUNCTION(1, "ptp", "clk0"),
  203. MPP_FUNCTION(2, "ptp", "clk1"),
  204. MPP_FUNCTION(3, "ptp", "pulse"),
  205. MPP_FUNCTION(4, "uart2", "rxd"),
  206. MPP_FUNCTION(5, "i2c1", "sda")),
  207. MPP_MODE(43,
  208. MPP_FUNCTION(0, "gpio", NULL),
  209. MPP_FUNCTION(1, "led", "clk")),
  210. MPP_MODE(44,
  211. MPP_FUNCTION(0, "gpio", NULL),
  212. MPP_FUNCTION(1, "led", "stb")),
  213. MPP_MODE(45,
  214. MPP_FUNCTION(0, "gpio", NULL),
  215. MPP_FUNCTION(1, "led", "data")),
  216. };
  217. static struct mvebu_pinctrl_soc_info ac5_pinctrl_info;
  218. static const struct of_device_id ac5_pinctrl_of_match[] = {
  219. {
  220. .compatible = "marvell,ac5-pinctrl",
  221. },
  222. { },
  223. };
  224. static const struct mvebu_mpp_ctrl ac5_mpp_controls[] = {
  225. MPP_FUNC_CTRL(0, 45, NULL, mvebu_mmio_mpp_ctrl), };
  226. static struct pinctrl_gpio_range ac5_mpp_gpio_ranges[] = {
  227. MPP_GPIO_RANGE(0, 0, 0, 46), };
  228. static int ac5_pinctrl_probe(struct platform_device *pdev)
  229. {
  230. struct mvebu_pinctrl_soc_info *soc = &ac5_pinctrl_info;
  231. soc->variant = 0; /* no variants for ac5 */
  232. soc->controls = ac5_mpp_controls;
  233. soc->ncontrols = ARRAY_SIZE(ac5_mpp_controls);
  234. soc->gpioranges = ac5_mpp_gpio_ranges;
  235. soc->ngpioranges = ARRAY_SIZE(ac5_mpp_gpio_ranges);
  236. soc->modes = ac5_mpp_modes;
  237. soc->nmodes = ac5_mpp_controls[0].npins;
  238. pdev->dev.platform_data = soc;
  239. return mvebu_pinctrl_simple_mmio_probe(pdev);
  240. }
  241. static struct platform_driver ac5_pinctrl_driver = {
  242. .driver = {
  243. .name = "ac5-pinctrl",
  244. .of_match_table = of_match_ptr(ac5_pinctrl_of_match),
  245. },
  246. .probe = ac5_pinctrl_probe,
  247. };
  248. builtin_platform_driver(ac5_pinctrl_driver);