mlxbf-bootctl.c 26 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Mellanox boot control driver
  4. *
  5. * This driver provides a sysfs interface for systems management
  6. * software to manage reset-time actions.
  7. *
  8. * Copyright (C) 2019 Mellanox Technologies
  9. */
  10. #include <linux/acpi.h>
  11. #include <linux/arm-smccc.h>
  12. #include <linux/delay.h>
  13. #include <linux/if_ether.h>
  14. #include <linux/iopoll.h>
  15. #include <linux/module.h>
  16. #include <linux/platform_device.h>
  17. #include "mlxbf-bootctl.h"
  18. #define MLXBF_BOOTCTL_SB_SECURE_MASK 0x03
  19. #define MLXBF_BOOTCTL_SB_TEST_MASK 0x0c
  20. #define MLXBF_BOOTCTL_SB_DEV_MASK BIT(4)
  21. #define MLXBF_SB_KEY_NUM 4
  22. /* UUID used to probe ATF service. */
  23. static const char *mlxbf_bootctl_svc_uuid_str =
  24. "89c036b4-e7d7-11e6-8797-001aca00bfc4";
  25. struct mlxbf_bootctl_name {
  26. u32 value;
  27. const char *name;
  28. };
  29. static struct mlxbf_bootctl_name boot_names[] = {
  30. { MLXBF_BOOTCTL_EXTERNAL, "external" },
  31. { MLXBF_BOOTCTL_EMMC, "emmc" },
  32. { MLNX_BOOTCTL_SWAP_EMMC, "swap_emmc" },
  33. { MLXBF_BOOTCTL_EMMC_LEGACY, "emmc_legacy" },
  34. { MLXBF_BOOTCTL_NONE, "none" },
  35. };
  36. enum {
  37. MLXBF_BOOTCTL_SB_LIFECYCLE_PRODUCTION = 0,
  38. MLXBF_BOOTCTL_SB_LIFECYCLE_GA_SECURE = 1,
  39. MLXBF_BOOTCTL_SB_LIFECYCLE_GA_NON_SECURE = 2,
  40. MLXBF_BOOTCTL_SB_LIFECYCLE_RMA = 3
  41. };
  42. static const char * const mlxbf_bootctl_lifecycle_states[] = {
  43. [MLXBF_BOOTCTL_SB_LIFECYCLE_PRODUCTION] = "Production",
  44. [MLXBF_BOOTCTL_SB_LIFECYCLE_GA_SECURE] = "GA Secured",
  45. [MLXBF_BOOTCTL_SB_LIFECYCLE_GA_NON_SECURE] = "GA Non-Secured",
  46. [MLXBF_BOOTCTL_SB_LIFECYCLE_RMA] = "RMA",
  47. };
  48. /* Log header format. */
  49. #define MLXBF_RSH_LOG_TYPE_MASK GENMASK_ULL(59, 56)
  50. #define MLXBF_RSH_LOG_LEN_MASK GENMASK_ULL(54, 48)
  51. #define MLXBF_RSH_LOG_LEVEL_MASK GENMASK_ULL(7, 0)
  52. /* Log module ID and type (only MSG type in Linux driver for now). */
  53. #define MLXBF_RSH_LOG_TYPE_MSG 0x04ULL
  54. /* Log ctl/data register offset. */
  55. #define MLXBF_RSH_SCRATCH_BUF_CTL_OFF 0
  56. #define MLXBF_RSH_SCRATCH_BUF_DATA_OFF 0x10
  57. /* Log message levels. */
  58. enum {
  59. MLXBF_RSH_LOG_INFO,
  60. MLXBF_RSH_LOG_WARN,
  61. MLXBF_RSH_LOG_ERR,
  62. MLXBF_RSH_LOG_ASSERT
  63. };
  64. /* Mapped pointer for RSH_BOOT_FIFO_DATA and RSH_BOOT_FIFO_COUNT register. */
  65. static void __iomem *mlxbf_rsh_boot_data;
  66. static void __iomem *mlxbf_rsh_boot_cnt;
  67. /* Mapped pointer for rsh log semaphore/ctrl/data register. */
  68. static void __iomem *mlxbf_rsh_semaphore;
  69. static void __iomem *mlxbf_rsh_scratch_buf_ctl;
  70. static void __iomem *mlxbf_rsh_scratch_buf_data;
  71. /* Rsh log levels. */
  72. static const char * const mlxbf_rsh_log_level[] = {
  73. "INFO", "WARN", "ERR", "ASSERT"};
  74. static DEFINE_MUTEX(icm_ops_lock);
  75. static DEFINE_MUTEX(os_up_lock);
  76. static DEFINE_MUTEX(mfg_ops_lock);
  77. /*
  78. * Objects are stored within the MFG partition per type.
  79. * Type 0 is not supported.
  80. */
  81. enum {
  82. MLNX_MFG_TYPE_OOB_MAC = 1,
  83. MLNX_MFG_TYPE_OPN_0,
  84. MLNX_MFG_TYPE_OPN_1,
  85. MLNX_MFG_TYPE_OPN_2,
  86. MLNX_MFG_TYPE_SKU_0,
  87. MLNX_MFG_TYPE_SKU_1,
  88. MLNX_MFG_TYPE_SKU_2,
  89. MLNX_MFG_TYPE_MODL_0,
  90. MLNX_MFG_TYPE_MODL_1,
  91. MLNX_MFG_TYPE_MODL_2,
  92. MLNX_MFG_TYPE_SN_0,
  93. MLNX_MFG_TYPE_SN_1,
  94. MLNX_MFG_TYPE_SN_2,
  95. MLNX_MFG_TYPE_UUID_0,
  96. MLNX_MFG_TYPE_UUID_1,
  97. MLNX_MFG_TYPE_UUID_2,
  98. MLNX_MFG_TYPE_UUID_3,
  99. MLNX_MFG_TYPE_UUID_4,
  100. MLNX_MFG_TYPE_REV,
  101. };
  102. #define MLNX_MFG_OPN_VAL_LEN 24
  103. #define MLNX_MFG_SKU_VAL_LEN 24
  104. #define MLNX_MFG_MODL_VAL_LEN 24
  105. #define MLNX_MFG_SN_VAL_LEN 24
  106. #define MLNX_MFG_UUID_VAL_LEN 40
  107. #define MLNX_MFG_REV_VAL_LEN 8
  108. #define MLNX_MFG_VAL_QWORD_CNT(type) \
  109. (MLNX_MFG_##type##_VAL_LEN / sizeof(u64))
  110. /*
  111. * The MAC address consists of 6 bytes (2 digits each) separated by ':'.
  112. * The expected format is: "XX:XX:XX:XX:XX:XX"
  113. */
  114. #define MLNX_MFG_OOB_MAC_FORMAT_LEN \
  115. ((ETH_ALEN * 2) + (ETH_ALEN - 1))
  116. /* ARM SMC call which is atomic and no need for lock. */
  117. static int mlxbf_bootctl_smc(unsigned int smc_op, int smc_arg)
  118. {
  119. struct arm_smccc_res res;
  120. arm_smccc_smc(smc_op, smc_arg, 0, 0, 0, 0, 0, 0, &res);
  121. return res.a0;
  122. }
  123. /* Return the action in integer or an error code. */
  124. static int mlxbf_bootctl_reset_action_to_val(const char *action)
  125. {
  126. int i;
  127. for (i = 0; i < ARRAY_SIZE(boot_names); i++)
  128. if (sysfs_streq(boot_names[i].name, action))
  129. return boot_names[i].value;
  130. return -EINVAL;
  131. }
  132. /* Return the action in string. */
  133. static const char *mlxbf_bootctl_action_to_string(int action)
  134. {
  135. int i;
  136. for (i = 0; i < ARRAY_SIZE(boot_names); i++)
  137. if (boot_names[i].value == action)
  138. return boot_names[i].name;
  139. return "invalid action";
  140. }
  141. static ssize_t post_reset_wdog_show(struct device *dev,
  142. struct device_attribute *attr, char *buf)
  143. {
  144. int ret;
  145. ret = mlxbf_bootctl_smc(MLXBF_BOOTCTL_GET_POST_RESET_WDOG, 0);
  146. if (ret < 0)
  147. return ret;
  148. return sprintf(buf, "%d\n", ret);
  149. }
  150. static ssize_t post_reset_wdog_store(struct device *dev,
  151. struct device_attribute *attr,
  152. const char *buf, size_t count)
  153. {
  154. unsigned long value;
  155. int ret;
  156. ret = kstrtoul(buf, 10, &value);
  157. if (ret)
  158. return ret;
  159. ret = mlxbf_bootctl_smc(MLXBF_BOOTCTL_SET_POST_RESET_WDOG, value);
  160. if (ret < 0)
  161. return ret;
  162. return count;
  163. }
  164. static ssize_t mlxbf_bootctl_show(int smc_op, char *buf)
  165. {
  166. int action;
  167. action = mlxbf_bootctl_smc(smc_op, 0);
  168. if (action < 0)
  169. return action;
  170. return sprintf(buf, "%s\n", mlxbf_bootctl_action_to_string(action));
  171. }
  172. static int mlxbf_bootctl_store(int smc_op, const char *buf, size_t count)
  173. {
  174. int ret, action;
  175. action = mlxbf_bootctl_reset_action_to_val(buf);
  176. if (action < 0)
  177. return action;
  178. ret = mlxbf_bootctl_smc(smc_op, action);
  179. if (ret < 0)
  180. return ret;
  181. return count;
  182. }
  183. static ssize_t reset_action_show(struct device *dev,
  184. struct device_attribute *attr, char *buf)
  185. {
  186. return mlxbf_bootctl_show(MLXBF_BOOTCTL_GET_RESET_ACTION, buf);
  187. }
  188. static ssize_t reset_action_store(struct device *dev,
  189. struct device_attribute *attr,
  190. const char *buf, size_t count)
  191. {
  192. return mlxbf_bootctl_store(MLXBF_BOOTCTL_SET_RESET_ACTION, buf, count);
  193. }
  194. static ssize_t second_reset_action_show(struct device *dev,
  195. struct device_attribute *attr,
  196. char *buf)
  197. {
  198. return mlxbf_bootctl_show(MLXBF_BOOTCTL_GET_SECOND_RESET_ACTION, buf);
  199. }
  200. static ssize_t second_reset_action_store(struct device *dev,
  201. struct device_attribute *attr,
  202. const char *buf, size_t count)
  203. {
  204. return mlxbf_bootctl_store(MLXBF_BOOTCTL_SET_SECOND_RESET_ACTION, buf,
  205. count);
  206. }
  207. static ssize_t lifecycle_state_show(struct device *dev,
  208. struct device_attribute *attr, char *buf)
  209. {
  210. int status_bits;
  211. int use_dev_key;
  212. int test_state;
  213. int lc_state;
  214. status_bits = mlxbf_bootctl_smc(MLXBF_BOOTCTL_GET_TBB_FUSE_STATUS,
  215. MLXBF_BOOTCTL_FUSE_STATUS_LIFECYCLE);
  216. if (status_bits < 0)
  217. return status_bits;
  218. use_dev_key = status_bits & MLXBF_BOOTCTL_SB_DEV_MASK;
  219. test_state = status_bits & MLXBF_BOOTCTL_SB_TEST_MASK;
  220. lc_state = status_bits & MLXBF_BOOTCTL_SB_SECURE_MASK;
  221. /*
  222. * If the test bits are set, we specify that the current state may be
  223. * due to using the test bits.
  224. */
  225. if (test_state) {
  226. return sprintf(buf, "%s(test)\n",
  227. mlxbf_bootctl_lifecycle_states[lc_state]);
  228. } else if (use_dev_key &&
  229. (lc_state == MLXBF_BOOTCTL_SB_LIFECYCLE_GA_SECURE)) {
  230. return sprintf(buf, "Secured (development)\n");
  231. }
  232. return sprintf(buf, "%s\n", mlxbf_bootctl_lifecycle_states[lc_state]);
  233. }
  234. static ssize_t secure_boot_fuse_state_show(struct device *dev,
  235. struct device_attribute *attr,
  236. char *buf)
  237. {
  238. int burnt, valid, key, key_state, buf_len = 0, upper_key_used = 0;
  239. const char *status;
  240. key_state = mlxbf_bootctl_smc(MLXBF_BOOTCTL_GET_TBB_FUSE_STATUS,
  241. MLXBF_BOOTCTL_FUSE_STATUS_KEYS);
  242. if (key_state < 0)
  243. return key_state;
  244. /*
  245. * key_state contains the bits for 4 Key versions, loaded from eFuses
  246. * after a hard reset. Lower 4 bits are a thermometer code indicating
  247. * key programming has started for key n (0000 = none, 0001 = version 0,
  248. * 0011 = version 1, 0111 = version 2, 1111 = version 3). Upper 4 bits
  249. * are a thermometer code indicating key programming has completed for
  250. * key n (same encodings as the start bits). This allows for detection
  251. * of an interruption in the programming process which has left the key
  252. * partially programmed (and thus invalid). The process is to burn the
  253. * eFuse for the new key start bit, burn the key eFuses, then burn the
  254. * eFuse for the new key complete bit.
  255. *
  256. * For example 0000_0000: no key valid, 0001_0001: key version 0 valid,
  257. * 0011_0011: key 1 version valid, 0011_0111: key version 2 started
  258. * programming but did not complete, etc. The most recent key for which
  259. * both start and complete bit is set is loaded. On soft reset, this
  260. * register is not modified.
  261. */
  262. for (key = MLXBF_SB_KEY_NUM - 1; key >= 0; key--) {
  263. burnt = key_state & BIT(key);
  264. valid = key_state & BIT(key + MLXBF_SB_KEY_NUM);
  265. if (burnt && valid)
  266. upper_key_used = 1;
  267. if (upper_key_used) {
  268. if (burnt)
  269. status = valid ? "Used" : "Wasted";
  270. else
  271. status = valid ? "Invalid" : "Skipped";
  272. } else {
  273. if (burnt)
  274. status = valid ? "InUse" : "Incomplete";
  275. else
  276. status = valid ? "Invalid" : "Free";
  277. }
  278. buf_len += sprintf(buf + buf_len, "%d:%s ", key, status);
  279. }
  280. buf_len += sprintf(buf + buf_len, "\n");
  281. return buf_len;
  282. }
  283. static ssize_t fw_reset_store(struct device *dev,
  284. struct device_attribute *attr,
  285. const char *buf, size_t count)
  286. {
  287. unsigned long key;
  288. int err;
  289. err = kstrtoul(buf, 16, &key);
  290. if (err)
  291. return err;
  292. if (mlxbf_bootctl_smc(MLXBF_BOOTCTL_FW_RESET, key) < 0)
  293. return -EINVAL;
  294. return count;
  295. }
  296. /* Size(8-byte words) of the log buffer. */
  297. #define RSH_SCRATCH_BUF_CTL_IDX_MASK 0x7f
  298. /* 100ms timeout */
  299. #define RSH_SCRATCH_BUF_POLL_TIMEOUT 100000
  300. static int mlxbf_rsh_log_sem_lock(void)
  301. {
  302. unsigned long reg;
  303. return readq_poll_timeout(mlxbf_rsh_semaphore, reg, !reg, 0,
  304. RSH_SCRATCH_BUF_POLL_TIMEOUT);
  305. }
  306. static void mlxbf_rsh_log_sem_unlock(void)
  307. {
  308. writeq(0, mlxbf_rsh_semaphore);
  309. }
  310. static ssize_t rsh_log_store(struct device *dev,
  311. struct device_attribute *attr,
  312. const char *buf, size_t count)
  313. {
  314. int rc, idx, num, len, level = MLXBF_RSH_LOG_INFO;
  315. size_t size = count;
  316. u64 data;
  317. if (!size)
  318. return -EINVAL;
  319. if (!mlxbf_rsh_semaphore || !mlxbf_rsh_scratch_buf_ctl)
  320. return -EOPNOTSUPP;
  321. /* Ignore line break at the end. */
  322. if (buf[size - 1] == '\n')
  323. size--;
  324. /* Check the message prefix. */
  325. for (idx = 0; idx < ARRAY_SIZE(mlxbf_rsh_log_level); idx++) {
  326. len = strlen(mlxbf_rsh_log_level[idx]);
  327. if (len + 1 < size &&
  328. !strncmp(buf, mlxbf_rsh_log_level[idx], len)) {
  329. buf += len;
  330. size -= len;
  331. level = idx;
  332. break;
  333. }
  334. }
  335. /* Ignore leading spaces. */
  336. while (size > 0 && buf[0] == ' ') {
  337. size--;
  338. buf++;
  339. }
  340. /* Take the semaphore. */
  341. rc = mlxbf_rsh_log_sem_lock();
  342. if (rc)
  343. return rc;
  344. /* Calculate how many words are available. */
  345. idx = readq(mlxbf_rsh_scratch_buf_ctl);
  346. num = min((int)DIV_ROUND_UP(size, sizeof(u64)),
  347. RSH_SCRATCH_BUF_CTL_IDX_MASK - idx - 1);
  348. if (num <= 0)
  349. goto done;
  350. /* Write Header. */
  351. data = FIELD_PREP(MLXBF_RSH_LOG_TYPE_MASK, MLXBF_RSH_LOG_TYPE_MSG);
  352. data |= FIELD_PREP(MLXBF_RSH_LOG_LEN_MASK, num);
  353. data |= FIELD_PREP(MLXBF_RSH_LOG_LEVEL_MASK, level);
  354. writeq(data, mlxbf_rsh_scratch_buf_data);
  355. /* Write message. */
  356. for (idx = 0; idx < num && size > 0; idx++) {
  357. if (size < sizeof(u64)) {
  358. data = 0;
  359. memcpy(&data, buf, size);
  360. size = 0;
  361. } else {
  362. memcpy(&data, buf, sizeof(u64));
  363. size -= sizeof(u64);
  364. buf += sizeof(u64);
  365. }
  366. writeq(data, mlxbf_rsh_scratch_buf_data);
  367. }
  368. done:
  369. /* Release the semaphore. */
  370. mlxbf_rsh_log_sem_unlock();
  371. /* Ignore the rest if no more space. */
  372. return count;
  373. }
  374. static ssize_t large_icm_show(struct device *dev,
  375. struct device_attribute *attr, char *buf)
  376. {
  377. struct arm_smccc_res res;
  378. mutex_lock(&icm_ops_lock);
  379. arm_smccc_smc(MLNX_HANDLE_GET_ICM_INFO, 0, 0, 0, 0,
  380. 0, 0, 0, &res);
  381. mutex_unlock(&icm_ops_lock);
  382. if (res.a0)
  383. return -EPERM;
  384. return sysfs_emit(buf, "0x%lx", res.a1);
  385. }
  386. static ssize_t large_icm_store(struct device *dev,
  387. struct device_attribute *attr,
  388. const char *buf, size_t count)
  389. {
  390. struct arm_smccc_res res;
  391. unsigned long icm_data;
  392. int err;
  393. err = kstrtoul(buf, MLXBF_LARGE_ICMC_MAX_STRING_SIZE, &icm_data);
  394. if (err)
  395. return err;
  396. if ((icm_data != 0 && icm_data < MLXBF_LARGE_ICMC_SIZE_MIN) ||
  397. icm_data > MLXBF_LARGE_ICMC_SIZE_MAX || icm_data % MLXBF_LARGE_ICMC_GRANULARITY)
  398. return -EPERM;
  399. mutex_lock(&icm_ops_lock);
  400. arm_smccc_smc(MLNX_HANDLE_SET_ICM_INFO, icm_data, 0, 0, 0, 0, 0, 0, &res);
  401. mutex_unlock(&icm_ops_lock);
  402. return res.a0 ? -EPERM : count;
  403. }
  404. static ssize_t os_up_store(struct device *dev,
  405. struct device_attribute *attr,
  406. const char *buf, size_t count)
  407. {
  408. struct arm_smccc_res res;
  409. unsigned long val;
  410. int err;
  411. err = kstrtoul(buf, 10, &val);
  412. if (err)
  413. return err;
  414. if (val != 1)
  415. return -EINVAL;
  416. mutex_lock(&os_up_lock);
  417. arm_smccc_smc(MLNX_HANDLE_OS_UP, 0, 0, 0, 0, 0, 0, 0, &res);
  418. mutex_unlock(&os_up_lock);
  419. return count;
  420. }
  421. static ssize_t oob_mac_show(struct device *dev,
  422. struct device_attribute *attr, char *buf)
  423. {
  424. struct arm_smccc_res res;
  425. u8 *mac_byte_ptr;
  426. mutex_lock(&mfg_ops_lock);
  427. arm_smccc_smc(MLXBF_BOOTCTL_GET_MFG_INFO, MLNX_MFG_TYPE_OOB_MAC, 0, 0, 0,
  428. 0, 0, 0, &res);
  429. mutex_unlock(&mfg_ops_lock);
  430. if (res.a0)
  431. return -EPERM;
  432. mac_byte_ptr = (u8 *)&res.a1;
  433. return sysfs_format_mac(buf, mac_byte_ptr, ETH_ALEN);
  434. }
  435. static ssize_t oob_mac_store(struct device *dev,
  436. struct device_attribute *attr,
  437. const char *buf, size_t count)
  438. {
  439. unsigned int byte[MLNX_MFG_OOB_MAC_FORMAT_LEN] = { 0 };
  440. struct arm_smccc_res res;
  441. int byte_idx, len;
  442. u64 mac_addr = 0;
  443. u8 *mac_byte_ptr;
  444. if ((count - 1) != MLNX_MFG_OOB_MAC_FORMAT_LEN)
  445. return -EINVAL;
  446. len = sscanf(buf, "%02x:%02x:%02x:%02x:%02x:%02x",
  447. &byte[0], &byte[1], &byte[2],
  448. &byte[3], &byte[4], &byte[5]);
  449. if (len != ETH_ALEN)
  450. return -EINVAL;
  451. mac_byte_ptr = (u8 *)&mac_addr;
  452. for (byte_idx = 0; byte_idx < ETH_ALEN; byte_idx++)
  453. mac_byte_ptr[byte_idx] = (u8)byte[byte_idx];
  454. mutex_lock(&mfg_ops_lock);
  455. arm_smccc_smc(MLXBF_BOOTCTL_SET_MFG_INFO, MLNX_MFG_TYPE_OOB_MAC,
  456. ETH_ALEN, mac_addr, 0, 0, 0, 0, &res);
  457. mutex_unlock(&mfg_ops_lock);
  458. return res.a0 ? -EPERM : count;
  459. }
  460. static ssize_t opn_show(struct device *dev,
  461. struct device_attribute *attr, char *buf)
  462. {
  463. u64 opn_data[MLNX_MFG_VAL_QWORD_CNT(OPN) + 1] = { 0 };
  464. struct arm_smccc_res res;
  465. int word;
  466. mutex_lock(&mfg_ops_lock);
  467. for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(OPN); word++) {
  468. arm_smccc_smc(MLXBF_BOOTCTL_GET_MFG_INFO,
  469. MLNX_MFG_TYPE_OPN_0 + word,
  470. 0, 0, 0, 0, 0, 0, &res);
  471. if (res.a0) {
  472. mutex_unlock(&mfg_ops_lock);
  473. return -EPERM;
  474. }
  475. opn_data[word] = res.a1;
  476. }
  477. mutex_unlock(&mfg_ops_lock);
  478. return sysfs_emit(buf, "%s", (char *)opn_data);
  479. }
  480. static ssize_t opn_store(struct device *dev,
  481. struct device_attribute *attr,
  482. const char *buf, size_t count)
  483. {
  484. u64 opn[MLNX_MFG_VAL_QWORD_CNT(OPN)] = { 0 };
  485. struct arm_smccc_res res;
  486. int word;
  487. if (count > MLNX_MFG_OPN_VAL_LEN)
  488. return -EINVAL;
  489. memcpy(opn, buf, count);
  490. mutex_lock(&mfg_ops_lock);
  491. for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(OPN); word++) {
  492. arm_smccc_smc(MLXBF_BOOTCTL_SET_MFG_INFO,
  493. MLNX_MFG_TYPE_OPN_0 + word,
  494. sizeof(u64), opn[word], 0, 0, 0, 0, &res);
  495. if (res.a0) {
  496. mutex_unlock(&mfg_ops_lock);
  497. return -EPERM;
  498. }
  499. }
  500. mutex_unlock(&mfg_ops_lock);
  501. return count;
  502. }
  503. static ssize_t sku_show(struct device *dev,
  504. struct device_attribute *attr, char *buf)
  505. {
  506. u64 sku_data[MLNX_MFG_VAL_QWORD_CNT(SKU) + 1] = { 0 };
  507. struct arm_smccc_res res;
  508. int word;
  509. mutex_lock(&mfg_ops_lock);
  510. for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(SKU); word++) {
  511. arm_smccc_smc(MLXBF_BOOTCTL_GET_MFG_INFO,
  512. MLNX_MFG_TYPE_SKU_0 + word,
  513. 0, 0, 0, 0, 0, 0, &res);
  514. if (res.a0) {
  515. mutex_unlock(&mfg_ops_lock);
  516. return -EPERM;
  517. }
  518. sku_data[word] = res.a1;
  519. }
  520. mutex_unlock(&mfg_ops_lock);
  521. return sysfs_emit(buf, "%s", (char *)sku_data);
  522. }
  523. static ssize_t sku_store(struct device *dev,
  524. struct device_attribute *attr,
  525. const char *buf, size_t count)
  526. {
  527. u64 sku[MLNX_MFG_VAL_QWORD_CNT(SKU)] = { 0 };
  528. struct arm_smccc_res res;
  529. int word;
  530. if (count > MLNX_MFG_SKU_VAL_LEN)
  531. return -EINVAL;
  532. memcpy(sku, buf, count);
  533. mutex_lock(&mfg_ops_lock);
  534. for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(SKU); word++) {
  535. arm_smccc_smc(MLXBF_BOOTCTL_SET_MFG_INFO,
  536. MLNX_MFG_TYPE_SKU_0 + word,
  537. sizeof(u64), sku[word], 0, 0, 0, 0, &res);
  538. if (res.a0) {
  539. mutex_unlock(&mfg_ops_lock);
  540. return -EPERM;
  541. }
  542. }
  543. mutex_unlock(&mfg_ops_lock);
  544. return count;
  545. }
  546. static ssize_t modl_show(struct device *dev,
  547. struct device_attribute *attr, char *buf)
  548. {
  549. u64 modl_data[MLNX_MFG_VAL_QWORD_CNT(MODL) + 1] = { 0 };
  550. struct arm_smccc_res res;
  551. int word;
  552. mutex_lock(&mfg_ops_lock);
  553. for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(MODL); word++) {
  554. arm_smccc_smc(MLXBF_BOOTCTL_GET_MFG_INFO,
  555. MLNX_MFG_TYPE_MODL_0 + word,
  556. 0, 0, 0, 0, 0, 0, &res);
  557. if (res.a0) {
  558. mutex_unlock(&mfg_ops_lock);
  559. return -EPERM;
  560. }
  561. modl_data[word] = res.a1;
  562. }
  563. mutex_unlock(&mfg_ops_lock);
  564. return sysfs_emit(buf, "%s", (char *)modl_data);
  565. }
  566. static ssize_t modl_store(struct device *dev,
  567. struct device_attribute *attr,
  568. const char *buf, size_t count)
  569. {
  570. u64 modl[MLNX_MFG_VAL_QWORD_CNT(MODL)] = { 0 };
  571. struct arm_smccc_res res;
  572. int word;
  573. if (count > MLNX_MFG_MODL_VAL_LEN)
  574. return -EINVAL;
  575. memcpy(modl, buf, count);
  576. mutex_lock(&mfg_ops_lock);
  577. for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(MODL); word++) {
  578. arm_smccc_smc(MLXBF_BOOTCTL_SET_MFG_INFO,
  579. MLNX_MFG_TYPE_MODL_0 + word,
  580. sizeof(u64), modl[word], 0, 0, 0, 0, &res);
  581. if (res.a0) {
  582. mutex_unlock(&mfg_ops_lock);
  583. return -EPERM;
  584. }
  585. }
  586. mutex_unlock(&mfg_ops_lock);
  587. return count;
  588. }
  589. static ssize_t sn_show(struct device *dev,
  590. struct device_attribute *attr, char *buf)
  591. {
  592. u64 sn_data[MLNX_MFG_VAL_QWORD_CNT(SN) + 1] = { 0 };
  593. struct arm_smccc_res res;
  594. int word;
  595. mutex_lock(&mfg_ops_lock);
  596. for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(SN); word++) {
  597. arm_smccc_smc(MLXBF_BOOTCTL_GET_MFG_INFO,
  598. MLNX_MFG_TYPE_SN_0 + word,
  599. 0, 0, 0, 0, 0, 0, &res);
  600. if (res.a0) {
  601. mutex_unlock(&mfg_ops_lock);
  602. return -EPERM;
  603. }
  604. sn_data[word] = res.a1;
  605. }
  606. mutex_unlock(&mfg_ops_lock);
  607. return sysfs_emit(buf, "%s", (char *)sn_data);
  608. }
  609. static ssize_t sn_store(struct device *dev,
  610. struct device_attribute *attr,
  611. const char *buf, size_t count)
  612. {
  613. u64 sn[MLNX_MFG_VAL_QWORD_CNT(SN)] = { 0 };
  614. struct arm_smccc_res res;
  615. int word;
  616. if (count > MLNX_MFG_SN_VAL_LEN)
  617. return -EINVAL;
  618. memcpy(sn, buf, count);
  619. mutex_lock(&mfg_ops_lock);
  620. for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(SN); word++) {
  621. arm_smccc_smc(MLXBF_BOOTCTL_SET_MFG_INFO,
  622. MLNX_MFG_TYPE_SN_0 + word,
  623. sizeof(u64), sn[word], 0, 0, 0, 0, &res);
  624. if (res.a0) {
  625. mutex_unlock(&mfg_ops_lock);
  626. return -EPERM;
  627. }
  628. }
  629. mutex_unlock(&mfg_ops_lock);
  630. return count;
  631. }
  632. static ssize_t uuid_show(struct device *dev,
  633. struct device_attribute *attr, char *buf)
  634. {
  635. u64 uuid_data[MLNX_MFG_VAL_QWORD_CNT(UUID) + 1] = { 0 };
  636. struct arm_smccc_res res;
  637. int word;
  638. mutex_lock(&mfg_ops_lock);
  639. for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(UUID); word++) {
  640. arm_smccc_smc(MLXBF_BOOTCTL_GET_MFG_INFO,
  641. MLNX_MFG_TYPE_UUID_0 + word,
  642. 0, 0, 0, 0, 0, 0, &res);
  643. if (res.a0) {
  644. mutex_unlock(&mfg_ops_lock);
  645. return -EPERM;
  646. }
  647. uuid_data[word] = res.a1;
  648. }
  649. mutex_unlock(&mfg_ops_lock);
  650. return sysfs_emit(buf, "%s", (char *)uuid_data);
  651. }
  652. static ssize_t uuid_store(struct device *dev,
  653. struct device_attribute *attr,
  654. const char *buf, size_t count)
  655. {
  656. u64 uuid[MLNX_MFG_VAL_QWORD_CNT(UUID)] = { 0 };
  657. struct arm_smccc_res res;
  658. int word;
  659. if (count > MLNX_MFG_UUID_VAL_LEN)
  660. return -EINVAL;
  661. memcpy(uuid, buf, count);
  662. mutex_lock(&mfg_ops_lock);
  663. for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(UUID); word++) {
  664. arm_smccc_smc(MLXBF_BOOTCTL_SET_MFG_INFO,
  665. MLNX_MFG_TYPE_UUID_0 + word,
  666. sizeof(u64), uuid[word], 0, 0, 0, 0, &res);
  667. if (res.a0) {
  668. mutex_unlock(&mfg_ops_lock);
  669. return -EPERM;
  670. }
  671. }
  672. mutex_unlock(&mfg_ops_lock);
  673. return count;
  674. }
  675. static ssize_t rev_show(struct device *dev,
  676. struct device_attribute *attr, char *buf)
  677. {
  678. u64 rev_data[MLNX_MFG_VAL_QWORD_CNT(REV) + 1] = { 0 };
  679. struct arm_smccc_res res;
  680. int word;
  681. mutex_lock(&mfg_ops_lock);
  682. for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(REV); word++) {
  683. arm_smccc_smc(MLXBF_BOOTCTL_GET_MFG_INFO,
  684. MLNX_MFG_TYPE_REV + word,
  685. 0, 0, 0, 0, 0, 0, &res);
  686. if (res.a0) {
  687. mutex_unlock(&mfg_ops_lock);
  688. return -EPERM;
  689. }
  690. rev_data[word] = res.a1;
  691. }
  692. mutex_unlock(&mfg_ops_lock);
  693. return sysfs_emit(buf, "%s", (char *)rev_data);
  694. }
  695. static ssize_t rev_store(struct device *dev,
  696. struct device_attribute *attr,
  697. const char *buf, size_t count)
  698. {
  699. u64 rev[MLNX_MFG_VAL_QWORD_CNT(REV)] = { 0 };
  700. struct arm_smccc_res res;
  701. int word;
  702. if (count > MLNX_MFG_REV_VAL_LEN)
  703. return -EINVAL;
  704. memcpy(rev, buf, count);
  705. mutex_lock(&mfg_ops_lock);
  706. for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(REV); word++) {
  707. arm_smccc_smc(MLXBF_BOOTCTL_SET_MFG_INFO,
  708. MLNX_MFG_TYPE_REV + word,
  709. sizeof(u64), rev[word], 0, 0, 0, 0, &res);
  710. if (res.a0) {
  711. mutex_unlock(&mfg_ops_lock);
  712. return -EPERM;
  713. }
  714. }
  715. mutex_unlock(&mfg_ops_lock);
  716. return count;
  717. }
  718. static ssize_t mfg_lock_store(struct device *dev,
  719. struct device_attribute *attr,
  720. const char *buf, size_t count)
  721. {
  722. struct arm_smccc_res res;
  723. unsigned long val;
  724. int err;
  725. err = kstrtoul(buf, 10, &val);
  726. if (err)
  727. return err;
  728. if (val != 1)
  729. return -EINVAL;
  730. mutex_lock(&mfg_ops_lock);
  731. arm_smccc_smc(MLXBF_BOOTCTL_LOCK_MFG_INFO, 0, 0, 0, 0, 0, 0, 0, &res);
  732. mutex_unlock(&mfg_ops_lock);
  733. return count;
  734. }
  735. static DEVICE_ATTR_RW(post_reset_wdog);
  736. static DEVICE_ATTR_RW(reset_action);
  737. static DEVICE_ATTR_RW(second_reset_action);
  738. static DEVICE_ATTR_RO(lifecycle_state);
  739. static DEVICE_ATTR_RO(secure_boot_fuse_state);
  740. static DEVICE_ATTR_WO(fw_reset);
  741. static DEVICE_ATTR_WO(rsh_log);
  742. static DEVICE_ATTR_RW(large_icm);
  743. static DEVICE_ATTR_WO(os_up);
  744. static DEVICE_ATTR_RW(oob_mac);
  745. static DEVICE_ATTR_RW(opn);
  746. static DEVICE_ATTR_RW(sku);
  747. static DEVICE_ATTR_RW(modl);
  748. static DEVICE_ATTR_RW(sn);
  749. static DEVICE_ATTR_RW(uuid);
  750. static DEVICE_ATTR_RW(rev);
  751. static DEVICE_ATTR_WO(mfg_lock);
  752. static struct attribute *mlxbf_bootctl_attrs[] = {
  753. &dev_attr_post_reset_wdog.attr,
  754. &dev_attr_reset_action.attr,
  755. &dev_attr_second_reset_action.attr,
  756. &dev_attr_lifecycle_state.attr,
  757. &dev_attr_secure_boot_fuse_state.attr,
  758. &dev_attr_fw_reset.attr,
  759. &dev_attr_rsh_log.attr,
  760. &dev_attr_large_icm.attr,
  761. &dev_attr_os_up.attr,
  762. &dev_attr_oob_mac.attr,
  763. &dev_attr_opn.attr,
  764. &dev_attr_sku.attr,
  765. &dev_attr_modl.attr,
  766. &dev_attr_sn.attr,
  767. &dev_attr_uuid.attr,
  768. &dev_attr_rev.attr,
  769. &dev_attr_mfg_lock.attr,
  770. NULL
  771. };
  772. ATTRIBUTE_GROUPS(mlxbf_bootctl);
  773. static const struct acpi_device_id mlxbf_bootctl_acpi_ids[] = {
  774. {"MLNXBF04", 0},
  775. {}
  776. };
  777. MODULE_DEVICE_TABLE(acpi, mlxbf_bootctl_acpi_ids);
  778. static ssize_t mlxbf_bootctl_bootfifo_read(struct file *filp,
  779. struct kobject *kobj,
  780. struct bin_attribute *bin_attr,
  781. char *buf, loff_t pos,
  782. size_t count)
  783. {
  784. unsigned long timeout = msecs_to_jiffies(500);
  785. unsigned long expire = jiffies + timeout;
  786. u64 data, cnt = 0;
  787. char *p = buf;
  788. while (count >= sizeof(data)) {
  789. /* Give up reading if no more data within 500ms. */
  790. if (!cnt) {
  791. cnt = readq(mlxbf_rsh_boot_cnt);
  792. if (!cnt) {
  793. if (time_after(jiffies, expire))
  794. break;
  795. usleep_range(10, 50);
  796. continue;
  797. }
  798. }
  799. data = readq(mlxbf_rsh_boot_data);
  800. memcpy(p, &data, sizeof(data));
  801. count -= sizeof(data);
  802. p += sizeof(data);
  803. cnt--;
  804. expire = jiffies + timeout;
  805. }
  806. return p - buf;
  807. }
  808. static struct bin_attribute mlxbf_bootctl_bootfifo_sysfs_attr = {
  809. .attr = { .name = "bootfifo", .mode = 0400 },
  810. .read = mlxbf_bootctl_bootfifo_read,
  811. };
  812. static bool mlxbf_bootctl_guid_match(const guid_t *guid,
  813. const struct arm_smccc_res *res)
  814. {
  815. guid_t id = GUID_INIT(res->a0, res->a1, res->a1 >> 16,
  816. res->a2, res->a2 >> 8, res->a2 >> 16,
  817. res->a2 >> 24, res->a3, res->a3 >> 8,
  818. res->a3 >> 16, res->a3 >> 24);
  819. return guid_equal(guid, &id);
  820. }
  821. static int mlxbf_bootctl_probe(struct platform_device *pdev)
  822. {
  823. struct arm_smccc_res res = { 0 };
  824. void __iomem *reg;
  825. guid_t guid;
  826. int ret;
  827. /* Map the resource of the bootfifo data register. */
  828. mlxbf_rsh_boot_data = devm_platform_ioremap_resource(pdev, 0);
  829. if (IS_ERR(mlxbf_rsh_boot_data))
  830. return PTR_ERR(mlxbf_rsh_boot_data);
  831. /* Map the resource of the bootfifo counter register. */
  832. mlxbf_rsh_boot_cnt = devm_platform_ioremap_resource(pdev, 1);
  833. if (IS_ERR(mlxbf_rsh_boot_cnt))
  834. return PTR_ERR(mlxbf_rsh_boot_cnt);
  835. /* Map the resource of the rshim semaphore register. */
  836. mlxbf_rsh_semaphore = devm_platform_ioremap_resource(pdev, 2);
  837. if (IS_ERR(mlxbf_rsh_semaphore))
  838. return PTR_ERR(mlxbf_rsh_semaphore);
  839. /* Map the resource of the scratch buffer (log) registers. */
  840. reg = devm_platform_ioremap_resource(pdev, 3);
  841. if (IS_ERR(reg))
  842. return PTR_ERR(reg);
  843. mlxbf_rsh_scratch_buf_ctl = reg + MLXBF_RSH_SCRATCH_BUF_CTL_OFF;
  844. mlxbf_rsh_scratch_buf_data = reg + MLXBF_RSH_SCRATCH_BUF_DATA_OFF;
  845. /* Ensure we have the UUID we expect for this service. */
  846. arm_smccc_smc(MLXBF_BOOTCTL_SIP_SVC_UID, 0, 0, 0, 0, 0, 0, 0, &res);
  847. guid_parse(mlxbf_bootctl_svc_uuid_str, &guid);
  848. if (!mlxbf_bootctl_guid_match(&guid, &res))
  849. return -ENODEV;
  850. /*
  851. * When watchdog is used, it sets boot mode to MLXBF_BOOTCTL_SWAP_EMMC
  852. * in case of boot failures. However it doesn't clear the state if there
  853. * is no failure. Restore the default boot mode here to avoid any
  854. * unnecessary boot partition swapping.
  855. */
  856. ret = mlxbf_bootctl_smc(MLXBF_BOOTCTL_SET_RESET_ACTION,
  857. MLXBF_BOOTCTL_EMMC);
  858. if (ret < 0)
  859. dev_warn(&pdev->dev, "Unable to reset the EMMC boot mode\n");
  860. ret = sysfs_create_bin_file(&pdev->dev.kobj,
  861. &mlxbf_bootctl_bootfifo_sysfs_attr);
  862. if (ret)
  863. pr_err("Unable to create bootfifo sysfs file, error %d\n", ret);
  864. return ret;
  865. }
  866. static void mlxbf_bootctl_remove(struct platform_device *pdev)
  867. {
  868. sysfs_remove_bin_file(&pdev->dev.kobj,
  869. &mlxbf_bootctl_bootfifo_sysfs_attr);
  870. }
  871. static struct platform_driver mlxbf_bootctl_driver = {
  872. .probe = mlxbf_bootctl_probe,
  873. .remove_new = mlxbf_bootctl_remove,
  874. .driver = {
  875. .name = "mlxbf-bootctl",
  876. .dev_groups = mlxbf_bootctl_groups,
  877. .acpi_match_table = mlxbf_bootctl_acpi_ids,
  878. }
  879. };
  880. module_platform_driver(mlxbf_bootctl_driver);
  881. MODULE_DESCRIPTION("Mellanox boot control driver");
  882. MODULE_LICENSE("GPL v2");
  883. MODULE_AUTHOR("Mellanox Technologies");