pwm-ep93xx.c 4.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * PWM framework driver for Cirrus Logic EP93xx
  4. *
  5. * Copyright (c) 2009 Matthieu Crapet <mcrapet@gmail.com>
  6. * Copyright (c) 2009, 2013 H Hartley Sweeten <hsweeten@visionengravers.com>
  7. *
  8. * EP9301/02 have only one channel:
  9. * platform device ep93xx-pwm.1 - PWMOUT1 (EGPIO14)
  10. *
  11. * EP9307 has only one channel:
  12. * platform device ep93xx-pwm.0 - PWMOUT
  13. *
  14. * EP9312/15 have two channels:
  15. * platform device ep93xx-pwm.0 - PWMOUT
  16. * platform device ep93xx-pwm.1 - PWMOUT1 (EGPIO14)
  17. */
  18. #include <linux/module.h>
  19. #include <linux/mod_devicetable.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/slab.h>
  22. #include <linux/clk.h>
  23. #include <linux/err.h>
  24. #include <linux/io.h>
  25. #include <linux/pwm.h>
  26. #include <asm/div64.h>
  27. #define EP93XX_PWMx_TERM_COUNT 0x00
  28. #define EP93XX_PWMx_DUTY_CYCLE 0x04
  29. #define EP93XX_PWMx_ENABLE 0x08
  30. #define EP93XX_PWMx_INVERT 0x0c
  31. struct ep93xx_pwm {
  32. void __iomem *base;
  33. struct clk *clk;
  34. };
  35. static inline struct ep93xx_pwm *to_ep93xx_pwm(struct pwm_chip *chip)
  36. {
  37. return pwmchip_get_drvdata(chip);
  38. }
  39. static int ep93xx_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
  40. const struct pwm_state *state)
  41. {
  42. int ret;
  43. struct ep93xx_pwm *ep93xx_pwm = to_ep93xx_pwm(chip);
  44. bool enabled = state->enabled;
  45. void __iomem *base = ep93xx_pwm->base;
  46. unsigned long long c;
  47. unsigned long period_cycles;
  48. unsigned long duty_cycles;
  49. unsigned long term;
  50. if (state->polarity != pwm->state.polarity) {
  51. if (enabled) {
  52. writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_ENABLE);
  53. clk_disable_unprepare(ep93xx_pwm->clk);
  54. enabled = false;
  55. }
  56. /*
  57. * The clock needs to be enabled to access the PWM registers.
  58. * Polarity can only be changed when the PWM is disabled.
  59. */
  60. ret = clk_prepare_enable(ep93xx_pwm->clk);
  61. if (ret)
  62. return ret;
  63. if (state->polarity == PWM_POLARITY_INVERSED)
  64. writew(0x1, ep93xx_pwm->base + EP93XX_PWMx_INVERT);
  65. else
  66. writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_INVERT);
  67. clk_disable_unprepare(ep93xx_pwm->clk);
  68. }
  69. if (!state->enabled) {
  70. if (enabled) {
  71. writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_ENABLE);
  72. clk_disable_unprepare(ep93xx_pwm->clk);
  73. }
  74. return 0;
  75. }
  76. /*
  77. * The clock needs to be enabled to access the PWM registers.
  78. * Configuration can be changed at any time.
  79. */
  80. if (!pwm_is_enabled(pwm)) {
  81. ret = clk_prepare_enable(ep93xx_pwm->clk);
  82. if (ret)
  83. return ret;
  84. }
  85. c = clk_get_rate(ep93xx_pwm->clk);
  86. c *= state->period;
  87. do_div(c, 1000000000);
  88. period_cycles = c;
  89. c = period_cycles;
  90. c *= state->duty_cycle;
  91. do_div(c, state->period);
  92. duty_cycles = c;
  93. if (period_cycles < 0x10000 && duty_cycles < 0x10000) {
  94. term = readw(base + EP93XX_PWMx_TERM_COUNT);
  95. /* Order is important if PWM is running */
  96. if (period_cycles > term) {
  97. writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT);
  98. writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE);
  99. } else {
  100. writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE);
  101. writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT);
  102. }
  103. ret = 0;
  104. } else {
  105. ret = -EINVAL;
  106. }
  107. if (!pwm_is_enabled(pwm))
  108. clk_disable_unprepare(ep93xx_pwm->clk);
  109. if (ret)
  110. return ret;
  111. if (!enabled) {
  112. ret = clk_prepare_enable(ep93xx_pwm->clk);
  113. if (ret)
  114. return ret;
  115. writew(0x1, ep93xx_pwm->base + EP93XX_PWMx_ENABLE);
  116. }
  117. return 0;
  118. }
  119. static const struct pwm_ops ep93xx_pwm_ops = {
  120. .apply = ep93xx_pwm_apply,
  121. };
  122. static int ep93xx_pwm_probe(struct platform_device *pdev)
  123. {
  124. struct pwm_chip *chip;
  125. struct ep93xx_pwm *ep93xx_pwm;
  126. int ret;
  127. chip = devm_pwmchip_alloc(&pdev->dev, 1, sizeof(*ep93xx_pwm));
  128. if (IS_ERR(chip))
  129. return PTR_ERR(chip);
  130. ep93xx_pwm = to_ep93xx_pwm(chip);
  131. ep93xx_pwm->base = devm_platform_ioremap_resource(pdev, 0);
  132. if (IS_ERR(ep93xx_pwm->base))
  133. return PTR_ERR(ep93xx_pwm->base);
  134. ep93xx_pwm->clk = devm_clk_get(&pdev->dev, "pwm_clk");
  135. if (IS_ERR(ep93xx_pwm->clk))
  136. return PTR_ERR(ep93xx_pwm->clk);
  137. chip->ops = &ep93xx_pwm_ops;
  138. ret = devm_pwmchip_add(&pdev->dev, chip);
  139. if (ret < 0)
  140. return ret;
  141. return 0;
  142. }
  143. static const struct of_device_id ep93xx_pwm_of_ids[] = {
  144. { .compatible = "cirrus,ep9301-pwm" },
  145. { /* sentinel */}
  146. };
  147. MODULE_DEVICE_TABLE(of, ep93xx_pwm_of_ids);
  148. static struct platform_driver ep93xx_pwm_driver = {
  149. .driver = {
  150. .name = "ep93xx-pwm",
  151. .of_match_table = ep93xx_pwm_of_ids,
  152. },
  153. .probe = ep93xx_pwm_probe,
  154. };
  155. module_platform_driver(ep93xx_pwm_driver);
  156. MODULE_DESCRIPTION("Cirrus Logic EP93xx PWM driver");
  157. MODULE_AUTHOR("Matthieu Crapet <mcrapet@gmail.com>");
  158. MODULE_AUTHOR("H Hartley Sweeten <hsweeten@visionengravers.com>");
  159. MODULE_ALIAS("platform:ep93xx-pwm");
  160. MODULE_LICENSE("GPL");