qcom-rpmh-regulator.c 63 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  3. // Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. #define pr_fmt(fmt) "%s: " fmt, __func__
  5. #include <linux/err.h>
  6. #include <linux/kernel.h>
  7. #include <linux/module.h>
  8. #include <linux/of.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/slab.h>
  11. #include <linux/string.h>
  12. #include <linux/regulator/driver.h>
  13. #include <linux/regulator/machine.h>
  14. #include <linux/regulator/of_regulator.h>
  15. #include <soc/qcom/cmd-db.h>
  16. #include <soc/qcom/rpmh.h>
  17. #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
  18. /**
  19. * enum rpmh_regulator_type - supported RPMh accelerator types
  20. * @VRM: RPMh VRM accelerator which supports voting on enable, voltage,
  21. * and mode of LDO, SMPS, and BOB type PMIC regulators.
  22. * @XOB: RPMh XOB accelerator which supports voting on the enable state
  23. * of PMIC regulators.
  24. */
  25. enum rpmh_regulator_type {
  26. VRM,
  27. XOB,
  28. };
  29. #define RPMH_REGULATOR_REG_VRM_VOLTAGE 0x0
  30. #define RPMH_REGULATOR_REG_ENABLE 0x4
  31. #define RPMH_REGULATOR_REG_VRM_MODE 0x8
  32. #define PMIC4_LDO_MODE_RETENTION 4
  33. #define PMIC4_LDO_MODE_LPM 5
  34. #define PMIC4_LDO_MODE_HPM 7
  35. #define PMIC4_SMPS_MODE_RETENTION 4
  36. #define PMIC4_SMPS_MODE_PFM 5
  37. #define PMIC4_SMPS_MODE_AUTO 6
  38. #define PMIC4_SMPS_MODE_PWM 7
  39. #define PMIC4_BOB_MODE_PASS 0
  40. #define PMIC4_BOB_MODE_PFM 1
  41. #define PMIC4_BOB_MODE_AUTO 2
  42. #define PMIC4_BOB_MODE_PWM 3
  43. #define PMIC5_LDO_MODE_RETENTION 3
  44. #define PMIC5_LDO_MODE_LPM 4
  45. #define PMIC5_LDO_MODE_HPM 7
  46. #define PMIC5_SMPS_MODE_RETENTION 3
  47. #define PMIC5_SMPS_MODE_PFM 4
  48. #define PMIC5_SMPS_MODE_AUTO 6
  49. #define PMIC5_SMPS_MODE_PWM 7
  50. #define PMIC5_BOB_MODE_PASS 2
  51. #define PMIC5_BOB_MODE_PFM 4
  52. #define PMIC5_BOB_MODE_AUTO 6
  53. #define PMIC5_BOB_MODE_PWM 7
  54. /**
  55. * struct rpmh_vreg_hw_data - RPMh regulator hardware configurations
  56. * @regulator_type: RPMh accelerator type used to manage this
  57. * regulator
  58. * @ops: Pointer to regulator ops callback structure
  59. * @voltage_ranges: The possible ranges of voltages supported by this
  60. * PMIC regulator type
  61. * @n_linear_ranges: Number of entries in voltage_ranges
  62. * @n_voltages: The number of unique voltage set points defined
  63. * by voltage_ranges
  64. * @hpm_min_load_uA: Minimum load current in microamps that requires
  65. * high power mode (HPM) operation. This is used
  66. * for LDO hardware type regulators only.
  67. * @pmic_mode_map: Array indexed by regulator framework mode
  68. * containing PMIC hardware modes. Must be large
  69. * enough to index all framework modes supported
  70. * by this regulator hardware type.
  71. * @of_map_mode: Maps an RPMH_REGULATOR_MODE_* mode value defined
  72. * in device tree to a regulator framework mode
  73. */
  74. struct rpmh_vreg_hw_data {
  75. enum rpmh_regulator_type regulator_type;
  76. const struct regulator_ops *ops;
  77. const struct linear_range *voltage_ranges;
  78. int n_linear_ranges;
  79. int n_voltages;
  80. int hpm_min_load_uA;
  81. const int *pmic_mode_map;
  82. unsigned int (*of_map_mode)(unsigned int mode);
  83. };
  84. /**
  85. * struct rpmh_vreg - individual RPMh regulator data structure encapsulating a
  86. * single regulator device
  87. * @dev: Device pointer for the top-level PMIC RPMh
  88. * regulator parent device. This is used as a
  89. * handle in RPMh write requests.
  90. * @addr: Base address of the regulator resource within
  91. * an RPMh accelerator
  92. * @rdesc: Regulator descriptor
  93. * @hw_data: PMIC regulator configuration data for this RPMh
  94. * regulator
  95. * @always_wait_for_ack: Boolean flag indicating if a request must always
  96. * wait for an ACK from RPMh before continuing even
  97. * if it corresponds to a strictly lower power
  98. * state (e.g. enabled --> disabled).
  99. * @enabled: Flag indicating if the regulator is enabled or
  100. * not
  101. * @bypassed: Boolean indicating if the regulator is in
  102. * bypass (pass-through) mode or not. This is
  103. * only used by BOB rpmh-regulator resources.
  104. * @voltage_selector: Selector used for get_voltage_sel() and
  105. * set_voltage_sel() callbacks
  106. * @mode: RPMh VRM regulator current framework mode
  107. */
  108. struct rpmh_vreg {
  109. struct device *dev;
  110. u32 addr;
  111. struct regulator_desc rdesc;
  112. const struct rpmh_vreg_hw_data *hw_data;
  113. bool always_wait_for_ack;
  114. int enabled;
  115. bool bypassed;
  116. int voltage_selector;
  117. unsigned int mode;
  118. };
  119. /**
  120. * struct rpmh_vreg_init_data - initialization data for an RPMh regulator
  121. * @name: Name for the regulator which also corresponds
  122. * to the device tree subnode name of the regulator
  123. * @resource_name: RPMh regulator resource name format string.
  124. * This must include exactly one field: '%s' which
  125. * is filled at run-time with the PMIC ID provided
  126. * by device tree property qcom,pmic-id. Example:
  127. * "ldo%s1" for RPMh resource "ldoa1".
  128. * @supply_name: Parent supply regulator name
  129. * @hw_data: Configuration data for this PMIC regulator type
  130. */
  131. struct rpmh_vreg_init_data {
  132. const char *name;
  133. const char *resource_name;
  134. const char *supply_name;
  135. const struct rpmh_vreg_hw_data *hw_data;
  136. };
  137. /**
  138. * rpmh_regulator_send_request() - send the request to RPMh
  139. * @vreg: Pointer to the RPMh regulator
  140. * @cmd: Pointer to the RPMh command to send
  141. * @wait_for_ack: Boolean indicating if execution must wait until the
  142. * request has been acknowledged as complete
  143. *
  144. * Return: 0 on success, or a negative error number on failure
  145. */
  146. static int rpmh_regulator_send_request(struct rpmh_vreg *vreg,
  147. struct tcs_cmd *cmd, bool wait_for_ack)
  148. {
  149. int ret;
  150. if (wait_for_ack || vreg->always_wait_for_ack)
  151. ret = rpmh_write(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd, 1);
  152. else
  153. ret = rpmh_write_async(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd,
  154. 1);
  155. return ret;
  156. }
  157. static int _rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev,
  158. unsigned int selector, bool wait_for_ack)
  159. {
  160. struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
  161. struct tcs_cmd cmd = {
  162. .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_VOLTAGE,
  163. };
  164. int ret;
  165. /* VRM voltage control register is set with voltage in millivolts. */
  166. cmd.data = DIV_ROUND_UP(regulator_list_voltage_linear_range(rdev,
  167. selector), 1000);
  168. ret = rpmh_regulator_send_request(vreg, &cmd, wait_for_ack);
  169. if (!ret)
  170. vreg->voltage_selector = selector;
  171. return ret;
  172. }
  173. static int rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev,
  174. unsigned int selector)
  175. {
  176. struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
  177. if (vreg->enabled == -EINVAL) {
  178. /*
  179. * Cache the voltage and send it later when the regulator is
  180. * enabled or disabled.
  181. */
  182. vreg->voltage_selector = selector;
  183. return 0;
  184. }
  185. return _rpmh_regulator_vrm_set_voltage_sel(rdev, selector,
  186. selector > vreg->voltage_selector);
  187. }
  188. static int rpmh_regulator_vrm_get_voltage_sel(struct regulator_dev *rdev)
  189. {
  190. struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
  191. return vreg->voltage_selector;
  192. }
  193. static int rpmh_regulator_is_enabled(struct regulator_dev *rdev)
  194. {
  195. struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
  196. return vreg->enabled;
  197. }
  198. static int rpmh_regulator_set_enable_state(struct regulator_dev *rdev,
  199. bool enable)
  200. {
  201. struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
  202. struct tcs_cmd cmd = {
  203. .addr = vreg->addr + RPMH_REGULATOR_REG_ENABLE,
  204. .data = enable,
  205. };
  206. int ret;
  207. if (vreg->enabled == -EINVAL &&
  208. vreg->voltage_selector != -ENOTRECOVERABLE) {
  209. ret = _rpmh_regulator_vrm_set_voltage_sel(rdev,
  210. vreg->voltage_selector, true);
  211. if (ret < 0)
  212. return ret;
  213. }
  214. ret = rpmh_regulator_send_request(vreg, &cmd, enable);
  215. if (!ret)
  216. vreg->enabled = enable;
  217. return ret;
  218. }
  219. static int rpmh_regulator_enable(struct regulator_dev *rdev)
  220. {
  221. return rpmh_regulator_set_enable_state(rdev, true);
  222. }
  223. static int rpmh_regulator_disable(struct regulator_dev *rdev)
  224. {
  225. return rpmh_regulator_set_enable_state(rdev, false);
  226. }
  227. static int rpmh_regulator_vrm_set_mode_bypass(struct rpmh_vreg *vreg,
  228. unsigned int mode, bool bypassed)
  229. {
  230. struct tcs_cmd cmd = {
  231. .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_MODE,
  232. };
  233. int pmic_mode;
  234. if (mode > REGULATOR_MODE_STANDBY)
  235. return -EINVAL;
  236. pmic_mode = vreg->hw_data->pmic_mode_map[mode];
  237. if (pmic_mode < 0)
  238. return pmic_mode;
  239. if (bypassed)
  240. cmd.data = PMIC4_BOB_MODE_PASS;
  241. else
  242. cmd.data = pmic_mode;
  243. return rpmh_regulator_send_request(vreg, &cmd, true);
  244. }
  245. static int rpmh_regulator_vrm_set_mode(struct regulator_dev *rdev,
  246. unsigned int mode)
  247. {
  248. struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
  249. int ret;
  250. if (mode == vreg->mode)
  251. return 0;
  252. ret = rpmh_regulator_vrm_set_mode_bypass(vreg, mode, vreg->bypassed);
  253. if (!ret)
  254. vreg->mode = mode;
  255. return ret;
  256. }
  257. static unsigned int rpmh_regulator_vrm_get_mode(struct regulator_dev *rdev)
  258. {
  259. struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
  260. return vreg->mode;
  261. }
  262. /**
  263. * rpmh_regulator_vrm_get_optimum_mode() - get the mode based on the load
  264. * @rdev: Regulator device pointer for the rpmh-regulator
  265. * @input_uV: Input voltage
  266. * @output_uV: Output voltage
  267. * @load_uA: Aggregated load current in microamps
  268. *
  269. * This function is used in the regulator_ops for VRM type RPMh regulator
  270. * devices.
  271. *
  272. * Return: 0 on success, or a negative error number on failure
  273. */
  274. static unsigned int rpmh_regulator_vrm_get_optimum_mode(
  275. struct regulator_dev *rdev, int input_uV, int output_uV, int load_uA)
  276. {
  277. struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
  278. if (load_uA >= vreg->hw_data->hpm_min_load_uA)
  279. return REGULATOR_MODE_NORMAL;
  280. else
  281. return REGULATOR_MODE_IDLE;
  282. }
  283. static int rpmh_regulator_vrm_set_bypass(struct regulator_dev *rdev,
  284. bool enable)
  285. {
  286. struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
  287. int ret;
  288. if (vreg->bypassed == enable)
  289. return 0;
  290. ret = rpmh_regulator_vrm_set_mode_bypass(vreg, vreg->mode, enable);
  291. if (!ret)
  292. vreg->bypassed = enable;
  293. return ret;
  294. }
  295. static int rpmh_regulator_vrm_get_bypass(struct regulator_dev *rdev,
  296. bool *enable)
  297. {
  298. struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
  299. *enable = vreg->bypassed;
  300. return 0;
  301. }
  302. static const struct regulator_ops rpmh_regulator_vrm_ops = {
  303. .enable = rpmh_regulator_enable,
  304. .disable = rpmh_regulator_disable,
  305. .is_enabled = rpmh_regulator_is_enabled,
  306. .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel,
  307. .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel,
  308. .list_voltage = regulator_list_voltage_linear_range,
  309. .set_mode = rpmh_regulator_vrm_set_mode,
  310. .get_mode = rpmh_regulator_vrm_get_mode,
  311. };
  312. static const struct regulator_ops rpmh_regulator_vrm_drms_ops = {
  313. .enable = rpmh_regulator_enable,
  314. .disable = rpmh_regulator_disable,
  315. .is_enabled = rpmh_regulator_is_enabled,
  316. .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel,
  317. .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel,
  318. .list_voltage = regulator_list_voltage_linear_range,
  319. .set_mode = rpmh_regulator_vrm_set_mode,
  320. .get_mode = rpmh_regulator_vrm_get_mode,
  321. .get_optimum_mode = rpmh_regulator_vrm_get_optimum_mode,
  322. };
  323. static const struct regulator_ops rpmh_regulator_vrm_bypass_ops = {
  324. .enable = rpmh_regulator_enable,
  325. .disable = rpmh_regulator_disable,
  326. .is_enabled = rpmh_regulator_is_enabled,
  327. .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel,
  328. .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel,
  329. .list_voltage = regulator_list_voltage_linear_range,
  330. .set_mode = rpmh_regulator_vrm_set_mode,
  331. .get_mode = rpmh_regulator_vrm_get_mode,
  332. .set_bypass = rpmh_regulator_vrm_set_bypass,
  333. .get_bypass = rpmh_regulator_vrm_get_bypass,
  334. };
  335. static const struct regulator_ops rpmh_regulator_xob_ops = {
  336. .enable = rpmh_regulator_enable,
  337. .disable = rpmh_regulator_disable,
  338. .is_enabled = rpmh_regulator_is_enabled,
  339. };
  340. /**
  341. * rpmh_regulator_init_vreg() - initialize all attributes of an rpmh-regulator
  342. * @vreg: Pointer to the individual rpmh-regulator resource
  343. * @dev: Pointer to the top level rpmh-regulator PMIC device
  344. * @node: Pointer to the individual rpmh-regulator resource
  345. * device node
  346. * @pmic_id: String used to identify the top level rpmh-regulator
  347. * PMIC device on the board
  348. * @pmic_rpmh_data: Pointer to a null-terminated array of rpmh-regulator
  349. * resources defined for the top level PMIC device
  350. *
  351. * Return: 0 on success, or a negative error number on failure
  352. */
  353. static int rpmh_regulator_init_vreg(struct rpmh_vreg *vreg, struct device *dev,
  354. struct device_node *node, const char *pmic_id,
  355. const struct rpmh_vreg_init_data *pmic_rpmh_data)
  356. {
  357. struct regulator_config reg_config = {};
  358. char rpmh_resource_name[20] = "";
  359. const struct rpmh_vreg_init_data *rpmh_data;
  360. struct regulator_init_data *init_data;
  361. struct regulator_dev *rdev;
  362. int ret;
  363. vreg->dev = dev;
  364. for (rpmh_data = pmic_rpmh_data; rpmh_data->name; rpmh_data++)
  365. if (of_node_name_eq(node, rpmh_data->name))
  366. break;
  367. if (!rpmh_data->name) {
  368. dev_err(dev, "Unknown regulator %pOFn\n", node);
  369. return -EINVAL;
  370. }
  371. scnprintf(rpmh_resource_name, sizeof(rpmh_resource_name),
  372. rpmh_data->resource_name, pmic_id);
  373. vreg->addr = cmd_db_read_addr(rpmh_resource_name);
  374. if (!vreg->addr) {
  375. dev_err(dev, "%pOFn: could not find RPMh address for resource %s\n",
  376. node, rpmh_resource_name);
  377. return -ENODEV;
  378. }
  379. vreg->rdesc.name = rpmh_data->name;
  380. vreg->rdesc.supply_name = rpmh_data->supply_name;
  381. vreg->hw_data = rpmh_data->hw_data;
  382. vreg->enabled = -EINVAL;
  383. vreg->voltage_selector = -ENOTRECOVERABLE;
  384. vreg->mode = REGULATOR_MODE_INVALID;
  385. if (rpmh_data->hw_data->n_voltages) {
  386. vreg->rdesc.linear_ranges = rpmh_data->hw_data->voltage_ranges;
  387. vreg->rdesc.n_linear_ranges = rpmh_data->hw_data->n_linear_ranges;
  388. vreg->rdesc.n_voltages = rpmh_data->hw_data->n_voltages;
  389. }
  390. vreg->always_wait_for_ack = of_property_read_bool(node,
  391. "qcom,always-wait-for-ack");
  392. vreg->rdesc.owner = THIS_MODULE;
  393. vreg->rdesc.type = REGULATOR_VOLTAGE;
  394. vreg->rdesc.ops = vreg->hw_data->ops;
  395. vreg->rdesc.of_map_mode = vreg->hw_data->of_map_mode;
  396. init_data = of_get_regulator_init_data(dev, node, &vreg->rdesc);
  397. if (!init_data)
  398. return -ENOMEM;
  399. if (rpmh_data->hw_data->regulator_type == XOB &&
  400. init_data->constraints.min_uV &&
  401. init_data->constraints.min_uV == init_data->constraints.max_uV) {
  402. vreg->rdesc.fixed_uV = init_data->constraints.min_uV;
  403. vreg->rdesc.n_voltages = 1;
  404. }
  405. reg_config.dev = dev;
  406. reg_config.init_data = init_data;
  407. reg_config.of_node = node;
  408. reg_config.driver_data = vreg;
  409. rdev = devm_regulator_register(dev, &vreg->rdesc, &reg_config);
  410. if (IS_ERR(rdev)) {
  411. ret = PTR_ERR(rdev);
  412. dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n",
  413. node, ret);
  414. return ret;
  415. }
  416. dev_dbg(dev, "%pOFn regulator registered for RPMh resource %s @ 0x%05X\n",
  417. node, rpmh_resource_name, vreg->addr);
  418. return 0;
  419. }
  420. static const int pmic_mode_map_pmic4_ldo[REGULATOR_MODE_STANDBY + 1] = {
  421. [REGULATOR_MODE_INVALID] = -EINVAL,
  422. [REGULATOR_MODE_STANDBY] = PMIC4_LDO_MODE_RETENTION,
  423. [REGULATOR_MODE_IDLE] = PMIC4_LDO_MODE_LPM,
  424. [REGULATOR_MODE_NORMAL] = PMIC4_LDO_MODE_HPM,
  425. [REGULATOR_MODE_FAST] = -EINVAL,
  426. };
  427. static const int pmic_mode_map_pmic5_ldo[REGULATOR_MODE_STANDBY + 1] = {
  428. [REGULATOR_MODE_INVALID] = -EINVAL,
  429. [REGULATOR_MODE_STANDBY] = PMIC5_LDO_MODE_RETENTION,
  430. [REGULATOR_MODE_IDLE] = PMIC5_LDO_MODE_LPM,
  431. [REGULATOR_MODE_NORMAL] = PMIC5_LDO_MODE_HPM,
  432. [REGULATOR_MODE_FAST] = -EINVAL,
  433. };
  434. static const int pmic_mode_map_pmic5_ldo_hpm[REGULATOR_MODE_STANDBY + 1] = {
  435. [REGULATOR_MODE_INVALID] = -EINVAL,
  436. [REGULATOR_MODE_STANDBY] = -EINVAL,
  437. [REGULATOR_MODE_IDLE] = -EINVAL,
  438. [REGULATOR_MODE_NORMAL] = PMIC5_LDO_MODE_HPM,
  439. [REGULATOR_MODE_FAST] = -EINVAL,
  440. };
  441. static unsigned int rpmh_regulator_pmic4_ldo_of_map_mode(unsigned int rpmh_mode)
  442. {
  443. unsigned int mode;
  444. switch (rpmh_mode) {
  445. case RPMH_REGULATOR_MODE_HPM:
  446. mode = REGULATOR_MODE_NORMAL;
  447. break;
  448. case RPMH_REGULATOR_MODE_LPM:
  449. mode = REGULATOR_MODE_IDLE;
  450. break;
  451. case RPMH_REGULATOR_MODE_RET:
  452. mode = REGULATOR_MODE_STANDBY;
  453. break;
  454. default:
  455. mode = REGULATOR_MODE_INVALID;
  456. break;
  457. }
  458. return mode;
  459. }
  460. static const int pmic_mode_map_pmic4_smps[REGULATOR_MODE_STANDBY + 1] = {
  461. [REGULATOR_MODE_INVALID] = -EINVAL,
  462. [REGULATOR_MODE_STANDBY] = PMIC4_SMPS_MODE_RETENTION,
  463. [REGULATOR_MODE_IDLE] = PMIC4_SMPS_MODE_PFM,
  464. [REGULATOR_MODE_NORMAL] = PMIC4_SMPS_MODE_AUTO,
  465. [REGULATOR_MODE_FAST] = PMIC4_SMPS_MODE_PWM,
  466. };
  467. static const int pmic_mode_map_pmic5_smps[REGULATOR_MODE_STANDBY + 1] = {
  468. [REGULATOR_MODE_INVALID] = -EINVAL,
  469. [REGULATOR_MODE_STANDBY] = PMIC5_SMPS_MODE_RETENTION,
  470. [REGULATOR_MODE_IDLE] = PMIC5_SMPS_MODE_PFM,
  471. [REGULATOR_MODE_NORMAL] = PMIC5_SMPS_MODE_AUTO,
  472. [REGULATOR_MODE_FAST] = PMIC5_SMPS_MODE_PWM,
  473. };
  474. static unsigned int
  475. rpmh_regulator_pmic4_smps_of_map_mode(unsigned int rpmh_mode)
  476. {
  477. unsigned int mode;
  478. switch (rpmh_mode) {
  479. case RPMH_REGULATOR_MODE_HPM:
  480. mode = REGULATOR_MODE_FAST;
  481. break;
  482. case RPMH_REGULATOR_MODE_AUTO:
  483. mode = REGULATOR_MODE_NORMAL;
  484. break;
  485. case RPMH_REGULATOR_MODE_LPM:
  486. mode = REGULATOR_MODE_IDLE;
  487. break;
  488. case RPMH_REGULATOR_MODE_RET:
  489. mode = REGULATOR_MODE_STANDBY;
  490. break;
  491. default:
  492. mode = REGULATOR_MODE_INVALID;
  493. break;
  494. }
  495. return mode;
  496. }
  497. static const int pmic_mode_map_pmic4_bob[REGULATOR_MODE_STANDBY + 1] = {
  498. [REGULATOR_MODE_INVALID] = -EINVAL,
  499. [REGULATOR_MODE_STANDBY] = -EINVAL,
  500. [REGULATOR_MODE_IDLE] = PMIC4_BOB_MODE_PFM,
  501. [REGULATOR_MODE_NORMAL] = PMIC4_BOB_MODE_AUTO,
  502. [REGULATOR_MODE_FAST] = PMIC4_BOB_MODE_PWM,
  503. };
  504. static const int pmic_mode_map_pmic5_bob[REGULATOR_MODE_STANDBY + 1] = {
  505. [REGULATOR_MODE_INVALID] = -EINVAL,
  506. [REGULATOR_MODE_STANDBY] = -EINVAL,
  507. [REGULATOR_MODE_IDLE] = PMIC5_BOB_MODE_PFM,
  508. [REGULATOR_MODE_NORMAL] = PMIC5_BOB_MODE_AUTO,
  509. [REGULATOR_MODE_FAST] = PMIC5_BOB_MODE_PWM,
  510. };
  511. static unsigned int rpmh_regulator_pmic4_bob_of_map_mode(unsigned int rpmh_mode)
  512. {
  513. unsigned int mode;
  514. switch (rpmh_mode) {
  515. case RPMH_REGULATOR_MODE_HPM:
  516. mode = REGULATOR_MODE_FAST;
  517. break;
  518. case RPMH_REGULATOR_MODE_AUTO:
  519. mode = REGULATOR_MODE_NORMAL;
  520. break;
  521. case RPMH_REGULATOR_MODE_LPM:
  522. mode = REGULATOR_MODE_IDLE;
  523. break;
  524. default:
  525. mode = REGULATOR_MODE_INVALID;
  526. break;
  527. }
  528. return mode;
  529. }
  530. static const struct rpmh_vreg_hw_data pmic4_pldo = {
  531. .regulator_type = VRM,
  532. .ops = &rpmh_regulator_vrm_drms_ops,
  533. .voltage_ranges = (struct linear_range[]) {
  534. REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
  535. },
  536. .n_linear_ranges = 1,
  537. .n_voltages = 256,
  538. .hpm_min_load_uA = 10000,
  539. .pmic_mode_map = pmic_mode_map_pmic4_ldo,
  540. .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
  541. };
  542. static const struct rpmh_vreg_hw_data pmic4_pldo_lv = {
  543. .regulator_type = VRM,
  544. .ops = &rpmh_regulator_vrm_drms_ops,
  545. .voltage_ranges = (struct linear_range[]) {
  546. REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
  547. },
  548. .n_linear_ranges = 1,
  549. .n_voltages = 128,
  550. .hpm_min_load_uA = 10000,
  551. .pmic_mode_map = pmic_mode_map_pmic4_ldo,
  552. .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
  553. };
  554. static const struct rpmh_vreg_hw_data pmic4_nldo = {
  555. .regulator_type = VRM,
  556. .ops = &rpmh_regulator_vrm_drms_ops,
  557. .voltage_ranges = (struct linear_range[]) {
  558. REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
  559. },
  560. .n_linear_ranges = 1,
  561. .n_voltages = 128,
  562. .hpm_min_load_uA = 30000,
  563. .pmic_mode_map = pmic_mode_map_pmic4_ldo,
  564. .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
  565. };
  566. static const struct rpmh_vreg_hw_data pmic4_hfsmps3 = {
  567. .regulator_type = VRM,
  568. .ops = &rpmh_regulator_vrm_ops,
  569. .voltage_ranges = (struct linear_range[]) {
  570. REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
  571. },
  572. .n_linear_ranges = 1,
  573. .n_voltages = 216,
  574. .pmic_mode_map = pmic_mode_map_pmic4_smps,
  575. .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
  576. };
  577. static const struct rpmh_vreg_hw_data pmic4_ftsmps426 = {
  578. .regulator_type = VRM,
  579. .ops = &rpmh_regulator_vrm_ops,
  580. .voltage_ranges = (struct linear_range[]) {
  581. REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
  582. },
  583. .n_linear_ranges = 1,
  584. .n_voltages = 259,
  585. .pmic_mode_map = pmic_mode_map_pmic4_smps,
  586. .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
  587. };
  588. static const struct rpmh_vreg_hw_data pmic4_bob = {
  589. .regulator_type = VRM,
  590. .ops = &rpmh_regulator_vrm_bypass_ops,
  591. .voltage_ranges = (struct linear_range[]) {
  592. REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
  593. },
  594. .n_linear_ranges = 1,
  595. .n_voltages = 84,
  596. .pmic_mode_map = pmic_mode_map_pmic4_bob,
  597. .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode,
  598. };
  599. static const struct rpmh_vreg_hw_data pmic4_lvs = {
  600. .regulator_type = XOB,
  601. .ops = &rpmh_regulator_xob_ops,
  602. /* LVS hardware does not support voltage or mode configuration. */
  603. };
  604. static const struct rpmh_vreg_hw_data pmic5_pldo = {
  605. .regulator_type = VRM,
  606. .ops = &rpmh_regulator_vrm_drms_ops,
  607. .voltage_ranges = (struct linear_range[]) {
  608. REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
  609. },
  610. .n_linear_ranges = 1,
  611. .n_voltages = 256,
  612. .hpm_min_load_uA = 10000,
  613. .pmic_mode_map = pmic_mode_map_pmic5_ldo,
  614. .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
  615. };
  616. static const struct rpmh_vreg_hw_data pmic5_pldo_lv = {
  617. .regulator_type = VRM,
  618. .ops = &rpmh_regulator_vrm_drms_ops,
  619. .voltage_ranges = (struct linear_range[]) {
  620. REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000),
  621. },
  622. .n_linear_ranges = 1,
  623. .n_voltages = 63,
  624. .hpm_min_load_uA = 10000,
  625. .pmic_mode_map = pmic_mode_map_pmic5_ldo,
  626. .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
  627. };
  628. static const struct rpmh_vreg_hw_data pmic5_pldo515_mv = {
  629. .regulator_type = VRM,
  630. .ops = &rpmh_regulator_vrm_drms_ops,
  631. .voltage_ranges = (struct linear_range[]) {
  632. REGULATOR_LINEAR_RANGE(1800000, 0, 187, 8000),
  633. },
  634. .n_linear_ranges = 1,
  635. .n_voltages = 188,
  636. .hpm_min_load_uA = 10000,
  637. .pmic_mode_map = pmic_mode_map_pmic5_ldo,
  638. .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
  639. };
  640. static const struct rpmh_vreg_hw_data pmic5_pldo502 = {
  641. .regulator_type = VRM,
  642. .ops = &rpmh_regulator_vrm_ops,
  643. .voltage_ranges = (struct linear_range[]) {
  644. REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
  645. },
  646. .n_linear_ranges = 1,
  647. .n_voltages = 256,
  648. .pmic_mode_map = pmic_mode_map_pmic5_ldo_hpm,
  649. .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
  650. };
  651. static const struct rpmh_vreg_hw_data pmic5_pldo502ln = {
  652. .regulator_type = VRM,
  653. .ops = &rpmh_regulator_vrm_ops,
  654. .voltage_ranges = (struct linear_range[]) {
  655. REGULATOR_LINEAR_RANGE(1800000, 0, 2, 200000),
  656. REGULATOR_LINEAR_RANGE(2608000, 3, 28, 16000),
  657. REGULATOR_LINEAR_RANGE(3104000, 29, 30, 96000),
  658. REGULATOR_LINEAR_RANGE(3312000, 31, 31, 0),
  659. },
  660. .n_linear_ranges = 4,
  661. .n_voltages = 32,
  662. .pmic_mode_map = pmic_mode_map_pmic5_ldo_hpm,
  663. .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
  664. };
  665. static const struct rpmh_vreg_hw_data pmic5_nldo = {
  666. .regulator_type = VRM,
  667. .ops = &rpmh_regulator_vrm_drms_ops,
  668. .voltage_ranges = (struct linear_range[]) {
  669. REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000),
  670. },
  671. .n_linear_ranges = 1,
  672. .n_voltages = 124,
  673. .hpm_min_load_uA = 30000,
  674. .pmic_mode_map = pmic_mode_map_pmic5_ldo,
  675. .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
  676. };
  677. static const struct rpmh_vreg_hw_data pmic5_nldo515 = {
  678. .regulator_type = VRM,
  679. .ops = &rpmh_regulator_vrm_drms_ops,
  680. .voltage_ranges = (struct linear_range[]) {
  681. REGULATOR_LINEAR_RANGE(320000, 0, 210, 8000),
  682. },
  683. .n_linear_ranges = 1,
  684. .n_voltages = 211,
  685. .hpm_min_load_uA = 30000,
  686. .pmic_mode_map = pmic_mode_map_pmic5_ldo,
  687. .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
  688. };
  689. static const struct rpmh_vreg_hw_data pmic5_nldo502 = {
  690. .regulator_type = VRM,
  691. .ops = &rpmh_regulator_vrm_drms_ops,
  692. .voltage_ranges = (struct linear_range[]) {
  693. REGULATOR_LINEAR_RANGE(528000, 0, 127, 8000),
  694. },
  695. .n_linear_ranges = 1,
  696. .n_voltages = 128,
  697. .hpm_min_load_uA = 30000,
  698. .pmic_mode_map = pmic_mode_map_pmic5_ldo,
  699. .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
  700. };
  701. static const struct rpmh_vreg_hw_data pmic5_hfsmps510 = {
  702. .regulator_type = VRM,
  703. .ops = &rpmh_regulator_vrm_ops,
  704. .voltage_ranges = (struct linear_range[]) {
  705. REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
  706. },
  707. .n_linear_ranges = 1,
  708. .n_voltages = 216,
  709. .pmic_mode_map = pmic_mode_map_pmic5_smps,
  710. .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
  711. };
  712. static const struct rpmh_vreg_hw_data pmic5_ftsmps510 = {
  713. .regulator_type = VRM,
  714. .ops = &rpmh_regulator_vrm_ops,
  715. .voltage_ranges = (struct linear_range[]) {
  716. REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000),
  717. },
  718. .n_linear_ranges = 1,
  719. .n_voltages = 264,
  720. .pmic_mode_map = pmic_mode_map_pmic5_smps,
  721. .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
  722. };
  723. static const struct rpmh_vreg_hw_data pmic5_ftsmps520 = {
  724. .regulator_type = VRM,
  725. .ops = &rpmh_regulator_vrm_ops,
  726. .voltage_ranges = (struct linear_range[]) {
  727. REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000),
  728. },
  729. .n_linear_ranges = 1,
  730. .n_voltages = 264,
  731. .pmic_mode_map = pmic_mode_map_pmic5_smps,
  732. .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
  733. };
  734. static const struct rpmh_vreg_hw_data pmic5_ftsmps525 = {
  735. .regulator_type = VRM,
  736. .ops = &rpmh_regulator_vrm_ops,
  737. .voltage_ranges = (struct linear_range[]) {
  738. REGULATOR_LINEAR_RANGE(300000, 0, 267, 4000),
  739. REGULATOR_LINEAR_RANGE(1376000, 268, 438, 8000),
  740. },
  741. .n_linear_ranges = 2,
  742. .n_voltages = 439,
  743. .pmic_mode_map = pmic_mode_map_pmic5_smps,
  744. .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
  745. };
  746. static const struct rpmh_vreg_hw_data pmic5_ftsmps527 = {
  747. .regulator_type = VRM,
  748. .ops = &rpmh_regulator_vrm_ops,
  749. .voltage_ranges = (struct linear_range[]) {
  750. REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
  751. },
  752. .n_linear_ranges = 1,
  753. .n_voltages = 215,
  754. .pmic_mode_map = pmic_mode_map_pmic5_smps,
  755. .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
  756. };
  757. static const struct rpmh_vreg_hw_data pmic5_hfsmps515 = {
  758. .regulator_type = VRM,
  759. .ops = &rpmh_regulator_vrm_ops,
  760. .voltage_ranges = (struct linear_range[]) {
  761. REGULATOR_LINEAR_RANGE(320000, 0, 235, 16000),
  762. },
  763. .n_linear_ranges = 1,
  764. .n_voltages = 236,
  765. .pmic_mode_map = pmic_mode_map_pmic5_smps,
  766. .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
  767. };
  768. static const struct rpmh_vreg_hw_data pmic5_hfsmps515_1 = {
  769. .regulator_type = VRM,
  770. .ops = &rpmh_regulator_vrm_ops,
  771. .voltage_ranges = (struct linear_range[]) {
  772. REGULATOR_LINEAR_RANGE(900000, 0, 4, 16000),
  773. },
  774. .n_linear_ranges = 1,
  775. .n_voltages = 5,
  776. .pmic_mode_map = pmic_mode_map_pmic5_smps,
  777. .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
  778. };
  779. static const struct rpmh_vreg_hw_data pmic5_bob = {
  780. .regulator_type = VRM,
  781. .ops = &rpmh_regulator_vrm_bypass_ops,
  782. .voltage_ranges = (struct linear_range[]) {
  783. REGULATOR_LINEAR_RANGE(3000000, 0, 31, 32000),
  784. },
  785. .n_linear_ranges = 1,
  786. .n_voltages = 32,
  787. .pmic_mode_map = pmic_mode_map_pmic5_bob,
  788. .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode,
  789. };
  790. #define RPMH_VREG(_name, _resource_name, _hw_data, _supply_name) \
  791. { \
  792. .name = _name, \
  793. .resource_name = _resource_name, \
  794. .hw_data = _hw_data, \
  795. .supply_name = _supply_name, \
  796. }
  797. static const struct rpmh_vreg_init_data pm8998_vreg_data[] = {
  798. RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
  799. RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
  800. RPMH_VREG("smps3", "smp%s3", &pmic4_hfsmps3, "vdd-s3"),
  801. RPMH_VREG("smps4", "smp%s4", &pmic4_hfsmps3, "vdd-s4"),
  802. RPMH_VREG("smps5", "smp%s5", &pmic4_hfsmps3, "vdd-s5"),
  803. RPMH_VREG("smps6", "smp%s6", &pmic4_ftsmps426, "vdd-s6"),
  804. RPMH_VREG("smps7", "smp%s7", &pmic4_ftsmps426, "vdd-s7"),
  805. RPMH_VREG("smps8", "smp%s8", &pmic4_ftsmps426, "vdd-s8"),
  806. RPMH_VREG("smps9", "smp%s9", &pmic4_ftsmps426, "vdd-s9"),
  807. RPMH_VREG("smps10", "smp%s10", &pmic4_ftsmps426, "vdd-s10"),
  808. RPMH_VREG("smps11", "smp%s11", &pmic4_ftsmps426, "vdd-s11"),
  809. RPMH_VREG("smps12", "smp%s12", &pmic4_ftsmps426, "vdd-s12"),
  810. RPMH_VREG("smps13", "smp%s13", &pmic4_ftsmps426, "vdd-s13"),
  811. RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l27"),
  812. RPMH_VREG("ldo2", "ldo%s2", &pmic4_nldo, "vdd-l2-l8-l17"),
  813. RPMH_VREG("ldo3", "ldo%s3", &pmic4_nldo, "vdd-l3-l11"),
  814. RPMH_VREG("ldo4", "ldo%s4", &pmic4_nldo, "vdd-l4-l5"),
  815. RPMH_VREG("ldo5", "ldo%s5", &pmic4_nldo, "vdd-l4-l5"),
  816. RPMH_VREG("ldo6", "ldo%s6", &pmic4_pldo, "vdd-l6"),
  817. RPMH_VREG("ldo7", "ldo%s7", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
  818. RPMH_VREG("ldo8", "ldo%s8", &pmic4_nldo, "vdd-l2-l8-l17"),
  819. RPMH_VREG("ldo9", "ldo%s9", &pmic4_pldo, "vdd-l9"),
  820. RPMH_VREG("ldo10", "ldo%s10", &pmic4_pldo, "vdd-l10-l23-l25"),
  821. RPMH_VREG("ldo11", "ldo%s11", &pmic4_nldo, "vdd-l3-l11"),
  822. RPMH_VREG("ldo12", "ldo%s12", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
  823. RPMH_VREG("ldo13", "ldo%s13", &pmic4_pldo, "vdd-l13-l19-l21"),
  824. RPMH_VREG("ldo14", "ldo%s14", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
  825. RPMH_VREG("ldo15", "ldo%s15", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
  826. RPMH_VREG("ldo16", "ldo%s16", &pmic4_pldo, "vdd-l16-l28"),
  827. RPMH_VREG("ldo17", "ldo%s17", &pmic4_nldo, "vdd-l2-l8-l17"),
  828. RPMH_VREG("ldo18", "ldo%s18", &pmic4_pldo, "vdd-l18-l22"),
  829. RPMH_VREG("ldo19", "ldo%s19", &pmic4_pldo, "vdd-l13-l19-l21"),
  830. RPMH_VREG("ldo20", "ldo%s20", &pmic4_pldo, "vdd-l20-l24"),
  831. RPMH_VREG("ldo21", "ldo%s21", &pmic4_pldo, "vdd-l13-l19-l21"),
  832. RPMH_VREG("ldo22", "ldo%s22", &pmic4_pldo, "vdd-l18-l22"),
  833. RPMH_VREG("ldo23", "ldo%s23", &pmic4_pldo, "vdd-l10-l23-l25"),
  834. RPMH_VREG("ldo24", "ldo%s24", &pmic4_pldo, "vdd-l20-l24"),
  835. RPMH_VREG("ldo25", "ldo%s25", &pmic4_pldo, "vdd-l10-l23-l25"),
  836. RPMH_VREG("ldo26", "ldo%s26", &pmic4_nldo, "vdd-l26"),
  837. RPMH_VREG("ldo27", "ldo%s27", &pmic4_nldo, "vdd-l1-l27"),
  838. RPMH_VREG("ldo28", "ldo%s28", &pmic4_pldo, "vdd-l16-l28"),
  839. RPMH_VREG("lvs1", "vs%s1", &pmic4_lvs, "vin-lvs-1-2"),
  840. RPMH_VREG("lvs2", "vs%s2", &pmic4_lvs, "vin-lvs-1-2"),
  841. {}
  842. };
  843. static const struct rpmh_vreg_init_data pmg1110_vreg_data[] = {
  844. RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
  845. {}
  846. };
  847. static const struct rpmh_vreg_init_data pmi8998_vreg_data[] = {
  848. RPMH_VREG("bob", "bob%s1", &pmic4_bob, "vdd-bob"),
  849. {}
  850. };
  851. static const struct rpmh_vreg_init_data pm8005_vreg_data[] = {
  852. RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
  853. RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
  854. RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3"),
  855. RPMH_VREG("smps4", "smp%s4", &pmic4_ftsmps426, "vdd-s4"),
  856. {}
  857. };
  858. static const struct rpmh_vreg_init_data pm8150_vreg_data[] = {
  859. RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
  860. RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
  861. RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
  862. RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
  863. RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
  864. RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
  865. RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
  866. RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
  867. RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
  868. RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
  869. RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l8-l11"),
  870. RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l10"),
  871. RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
  872. RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
  873. RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
  874. RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9"),
  875. RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l12-l14-l15"),
  876. RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l1-l8-l11"),
  877. RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9"),
  878. RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l2-l10"),
  879. RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo, "vdd-l1-l8-l11"),
  880. RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
  881. RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l13-l16-l17"),
  882. RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
  883. RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
  884. RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16-l17"),
  885. RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l13-l16-l17"),
  886. RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
  887. {}
  888. };
  889. static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = {
  890. RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
  891. RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
  892. RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
  893. RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
  894. RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
  895. RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
  896. RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
  897. RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
  898. RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l8"),
  899. RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"),
  900. RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"),
  901. RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l4-l5-l6"),
  902. RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l4-l5-l6"),
  903. RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l4-l5-l6"),
  904. RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l11"),
  905. RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo_lv, "vdd-l1-l8"),
  906. RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l9-l10"),
  907. RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"),
  908. RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"),
  909. RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
  910. {}
  911. };
  912. static const struct rpmh_vreg_init_data pmm8155au_vreg_data[] = {
  913. RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
  914. RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
  915. RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
  916. RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
  917. RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
  918. RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
  919. RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
  920. RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
  921. RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
  922. RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
  923. RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l8-l11"),
  924. RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l10"),
  925. RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
  926. RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
  927. RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
  928. RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9"),
  929. RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
  930. RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l1-l8-l11"),
  931. RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9"),
  932. RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l2-l10"),
  933. RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo, "vdd-l1-l8-l11"),
  934. RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
  935. RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l13-l16-l17"),
  936. RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
  937. RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
  938. RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16-l17"),
  939. RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l13-l16-l17"),
  940. RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
  941. {}
  942. };
  943. static const struct rpmh_vreg_init_data pmm8654au_vreg_data[] = {
  944. RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps527, "vdd-s1"),
  945. RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps527, "vdd-s2"),
  946. RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps527, "vdd-s3"),
  947. RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps527, "vdd-s4"),
  948. RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps527, "vdd-s5"),
  949. RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps527, "vdd-s6"),
  950. RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps527, "vdd-s7"),
  951. RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps527, "vdd-s8"),
  952. RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps527, "vdd-s9"),
  953. RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-s9"),
  954. RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2-l3"),
  955. RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l2-l3"),
  956. RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo515, "vdd-s9"),
  957. RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo515, "vdd-s9"),
  958. RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo515, "vdd-l6-l7"),
  959. RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo515, "vdd-l6-l7"),
  960. RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo515_mv, "vdd-l8-l9"),
  961. RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l8-l9"),
  962. {}
  963. };
  964. static const struct rpmh_vreg_init_data pm8350_vreg_data[] = {
  965. RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
  966. RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
  967. RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
  968. RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
  969. RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
  970. RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
  971. RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
  972. RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
  973. RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
  974. RPMH_VREG("smps10", "smp%s10", &pmic5_hfsmps510, "vdd-s10"),
  975. RPMH_VREG("smps11", "smp%s11", &pmic5_hfsmps510, "vdd-s11"),
  976. RPMH_VREG("smps12", "smp%s12", &pmic5_hfsmps510, "vdd-s12"),
  977. RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l4"),
  978. RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l7"),
  979. RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l5"),
  980. RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l1-l4"),
  981. RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l5"),
  982. RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9-l10"),
  983. RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l2-l7"),
  984. RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8"),
  985. RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9-l10"),
  986. RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l6-l9-l10"),
  987. {}
  988. };
  989. static const struct rpmh_vreg_init_data pm8350c_vreg_data[] = {
  990. RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps515, "vdd-s1"),
  991. RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
  992. RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
  993. RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
  994. RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
  995. RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
  996. RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
  997. RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
  998. RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
  999. RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
  1000. RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l12"),
  1001. RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo_lv, "vdd-l2-l8"),
  1002. RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
  1003. RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
  1004. RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
  1005. RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l6-l9-l11"),
  1006. RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
  1007. RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo_lv, "vdd-l2-l8"),
  1008. RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l6-l9-l11"),
  1009. RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l10"),
  1010. RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l6-l9-l11"),
  1011. RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l1-l12"),
  1012. RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
  1013. RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
  1014. {}
  1015. };
  1016. static const struct rpmh_vreg_init_data pm8450_vreg_data[] = {
  1017. RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps520, "vdd-s1"),
  1018. RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"),
  1019. RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps520, "vdd-s3"),
  1020. RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps520, "vdd-s4"),
  1021. RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps520, "vdd-s5"),
  1022. RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps520, "vdd-s6"),
  1023. RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
  1024. RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"),
  1025. RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
  1026. RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo_lv, "vdd-l4"),
  1027. {}
  1028. };
  1029. static const struct rpmh_vreg_init_data pm8550_vreg_data[] = {
  1030. RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1-l4-l10"),
  1031. RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l13-l14"),
  1032. RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"),
  1033. RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo515, "vdd-l1-l4-l10"),
  1034. RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l16"),
  1035. RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l6-l7"),
  1036. RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l6-l7"),
  1037. RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, "vdd-l8-l9"),
  1038. RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l8-l9"),
  1039. RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo515, "vdd-l1-l4-l10"),
  1040. RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo515, "vdd-l11"),
  1041. RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo515, "vdd-l12"),
  1042. RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l2-l13-l14"),
  1043. RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo, "vdd-l2-l13-l14"),
  1044. RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo515, "vdd-l15"),
  1045. RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l5-l16"),
  1046. RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l17"),
  1047. RPMH_VREG("bob1", "bob%s1", &pmic5_bob, "vdd-bob1"),
  1048. RPMH_VREG("bob2", "bob%s2", &pmic5_bob, "vdd-bob2"),
  1049. {}
  1050. };
  1051. static const struct rpmh_vreg_init_data pm8550vs_vreg_data[] = {
  1052. RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525, "vdd-s1"),
  1053. RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525, "vdd-s2"),
  1054. RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525, "vdd-s3"),
  1055. RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525, "vdd-s4"),
  1056. RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525, "vdd-s5"),
  1057. RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525, "vdd-s6"),
  1058. RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"),
  1059. RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2"),
  1060. RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"),
  1061. {}
  1062. };
  1063. static const struct rpmh_vreg_init_data pm8550ve_vreg_data[] = {
  1064. RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525, "vdd-s1"),
  1065. RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525, "vdd-s2"),
  1066. RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525, "vdd-s3"),
  1067. RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525, "vdd-s4"),
  1068. RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525, "vdd-s5"),
  1069. RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525, "vdd-s6"),
  1070. RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525, "vdd-s7"),
  1071. RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525, "vdd-s8"),
  1072. RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"),
  1073. RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2"),
  1074. RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"),
  1075. {}
  1076. };
  1077. static const struct rpmh_vreg_init_data pmc8380_vreg_data[] = {
  1078. RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525, "vdd-s1"),
  1079. RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525, "vdd-s2"),
  1080. RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525, "vdd-s3"),
  1081. RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525, "vdd-s4"),
  1082. RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525, "vdd-s5"),
  1083. RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525, "vdd-s6"),
  1084. RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525, "vdd-s7"),
  1085. RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525, "vdd-s8"),
  1086. RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"),
  1087. RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2"),
  1088. RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"),
  1089. {}
  1090. };
  1091. static const struct rpmh_vreg_init_data pm8009_vreg_data[] = {
  1092. RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
  1093. RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps515, "vdd-s2"),
  1094. RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
  1095. RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"),
  1096. RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
  1097. RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"),
  1098. RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"),
  1099. RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"),
  1100. RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7"),
  1101. {}
  1102. };
  1103. static const struct rpmh_vreg_init_data pm8009_1_vreg_data[] = {
  1104. RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
  1105. RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps515_1, "vdd-s2"),
  1106. RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
  1107. RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"),
  1108. RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
  1109. RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"),
  1110. RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"),
  1111. RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"),
  1112. RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7"),
  1113. {}
  1114. };
  1115. static const struct rpmh_vreg_init_data pm8010_vreg_data[] = {
  1116. RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo502, "vdd-l1-l2"),
  1117. RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo502, "vdd-l1-l2"),
  1118. RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo502ln, "vdd-l3-l4"),
  1119. RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo502ln, "vdd-l3-l4"),
  1120. RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo502, "vdd-l5"),
  1121. RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo502ln, "vdd-l6"),
  1122. RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo502, "vdd-l7"),
  1123. };
  1124. static const struct rpmh_vreg_init_data pm6150_vreg_data[] = {
  1125. RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
  1126. RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
  1127. RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
  1128. RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
  1129. RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
  1130. RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
  1131. RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"),
  1132. RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"),
  1133. RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4-l7-l8"),
  1134. RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
  1135. RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6"),
  1136. RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l4-l7-l8"),
  1137. RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l4-l7-l8"),
  1138. RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l9"),
  1139. RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo_lv, "vdd-l10-l14-l15"),
  1140. RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo_lv, "vdd-l11-l12-l13"),
  1141. RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l11-l12-l13"),
  1142. RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo_lv, "vdd-l11-l12-l13"),
  1143. RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l10-l14-l15"),
  1144. RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l10-l14-l15"),
  1145. RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
  1146. RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
  1147. RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
  1148. RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
  1149. {}
  1150. };
  1151. static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = {
  1152. RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
  1153. RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
  1154. RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
  1155. RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
  1156. RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
  1157. RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
  1158. RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
  1159. RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
  1160. RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l8"),
  1161. RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"),
  1162. RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"),
  1163. RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l4-l5-l6"),
  1164. RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l4-l5-l6"),
  1165. RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l4-l5-l6"),
  1166. RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l11"),
  1167. RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, "vdd-l1-l8"),
  1168. RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l9-l10"),
  1169. RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"),
  1170. RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"),
  1171. RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
  1172. {}
  1173. };
  1174. static const struct rpmh_vreg_init_data pm6350_vreg_data[] = {
  1175. RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, NULL),
  1176. RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, NULL),
  1177. /* smps3 - smps5 not configured */
  1178. RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, NULL),
  1179. RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, NULL),
  1180. RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo, NULL),
  1181. RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, NULL),
  1182. RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, NULL),
  1183. RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, NULL),
  1184. RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, NULL),
  1185. RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, NULL),
  1186. RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, NULL),
  1187. RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, NULL),
  1188. RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, NULL),
  1189. RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo, NULL),
  1190. RPMH_VREG("ldo13", "ldo%s13", &pmic5_nldo, NULL),
  1191. RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo, NULL),
  1192. RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, NULL),
  1193. RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo, NULL),
  1194. /* ldo17 not configured */
  1195. RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, NULL),
  1196. RPMH_VREG("ldo19", "ldo%s19", &pmic5_nldo, NULL),
  1197. RPMH_VREG("ldo20", "ldo%s20", &pmic5_nldo, NULL),
  1198. RPMH_VREG("ldo21", "ldo%s21", &pmic5_nldo, NULL),
  1199. RPMH_VREG("ldo22", "ldo%s22", &pmic5_nldo, NULL),
  1200. };
  1201. static const struct rpmh_vreg_init_data pmx55_vreg_data[] = {
  1202. RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
  1203. RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, "vdd-s2"),
  1204. RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps510, "vdd-s3"),
  1205. RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
  1206. RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
  1207. RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
  1208. RPMH_VREG("smps7", "smp%s7", &pmic5_hfsmps510, "vdd-s7"),
  1209. RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l2"),
  1210. RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l1-l2"),
  1211. RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l9"),
  1212. RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4-l12"),
  1213. RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"),
  1214. RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"),
  1215. RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l7-l8"),
  1216. RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l7-l8"),
  1217. RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l3-l9"),
  1218. RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l10-l11-l13"),
  1219. RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l10-l11-l13"),
  1220. RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l4-l12"),
  1221. RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l10-l11-l13"),
  1222. RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14"),
  1223. RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l15"),
  1224. RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l16"),
  1225. {}
  1226. };
  1227. static const struct rpmh_vreg_init_data pmx65_vreg_data[] = {
  1228. RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
  1229. RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, "vdd-s2"),
  1230. RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps510, "vdd-s3"),
  1231. RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
  1232. RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
  1233. RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
  1234. RPMH_VREG("smps7", "smp%s7", &pmic5_hfsmps510, "vdd-s7"),
  1235. RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
  1236. RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
  1237. RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l18"),
  1238. RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
  1239. RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"),
  1240. RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6-l16"),
  1241. RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6-l16"),
  1242. RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l7"),
  1243. RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8-l9"),
  1244. RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l8-l9"),
  1245. RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l10"),
  1246. RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l11-l13"),
  1247. RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l12"),
  1248. RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l11-l13"),
  1249. RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14"),
  1250. RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l15"),
  1251. RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l5-l6-l16"),
  1252. RPMH_VREG("ldo17", "ldo%s17", &pmic5_nldo, "vdd-l17"),
  1253. /* ldo18 not configured */
  1254. RPMH_VREG("ldo19", "ldo%s19", &pmic5_nldo, "vdd-l19"),
  1255. RPMH_VREG("ldo20", "ldo%s20", &pmic5_nldo, "vdd-l20"),
  1256. RPMH_VREG("ldo21", "ldo%s21", &pmic5_nldo, "vdd-l21"),
  1257. {}
  1258. };
  1259. static const struct rpmh_vreg_init_data pmx75_vreg_data[] = {
  1260. RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525, "vdd-s1"),
  1261. RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525, "vdd-s2"),
  1262. RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525, "vdd-s3"),
  1263. RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525, "vdd-s4"),
  1264. RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525, "vdd-s5"),
  1265. RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525, "vdd-s6"),
  1266. RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525, "vdd-s7"),
  1267. RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525, "vdd-s8"),
  1268. RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps525, "vdd-s9"),
  1269. RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps525, "vdd-s10"),
  1270. RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"),
  1271. RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2-18"),
  1272. RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"),
  1273. RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo515, "vdd-l4-l16"),
  1274. RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo_lv, "vdd-l5-l6"),
  1275. RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo_lv, "vdd-l5-l6"),
  1276. RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo515, "vdd-l7"),
  1277. RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo515, "vdd-l8-l9"),
  1278. RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo515, "vdd-l8-l9"),
  1279. RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l10"),
  1280. RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l11-l13"),
  1281. RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo515, "vdd-l12"),
  1282. RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l11-l13"),
  1283. RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo515, "vdd-l14"),
  1284. RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo515, "vdd-l15"),
  1285. RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo515, "vdd-l4-l16"),
  1286. RPMH_VREG("ldo17", "ldo%s17", &pmic5_nldo515, "vdd-l17"),
  1287. /* ldo18 not configured */
  1288. RPMH_VREG("ldo19", "ldo%s19", &pmic5_nldo515, "vdd-l19"),
  1289. RPMH_VREG("ldo20", "ldo%s20", &pmic5_nldo515, "vdd-l20-l21"),
  1290. RPMH_VREG("ldo21", "ldo%s21", &pmic5_nldo515, "vdd-l20-l21"),
  1291. };
  1292. static const struct rpmh_vreg_init_data pm7325_vreg_data[] = {
  1293. RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
  1294. RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"),
  1295. RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps520, "vdd-s3"),
  1296. RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps520, "vdd-s4"),
  1297. RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps520, "vdd-s5"),
  1298. RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps520, "vdd-s6"),
  1299. RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps520, "vdd-s7"),
  1300. RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
  1301. RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
  1302. RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l7"),
  1303. RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
  1304. RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
  1305. RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l5"),
  1306. RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9-l10"),
  1307. RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l2-l7"),
  1308. RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8"),
  1309. RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9-l10"),
  1310. RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l6-l9-l10"),
  1311. RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
  1312. RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
  1313. RPMH_VREG("ldo13", "ldo%s13", &pmic5_nldo, "vdd-l13"),
  1314. RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14-l16"),
  1315. RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
  1316. RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo, "vdd-l14-l16"),
  1317. RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
  1318. RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
  1319. RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
  1320. {}
  1321. };
  1322. static const struct rpmh_vreg_init_data pmr735a_vreg_data[] = {
  1323. RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps520, "vdd-s1"),
  1324. RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"),
  1325. RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps515, "vdd-s3"),
  1326. RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l2"),
  1327. RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l1-l2"),
  1328. RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
  1329. RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo_lv, "vdd-l4"),
  1330. RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l5-l6"),
  1331. RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l5-l6"),
  1332. RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-bob"),
  1333. {}
  1334. };
  1335. static const struct rpmh_vreg_init_data pm660_vreg_data[] = {
  1336. RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
  1337. RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
  1338. RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3"),
  1339. RPMH_VREG("smps4", "smp%s4", &pmic4_hfsmps3, "vdd-s4"),
  1340. RPMH_VREG("smps5", "smp%s5", &pmic4_hfsmps3, "vdd-s5"),
  1341. RPMH_VREG("smps6", "smp%s6", &pmic4_hfsmps3, "vdd-s6"),
  1342. RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l6-l7"),
  1343. RPMH_VREG("ldo2", "ldo%s2", &pmic4_nldo, "vdd-l2-l3"),
  1344. RPMH_VREG("ldo3", "ldo%s3", &pmic4_nldo, "vdd-l2-l3"),
  1345. /* ldo4 is inaccessible on PM660 */
  1346. RPMH_VREG("ldo5", "ldo%s5", &pmic4_nldo, "vdd-l5"),
  1347. RPMH_VREG("ldo6", "ldo%s6", &pmic4_nldo, "vdd-l1-l6-l7"),
  1348. RPMH_VREG("ldo7", "ldo%s7", &pmic4_nldo, "vdd-l1-l6-l7"),
  1349. RPMH_VREG("ldo8", "ldo%s8", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
  1350. RPMH_VREG("ldo9", "ldo%s9", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
  1351. RPMH_VREG("ldo10", "ldo%s10", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
  1352. RPMH_VREG("ldo11", "ldo%s11", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
  1353. RPMH_VREG("ldo12", "ldo%s12", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
  1354. RPMH_VREG("ldo13", "ldo%s13", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
  1355. RPMH_VREG("ldo14", "ldo%s14", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
  1356. RPMH_VREG("ldo15", "ldo%s15", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
  1357. RPMH_VREG("ldo16", "ldo%s16", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
  1358. RPMH_VREG("ldo17", "ldo%s17", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
  1359. RPMH_VREG("ldo18", "ldo%s18", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
  1360. RPMH_VREG("ldo19", "ldo%s19", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
  1361. {}
  1362. };
  1363. static const struct rpmh_vreg_init_data pm660l_vreg_data[] = {
  1364. RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
  1365. RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
  1366. RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3-s4"),
  1367. RPMH_VREG("smps5", "smp%s5", &pmic4_ftsmps426, "vdd-s5"),
  1368. RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l9-l10"),
  1369. RPMH_VREG("ldo2", "ldo%s2", &pmic4_pldo, "vdd-l2"),
  1370. RPMH_VREG("ldo3", "ldo%s3", &pmic4_pldo, "vdd-l3-l5-l7-l8"),
  1371. RPMH_VREG("ldo4", "ldo%s4", &pmic4_pldo, "vdd-l4-l6"),
  1372. RPMH_VREG("ldo5", "ldo%s5", &pmic4_pldo, "vdd-l3-l5-l7-l8"),
  1373. RPMH_VREG("ldo6", "ldo%s6", &pmic4_pldo, "vdd-l4-l6"),
  1374. RPMH_VREG("ldo7", "ldo%s7", &pmic4_pldo, "vdd-l3-l5-l7-l8"),
  1375. RPMH_VREG("ldo8", "ldo%s8", &pmic4_pldo, "vdd-l3-l5-l7-l8"),
  1376. RPMH_VREG("bob", "bob%s1", &pmic4_bob, "vdd-bob"),
  1377. {}
  1378. };
  1379. static int rpmh_regulator_probe(struct platform_device *pdev)
  1380. {
  1381. struct device *dev = &pdev->dev;
  1382. const struct rpmh_vreg_init_data *vreg_data;
  1383. struct rpmh_vreg *vreg;
  1384. const char *pmic_id;
  1385. int ret;
  1386. vreg_data = of_device_get_match_data(dev);
  1387. if (!vreg_data)
  1388. return -ENODEV;
  1389. ret = of_property_read_string(dev->of_node, "qcom,pmic-id", &pmic_id);
  1390. if (ret < 0) {
  1391. dev_err(dev, "qcom,pmic-id missing in DT node\n");
  1392. return ret;
  1393. }
  1394. for_each_available_child_of_node_scoped(dev->of_node, node) {
  1395. vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL);
  1396. if (!vreg)
  1397. return -ENOMEM;
  1398. ret = rpmh_regulator_init_vreg(vreg, dev, node, pmic_id,
  1399. vreg_data);
  1400. if (ret < 0)
  1401. return ret;
  1402. }
  1403. return 0;
  1404. }
  1405. static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = {
  1406. {
  1407. .compatible = "qcom,pm8005-rpmh-regulators",
  1408. .data = pm8005_vreg_data,
  1409. },
  1410. {
  1411. .compatible = "qcom,pm8009-rpmh-regulators",
  1412. .data = pm8009_vreg_data,
  1413. },
  1414. {
  1415. .compatible = "qcom,pm8009-1-rpmh-regulators",
  1416. .data = pm8009_1_vreg_data,
  1417. },
  1418. {
  1419. .compatible = "qcom,pm8010-rpmh-regulators",
  1420. .data = pm8010_vreg_data,
  1421. },
  1422. {
  1423. .compatible = "qcom,pm8150-rpmh-regulators",
  1424. .data = pm8150_vreg_data,
  1425. },
  1426. {
  1427. .compatible = "qcom,pm8150l-rpmh-regulators",
  1428. .data = pm8150l_vreg_data,
  1429. },
  1430. {
  1431. .compatible = "qcom,pm8350-rpmh-regulators",
  1432. .data = pm8350_vreg_data,
  1433. },
  1434. {
  1435. .compatible = "qcom,pm8350c-rpmh-regulators",
  1436. .data = pm8350c_vreg_data,
  1437. },
  1438. {
  1439. .compatible = "qcom,pm8450-rpmh-regulators",
  1440. .data = pm8450_vreg_data,
  1441. },
  1442. {
  1443. .compatible = "qcom,pm8550-rpmh-regulators",
  1444. .data = pm8550_vreg_data,
  1445. },
  1446. {
  1447. .compatible = "qcom,pm8550ve-rpmh-regulators",
  1448. .data = pm8550ve_vreg_data,
  1449. },
  1450. {
  1451. .compatible = "qcom,pm8550vs-rpmh-regulators",
  1452. .data = pm8550vs_vreg_data,
  1453. },
  1454. {
  1455. .compatible = "qcom,pm8998-rpmh-regulators",
  1456. .data = pm8998_vreg_data,
  1457. },
  1458. {
  1459. .compatible = "qcom,pmg1110-rpmh-regulators",
  1460. .data = pmg1110_vreg_data,
  1461. },
  1462. {
  1463. .compatible = "qcom,pmi8998-rpmh-regulators",
  1464. .data = pmi8998_vreg_data,
  1465. },
  1466. {
  1467. .compatible = "qcom,pm6150-rpmh-regulators",
  1468. .data = pm6150_vreg_data,
  1469. },
  1470. {
  1471. .compatible = "qcom,pm6150l-rpmh-regulators",
  1472. .data = pm6150l_vreg_data,
  1473. },
  1474. {
  1475. .compatible = "qcom,pm6350-rpmh-regulators",
  1476. .data = pm6350_vreg_data,
  1477. },
  1478. {
  1479. .compatible = "qcom,pmc8180-rpmh-regulators",
  1480. .data = pm8150_vreg_data,
  1481. },
  1482. {
  1483. .compatible = "qcom,pmc8180c-rpmh-regulators",
  1484. .data = pm8150l_vreg_data,
  1485. },
  1486. {
  1487. .compatible = "qcom,pmc8380-rpmh-regulators",
  1488. .data = pmc8380_vreg_data,
  1489. },
  1490. {
  1491. .compatible = "qcom,pmm8155au-rpmh-regulators",
  1492. .data = pmm8155au_vreg_data,
  1493. },
  1494. {
  1495. .compatible = "qcom,pmm8654au-rpmh-regulators",
  1496. .data = pmm8654au_vreg_data,
  1497. },
  1498. {
  1499. .compatible = "qcom,pmx55-rpmh-regulators",
  1500. .data = pmx55_vreg_data,
  1501. },
  1502. {
  1503. .compatible = "qcom,pmx65-rpmh-regulators",
  1504. .data = pmx65_vreg_data,
  1505. },
  1506. {
  1507. .compatible = "qcom,pmx75-rpmh-regulators",
  1508. .data = pmx75_vreg_data,
  1509. },
  1510. {
  1511. .compatible = "qcom,pm7325-rpmh-regulators",
  1512. .data = pm7325_vreg_data,
  1513. },
  1514. {
  1515. .compatible = "qcom,pmr735a-rpmh-regulators",
  1516. .data = pmr735a_vreg_data,
  1517. },
  1518. {
  1519. .compatible = "qcom,pm660-rpmh-regulators",
  1520. .data = pm660_vreg_data,
  1521. },
  1522. {
  1523. .compatible = "qcom,pm660l-rpmh-regulators",
  1524. .data = pm660l_vreg_data,
  1525. },
  1526. {}
  1527. };
  1528. MODULE_DEVICE_TABLE(of, rpmh_regulator_match_table);
  1529. static struct platform_driver rpmh_regulator_driver = {
  1530. .driver = {
  1531. .name = "qcom-rpmh-regulator",
  1532. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  1533. .of_match_table = of_match_ptr(rpmh_regulator_match_table),
  1534. },
  1535. .probe = rpmh_regulator_probe,
  1536. };
  1537. module_platform_driver(rpmh_regulator_driver);
  1538. MODULE_DESCRIPTION("Qualcomm RPMh regulator driver");
  1539. MODULE_LICENSE("GPL v2");