spi-gpio.c 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * SPI host driver using generic bitbanged GPIO
  4. *
  5. * Copyright (C) 2006,2008 David Brownell
  6. * Copyright (C) 2017 Linus Walleij
  7. */
  8. #include <linux/gpio/consumer.h>
  9. #include <linux/kernel.h>
  10. #include <linux/mod_devicetable.h>
  11. #include <linux/module.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/property.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/spi_bitbang.h>
  16. #include <linux/spi/spi_gpio.h>
  17. /*
  18. * This bitbanging SPI host driver should help make systems usable
  19. * when a native hardware SPI engine is not available, perhaps because
  20. * its driver isn't yet working or because the I/O pins it requires
  21. * are used for other purposes.
  22. *
  23. * platform_device->driver_data ... points to spi_gpio
  24. *
  25. * spi->controller_state ... reserved for bitbang framework code
  26. *
  27. * spi->controller->dev.driver_data ... points to spi_gpio->bitbang
  28. */
  29. struct spi_gpio {
  30. struct spi_bitbang bitbang;
  31. struct gpio_desc *sck;
  32. struct gpio_desc *miso;
  33. struct gpio_desc *mosi;
  34. struct gpio_desc **cs_gpios;
  35. };
  36. /*----------------------------------------------------------------------*/
  37. /*
  38. * Because the overhead of going through four GPIO procedure calls
  39. * per transferred bit can make performance a problem, this code
  40. * is set up so that you can use it in either of two ways:
  41. *
  42. * - The slow generic way: set up platform_data to hold the GPIO
  43. * numbers used for MISO/MOSI/SCK, and issue procedure calls for
  44. * each of them. This driver can handle several such busses.
  45. *
  46. * - The quicker inlined way: only helps with platform GPIO code
  47. * that inlines operations for constant GPIOs. This can give
  48. * you tight (fast!) inner loops, but each such bus needs a
  49. * new driver. You'll define a new C file, with Makefile and
  50. * Kconfig support; the C code can be a total of six lines:
  51. *
  52. * #define DRIVER_NAME "myboard_spi2"
  53. * #define SPI_MISO_GPIO 119
  54. * #define SPI_MOSI_GPIO 120
  55. * #define SPI_SCK_GPIO 121
  56. * #define SPI_N_CHIPSEL 4
  57. * #include "spi-gpio.c"
  58. */
  59. #ifndef DRIVER_NAME
  60. #define DRIVER_NAME "spi_gpio"
  61. #define GENERIC_BITBANG /* vs tight inlines */
  62. #endif
  63. /*----------------------------------------------------------------------*/
  64. static inline struct spi_gpio *__pure
  65. spi_to_spi_gpio(const struct spi_device *spi)
  66. {
  67. const struct spi_bitbang *bang;
  68. struct spi_gpio *spi_gpio;
  69. bang = spi_controller_get_devdata(spi->controller);
  70. spi_gpio = container_of(bang, struct spi_gpio, bitbang);
  71. return spi_gpio;
  72. }
  73. /* These helpers are in turn called by the bitbang inlines */
  74. static inline void setsck(const struct spi_device *spi, int is_on)
  75. {
  76. struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
  77. gpiod_set_value_cansleep(spi_gpio->sck, is_on);
  78. }
  79. static inline void setmosi(const struct spi_device *spi, int is_on)
  80. {
  81. struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
  82. gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
  83. }
  84. static inline int getmiso(const struct spi_device *spi)
  85. {
  86. struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
  87. if (spi->mode & SPI_3WIRE)
  88. return !!gpiod_get_value_cansleep(spi_gpio->mosi);
  89. else
  90. return !!gpiod_get_value_cansleep(spi_gpio->miso);
  91. }
  92. /*
  93. * NOTE: this clocks "as fast as we can". It "should" be a function of the
  94. * requested device clock. Software overhead means we usually have trouble
  95. * reaching even one Mbit/sec (except when we can inline bitops), so for now
  96. * we'll just assume we never need additional per-bit slowdowns.
  97. */
  98. #define spidelay(nsecs) do {} while (0)
  99. #include "spi-bitbang-txrx.h"
  100. /*
  101. * These functions can leverage inline expansion of GPIO calls to shrink
  102. * costs for a txrx bit, often by factors of around ten (by instruction
  103. * count). That is particularly visible for larger word sizes, but helps
  104. * even with default 8-bit words.
  105. *
  106. * REVISIT overheads calling these functions for each word also have
  107. * significant performance costs. Having txrx_bufs() calls that inline
  108. * the txrx_word() logic would help performance, e.g. on larger blocks
  109. * used with flash storage or MMC/SD. There should also be ways to make
  110. * GCC be less stupid about reloading registers inside the I/O loops,
  111. * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
  112. */
  113. static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
  114. unsigned nsecs, u32 word, u8 bits, unsigned flags)
  115. {
  116. if (unlikely(spi->mode & SPI_LSB_FIRST))
  117. return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
  118. else
  119. return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
  120. }
  121. static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
  122. unsigned nsecs, u32 word, u8 bits, unsigned flags)
  123. {
  124. if (unlikely(spi->mode & SPI_LSB_FIRST))
  125. return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
  126. else
  127. return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
  128. }
  129. static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
  130. unsigned nsecs, u32 word, u8 bits, unsigned flags)
  131. {
  132. if (unlikely(spi->mode & SPI_LSB_FIRST))
  133. return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
  134. else
  135. return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
  136. }
  137. static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
  138. unsigned nsecs, u32 word, u8 bits, unsigned flags)
  139. {
  140. if (unlikely(spi->mode & SPI_LSB_FIRST))
  141. return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
  142. else
  143. return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
  144. }
  145. /*
  146. * These functions do not call setmosi or getmiso if respective flag
  147. * (SPI_CONTROLLER_NO_RX or SPI_CONTROLLER_NO_TX) is set, so they are safe to
  148. * call when such pin is not present or defined in the controller.
  149. * A separate set of callbacks is defined to get highest possible
  150. * speed in the generic case (when both MISO and MOSI lines are
  151. * available), as optimiser will remove the checks when argument is
  152. * constant.
  153. */
  154. static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
  155. unsigned nsecs, u32 word, u8 bits, unsigned flags)
  156. {
  157. flags = spi->controller->flags;
  158. if (unlikely(spi->mode & SPI_LSB_FIRST))
  159. return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
  160. else
  161. return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
  162. }
  163. static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
  164. unsigned nsecs, u32 word, u8 bits, unsigned flags)
  165. {
  166. flags = spi->controller->flags;
  167. if (unlikely(spi->mode & SPI_LSB_FIRST))
  168. return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
  169. else
  170. return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
  171. }
  172. static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
  173. unsigned nsecs, u32 word, u8 bits, unsigned flags)
  174. {
  175. flags = spi->controller->flags;
  176. if (unlikely(spi->mode & SPI_LSB_FIRST))
  177. return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
  178. else
  179. return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
  180. }
  181. static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
  182. unsigned nsecs, u32 word, u8 bits, unsigned flags)
  183. {
  184. flags = spi->controller->flags;
  185. if (unlikely(spi->mode & SPI_LSB_FIRST))
  186. return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
  187. else
  188. return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
  189. }
  190. /*----------------------------------------------------------------------*/
  191. static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
  192. {
  193. struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
  194. /* set initial clock line level */
  195. if (is_active)
  196. gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
  197. /* Drive chip select line, if we have one */
  198. if (spi_gpio->cs_gpios) {
  199. struct gpio_desc *cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)];
  200. /* SPI chip selects are normally active-low */
  201. gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
  202. }
  203. }
  204. static void spi_gpio_set_mosi_idle(struct spi_device *spi)
  205. {
  206. struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
  207. gpiod_set_value_cansleep(spi_gpio->mosi,
  208. !!(spi->mode & SPI_MOSI_IDLE_HIGH));
  209. }
  210. static int spi_gpio_setup(struct spi_device *spi)
  211. {
  212. struct gpio_desc *cs;
  213. struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
  214. int ret;
  215. /*
  216. * The CS GPIOs have already been
  217. * initialized from the descriptor lookup.
  218. */
  219. if (spi_gpio->cs_gpios) {
  220. cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)];
  221. if (!spi->controller_state && cs) {
  222. ret = gpiod_direction_output(cs, !(spi->mode & SPI_CS_HIGH));
  223. if (ret)
  224. return ret;
  225. }
  226. }
  227. return spi_bitbang_setup(spi);
  228. }
  229. static int spi_gpio_set_direction(struct spi_device *spi, bool output)
  230. {
  231. struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
  232. int ret;
  233. if (output)
  234. return gpiod_direction_output(spi_gpio->mosi, 1);
  235. /*
  236. * Only change MOSI to an input if using 3WIRE mode.
  237. * Otherwise, MOSI could be left floating if there is
  238. * no pull resistor connected to the I/O pin, or could
  239. * be left logic high if there is a pull-up. Transmitting
  240. * logic high when only clocking MISO data in can put some
  241. * SPI devices in to a bad state.
  242. */
  243. if (spi->mode & SPI_3WIRE) {
  244. ret = gpiod_direction_input(spi_gpio->mosi);
  245. if (ret)
  246. return ret;
  247. }
  248. /*
  249. * Send a turnaround high impedance cycle when switching
  250. * from output to input. Theoretically there should be
  251. * a clock delay here, but as has been noted above, the
  252. * nsec delay function for bit-banged GPIO is simply
  253. * {} because bit-banging just doesn't get fast enough
  254. * anyway.
  255. */
  256. if (spi->mode & SPI_3WIRE_HIZ) {
  257. gpiod_set_value_cansleep(spi_gpio->sck,
  258. !(spi->mode & SPI_CPOL));
  259. gpiod_set_value_cansleep(spi_gpio->sck,
  260. !!(spi->mode & SPI_CPOL));
  261. }
  262. return 0;
  263. }
  264. static void spi_gpio_cleanup(struct spi_device *spi)
  265. {
  266. spi_bitbang_cleanup(spi);
  267. }
  268. /*
  269. * It can be convenient to use this driver with pins that have alternate
  270. * functions associated with a "native" SPI controller if a driver for that
  271. * controller is not available, or is missing important functionality.
  272. *
  273. * On platforms which can do so, configure MISO with a weak pullup unless
  274. * there's an external pullup on that signal. That saves power by avoiding
  275. * floating signals. (A weak pulldown would save power too, but many
  276. * drivers expect to see all-ones data as the no target "response".)
  277. */
  278. static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio)
  279. {
  280. spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
  281. if (IS_ERR(spi_gpio->mosi))
  282. return PTR_ERR(spi_gpio->mosi);
  283. spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
  284. if (IS_ERR(spi_gpio->miso))
  285. return PTR_ERR(spi_gpio->miso);
  286. spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
  287. return PTR_ERR_OR_ZERO(spi_gpio->sck);
  288. }
  289. static int spi_gpio_probe_pdata(struct platform_device *pdev,
  290. struct spi_controller *host)
  291. {
  292. struct device *dev = &pdev->dev;
  293. struct spi_gpio_platform_data *pdata = dev_get_platdata(dev);
  294. struct spi_gpio *spi_gpio = spi_controller_get_devdata(host);
  295. int i;
  296. #ifdef GENERIC_BITBANG
  297. if (!pdata || !pdata->num_chipselect)
  298. return -ENODEV;
  299. #endif
  300. /*
  301. * The host needs to think there is a chipselect even if not
  302. * connected
  303. */
  304. host->num_chipselect = pdata->num_chipselect ?: 1;
  305. spi_gpio->cs_gpios = devm_kcalloc(dev, host->num_chipselect,
  306. sizeof(*spi_gpio->cs_gpios),
  307. GFP_KERNEL);
  308. if (!spi_gpio->cs_gpios)
  309. return -ENOMEM;
  310. for (i = 0; i < host->num_chipselect; i++) {
  311. spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i,
  312. GPIOD_OUT_HIGH);
  313. if (IS_ERR(spi_gpio->cs_gpios[i]))
  314. return PTR_ERR(spi_gpio->cs_gpios[i]);
  315. }
  316. return 0;
  317. }
  318. static int spi_gpio_probe(struct platform_device *pdev)
  319. {
  320. int status;
  321. struct spi_controller *host;
  322. struct spi_gpio *spi_gpio;
  323. struct device *dev = &pdev->dev;
  324. struct fwnode_handle *fwnode = dev_fwnode(dev);
  325. struct spi_bitbang *bb;
  326. host = devm_spi_alloc_host(dev, sizeof(*spi_gpio));
  327. if (!host)
  328. return -ENOMEM;
  329. if (fwnode) {
  330. device_set_node(&host->dev, fwnode);
  331. host->use_gpio_descriptors = true;
  332. } else {
  333. status = spi_gpio_probe_pdata(pdev, host);
  334. if (status)
  335. return status;
  336. }
  337. spi_gpio = spi_controller_get_devdata(host);
  338. status = spi_gpio_request(dev, spi_gpio);
  339. if (status)
  340. return status;
  341. host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
  342. host->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL |
  343. SPI_CS_HIGH | SPI_LSB_FIRST | SPI_MOSI_IDLE_LOW |
  344. SPI_MOSI_IDLE_HIGH;
  345. if (!spi_gpio->mosi) {
  346. /* HW configuration without MOSI pin
  347. *
  348. * No setting SPI_CONTROLLER_NO_RX here - if there is only
  349. * a MOSI pin connected the host can still do RX by
  350. * changing the direction of the line.
  351. */
  352. host->flags = SPI_CONTROLLER_NO_TX;
  353. }
  354. host->bus_num = pdev->id;
  355. host->setup = spi_gpio_setup;
  356. host->cleanup = spi_gpio_cleanup;
  357. bb = &spi_gpio->bitbang;
  358. bb->ctlr = host;
  359. /*
  360. * There is some additional business, apart from driving the CS GPIO
  361. * line, that we need to do on selection. This makes the local
  362. * callback for chipselect always get called.
  363. */
  364. host->flags |= SPI_CONTROLLER_GPIO_SS;
  365. bb->chipselect = spi_gpio_chipselect;
  366. bb->set_line_direction = spi_gpio_set_direction;
  367. bb->set_mosi_idle = spi_gpio_set_mosi_idle;
  368. if (host->flags & SPI_CONTROLLER_NO_TX) {
  369. bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
  370. bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
  371. bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
  372. bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
  373. } else {
  374. bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
  375. bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
  376. bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
  377. bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
  378. }
  379. bb->setup_transfer = spi_bitbang_setup_transfer;
  380. status = spi_bitbang_init(&spi_gpio->bitbang);
  381. if (status)
  382. return status;
  383. return devm_spi_register_controller(&pdev->dev, host);
  384. }
  385. MODULE_ALIAS("platform:" DRIVER_NAME);
  386. static const struct of_device_id spi_gpio_dt_ids[] = {
  387. { .compatible = "spi-gpio" },
  388. {}
  389. };
  390. MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
  391. static struct platform_driver spi_gpio_driver = {
  392. .driver = {
  393. .name = DRIVER_NAME,
  394. .of_match_table = spi_gpio_dt_ids,
  395. },
  396. .probe = spi_gpio_probe,
  397. };
  398. module_platform_driver(spi_gpio_driver);
  399. MODULE_DESCRIPTION("SPI host driver using generic bitbanged GPIO ");
  400. MODULE_AUTHOR("David Brownell");
  401. MODULE_LICENSE("GPL");