spi-mem.c 26 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2018 Exceet Electronics GmbH
  4. * Copyright (C) 2018 Bootlin
  5. *
  6. * Author: Boris Brezillon <boris.brezillon@bootlin.com>
  7. */
  8. #include <linux/dmaengine.h>
  9. #include <linux/iopoll.h>
  10. #include <linux/pm_runtime.h>
  11. #include <linux/spi/spi.h>
  12. #include <linux/spi/spi-mem.h>
  13. #include <linux/sched/task_stack.h>
  14. #include "internals.h"
  15. #define SPI_MEM_MAX_BUSWIDTH 8
  16. /**
  17. * spi_controller_dma_map_mem_op_data() - DMA-map the buffer attached to a
  18. * memory operation
  19. * @ctlr: the SPI controller requesting this dma_map()
  20. * @op: the memory operation containing the buffer to map
  21. * @sgt: a pointer to a non-initialized sg_table that will be filled by this
  22. * function
  23. *
  24. * Some controllers might want to do DMA on the data buffer embedded in @op.
  25. * This helper prepares everything for you and provides a ready-to-use
  26. * sg_table. This function is not intended to be called from spi drivers.
  27. * Only SPI controller drivers should use it.
  28. * Note that the caller must ensure the memory region pointed by
  29. * op->data.buf.{in,out} is DMA-able before calling this function.
  30. *
  31. * Return: 0 in case of success, a negative error code otherwise.
  32. */
  33. int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr,
  34. const struct spi_mem_op *op,
  35. struct sg_table *sgt)
  36. {
  37. struct device *dmadev;
  38. if (!op->data.nbytes)
  39. return -EINVAL;
  40. if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
  41. dmadev = ctlr->dma_tx->device->dev;
  42. else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
  43. dmadev = ctlr->dma_rx->device->dev;
  44. else
  45. dmadev = ctlr->dev.parent;
  46. if (!dmadev)
  47. return -EINVAL;
  48. return spi_map_buf(ctlr, dmadev, sgt, op->data.buf.in, op->data.nbytes,
  49. op->data.dir == SPI_MEM_DATA_IN ?
  50. DMA_FROM_DEVICE : DMA_TO_DEVICE);
  51. }
  52. EXPORT_SYMBOL_GPL(spi_controller_dma_map_mem_op_data);
  53. /**
  54. * spi_controller_dma_unmap_mem_op_data() - DMA-unmap the buffer attached to a
  55. * memory operation
  56. * @ctlr: the SPI controller requesting this dma_unmap()
  57. * @op: the memory operation containing the buffer to unmap
  58. * @sgt: a pointer to an sg_table previously initialized by
  59. * spi_controller_dma_map_mem_op_data()
  60. *
  61. * Some controllers might want to do DMA on the data buffer embedded in @op.
  62. * This helper prepares things so that the CPU can access the
  63. * op->data.buf.{in,out} buffer again.
  64. *
  65. * This function is not intended to be called from SPI drivers. Only SPI
  66. * controller drivers should use it.
  67. *
  68. * This function should be called after the DMA operation has finished and is
  69. * only valid if the previous spi_controller_dma_map_mem_op_data() call
  70. * returned 0.
  71. *
  72. * Return: 0 in case of success, a negative error code otherwise.
  73. */
  74. void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr,
  75. const struct spi_mem_op *op,
  76. struct sg_table *sgt)
  77. {
  78. struct device *dmadev;
  79. if (!op->data.nbytes)
  80. return;
  81. if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
  82. dmadev = ctlr->dma_tx->device->dev;
  83. else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
  84. dmadev = ctlr->dma_rx->device->dev;
  85. else
  86. dmadev = ctlr->dev.parent;
  87. spi_unmap_buf(ctlr, dmadev, sgt,
  88. op->data.dir == SPI_MEM_DATA_IN ?
  89. DMA_FROM_DEVICE : DMA_TO_DEVICE);
  90. }
  91. EXPORT_SYMBOL_GPL(spi_controller_dma_unmap_mem_op_data);
  92. static int spi_check_buswidth_req(struct spi_mem *mem, u8 buswidth, bool tx)
  93. {
  94. u32 mode = mem->spi->mode;
  95. switch (buswidth) {
  96. case 1:
  97. return 0;
  98. case 2:
  99. if ((tx &&
  100. (mode & (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL))) ||
  101. (!tx &&
  102. (mode & (SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL))))
  103. return 0;
  104. break;
  105. case 4:
  106. if ((tx && (mode & (SPI_TX_QUAD | SPI_TX_OCTAL))) ||
  107. (!tx && (mode & (SPI_RX_QUAD | SPI_RX_OCTAL))))
  108. return 0;
  109. break;
  110. case 8:
  111. if ((tx && (mode & SPI_TX_OCTAL)) ||
  112. (!tx && (mode & SPI_RX_OCTAL)))
  113. return 0;
  114. break;
  115. default:
  116. break;
  117. }
  118. return -ENOTSUPP;
  119. }
  120. static bool spi_mem_check_buswidth(struct spi_mem *mem,
  121. const struct spi_mem_op *op)
  122. {
  123. if (spi_check_buswidth_req(mem, op->cmd.buswidth, true))
  124. return false;
  125. if (op->addr.nbytes &&
  126. spi_check_buswidth_req(mem, op->addr.buswidth, true))
  127. return false;
  128. if (op->dummy.nbytes &&
  129. spi_check_buswidth_req(mem, op->dummy.buswidth, true))
  130. return false;
  131. if (op->data.dir != SPI_MEM_NO_DATA &&
  132. spi_check_buswidth_req(mem, op->data.buswidth,
  133. op->data.dir == SPI_MEM_DATA_OUT))
  134. return false;
  135. return true;
  136. }
  137. bool spi_mem_default_supports_op(struct spi_mem *mem,
  138. const struct spi_mem_op *op)
  139. {
  140. struct spi_controller *ctlr = mem->spi->controller;
  141. bool op_is_dtr =
  142. op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr;
  143. if (op_is_dtr) {
  144. if (!spi_mem_controller_is_capable(ctlr, dtr))
  145. return false;
  146. if (op->cmd.nbytes != 2)
  147. return false;
  148. } else {
  149. if (op->cmd.nbytes != 1)
  150. return false;
  151. }
  152. if (op->data.ecc) {
  153. if (!spi_mem_controller_is_capable(ctlr, ecc))
  154. return false;
  155. }
  156. return spi_mem_check_buswidth(mem, op);
  157. }
  158. EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);
  159. static bool spi_mem_buswidth_is_valid(u8 buswidth)
  160. {
  161. if (hweight8(buswidth) > 1 || buswidth > SPI_MEM_MAX_BUSWIDTH)
  162. return false;
  163. return true;
  164. }
  165. static int spi_mem_check_op(const struct spi_mem_op *op)
  166. {
  167. if (!op->cmd.buswidth || !op->cmd.nbytes)
  168. return -EINVAL;
  169. if ((op->addr.nbytes && !op->addr.buswidth) ||
  170. (op->dummy.nbytes && !op->dummy.buswidth) ||
  171. (op->data.nbytes && !op->data.buswidth))
  172. return -EINVAL;
  173. if (!spi_mem_buswidth_is_valid(op->cmd.buswidth) ||
  174. !spi_mem_buswidth_is_valid(op->addr.buswidth) ||
  175. !spi_mem_buswidth_is_valid(op->dummy.buswidth) ||
  176. !spi_mem_buswidth_is_valid(op->data.buswidth))
  177. return -EINVAL;
  178. /* Buffers must be DMA-able. */
  179. if (WARN_ON_ONCE(op->data.dir == SPI_MEM_DATA_IN &&
  180. object_is_on_stack(op->data.buf.in)))
  181. return -EINVAL;
  182. if (WARN_ON_ONCE(op->data.dir == SPI_MEM_DATA_OUT &&
  183. object_is_on_stack(op->data.buf.out)))
  184. return -EINVAL;
  185. return 0;
  186. }
  187. static bool spi_mem_internal_supports_op(struct spi_mem *mem,
  188. const struct spi_mem_op *op)
  189. {
  190. struct spi_controller *ctlr = mem->spi->controller;
  191. if (ctlr->mem_ops && ctlr->mem_ops->supports_op)
  192. return ctlr->mem_ops->supports_op(mem, op);
  193. return spi_mem_default_supports_op(mem, op);
  194. }
  195. /**
  196. * spi_mem_supports_op() - Check if a memory device and the controller it is
  197. * connected to support a specific memory operation
  198. * @mem: the SPI memory
  199. * @op: the memory operation to check
  200. *
  201. * Some controllers are only supporting Single or Dual IOs, others might only
  202. * support specific opcodes, or it can even be that the controller and device
  203. * both support Quad IOs but the hardware prevents you from using it because
  204. * only 2 IO lines are connected.
  205. *
  206. * This function checks whether a specific operation is supported.
  207. *
  208. * Return: true if @op is supported, false otherwise.
  209. */
  210. bool spi_mem_supports_op(struct spi_mem *mem, const struct spi_mem_op *op)
  211. {
  212. if (spi_mem_check_op(op))
  213. return false;
  214. return spi_mem_internal_supports_op(mem, op);
  215. }
  216. EXPORT_SYMBOL_GPL(spi_mem_supports_op);
  217. static int spi_mem_access_start(struct spi_mem *mem)
  218. {
  219. struct spi_controller *ctlr = mem->spi->controller;
  220. /*
  221. * Flush the message queue before executing our SPI memory
  222. * operation to prevent preemption of regular SPI transfers.
  223. */
  224. spi_flush_queue(ctlr);
  225. if (ctlr->auto_runtime_pm) {
  226. int ret;
  227. ret = pm_runtime_resume_and_get(ctlr->dev.parent);
  228. if (ret < 0) {
  229. dev_err(&ctlr->dev, "Failed to power device: %d\n",
  230. ret);
  231. return ret;
  232. }
  233. }
  234. mutex_lock(&ctlr->bus_lock_mutex);
  235. mutex_lock(&ctlr->io_mutex);
  236. return 0;
  237. }
  238. static void spi_mem_access_end(struct spi_mem *mem)
  239. {
  240. struct spi_controller *ctlr = mem->spi->controller;
  241. mutex_unlock(&ctlr->io_mutex);
  242. mutex_unlock(&ctlr->bus_lock_mutex);
  243. if (ctlr->auto_runtime_pm)
  244. pm_runtime_put(ctlr->dev.parent);
  245. }
  246. static void spi_mem_add_op_stats(struct spi_statistics __percpu *pcpu_stats,
  247. const struct spi_mem_op *op, int exec_op_ret)
  248. {
  249. struct spi_statistics *stats;
  250. u64 len, l2len;
  251. get_cpu();
  252. stats = this_cpu_ptr(pcpu_stats);
  253. u64_stats_update_begin(&stats->syncp);
  254. /*
  255. * We do not have the concept of messages or transfers. Let's consider
  256. * that one operation is equivalent to one message and one transfer.
  257. */
  258. u64_stats_inc(&stats->messages);
  259. u64_stats_inc(&stats->transfers);
  260. /* Use the sum of all lengths as bytes count and histogram value. */
  261. len = op->cmd.nbytes + op->addr.nbytes;
  262. len += op->dummy.nbytes + op->data.nbytes;
  263. u64_stats_add(&stats->bytes, len);
  264. l2len = min(fls(len), SPI_STATISTICS_HISTO_SIZE) - 1;
  265. u64_stats_inc(&stats->transfer_bytes_histo[l2len]);
  266. /* Only account for data bytes as transferred bytes. */
  267. if (op->data.nbytes && op->data.dir == SPI_MEM_DATA_OUT)
  268. u64_stats_add(&stats->bytes_tx, op->data.nbytes);
  269. if (op->data.nbytes && op->data.dir == SPI_MEM_DATA_IN)
  270. u64_stats_add(&stats->bytes_rx, op->data.nbytes);
  271. /*
  272. * A timeout is not an error, following the same behavior as
  273. * spi_transfer_one_message().
  274. */
  275. if (exec_op_ret == -ETIMEDOUT)
  276. u64_stats_inc(&stats->timedout);
  277. else if (exec_op_ret)
  278. u64_stats_inc(&stats->errors);
  279. u64_stats_update_end(&stats->syncp);
  280. put_cpu();
  281. }
  282. /**
  283. * spi_mem_exec_op() - Execute a memory operation
  284. * @mem: the SPI memory
  285. * @op: the memory operation to execute
  286. *
  287. * Executes a memory operation.
  288. *
  289. * This function first checks that @op is supported and then tries to execute
  290. * it.
  291. *
  292. * Return: 0 in case of success, a negative error code otherwise.
  293. */
  294. int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
  295. {
  296. unsigned int tmpbufsize, xferpos = 0, totalxferlen = 0;
  297. struct spi_controller *ctlr = mem->spi->controller;
  298. struct spi_transfer xfers[4] = { };
  299. struct spi_message msg;
  300. u8 *tmpbuf;
  301. int ret;
  302. ret = spi_mem_check_op(op);
  303. if (ret)
  304. return ret;
  305. if (!spi_mem_internal_supports_op(mem, op))
  306. return -EOPNOTSUPP;
  307. if (ctlr->mem_ops && ctlr->mem_ops->exec_op && !spi_get_csgpiod(mem->spi, 0)) {
  308. ret = spi_mem_access_start(mem);
  309. if (ret)
  310. return ret;
  311. ret = ctlr->mem_ops->exec_op(mem, op);
  312. spi_mem_access_end(mem);
  313. /*
  314. * Some controllers only optimize specific paths (typically the
  315. * read path) and expect the core to use the regular SPI
  316. * interface in other cases.
  317. */
  318. if (!ret || (ret != -ENOTSUPP && ret != -EOPNOTSUPP)) {
  319. spi_mem_add_op_stats(ctlr->pcpu_statistics, op, ret);
  320. spi_mem_add_op_stats(mem->spi->pcpu_statistics, op, ret);
  321. return ret;
  322. }
  323. }
  324. tmpbufsize = op->cmd.nbytes + op->addr.nbytes + op->dummy.nbytes;
  325. /*
  326. * Allocate a buffer to transmit the CMD, ADDR cycles with kmalloc() so
  327. * we're guaranteed that this buffer is DMA-able, as required by the
  328. * SPI layer.
  329. */
  330. tmpbuf = kzalloc(tmpbufsize, GFP_KERNEL | GFP_DMA);
  331. if (!tmpbuf)
  332. return -ENOMEM;
  333. spi_message_init(&msg);
  334. tmpbuf[0] = op->cmd.opcode;
  335. xfers[xferpos].tx_buf = tmpbuf;
  336. xfers[xferpos].len = op->cmd.nbytes;
  337. xfers[xferpos].tx_nbits = op->cmd.buswidth;
  338. spi_message_add_tail(&xfers[xferpos], &msg);
  339. xferpos++;
  340. totalxferlen++;
  341. if (op->addr.nbytes) {
  342. int i;
  343. for (i = 0; i < op->addr.nbytes; i++)
  344. tmpbuf[i + 1] = op->addr.val >>
  345. (8 * (op->addr.nbytes - i - 1));
  346. xfers[xferpos].tx_buf = tmpbuf + 1;
  347. xfers[xferpos].len = op->addr.nbytes;
  348. xfers[xferpos].tx_nbits = op->addr.buswidth;
  349. spi_message_add_tail(&xfers[xferpos], &msg);
  350. xferpos++;
  351. totalxferlen += op->addr.nbytes;
  352. }
  353. if (op->dummy.nbytes) {
  354. memset(tmpbuf + op->addr.nbytes + 1, 0xff, op->dummy.nbytes);
  355. xfers[xferpos].tx_buf = tmpbuf + op->addr.nbytes + 1;
  356. xfers[xferpos].len = op->dummy.nbytes;
  357. xfers[xferpos].tx_nbits = op->dummy.buswidth;
  358. xfers[xferpos].dummy_data = 1;
  359. spi_message_add_tail(&xfers[xferpos], &msg);
  360. xferpos++;
  361. totalxferlen += op->dummy.nbytes;
  362. }
  363. if (op->data.nbytes) {
  364. if (op->data.dir == SPI_MEM_DATA_IN) {
  365. xfers[xferpos].rx_buf = op->data.buf.in;
  366. xfers[xferpos].rx_nbits = op->data.buswidth;
  367. } else {
  368. xfers[xferpos].tx_buf = op->data.buf.out;
  369. xfers[xferpos].tx_nbits = op->data.buswidth;
  370. }
  371. xfers[xferpos].len = op->data.nbytes;
  372. spi_message_add_tail(&xfers[xferpos], &msg);
  373. xferpos++;
  374. totalxferlen += op->data.nbytes;
  375. }
  376. ret = spi_sync(mem->spi, &msg);
  377. kfree(tmpbuf);
  378. if (ret)
  379. return ret;
  380. if (msg.actual_length != totalxferlen)
  381. return -EIO;
  382. return 0;
  383. }
  384. EXPORT_SYMBOL_GPL(spi_mem_exec_op);
  385. /**
  386. * spi_mem_get_name() - Return the SPI mem device name to be used by the
  387. * upper layer if necessary
  388. * @mem: the SPI memory
  389. *
  390. * This function allows SPI mem users to retrieve the SPI mem device name.
  391. * It is useful if the upper layer needs to expose a custom name for
  392. * compatibility reasons.
  393. *
  394. * Return: a string containing the name of the memory device to be used
  395. * by the SPI mem user
  396. */
  397. const char *spi_mem_get_name(struct spi_mem *mem)
  398. {
  399. return mem->name;
  400. }
  401. EXPORT_SYMBOL_GPL(spi_mem_get_name);
  402. /**
  403. * spi_mem_adjust_op_size() - Adjust the data size of a SPI mem operation to
  404. * match controller limitations
  405. * @mem: the SPI memory
  406. * @op: the operation to adjust
  407. *
  408. * Some controllers have FIFO limitations and must split a data transfer
  409. * operation into multiple ones, others require a specific alignment for
  410. * optimized accesses. This function allows SPI mem drivers to split a single
  411. * operation into multiple sub-operations when required.
  412. *
  413. * Return: a negative error code if the controller can't properly adjust @op,
  414. * 0 otherwise. Note that @op->data.nbytes will be updated if @op
  415. * can't be handled in a single step.
  416. */
  417. int spi_mem_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op)
  418. {
  419. struct spi_controller *ctlr = mem->spi->controller;
  420. size_t len;
  421. if (ctlr->mem_ops && ctlr->mem_ops->adjust_op_size)
  422. return ctlr->mem_ops->adjust_op_size(mem, op);
  423. if (!ctlr->mem_ops || !ctlr->mem_ops->exec_op) {
  424. len = op->cmd.nbytes + op->addr.nbytes + op->dummy.nbytes;
  425. if (len > spi_max_transfer_size(mem->spi))
  426. return -EINVAL;
  427. op->data.nbytes = min3((size_t)op->data.nbytes,
  428. spi_max_transfer_size(mem->spi),
  429. spi_max_message_size(mem->spi) -
  430. len);
  431. if (!op->data.nbytes)
  432. return -EINVAL;
  433. }
  434. return 0;
  435. }
  436. EXPORT_SYMBOL_GPL(spi_mem_adjust_op_size);
  437. static ssize_t spi_mem_no_dirmap_read(struct spi_mem_dirmap_desc *desc,
  438. u64 offs, size_t len, void *buf)
  439. {
  440. struct spi_mem_op op = desc->info.op_tmpl;
  441. int ret;
  442. op.addr.val = desc->info.offset + offs;
  443. op.data.buf.in = buf;
  444. op.data.nbytes = len;
  445. ret = spi_mem_adjust_op_size(desc->mem, &op);
  446. if (ret)
  447. return ret;
  448. ret = spi_mem_exec_op(desc->mem, &op);
  449. if (ret)
  450. return ret;
  451. return op.data.nbytes;
  452. }
  453. static ssize_t spi_mem_no_dirmap_write(struct spi_mem_dirmap_desc *desc,
  454. u64 offs, size_t len, const void *buf)
  455. {
  456. struct spi_mem_op op = desc->info.op_tmpl;
  457. int ret;
  458. op.addr.val = desc->info.offset + offs;
  459. op.data.buf.out = buf;
  460. op.data.nbytes = len;
  461. ret = spi_mem_adjust_op_size(desc->mem, &op);
  462. if (ret)
  463. return ret;
  464. ret = spi_mem_exec_op(desc->mem, &op);
  465. if (ret)
  466. return ret;
  467. return op.data.nbytes;
  468. }
  469. /**
  470. * spi_mem_dirmap_create() - Create a direct mapping descriptor
  471. * @mem: SPI mem device this direct mapping should be created for
  472. * @info: direct mapping information
  473. *
  474. * This function is creating a direct mapping descriptor which can then be used
  475. * to access the memory using spi_mem_dirmap_read() or spi_mem_dirmap_write().
  476. * If the SPI controller driver does not support direct mapping, this function
  477. * falls back to an implementation using spi_mem_exec_op(), so that the caller
  478. * doesn't have to bother implementing a fallback on his own.
  479. *
  480. * Return: a valid pointer in case of success, and ERR_PTR() otherwise.
  481. */
  482. struct spi_mem_dirmap_desc *
  483. spi_mem_dirmap_create(struct spi_mem *mem,
  484. const struct spi_mem_dirmap_info *info)
  485. {
  486. struct spi_controller *ctlr = mem->spi->controller;
  487. struct spi_mem_dirmap_desc *desc;
  488. int ret = -ENOTSUPP;
  489. /* Make sure the number of address cycles is between 1 and 8 bytes. */
  490. if (!info->op_tmpl.addr.nbytes || info->op_tmpl.addr.nbytes > 8)
  491. return ERR_PTR(-EINVAL);
  492. /* data.dir should either be SPI_MEM_DATA_IN or SPI_MEM_DATA_OUT. */
  493. if (info->op_tmpl.data.dir == SPI_MEM_NO_DATA)
  494. return ERR_PTR(-EINVAL);
  495. desc = kzalloc(sizeof(*desc), GFP_KERNEL);
  496. if (!desc)
  497. return ERR_PTR(-ENOMEM);
  498. desc->mem = mem;
  499. desc->info = *info;
  500. if (ctlr->mem_ops && ctlr->mem_ops->dirmap_create)
  501. ret = ctlr->mem_ops->dirmap_create(desc);
  502. if (ret) {
  503. desc->nodirmap = true;
  504. if (!spi_mem_supports_op(desc->mem, &desc->info.op_tmpl))
  505. ret = -EOPNOTSUPP;
  506. else
  507. ret = 0;
  508. }
  509. if (ret) {
  510. kfree(desc);
  511. return ERR_PTR(ret);
  512. }
  513. return desc;
  514. }
  515. EXPORT_SYMBOL_GPL(spi_mem_dirmap_create);
  516. /**
  517. * spi_mem_dirmap_destroy() - Destroy a direct mapping descriptor
  518. * @desc: the direct mapping descriptor to destroy
  519. *
  520. * This function destroys a direct mapping descriptor previously created by
  521. * spi_mem_dirmap_create().
  522. */
  523. void spi_mem_dirmap_destroy(struct spi_mem_dirmap_desc *desc)
  524. {
  525. struct spi_controller *ctlr = desc->mem->spi->controller;
  526. if (!desc->nodirmap && ctlr->mem_ops && ctlr->mem_ops->dirmap_destroy)
  527. ctlr->mem_ops->dirmap_destroy(desc);
  528. kfree(desc);
  529. }
  530. EXPORT_SYMBOL_GPL(spi_mem_dirmap_destroy);
  531. static void devm_spi_mem_dirmap_release(struct device *dev, void *res)
  532. {
  533. struct spi_mem_dirmap_desc *desc = *(struct spi_mem_dirmap_desc **)res;
  534. spi_mem_dirmap_destroy(desc);
  535. }
  536. /**
  537. * devm_spi_mem_dirmap_create() - Create a direct mapping descriptor and attach
  538. * it to a device
  539. * @dev: device the dirmap desc will be attached to
  540. * @mem: SPI mem device this direct mapping should be created for
  541. * @info: direct mapping information
  542. *
  543. * devm_ variant of the spi_mem_dirmap_create() function. See
  544. * spi_mem_dirmap_create() for more details.
  545. *
  546. * Return: a valid pointer in case of success, and ERR_PTR() otherwise.
  547. */
  548. struct spi_mem_dirmap_desc *
  549. devm_spi_mem_dirmap_create(struct device *dev, struct spi_mem *mem,
  550. const struct spi_mem_dirmap_info *info)
  551. {
  552. struct spi_mem_dirmap_desc **ptr, *desc;
  553. ptr = devres_alloc(devm_spi_mem_dirmap_release, sizeof(*ptr),
  554. GFP_KERNEL);
  555. if (!ptr)
  556. return ERR_PTR(-ENOMEM);
  557. desc = spi_mem_dirmap_create(mem, info);
  558. if (IS_ERR(desc)) {
  559. devres_free(ptr);
  560. } else {
  561. *ptr = desc;
  562. devres_add(dev, ptr);
  563. }
  564. return desc;
  565. }
  566. EXPORT_SYMBOL_GPL(devm_spi_mem_dirmap_create);
  567. static int devm_spi_mem_dirmap_match(struct device *dev, void *res, void *data)
  568. {
  569. struct spi_mem_dirmap_desc **ptr = res;
  570. if (WARN_ON(!ptr || !*ptr))
  571. return 0;
  572. return *ptr == data;
  573. }
  574. /**
  575. * devm_spi_mem_dirmap_destroy() - Destroy a direct mapping descriptor attached
  576. * to a device
  577. * @dev: device the dirmap desc is attached to
  578. * @desc: the direct mapping descriptor to destroy
  579. *
  580. * devm_ variant of the spi_mem_dirmap_destroy() function. See
  581. * spi_mem_dirmap_destroy() for more details.
  582. */
  583. void devm_spi_mem_dirmap_destroy(struct device *dev,
  584. struct spi_mem_dirmap_desc *desc)
  585. {
  586. devres_release(dev, devm_spi_mem_dirmap_release,
  587. devm_spi_mem_dirmap_match, desc);
  588. }
  589. EXPORT_SYMBOL_GPL(devm_spi_mem_dirmap_destroy);
  590. /**
  591. * spi_mem_dirmap_read() - Read data through a direct mapping
  592. * @desc: direct mapping descriptor
  593. * @offs: offset to start reading from. Note that this is not an absolute
  594. * offset, but the offset within the direct mapping which already has
  595. * its own offset
  596. * @len: length in bytes
  597. * @buf: destination buffer. This buffer must be DMA-able
  598. *
  599. * This function reads data from a memory device using a direct mapping
  600. * previously instantiated with spi_mem_dirmap_create().
  601. *
  602. * Return: the amount of data read from the memory device or a negative error
  603. * code. Note that the returned size might be smaller than @len, and the caller
  604. * is responsible for calling spi_mem_dirmap_read() again when that happens.
  605. */
  606. ssize_t spi_mem_dirmap_read(struct spi_mem_dirmap_desc *desc,
  607. u64 offs, size_t len, void *buf)
  608. {
  609. struct spi_controller *ctlr = desc->mem->spi->controller;
  610. ssize_t ret;
  611. if (desc->info.op_tmpl.data.dir != SPI_MEM_DATA_IN)
  612. return -EINVAL;
  613. if (!len)
  614. return 0;
  615. if (desc->nodirmap) {
  616. ret = spi_mem_no_dirmap_read(desc, offs, len, buf);
  617. } else if (ctlr->mem_ops && ctlr->mem_ops->dirmap_read) {
  618. ret = spi_mem_access_start(desc->mem);
  619. if (ret)
  620. return ret;
  621. ret = ctlr->mem_ops->dirmap_read(desc, offs, len, buf);
  622. spi_mem_access_end(desc->mem);
  623. } else {
  624. ret = -ENOTSUPP;
  625. }
  626. return ret;
  627. }
  628. EXPORT_SYMBOL_GPL(spi_mem_dirmap_read);
  629. /**
  630. * spi_mem_dirmap_write() - Write data through a direct mapping
  631. * @desc: direct mapping descriptor
  632. * @offs: offset to start writing from. Note that this is not an absolute
  633. * offset, but the offset within the direct mapping which already has
  634. * its own offset
  635. * @len: length in bytes
  636. * @buf: source buffer. This buffer must be DMA-able
  637. *
  638. * This function writes data to a memory device using a direct mapping
  639. * previously instantiated with spi_mem_dirmap_create().
  640. *
  641. * Return: the amount of data written to the memory device or a negative error
  642. * code. Note that the returned size might be smaller than @len, and the caller
  643. * is responsible for calling spi_mem_dirmap_write() again when that happens.
  644. */
  645. ssize_t spi_mem_dirmap_write(struct spi_mem_dirmap_desc *desc,
  646. u64 offs, size_t len, const void *buf)
  647. {
  648. struct spi_controller *ctlr = desc->mem->spi->controller;
  649. ssize_t ret;
  650. if (desc->info.op_tmpl.data.dir != SPI_MEM_DATA_OUT)
  651. return -EINVAL;
  652. if (!len)
  653. return 0;
  654. if (desc->nodirmap) {
  655. ret = spi_mem_no_dirmap_write(desc, offs, len, buf);
  656. } else if (ctlr->mem_ops && ctlr->mem_ops->dirmap_write) {
  657. ret = spi_mem_access_start(desc->mem);
  658. if (ret)
  659. return ret;
  660. ret = ctlr->mem_ops->dirmap_write(desc, offs, len, buf);
  661. spi_mem_access_end(desc->mem);
  662. } else {
  663. ret = -ENOTSUPP;
  664. }
  665. return ret;
  666. }
  667. EXPORT_SYMBOL_GPL(spi_mem_dirmap_write);
  668. static inline struct spi_mem_driver *to_spi_mem_drv(struct device_driver *drv)
  669. {
  670. return container_of(drv, struct spi_mem_driver, spidrv.driver);
  671. }
  672. static int spi_mem_read_status(struct spi_mem *mem,
  673. const struct spi_mem_op *op,
  674. u16 *status)
  675. {
  676. const u8 *bytes = (u8 *)op->data.buf.in;
  677. int ret;
  678. ret = spi_mem_exec_op(mem, op);
  679. if (ret)
  680. return ret;
  681. if (op->data.nbytes > 1)
  682. *status = ((u16)bytes[0] << 8) | bytes[1];
  683. else
  684. *status = bytes[0];
  685. return 0;
  686. }
  687. /**
  688. * spi_mem_poll_status() - Poll memory device status
  689. * @mem: SPI memory device
  690. * @op: the memory operation to execute
  691. * @mask: status bitmask to ckeck
  692. * @match: (status & mask) expected value
  693. * @initial_delay_us: delay in us before starting to poll
  694. * @polling_delay_us: time to sleep between reads in us
  695. * @timeout_ms: timeout in milliseconds
  696. *
  697. * This function polls a status register and returns when
  698. * (status & mask) == match or when the timeout has expired.
  699. *
  700. * Return: 0 in case of success, -ETIMEDOUT in case of error,
  701. * -EOPNOTSUPP if not supported.
  702. */
  703. int spi_mem_poll_status(struct spi_mem *mem,
  704. const struct spi_mem_op *op,
  705. u16 mask, u16 match,
  706. unsigned long initial_delay_us,
  707. unsigned long polling_delay_us,
  708. u16 timeout_ms)
  709. {
  710. struct spi_controller *ctlr = mem->spi->controller;
  711. int ret = -EOPNOTSUPP;
  712. int read_status_ret;
  713. u16 status;
  714. if (op->data.nbytes < 1 || op->data.nbytes > 2 ||
  715. op->data.dir != SPI_MEM_DATA_IN)
  716. return -EINVAL;
  717. if (ctlr->mem_ops && ctlr->mem_ops->poll_status && !spi_get_csgpiod(mem->spi, 0)) {
  718. ret = spi_mem_access_start(mem);
  719. if (ret)
  720. return ret;
  721. ret = ctlr->mem_ops->poll_status(mem, op, mask, match,
  722. initial_delay_us, polling_delay_us,
  723. timeout_ms);
  724. spi_mem_access_end(mem);
  725. }
  726. if (ret == -EOPNOTSUPP) {
  727. if (!spi_mem_supports_op(mem, op))
  728. return ret;
  729. if (initial_delay_us < 10)
  730. udelay(initial_delay_us);
  731. else
  732. usleep_range((initial_delay_us >> 2) + 1,
  733. initial_delay_us);
  734. ret = read_poll_timeout(spi_mem_read_status, read_status_ret,
  735. (read_status_ret || ((status) & mask) == match),
  736. polling_delay_us, timeout_ms * 1000, false, mem,
  737. op, &status);
  738. if (read_status_ret)
  739. return read_status_ret;
  740. }
  741. return ret;
  742. }
  743. EXPORT_SYMBOL_GPL(spi_mem_poll_status);
  744. static int spi_mem_probe(struct spi_device *spi)
  745. {
  746. struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
  747. struct spi_controller *ctlr = spi->controller;
  748. struct spi_mem *mem;
  749. mem = devm_kzalloc(&spi->dev, sizeof(*mem), GFP_KERNEL);
  750. if (!mem)
  751. return -ENOMEM;
  752. mem->spi = spi;
  753. if (ctlr->mem_ops && ctlr->mem_ops->get_name)
  754. mem->name = ctlr->mem_ops->get_name(mem);
  755. else
  756. mem->name = dev_name(&spi->dev);
  757. if (IS_ERR_OR_NULL(mem->name))
  758. return PTR_ERR_OR_ZERO(mem->name);
  759. spi_set_drvdata(spi, mem);
  760. return memdrv->probe(mem);
  761. }
  762. static void spi_mem_remove(struct spi_device *spi)
  763. {
  764. struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
  765. struct spi_mem *mem = spi_get_drvdata(spi);
  766. if (memdrv->remove)
  767. memdrv->remove(mem);
  768. }
  769. static void spi_mem_shutdown(struct spi_device *spi)
  770. {
  771. struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
  772. struct spi_mem *mem = spi_get_drvdata(spi);
  773. if (memdrv->shutdown)
  774. memdrv->shutdown(mem);
  775. }
  776. /**
  777. * spi_mem_driver_register_with_owner() - Register a SPI memory driver
  778. * @memdrv: the SPI memory driver to register
  779. * @owner: the owner of this driver
  780. *
  781. * Registers a SPI memory driver.
  782. *
  783. * Return: 0 in case of success, a negative error core otherwise.
  784. */
  785. int spi_mem_driver_register_with_owner(struct spi_mem_driver *memdrv,
  786. struct module *owner)
  787. {
  788. memdrv->spidrv.probe = spi_mem_probe;
  789. memdrv->spidrv.remove = spi_mem_remove;
  790. memdrv->spidrv.shutdown = spi_mem_shutdown;
  791. return __spi_register_driver(owner, &memdrv->spidrv);
  792. }
  793. EXPORT_SYMBOL_GPL(spi_mem_driver_register_with_owner);
  794. /**
  795. * spi_mem_driver_unregister() - Unregister a SPI memory driver
  796. * @memdrv: the SPI memory driver to unregister
  797. *
  798. * Unregisters a SPI memory driver.
  799. */
  800. void spi_mem_driver_unregister(struct spi_mem_driver *memdrv)
  801. {
  802. spi_unregister_driver(&memdrv->spidrv);
  803. }
  804. EXPORT_SYMBOL_GPL(spi_mem_driver_unregister);