altera_uart.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * altera_uart.c -- Altera UART driver
  4. *
  5. * Based on mcf.c -- Freescale ColdFire UART driver
  6. *
  7. * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
  8. * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
  9. * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/timer.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/module.h>
  16. #include <linux/console.h>
  17. #include <linux/tty.h>
  18. #include <linux/tty_flip.h>
  19. #include <linux/serial.h>
  20. #include <linux/serial_core.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/of.h>
  23. #include <linux/io.h>
  24. #include <linux/altera_uart.h>
  25. #define DRV_NAME "altera_uart"
  26. #define SERIAL_ALTERA_MAJOR 204
  27. #define SERIAL_ALTERA_MINOR 213
  28. /*
  29. * Altera UART register definitions according to the Nios UART datasheet:
  30. * http://www.altera.com/literature/ds/ds_nios_uart.pdf
  31. */
  32. #define ALTERA_UART_SIZE 32
  33. #define ALTERA_UART_RXDATA_REG 0
  34. #define ALTERA_UART_TXDATA_REG 4
  35. #define ALTERA_UART_STATUS_REG 8
  36. #define ALTERA_UART_CONTROL_REG 12
  37. #define ALTERA_UART_DIVISOR_REG 16
  38. #define ALTERA_UART_EOP_REG 20
  39. #define ALTERA_UART_STATUS_PE_MSK 0x0001 /* parity error */
  40. #define ALTERA_UART_STATUS_FE_MSK 0x0002 /* framing error */
  41. #define ALTERA_UART_STATUS_BRK_MSK 0x0004 /* break */
  42. #define ALTERA_UART_STATUS_ROE_MSK 0x0008 /* RX overrun error */
  43. #define ALTERA_UART_STATUS_TOE_MSK 0x0010 /* TX overrun error */
  44. #define ALTERA_UART_STATUS_TMT_MSK 0x0020 /* TX shift register state */
  45. #define ALTERA_UART_STATUS_TRDY_MSK 0x0040 /* TX ready */
  46. #define ALTERA_UART_STATUS_RRDY_MSK 0x0080 /* RX ready */
  47. #define ALTERA_UART_STATUS_E_MSK 0x0100 /* exception condition */
  48. #define ALTERA_UART_STATUS_DCTS_MSK 0x0400 /* CTS logic-level change */
  49. #define ALTERA_UART_STATUS_CTS_MSK 0x0800 /* CTS logic state */
  50. #define ALTERA_UART_STATUS_EOP_MSK 0x1000 /* EOP written/read */
  51. /* Enable interrupt on... */
  52. #define ALTERA_UART_CONTROL_PE_MSK 0x0001 /* ...parity error */
  53. #define ALTERA_UART_CONTROL_FE_MSK 0x0002 /* ...framing error */
  54. #define ALTERA_UART_CONTROL_BRK_MSK 0x0004 /* ...break */
  55. #define ALTERA_UART_CONTROL_ROE_MSK 0x0008 /* ...RX overrun */
  56. #define ALTERA_UART_CONTROL_TOE_MSK 0x0010 /* ...TX overrun */
  57. #define ALTERA_UART_CONTROL_TMT_MSK 0x0020 /* ...TX shift register empty */
  58. #define ALTERA_UART_CONTROL_TRDY_MSK 0x0040 /* ...TX ready */
  59. #define ALTERA_UART_CONTROL_RRDY_MSK 0x0080 /* ...RX ready */
  60. #define ALTERA_UART_CONTROL_E_MSK 0x0100 /* ...exception*/
  61. #define ALTERA_UART_CONTROL_TRBK_MSK 0x0200 /* TX break */
  62. #define ALTERA_UART_CONTROL_DCTS_MSK 0x0400 /* Interrupt on CTS change */
  63. #define ALTERA_UART_CONTROL_RTS_MSK 0x0800 /* RTS signal */
  64. #define ALTERA_UART_CONTROL_EOP_MSK 0x1000 /* Interrupt on EOP */
  65. /*
  66. * Local per-uart structure.
  67. */
  68. struct altera_uart {
  69. struct uart_port port;
  70. struct timer_list tmr;
  71. unsigned int sigs; /* Local copy of line sigs */
  72. unsigned short imr; /* Local IMR mirror */
  73. };
  74. static u32 altera_uart_readl(struct uart_port *port, int reg)
  75. {
  76. return readl(port->membase + (reg << port->regshift));
  77. }
  78. static void altera_uart_writel(struct uart_port *port, u32 dat, int reg)
  79. {
  80. writel(dat, port->membase + (reg << port->regshift));
  81. }
  82. static unsigned int altera_uart_tx_empty(struct uart_port *port)
  83. {
  84. return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  85. ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0;
  86. }
  87. static unsigned int altera_uart_get_mctrl(struct uart_port *port)
  88. {
  89. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  90. unsigned int sigs;
  91. sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  92. ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0;
  93. sigs |= (pp->sigs & TIOCM_RTS);
  94. return sigs;
  95. }
  96. static void altera_uart_update_ctrl_reg(struct altera_uart *pp)
  97. {
  98. unsigned short imr = pp->imr;
  99. /*
  100. * If the device doesn't have an irq, ensure that the irq bits are
  101. * masked out to keep the irq line inactive.
  102. */
  103. if (!pp->port.irq)
  104. imr &= ALTERA_UART_CONTROL_TRBK_MSK | ALTERA_UART_CONTROL_RTS_MSK;
  105. altera_uart_writel(&pp->port, imr, ALTERA_UART_CONTROL_REG);
  106. }
  107. static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs)
  108. {
  109. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  110. pp->sigs = sigs;
  111. if (sigs & TIOCM_RTS)
  112. pp->imr |= ALTERA_UART_CONTROL_RTS_MSK;
  113. else
  114. pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK;
  115. altera_uart_update_ctrl_reg(pp);
  116. }
  117. static void altera_uart_start_tx(struct uart_port *port)
  118. {
  119. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  120. pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK;
  121. altera_uart_update_ctrl_reg(pp);
  122. }
  123. static void altera_uart_stop_tx(struct uart_port *port)
  124. {
  125. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  126. pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
  127. altera_uart_update_ctrl_reg(pp);
  128. }
  129. static void altera_uart_stop_rx(struct uart_port *port)
  130. {
  131. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  132. pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK;
  133. altera_uart_update_ctrl_reg(pp);
  134. }
  135. static void altera_uart_break_ctl(struct uart_port *port, int break_state)
  136. {
  137. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  138. unsigned long flags;
  139. uart_port_lock_irqsave(port, &flags);
  140. if (break_state == -1)
  141. pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK;
  142. else
  143. pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
  144. altera_uart_update_ctrl_reg(pp);
  145. uart_port_unlock_irqrestore(port, flags);
  146. }
  147. static void altera_uart_set_termios(struct uart_port *port,
  148. struct ktermios *termios,
  149. const struct ktermios *old)
  150. {
  151. unsigned long flags;
  152. unsigned int baud, baudclk;
  153. baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
  154. baudclk = port->uartclk / baud;
  155. if (old)
  156. tty_termios_copy_hw(termios, old);
  157. tty_termios_encode_baud_rate(termios, baud, baud);
  158. uart_port_lock_irqsave(port, &flags);
  159. uart_update_timeout(port, termios->c_cflag, baud);
  160. altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
  161. uart_port_unlock_irqrestore(port, flags);
  162. /*
  163. * FIXME: port->read_status_mask and port->ignore_status_mask
  164. * need to be initialized based on termios settings for
  165. * INPCK, IGNBRK, IGNPAR, PARMRK, BRKINT
  166. */
  167. }
  168. static void altera_uart_rx_chars(struct uart_port *port)
  169. {
  170. unsigned short status;
  171. u8 ch, flag;
  172. while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) &
  173. ALTERA_UART_STATUS_RRDY_MSK) {
  174. ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
  175. flag = TTY_NORMAL;
  176. port->icount.rx++;
  177. if (status & ALTERA_UART_STATUS_E_MSK) {
  178. altera_uart_writel(port, status,
  179. ALTERA_UART_STATUS_REG);
  180. if (status & ALTERA_UART_STATUS_BRK_MSK) {
  181. port->icount.brk++;
  182. if (uart_handle_break(port))
  183. continue;
  184. } else if (status & ALTERA_UART_STATUS_PE_MSK) {
  185. port->icount.parity++;
  186. } else if (status & ALTERA_UART_STATUS_ROE_MSK) {
  187. port->icount.overrun++;
  188. } else if (status & ALTERA_UART_STATUS_FE_MSK) {
  189. port->icount.frame++;
  190. }
  191. status &= port->read_status_mask;
  192. if (status & ALTERA_UART_STATUS_BRK_MSK)
  193. flag = TTY_BREAK;
  194. else if (status & ALTERA_UART_STATUS_PE_MSK)
  195. flag = TTY_PARITY;
  196. else if (status & ALTERA_UART_STATUS_FE_MSK)
  197. flag = TTY_FRAME;
  198. }
  199. if (uart_handle_sysrq_char(port, ch))
  200. continue;
  201. uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch,
  202. flag);
  203. }
  204. tty_flip_buffer_push(&port->state->port);
  205. }
  206. static void altera_uart_tx_chars(struct uart_port *port)
  207. {
  208. u8 ch;
  209. uart_port_tx(port, ch,
  210. altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  211. ALTERA_UART_STATUS_TRDY_MSK,
  212. altera_uart_writel(port, ch, ALTERA_UART_TXDATA_REG));
  213. }
  214. static irqreturn_t altera_uart_interrupt(int irq, void *data)
  215. {
  216. struct uart_port *port = data;
  217. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  218. unsigned long flags;
  219. unsigned int isr;
  220. isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;
  221. uart_port_lock_irqsave(port, &flags);
  222. if (isr & ALTERA_UART_STATUS_RRDY_MSK)
  223. altera_uart_rx_chars(port);
  224. if (isr & ALTERA_UART_STATUS_TRDY_MSK)
  225. altera_uart_tx_chars(port);
  226. uart_port_unlock_irqrestore(port, flags);
  227. return IRQ_RETVAL(isr);
  228. }
  229. static void altera_uart_timer(struct timer_list *t)
  230. {
  231. struct altera_uart *pp = from_timer(pp, t, tmr);
  232. struct uart_port *port = &pp->port;
  233. altera_uart_interrupt(0, port);
  234. mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
  235. }
  236. static void altera_uart_config_port(struct uart_port *port, int flags)
  237. {
  238. port->type = PORT_ALTERA_UART;
  239. /* Clear mask, so no surprise interrupts. */
  240. altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG);
  241. /* Clear status register */
  242. altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG);
  243. }
  244. static int altera_uart_startup(struct uart_port *port)
  245. {
  246. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  247. unsigned long flags;
  248. if (!port->irq) {
  249. timer_setup(&pp->tmr, altera_uart_timer, 0);
  250. mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
  251. } else {
  252. int ret;
  253. ret = request_irq(port->irq, altera_uart_interrupt, 0,
  254. dev_name(port->dev), port);
  255. if (ret) {
  256. pr_err(DRV_NAME ": unable to attach Altera UART %d "
  257. "interrupt vector=%d\n", port->line, port->irq);
  258. return ret;
  259. }
  260. }
  261. uart_port_lock_irqsave(port, &flags);
  262. /* Enable RX interrupts now */
  263. pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
  264. altera_uart_update_ctrl_reg(pp);
  265. uart_port_unlock_irqrestore(port, flags);
  266. return 0;
  267. }
  268. static void altera_uart_shutdown(struct uart_port *port)
  269. {
  270. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  271. unsigned long flags;
  272. uart_port_lock_irqsave(port, &flags);
  273. /* Disable all interrupts now */
  274. pp->imr = 0;
  275. altera_uart_update_ctrl_reg(pp);
  276. uart_port_unlock_irqrestore(port, flags);
  277. if (port->irq)
  278. free_irq(port->irq, port);
  279. else
  280. del_timer_sync(&pp->tmr);
  281. }
  282. static const char *altera_uart_type(struct uart_port *port)
  283. {
  284. return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL;
  285. }
  286. static int altera_uart_request_port(struct uart_port *port)
  287. {
  288. /* UARTs always present */
  289. return 0;
  290. }
  291. static void altera_uart_release_port(struct uart_port *port)
  292. {
  293. /* Nothing to release... */
  294. }
  295. static int altera_uart_verify_port(struct uart_port *port,
  296. struct serial_struct *ser)
  297. {
  298. if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART))
  299. return -EINVAL;
  300. return 0;
  301. }
  302. #ifdef CONFIG_CONSOLE_POLL
  303. static int altera_uart_poll_get_char(struct uart_port *port)
  304. {
  305. while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  306. ALTERA_UART_STATUS_RRDY_MSK))
  307. cpu_relax();
  308. return altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
  309. }
  310. static void altera_uart_poll_put_char(struct uart_port *port, unsigned char c)
  311. {
  312. while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  313. ALTERA_UART_STATUS_TRDY_MSK))
  314. cpu_relax();
  315. altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG);
  316. }
  317. #endif
  318. /*
  319. * Define the basic serial functions we support.
  320. */
  321. static const struct uart_ops altera_uart_ops = {
  322. .tx_empty = altera_uart_tx_empty,
  323. .get_mctrl = altera_uart_get_mctrl,
  324. .set_mctrl = altera_uart_set_mctrl,
  325. .start_tx = altera_uart_start_tx,
  326. .stop_tx = altera_uart_stop_tx,
  327. .stop_rx = altera_uart_stop_rx,
  328. .break_ctl = altera_uart_break_ctl,
  329. .startup = altera_uart_startup,
  330. .shutdown = altera_uart_shutdown,
  331. .set_termios = altera_uart_set_termios,
  332. .type = altera_uart_type,
  333. .request_port = altera_uart_request_port,
  334. .release_port = altera_uart_release_port,
  335. .config_port = altera_uart_config_port,
  336. .verify_port = altera_uart_verify_port,
  337. #ifdef CONFIG_CONSOLE_POLL
  338. .poll_get_char = altera_uart_poll_get_char,
  339. .poll_put_char = altera_uart_poll_put_char,
  340. #endif
  341. };
  342. static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS];
  343. #if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE)
  344. static void altera_uart_console_putc(struct uart_port *port, unsigned char c)
  345. {
  346. while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  347. ALTERA_UART_STATUS_TRDY_MSK))
  348. cpu_relax();
  349. altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG);
  350. }
  351. static void altera_uart_console_write(struct console *co, const char *s,
  352. unsigned int count)
  353. {
  354. struct uart_port *port = &(altera_uart_ports + co->index)->port;
  355. uart_console_write(port, s, count, altera_uart_console_putc);
  356. }
  357. static int __init altera_uart_console_setup(struct console *co, char *options)
  358. {
  359. struct uart_port *port;
  360. int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE;
  361. int bits = 8;
  362. int parity = 'n';
  363. int flow = 'n';
  364. if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
  365. return -EINVAL;
  366. port = &altera_uart_ports[co->index].port;
  367. if (!port->membase)
  368. return -ENODEV;
  369. if (options)
  370. uart_parse_options(options, &baud, &parity, &bits, &flow);
  371. return uart_set_options(port, co, baud, parity, bits, flow);
  372. }
  373. static struct uart_driver altera_uart_driver;
  374. static struct console altera_uart_console = {
  375. .name = "ttyAL",
  376. .write = altera_uart_console_write,
  377. .device = uart_console_device,
  378. .setup = altera_uart_console_setup,
  379. .flags = CON_PRINTBUFFER,
  380. .index = -1,
  381. .data = &altera_uart_driver,
  382. };
  383. static int __init altera_uart_console_init(void)
  384. {
  385. register_console(&altera_uart_console);
  386. return 0;
  387. }
  388. console_initcall(altera_uart_console_init);
  389. #define ALTERA_UART_CONSOLE (&altera_uart_console)
  390. static void altera_uart_earlycon_write(struct console *co, const char *s,
  391. unsigned int count)
  392. {
  393. struct earlycon_device *dev = co->data;
  394. uart_console_write(&dev->port, s, count, altera_uart_console_putc);
  395. }
  396. static int __init altera_uart_earlycon_setup(struct earlycon_device *dev,
  397. const char *options)
  398. {
  399. struct uart_port *port = &dev->port;
  400. if (!port->membase)
  401. return -ENODEV;
  402. /* Enable RX interrupts now */
  403. altera_uart_writel(port, ALTERA_UART_CONTROL_RRDY_MSK,
  404. ALTERA_UART_CONTROL_REG);
  405. if (dev->baud) {
  406. unsigned int baudclk = port->uartclk / dev->baud;
  407. altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
  408. }
  409. dev->con->write = altera_uart_earlycon_write;
  410. return 0;
  411. }
  412. OF_EARLYCON_DECLARE(uart, "altr,uart-1.0", altera_uart_earlycon_setup);
  413. #else
  414. #define ALTERA_UART_CONSOLE NULL
  415. #endif /* CONFIG_SERIAL_ALTERA_UART_CONSOLE */
  416. /*
  417. * Define the altera_uart UART driver structure.
  418. */
  419. static struct uart_driver altera_uart_driver = {
  420. .owner = THIS_MODULE,
  421. .driver_name = DRV_NAME,
  422. .dev_name = "ttyAL",
  423. .major = SERIAL_ALTERA_MAJOR,
  424. .minor = SERIAL_ALTERA_MINOR,
  425. .nr = CONFIG_SERIAL_ALTERA_UART_MAXPORTS,
  426. .cons = ALTERA_UART_CONSOLE,
  427. };
  428. static int altera_uart_probe(struct platform_device *pdev)
  429. {
  430. struct altera_uart_platform_uart *platp = dev_get_platdata(&pdev->dev);
  431. struct uart_port *port;
  432. struct resource *res_mem;
  433. int i = pdev->id;
  434. int ret;
  435. /* if id is -1 scan for a free id and use that one */
  436. if (i == -1) {
  437. for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS; i++)
  438. if (altera_uart_ports[i].port.mapbase == 0)
  439. break;
  440. }
  441. if (i < 0 || i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
  442. return -EINVAL;
  443. port = &altera_uart_ports[i].port;
  444. res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  445. if (res_mem)
  446. port->mapbase = res_mem->start;
  447. else if (platp)
  448. port->mapbase = platp->mapbase;
  449. else
  450. return -EINVAL;
  451. ret = platform_get_irq_optional(pdev, 0);
  452. if (ret < 0 && ret != -ENXIO)
  453. return ret;
  454. if (ret > 0)
  455. port->irq = ret;
  456. else if (platp)
  457. port->irq = platp->irq;
  458. /* Check platform data first so we can override device node data */
  459. if (platp)
  460. port->uartclk = platp->uartclk;
  461. else {
  462. ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
  463. &port->uartclk);
  464. if (ret)
  465. return ret;
  466. }
  467. port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
  468. if (!port->membase)
  469. return -ENOMEM;
  470. if (platp)
  471. port->regshift = platp->bus_shift;
  472. else
  473. port->regshift = 0;
  474. port->line = i;
  475. port->type = PORT_ALTERA_UART;
  476. port->iotype = SERIAL_IO_MEM;
  477. port->ops = &altera_uart_ops;
  478. port->flags = UPF_BOOT_AUTOCONF;
  479. port->dev = &pdev->dev;
  480. platform_set_drvdata(pdev, port);
  481. uart_add_one_port(&altera_uart_driver, port);
  482. return 0;
  483. }
  484. static void altera_uart_remove(struct platform_device *pdev)
  485. {
  486. struct uart_port *port = platform_get_drvdata(pdev);
  487. if (port) {
  488. uart_remove_one_port(&altera_uart_driver, port);
  489. port->mapbase = 0;
  490. iounmap(port->membase);
  491. }
  492. }
  493. #ifdef CONFIG_OF
  494. static const struct of_device_id altera_uart_match[] = {
  495. { .compatible = "ALTR,uart-1.0", },
  496. { .compatible = "altr,uart-1.0", },
  497. {},
  498. };
  499. MODULE_DEVICE_TABLE(of, altera_uart_match);
  500. #endif /* CONFIG_OF */
  501. static struct platform_driver altera_uart_platform_driver = {
  502. .probe = altera_uart_probe,
  503. .remove_new = altera_uart_remove,
  504. .driver = {
  505. .name = DRV_NAME,
  506. .of_match_table = of_match_ptr(altera_uart_match),
  507. },
  508. };
  509. static int __init altera_uart_init(void)
  510. {
  511. int rc;
  512. rc = uart_register_driver(&altera_uart_driver);
  513. if (rc)
  514. return rc;
  515. rc = platform_driver_register(&altera_uart_platform_driver);
  516. if (rc)
  517. uart_unregister_driver(&altera_uart_driver);
  518. return rc;
  519. }
  520. static void __exit altera_uart_exit(void)
  521. {
  522. platform_driver_unregister(&altera_uart_platform_driver);
  523. uart_unregister_driver(&altera_uart_driver);
  524. }
  525. module_init(altera_uart_init);
  526. module_exit(altera_uart_exit);
  527. MODULE_DESCRIPTION("Altera UART driver");
  528. MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
  529. MODULE_LICENSE("GPL");
  530. MODULE_ALIAS("platform:" DRV_NAME);
  531. MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR);