max3100.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2008 Christian Pellegrin <chripell@evolware.org>
  4. *
  5. * Notes: the MAX3100 doesn't provide an interrupt on CTS so we have
  6. * to use polling for flow control. TX empty IRQ is unusable, since
  7. * writing conf clears FIFO buffer and we cannot have this interrupt
  8. * always asking us for attention.
  9. *
  10. * The initial minor number is 209 in the low-density serial port:
  11. * mknod /dev/ttyMAX0 c 204 209
  12. */
  13. #define MAX3100_MAJOR 204
  14. #define MAX3100_MINOR 209
  15. /* 4 MAX3100s should be enough for everyone */
  16. #define MAX_MAX3100 4
  17. #include <linux/container_of.h>
  18. #include <linux/delay.h>
  19. #include <linux/device.h>
  20. #include <linux/freezer.h>
  21. #include <linux/mod_devicetable.h>
  22. #include <linux/module.h>
  23. #include <linux/pm.h>
  24. #include <linux/property.h>
  25. #include <linux/serial_core.h>
  26. #include <linux/serial.h>
  27. #include <linux/slab.h>
  28. #include <linux/spi/spi.h>
  29. #include <linux/tty_flip.h>
  30. #include <linux/tty.h>
  31. #include <linux/types.h>
  32. #include <linux/unaligned.h>
  33. #define MAX3100_C (1<<14)
  34. #define MAX3100_D (0<<14)
  35. #define MAX3100_W (1<<15)
  36. #define MAX3100_RX (0<<15)
  37. #define MAX3100_WC (MAX3100_W | MAX3100_C)
  38. #define MAX3100_RC (MAX3100_RX | MAX3100_C)
  39. #define MAX3100_WD (MAX3100_W | MAX3100_D)
  40. #define MAX3100_RD (MAX3100_RX | MAX3100_D)
  41. #define MAX3100_CMD (3 << 14)
  42. #define MAX3100_T (1<<14)
  43. #define MAX3100_R (1<<15)
  44. #define MAX3100_FEN (1<<13)
  45. #define MAX3100_SHDN (1<<12)
  46. #define MAX3100_TM (1<<11)
  47. #define MAX3100_RM (1<<10)
  48. #define MAX3100_PM (1<<9)
  49. #define MAX3100_RAM (1<<8)
  50. #define MAX3100_IR (1<<7)
  51. #define MAX3100_ST (1<<6)
  52. #define MAX3100_PE (1<<5)
  53. #define MAX3100_L (1<<4)
  54. #define MAX3100_BAUD (0xf)
  55. #define MAX3100_TE (1<<10)
  56. #define MAX3100_RAFE (1<<10)
  57. #define MAX3100_RTS (1<<9)
  58. #define MAX3100_CTS (1<<9)
  59. #define MAX3100_PT (1<<8)
  60. #define MAX3100_DATA (0xff)
  61. #define MAX3100_RT (MAX3100_R | MAX3100_T)
  62. #define MAX3100_RTC (MAX3100_RT | MAX3100_CTS | MAX3100_RAFE)
  63. /* the following simulate a status reg for ignore_status_mask */
  64. #define MAX3100_STATUS_PE 1
  65. #define MAX3100_STATUS_FE 2
  66. #define MAX3100_STATUS_OE 4
  67. struct max3100_port {
  68. struct uart_port port;
  69. struct spi_device *spi;
  70. int cts; /* last CTS received for flow ctrl */
  71. int tx_empty; /* last TX empty bit */
  72. spinlock_t conf_lock; /* shared data */
  73. int conf_commit; /* need to make changes */
  74. int conf; /* configuration for the MAX31000
  75. * (bits 0-7, bits 8-11 are irqs) */
  76. int rts_commit; /* need to change rts */
  77. int rts; /* rts status */
  78. int baud; /* current baud rate */
  79. int parity; /* keeps track if we should send parity */
  80. #define MAX3100_PARITY_ON 1
  81. #define MAX3100_PARITY_ODD 2
  82. #define MAX3100_7BIT 4
  83. int rx_enabled; /* if we should rx chars */
  84. int minor; /* minor number */
  85. int loopback_commit; /* need to change loopback */
  86. int loopback; /* 1 if we are in loopback mode */
  87. /* for handling irqs: need workqueue since we do spi_sync */
  88. struct workqueue_struct *workqueue;
  89. struct work_struct work;
  90. /* set to 1 to make the workhandler exit as soon as possible */
  91. int force_end_work;
  92. /* need to know we are suspending to avoid deadlock on workqueue */
  93. int suspending;
  94. struct timer_list timer;
  95. };
  96. static inline struct max3100_port *to_max3100_port(struct uart_port *port)
  97. {
  98. return container_of(port, struct max3100_port, port);
  99. }
  100. static struct max3100_port *max3100s[MAX_MAX3100]; /* the chips */
  101. static DEFINE_MUTEX(max3100s_lock); /* race on probe */
  102. static int max3100_do_parity(struct max3100_port *s, u16 c)
  103. {
  104. int parity;
  105. if (s->parity & MAX3100_PARITY_ODD)
  106. parity = 1;
  107. else
  108. parity = 0;
  109. if (s->parity & MAX3100_7BIT)
  110. c &= 0x7f;
  111. else
  112. c &= 0xff;
  113. parity = parity ^ (hweight8(c) & 1);
  114. return parity;
  115. }
  116. static int max3100_check_parity(struct max3100_port *s, u16 c)
  117. {
  118. return max3100_do_parity(s, c) == ((c >> 8) & 1);
  119. }
  120. static void max3100_calc_parity(struct max3100_port *s, u16 *c)
  121. {
  122. if (s->parity & MAX3100_7BIT)
  123. *c &= 0x7f;
  124. else
  125. *c &= 0xff;
  126. if (s->parity & MAX3100_PARITY_ON)
  127. *c |= max3100_do_parity(s, *c) << 8;
  128. }
  129. static int max3100_sr(struct max3100_port *s, u16 tx, u16 *rx)
  130. {
  131. struct spi_message message;
  132. __be16 etx, erx;
  133. int status;
  134. struct spi_transfer tran = {
  135. .tx_buf = &etx,
  136. .rx_buf = &erx,
  137. .len = 2,
  138. };
  139. etx = cpu_to_be16(tx);
  140. spi_message_init(&message);
  141. spi_message_add_tail(&tran, &message);
  142. status = spi_sync(s->spi, &message);
  143. if (status) {
  144. dev_warn(&s->spi->dev, "error while calling spi_sync\n");
  145. return -EIO;
  146. }
  147. *rx = be16_to_cpu(erx);
  148. s->tx_empty = (*rx & MAX3100_T) > 0;
  149. dev_dbg(&s->spi->dev, "%04x - %04x\n", tx, *rx);
  150. return 0;
  151. }
  152. static int max3100_handlerx_unlocked(struct max3100_port *s, u16 rx)
  153. {
  154. unsigned int status = 0;
  155. int ret = 0, cts;
  156. u8 ch, flg;
  157. if (rx & MAX3100_R && s->rx_enabled) {
  158. dev_dbg(&s->spi->dev, "%s\n", __func__);
  159. ch = rx & (s->parity & MAX3100_7BIT ? 0x7f : 0xff);
  160. if (rx & MAX3100_RAFE) {
  161. s->port.icount.frame++;
  162. flg = TTY_FRAME;
  163. status |= MAX3100_STATUS_FE;
  164. } else {
  165. if (s->parity & MAX3100_PARITY_ON) {
  166. if (max3100_check_parity(s, rx)) {
  167. s->port.icount.rx++;
  168. flg = TTY_NORMAL;
  169. } else {
  170. s->port.icount.parity++;
  171. flg = TTY_PARITY;
  172. status |= MAX3100_STATUS_PE;
  173. }
  174. } else {
  175. s->port.icount.rx++;
  176. flg = TTY_NORMAL;
  177. }
  178. }
  179. uart_insert_char(&s->port, status, MAX3100_STATUS_OE, ch, flg);
  180. ret = 1;
  181. }
  182. cts = (rx & MAX3100_CTS) > 0;
  183. if (s->cts != cts) {
  184. s->cts = cts;
  185. uart_handle_cts_change(&s->port, cts);
  186. }
  187. return ret;
  188. }
  189. static int max3100_handlerx(struct max3100_port *s, u16 rx)
  190. {
  191. unsigned long flags;
  192. int ret;
  193. uart_port_lock_irqsave(&s->port, &flags);
  194. ret = max3100_handlerx_unlocked(s, rx);
  195. uart_port_unlock_irqrestore(&s->port, flags);
  196. return ret;
  197. }
  198. static void max3100_work(struct work_struct *w)
  199. {
  200. struct max3100_port *s = container_of(w, struct max3100_port, work);
  201. struct tty_port *tport = &s->port.state->port;
  202. unsigned char ch;
  203. int conf, cconf, cloopback, crts;
  204. int rxchars;
  205. u16 tx, rx;
  206. dev_dbg(&s->spi->dev, "%s\n", __func__);
  207. rxchars = 0;
  208. do {
  209. spin_lock(&s->conf_lock);
  210. conf = s->conf;
  211. cconf = s->conf_commit;
  212. s->conf_commit = 0;
  213. cloopback = s->loopback_commit;
  214. s->loopback_commit = 0;
  215. crts = s->rts_commit;
  216. s->rts_commit = 0;
  217. spin_unlock(&s->conf_lock);
  218. if (cconf)
  219. max3100_sr(s, MAX3100_WC | conf, &rx);
  220. if (cloopback)
  221. max3100_sr(s, 0x4001, &rx);
  222. if (crts) {
  223. max3100_sr(s, MAX3100_WD | MAX3100_TE |
  224. (s->rts ? MAX3100_RTS : 0), &rx);
  225. rxchars += max3100_handlerx(s, rx);
  226. }
  227. max3100_sr(s, MAX3100_RD, &rx);
  228. rxchars += max3100_handlerx(s, rx);
  229. if (rx & MAX3100_T) {
  230. tx = 0xffff;
  231. if (s->port.x_char) {
  232. tx = s->port.x_char;
  233. s->port.icount.tx++;
  234. s->port.x_char = 0;
  235. } else if (!uart_tx_stopped(&s->port) &&
  236. uart_fifo_get(&s->port, &ch)) {
  237. tx = ch;
  238. }
  239. if (tx != 0xffff) {
  240. max3100_calc_parity(s, &tx);
  241. tx |= MAX3100_WD | (s->rts ? MAX3100_RTS : 0);
  242. max3100_sr(s, tx, &rx);
  243. rxchars += max3100_handlerx(s, rx);
  244. }
  245. }
  246. if (rxchars > 16) {
  247. tty_flip_buffer_push(&s->port.state->port);
  248. rxchars = 0;
  249. }
  250. if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS)
  251. uart_write_wakeup(&s->port);
  252. } while (!s->force_end_work &&
  253. !freezing(current) &&
  254. ((rx & MAX3100_R) ||
  255. (!kfifo_is_empty(&tport->xmit_fifo) &&
  256. !uart_tx_stopped(&s->port))));
  257. if (rxchars > 0)
  258. tty_flip_buffer_push(&s->port.state->port);
  259. }
  260. static void max3100_dowork(struct max3100_port *s)
  261. {
  262. if (!s->force_end_work && !freezing(current) && !s->suspending)
  263. queue_work(s->workqueue, &s->work);
  264. }
  265. static void max3100_timeout(struct timer_list *t)
  266. {
  267. struct max3100_port *s = from_timer(s, t, timer);
  268. max3100_dowork(s);
  269. mod_timer(&s->timer, jiffies + uart_poll_timeout(&s->port));
  270. }
  271. static irqreturn_t max3100_irq(int irqno, void *dev_id)
  272. {
  273. struct max3100_port *s = dev_id;
  274. dev_dbg(&s->spi->dev, "%s\n", __func__);
  275. max3100_dowork(s);
  276. return IRQ_HANDLED;
  277. }
  278. static void max3100_enable_ms(struct uart_port *port)
  279. {
  280. struct max3100_port *s = to_max3100_port(port);
  281. mod_timer(&s->timer, jiffies);
  282. dev_dbg(&s->spi->dev, "%s\n", __func__);
  283. }
  284. static void max3100_start_tx(struct uart_port *port)
  285. {
  286. struct max3100_port *s = to_max3100_port(port);
  287. dev_dbg(&s->spi->dev, "%s\n", __func__);
  288. max3100_dowork(s);
  289. }
  290. static void max3100_stop_rx(struct uart_port *port)
  291. {
  292. struct max3100_port *s = to_max3100_port(port);
  293. dev_dbg(&s->spi->dev, "%s\n", __func__);
  294. s->rx_enabled = 0;
  295. spin_lock(&s->conf_lock);
  296. s->conf &= ~MAX3100_RM;
  297. s->conf_commit = 1;
  298. spin_unlock(&s->conf_lock);
  299. max3100_dowork(s);
  300. }
  301. static unsigned int max3100_tx_empty(struct uart_port *port)
  302. {
  303. struct max3100_port *s = to_max3100_port(port);
  304. dev_dbg(&s->spi->dev, "%s\n", __func__);
  305. /* may not be truly up-to-date */
  306. max3100_dowork(s);
  307. return s->tx_empty;
  308. }
  309. static unsigned int max3100_get_mctrl(struct uart_port *port)
  310. {
  311. struct max3100_port *s = to_max3100_port(port);
  312. dev_dbg(&s->spi->dev, "%s\n", __func__);
  313. /* may not be truly up-to-date */
  314. max3100_dowork(s);
  315. /* always assert DCD and DSR since these lines are not wired */
  316. return (s->cts ? TIOCM_CTS : 0) | TIOCM_DSR | TIOCM_CAR;
  317. }
  318. static void max3100_set_mctrl(struct uart_port *port, unsigned int mctrl)
  319. {
  320. struct max3100_port *s = to_max3100_port(port);
  321. int loopback, rts;
  322. dev_dbg(&s->spi->dev, "%s\n", __func__);
  323. loopback = (mctrl & TIOCM_LOOP) > 0;
  324. rts = (mctrl & TIOCM_RTS) > 0;
  325. spin_lock(&s->conf_lock);
  326. if (s->loopback != loopback) {
  327. s->loopback = loopback;
  328. s->loopback_commit = 1;
  329. }
  330. if (s->rts != rts) {
  331. s->rts = rts;
  332. s->rts_commit = 1;
  333. }
  334. if (s->loopback_commit || s->rts_commit)
  335. max3100_dowork(s);
  336. spin_unlock(&s->conf_lock);
  337. }
  338. static void
  339. max3100_set_termios(struct uart_port *port, struct ktermios *termios,
  340. const struct ktermios *old)
  341. {
  342. struct max3100_port *s = to_max3100_port(port);
  343. unsigned int baud = port->uartclk / 16;
  344. unsigned int baud230400 = (baud == 230400) ? 1 : 0;
  345. unsigned cflag;
  346. u32 param_new, param_mask, parity = 0;
  347. dev_dbg(&s->spi->dev, "%s\n", __func__);
  348. cflag = termios->c_cflag;
  349. param_mask = 0;
  350. baud = tty_termios_baud_rate(termios);
  351. param_new = s->conf & MAX3100_BAUD;
  352. switch (baud) {
  353. case 300:
  354. if (baud230400)
  355. baud = s->baud;
  356. else
  357. param_new = 15;
  358. break;
  359. case 600:
  360. param_new = 14 + baud230400;
  361. break;
  362. case 1200:
  363. param_new = 13 + baud230400;
  364. break;
  365. case 2400:
  366. param_new = 12 + baud230400;
  367. break;
  368. case 4800:
  369. param_new = 11 + baud230400;
  370. break;
  371. case 9600:
  372. param_new = 10 + baud230400;
  373. break;
  374. case 19200:
  375. param_new = 9 + baud230400;
  376. break;
  377. case 38400:
  378. param_new = 8 + baud230400;
  379. break;
  380. case 57600:
  381. param_new = 1 + baud230400;
  382. break;
  383. case 115200:
  384. param_new = 0 + baud230400;
  385. break;
  386. case 230400:
  387. if (baud230400)
  388. param_new = 0;
  389. else
  390. baud = s->baud;
  391. break;
  392. default:
  393. baud = s->baud;
  394. }
  395. tty_termios_encode_baud_rate(termios, baud, baud);
  396. s->baud = baud;
  397. param_mask |= MAX3100_BAUD;
  398. if ((cflag & CSIZE) == CS8) {
  399. param_new &= ~MAX3100_L;
  400. parity &= ~MAX3100_7BIT;
  401. } else {
  402. param_new |= MAX3100_L;
  403. parity |= MAX3100_7BIT;
  404. cflag = (cflag & ~CSIZE) | CS7;
  405. }
  406. param_mask |= MAX3100_L;
  407. if (cflag & CSTOPB)
  408. param_new |= MAX3100_ST;
  409. else
  410. param_new &= ~MAX3100_ST;
  411. param_mask |= MAX3100_ST;
  412. if (cflag & PARENB) {
  413. param_new |= MAX3100_PE;
  414. parity |= MAX3100_PARITY_ON;
  415. } else {
  416. param_new &= ~MAX3100_PE;
  417. parity &= ~MAX3100_PARITY_ON;
  418. }
  419. param_mask |= MAX3100_PE;
  420. if (cflag & PARODD)
  421. parity |= MAX3100_PARITY_ODD;
  422. else
  423. parity &= ~MAX3100_PARITY_ODD;
  424. /* mask termios capabilities we don't support */
  425. cflag &= ~CMSPAR;
  426. termios->c_cflag = cflag;
  427. s->port.ignore_status_mask = 0;
  428. if (termios->c_iflag & IGNPAR)
  429. s->port.ignore_status_mask |=
  430. MAX3100_STATUS_PE | MAX3100_STATUS_FE |
  431. MAX3100_STATUS_OE;
  432. del_timer_sync(&s->timer);
  433. uart_update_timeout(port, termios->c_cflag, baud);
  434. spin_lock(&s->conf_lock);
  435. s->conf = (s->conf & ~param_mask) | (param_new & param_mask);
  436. s->conf_commit = 1;
  437. s->parity = parity;
  438. spin_unlock(&s->conf_lock);
  439. max3100_dowork(s);
  440. if (UART_ENABLE_MS(&s->port, termios->c_cflag))
  441. max3100_enable_ms(&s->port);
  442. }
  443. static void max3100_shutdown(struct uart_port *port)
  444. {
  445. struct max3100_port *s = to_max3100_port(port);
  446. u16 rx;
  447. dev_dbg(&s->spi->dev, "%s\n", __func__);
  448. if (s->suspending)
  449. return;
  450. s->force_end_work = 1;
  451. del_timer_sync(&s->timer);
  452. if (s->workqueue) {
  453. destroy_workqueue(s->workqueue);
  454. s->workqueue = NULL;
  455. }
  456. if (port->irq)
  457. free_irq(port->irq, s);
  458. /* set shutdown mode to save power */
  459. max3100_sr(s, MAX3100_WC | MAX3100_SHDN, &rx);
  460. }
  461. static int max3100_startup(struct uart_port *port)
  462. {
  463. struct max3100_port *s = to_max3100_port(port);
  464. char b[12];
  465. int ret;
  466. dev_dbg(&s->spi->dev, "%s\n", __func__);
  467. s->conf = MAX3100_RM;
  468. s->baud = port->uartclk / 16;
  469. s->rx_enabled = 1;
  470. if (s->suspending)
  471. return 0;
  472. s->force_end_work = 0;
  473. s->parity = 0;
  474. s->rts = 0;
  475. sprintf(b, "max3100-%d", s->minor);
  476. s->workqueue = create_freezable_workqueue(b);
  477. if (!s->workqueue) {
  478. dev_warn(&s->spi->dev, "cannot create workqueue\n");
  479. return -EBUSY;
  480. }
  481. INIT_WORK(&s->work, max3100_work);
  482. ret = request_irq(port->irq, max3100_irq, IRQF_TRIGGER_FALLING, "max3100", s);
  483. if (ret < 0) {
  484. dev_warn(&s->spi->dev, "cannot allocate irq %d\n", port->irq);
  485. port->irq = 0;
  486. destroy_workqueue(s->workqueue);
  487. s->workqueue = NULL;
  488. return -EBUSY;
  489. }
  490. s->conf_commit = 1;
  491. max3100_dowork(s);
  492. /* wait for clock to settle */
  493. msleep(50);
  494. max3100_enable_ms(&s->port);
  495. return 0;
  496. }
  497. static const char *max3100_type(struct uart_port *port)
  498. {
  499. struct max3100_port *s = to_max3100_port(port);
  500. dev_dbg(&s->spi->dev, "%s\n", __func__);
  501. return s->port.type == PORT_MAX3100 ? "MAX3100" : NULL;
  502. }
  503. static void max3100_release_port(struct uart_port *port)
  504. {
  505. struct max3100_port *s = to_max3100_port(port);
  506. dev_dbg(&s->spi->dev, "%s\n", __func__);
  507. }
  508. static void max3100_config_port(struct uart_port *port, int flags)
  509. {
  510. struct max3100_port *s = to_max3100_port(port);
  511. dev_dbg(&s->spi->dev, "%s\n", __func__);
  512. if (flags & UART_CONFIG_TYPE)
  513. s->port.type = PORT_MAX3100;
  514. }
  515. static int max3100_verify_port(struct uart_port *port,
  516. struct serial_struct *ser)
  517. {
  518. struct max3100_port *s = to_max3100_port(port);
  519. int ret = -EINVAL;
  520. dev_dbg(&s->spi->dev, "%s\n", __func__);
  521. if (ser->type == PORT_UNKNOWN || ser->type == PORT_MAX3100)
  522. ret = 0;
  523. return ret;
  524. }
  525. static void max3100_stop_tx(struct uart_port *port)
  526. {
  527. struct max3100_port *s = to_max3100_port(port);
  528. dev_dbg(&s->spi->dev, "%s\n", __func__);
  529. }
  530. static int max3100_request_port(struct uart_port *port)
  531. {
  532. struct max3100_port *s = to_max3100_port(port);
  533. dev_dbg(&s->spi->dev, "%s\n", __func__);
  534. return 0;
  535. }
  536. static void max3100_break_ctl(struct uart_port *port, int break_state)
  537. {
  538. struct max3100_port *s = to_max3100_port(port);
  539. dev_dbg(&s->spi->dev, "%s\n", __func__);
  540. }
  541. static const struct uart_ops max3100_ops = {
  542. .tx_empty = max3100_tx_empty,
  543. .set_mctrl = max3100_set_mctrl,
  544. .get_mctrl = max3100_get_mctrl,
  545. .stop_tx = max3100_stop_tx,
  546. .start_tx = max3100_start_tx,
  547. .stop_rx = max3100_stop_rx,
  548. .enable_ms = max3100_enable_ms,
  549. .break_ctl = max3100_break_ctl,
  550. .startup = max3100_startup,
  551. .shutdown = max3100_shutdown,
  552. .set_termios = max3100_set_termios,
  553. .type = max3100_type,
  554. .release_port = max3100_release_port,
  555. .request_port = max3100_request_port,
  556. .config_port = max3100_config_port,
  557. .verify_port = max3100_verify_port,
  558. };
  559. static struct uart_driver max3100_uart_driver = {
  560. .owner = THIS_MODULE,
  561. .driver_name = "ttyMAX",
  562. .dev_name = "ttyMAX",
  563. .major = MAX3100_MAJOR,
  564. .minor = MAX3100_MINOR,
  565. .nr = MAX_MAX3100,
  566. };
  567. static int uart_driver_registered;
  568. static int max3100_probe(struct spi_device *spi)
  569. {
  570. struct device *dev = &spi->dev;
  571. int i, retval;
  572. u16 rx;
  573. mutex_lock(&max3100s_lock);
  574. if (!uart_driver_registered) {
  575. retval = uart_register_driver(&max3100_uart_driver);
  576. if (retval) {
  577. mutex_unlock(&max3100s_lock);
  578. return dev_err_probe(dev, retval, "Couldn't register max3100 uart driver\n");
  579. }
  580. uart_driver_registered = 1;
  581. }
  582. for (i = 0; i < MAX_MAX3100; i++)
  583. if (!max3100s[i])
  584. break;
  585. if (i == MAX_MAX3100) {
  586. mutex_unlock(&max3100s_lock);
  587. return dev_err_probe(dev, -ENOMEM, "too many MAX3100 chips\n");
  588. }
  589. max3100s[i] = kzalloc(sizeof(struct max3100_port), GFP_KERNEL);
  590. if (!max3100s[i]) {
  591. mutex_unlock(&max3100s_lock);
  592. return -ENOMEM;
  593. }
  594. max3100s[i]->spi = spi;
  595. spin_lock_init(&max3100s[i]->conf_lock);
  596. spi_set_drvdata(spi, max3100s[i]);
  597. max3100s[i]->minor = i;
  598. timer_setup(&max3100s[i]->timer, max3100_timeout, 0);
  599. dev_dbg(&spi->dev, "%s: adding port %d\n", __func__, i);
  600. max3100s[i]->port.irq = spi->irq;
  601. max3100s[i]->port.fifosize = 16;
  602. max3100s[i]->port.ops = &max3100_ops;
  603. max3100s[i]->port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
  604. max3100s[i]->port.line = i;
  605. max3100s[i]->port.type = PORT_MAX3100;
  606. max3100s[i]->port.dev = &spi->dev;
  607. /* Read clock frequency from a property, uart_add_one_port() will fail if it's not set */
  608. device_property_read_u32(dev, "clock-frequency", &max3100s[i]->port.uartclk);
  609. retval = uart_add_one_port(&max3100_uart_driver, &max3100s[i]->port);
  610. if (retval < 0)
  611. dev_err_probe(dev, retval, "uart_add_one_port failed for line %d\n", i);
  612. /* set shutdown mode to save power. Will be woken-up on open */
  613. max3100_sr(max3100s[i], MAX3100_WC | MAX3100_SHDN, &rx);
  614. mutex_unlock(&max3100s_lock);
  615. return 0;
  616. }
  617. static void max3100_remove(struct spi_device *spi)
  618. {
  619. struct max3100_port *s = spi_get_drvdata(spi);
  620. int i;
  621. mutex_lock(&max3100s_lock);
  622. /* find out the index for the chip we are removing */
  623. for (i = 0; i < MAX_MAX3100; i++)
  624. if (max3100s[i] == s) {
  625. dev_dbg(&spi->dev, "%s: removing port %d\n", __func__, i);
  626. uart_remove_one_port(&max3100_uart_driver, &max3100s[i]->port);
  627. kfree(max3100s[i]);
  628. max3100s[i] = NULL;
  629. break;
  630. }
  631. WARN_ON(i == MAX_MAX3100);
  632. /* check if this is the last chip we have */
  633. for (i = 0; i < MAX_MAX3100; i++)
  634. if (max3100s[i]) {
  635. mutex_unlock(&max3100s_lock);
  636. return;
  637. }
  638. pr_debug("removing max3100 driver\n");
  639. uart_unregister_driver(&max3100_uart_driver);
  640. uart_driver_registered = 0;
  641. mutex_unlock(&max3100s_lock);
  642. }
  643. static int max3100_suspend(struct device *dev)
  644. {
  645. struct max3100_port *s = dev_get_drvdata(dev);
  646. u16 rx;
  647. dev_dbg(&s->spi->dev, "%s\n", __func__);
  648. disable_irq(s->port.irq);
  649. s->suspending = 1;
  650. uart_suspend_port(&max3100_uart_driver, &s->port);
  651. /* no HW suspend, so do SW one */
  652. max3100_sr(s, MAX3100_WC | MAX3100_SHDN, &rx);
  653. return 0;
  654. }
  655. static int max3100_resume(struct device *dev)
  656. {
  657. struct max3100_port *s = dev_get_drvdata(dev);
  658. dev_dbg(&s->spi->dev, "%s\n", __func__);
  659. uart_resume_port(&max3100_uart_driver, &s->port);
  660. s->suspending = 0;
  661. enable_irq(s->port.irq);
  662. s->conf_commit = 1;
  663. if (s->workqueue)
  664. max3100_dowork(s);
  665. return 0;
  666. }
  667. static DEFINE_SIMPLE_DEV_PM_OPS(max3100_pm_ops, max3100_suspend, max3100_resume);
  668. static const struct spi_device_id max3100_spi_id[] = {
  669. { "max3100" },
  670. { }
  671. };
  672. MODULE_DEVICE_TABLE(spi, max3100_spi_id);
  673. static const struct of_device_id max3100_of_match[] = {
  674. { .compatible = "maxim,max3100" },
  675. { }
  676. };
  677. MODULE_DEVICE_TABLE(of, max3100_of_match);
  678. static struct spi_driver max3100_driver = {
  679. .driver = {
  680. .name = "max3100",
  681. .of_match_table = max3100_of_match,
  682. .pm = pm_sleep_ptr(&max3100_pm_ops),
  683. },
  684. .probe = max3100_probe,
  685. .remove = max3100_remove,
  686. .id_table = max3100_spi_id,
  687. };
  688. module_spi_driver(max3100_driver);
  689. MODULE_DESCRIPTION("MAX3100 driver");
  690. MODULE_AUTHOR("Christian Pellegrin <chripell@evolware.org>");
  691. MODULE_LICENSE("GPL");