f81534.c 40 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * F81532/F81534 USB to Serial Ports Bridge
  4. *
  5. * F81532 => 2 Serial Ports
  6. * F81534 => 4 Serial Ports
  7. *
  8. * Copyright (C) 2016 Feature Integration Technology Inc., (Fintek)
  9. * Copyright (C) 2016 Tom Tsai (Tom_Tsai@fintek.com.tw)
  10. * Copyright (C) 2016 Peter Hong (Peter_Hong@fintek.com.tw)
  11. *
  12. * The F81532/F81534 had 1 control endpoint for setting, 1 endpoint bulk-out
  13. * for all serial port TX and 1 endpoint bulk-in for all serial port read in
  14. * (Read Data/MSR/LSR).
  15. *
  16. * Write URB is fixed with 512bytes, per serial port used 128Bytes.
  17. * It can be described by f81534_prepare_write_buffer()
  18. *
  19. * Read URB is 512Bytes max, per serial port used 128Bytes.
  20. * It can be described by f81534_process_read_urb() and maybe received with
  21. * 128x1,2,3,4 bytes.
  22. *
  23. */
  24. #include <linux/slab.h>
  25. #include <linux/tty.h>
  26. #include <linux/tty_flip.h>
  27. #include <linux/usb.h>
  28. #include <linux/usb/serial.h>
  29. #include <linux/serial_reg.h>
  30. #include <linux/module.h>
  31. #include <linux/uaccess.h>
  32. /* Serial Port register Address */
  33. #define F81534_UART_BASE_ADDRESS 0x1200
  34. #define F81534_UART_OFFSET 0x10
  35. #define F81534_DIVISOR_LSB_REG (0x00 + F81534_UART_BASE_ADDRESS)
  36. #define F81534_DIVISOR_MSB_REG (0x01 + F81534_UART_BASE_ADDRESS)
  37. #define F81534_INTERRUPT_ENABLE_REG (0x01 + F81534_UART_BASE_ADDRESS)
  38. #define F81534_FIFO_CONTROL_REG (0x02 + F81534_UART_BASE_ADDRESS)
  39. #define F81534_LINE_CONTROL_REG (0x03 + F81534_UART_BASE_ADDRESS)
  40. #define F81534_MODEM_CONTROL_REG (0x04 + F81534_UART_BASE_ADDRESS)
  41. #define F81534_LINE_STATUS_REG (0x05 + F81534_UART_BASE_ADDRESS)
  42. #define F81534_MODEM_STATUS_REG (0x06 + F81534_UART_BASE_ADDRESS)
  43. #define F81534_CLOCK_REG (0x08 + F81534_UART_BASE_ADDRESS)
  44. #define F81534_CONFIG1_REG (0x09 + F81534_UART_BASE_ADDRESS)
  45. #define F81534_DEF_CONF_ADDRESS_START 0x3000
  46. #define F81534_DEF_CONF_SIZE 12
  47. #define F81534_CUSTOM_ADDRESS_START 0x2f00
  48. #define F81534_CUSTOM_DATA_SIZE 0x10
  49. #define F81534_CUSTOM_NO_CUSTOM_DATA 0xff
  50. #define F81534_CUSTOM_VALID_TOKEN 0xf0
  51. #define F81534_CONF_OFFSET 1
  52. #define F81534_CONF_INIT_GPIO_OFFSET 4
  53. #define F81534_CONF_WORK_GPIO_OFFSET 8
  54. #define F81534_CONF_GPIO_SHUTDOWN 7
  55. #define F81534_CONF_GPIO_RS232 1
  56. #define F81534_MAX_DATA_BLOCK 64
  57. #define F81534_MAX_BUS_RETRY 20
  58. /* Default URB timeout for USB operations */
  59. #define F81534_USB_MAX_RETRY 10
  60. #define F81534_USB_TIMEOUT 2000
  61. #define F81534_SET_GET_REGISTER 0xA0
  62. #define F81534_NUM_PORT 4
  63. #define F81534_UNUSED_PORT 0xff
  64. #define F81534_WRITE_BUFFER_SIZE 512
  65. #define DRIVER_DESC "Fintek F81532/F81534"
  66. #define FINTEK_VENDOR_ID_1 0x1934
  67. #define FINTEK_VENDOR_ID_2 0x2C42
  68. #define FINTEK_DEVICE_ID 0x1202
  69. #define F81534_MAX_TX_SIZE 124
  70. #define F81534_MAX_RX_SIZE 124
  71. #define F81534_RECEIVE_BLOCK_SIZE 128
  72. #define F81534_MAX_RECEIVE_BLOCK_SIZE 512
  73. #define F81534_TOKEN_RECEIVE 0x01
  74. #define F81534_TOKEN_WRITE 0x02
  75. #define F81534_TOKEN_TX_EMPTY 0x03
  76. #define F81534_TOKEN_MSR_CHANGE 0x04
  77. /*
  78. * We used interal SPI bus to access FLASH section. We must wait the SPI bus to
  79. * idle if we performed any command.
  80. *
  81. * SPI Bus status register: F81534_BUS_REG_STATUS
  82. * Bit 0/1 : BUSY
  83. * Bit 2 : IDLE
  84. */
  85. #define F81534_BUS_BUSY (BIT(0) | BIT(1))
  86. #define F81534_BUS_IDLE BIT(2)
  87. #define F81534_BUS_READ_DATA 0x1004
  88. #define F81534_BUS_REG_STATUS 0x1003
  89. #define F81534_BUS_REG_START 0x1002
  90. #define F81534_BUS_REG_END 0x1001
  91. #define F81534_CMD_READ 0x03
  92. #define F81534_DEFAULT_BAUD_RATE 9600
  93. #define F81534_PORT_CONF_RS232 0
  94. #define F81534_PORT_CONF_RS485 BIT(0)
  95. #define F81534_PORT_CONF_RS485_INVERT (BIT(0) | BIT(1))
  96. #define F81534_PORT_CONF_MODE_MASK GENMASK(1, 0)
  97. #define F81534_PORT_CONF_DISABLE_PORT BIT(3)
  98. #define F81534_PORT_CONF_NOT_EXIST_PORT BIT(7)
  99. #define F81534_PORT_UNAVAILABLE \
  100. (F81534_PORT_CONF_DISABLE_PORT | F81534_PORT_CONF_NOT_EXIST_PORT)
  101. #define F81534_1X_RXTRIGGER 0xc3
  102. #define F81534_8X_RXTRIGGER 0xcf
  103. /*
  104. * F81532/534 Clock registers (offset +08h)
  105. *
  106. * Bit0: UART Enable (always on)
  107. * Bit2-1: Clock source selector
  108. * 00: 1.846MHz.
  109. * 01: 18.46MHz.
  110. * 10: 24MHz.
  111. * 11: 14.77MHz.
  112. * Bit4: Auto direction(RTS) control (RTS pin Low when TX)
  113. * Bit5: Invert direction(RTS) when Bit4 enabled (RTS pin high when TX)
  114. */
  115. #define F81534_UART_EN BIT(0)
  116. #define F81534_CLK_1_846_MHZ 0
  117. #define F81534_CLK_18_46_MHZ BIT(1)
  118. #define F81534_CLK_24_MHZ BIT(2)
  119. #define F81534_CLK_14_77_MHZ (BIT(1) | BIT(2))
  120. #define F81534_CLK_MASK GENMASK(2, 1)
  121. #define F81534_CLK_TX_DELAY_1BIT BIT(3)
  122. #define F81534_CLK_RS485_MODE BIT(4)
  123. #define F81534_CLK_RS485_INVERT BIT(5)
  124. static const struct usb_device_id f81534_id_table[] = {
  125. { USB_DEVICE(FINTEK_VENDOR_ID_1, FINTEK_DEVICE_ID) },
  126. { USB_DEVICE(FINTEK_VENDOR_ID_2, FINTEK_DEVICE_ID) },
  127. {} /* Terminating entry */
  128. };
  129. #define F81534_TX_EMPTY_BIT 0
  130. struct f81534_serial_private {
  131. u8 conf_data[F81534_DEF_CONF_SIZE];
  132. int tty_idx[F81534_NUM_PORT];
  133. u8 setting_idx;
  134. int opened_port;
  135. struct mutex urb_mutex;
  136. };
  137. struct f81534_port_private {
  138. struct mutex mcr_mutex;
  139. struct mutex lcr_mutex;
  140. struct work_struct lsr_work;
  141. struct usb_serial_port *port;
  142. unsigned long tx_empty;
  143. spinlock_t msr_lock;
  144. u32 baud_base;
  145. u8 shadow_mcr;
  146. u8 shadow_lcr;
  147. u8 shadow_msr;
  148. u8 shadow_clk;
  149. u8 phy_num;
  150. };
  151. struct f81534_pin_data {
  152. const u16 reg_addr;
  153. const u8 reg_mask;
  154. };
  155. struct f81534_port_out_pin {
  156. struct f81534_pin_data pin[3];
  157. };
  158. /* Pin output value for M2/M1/M0(SD) */
  159. static const struct f81534_port_out_pin f81534_port_out_pins[] = {
  160. { { { 0x2ae8, BIT(7) }, { 0x2a90, BIT(5) }, { 0x2a90, BIT(4) } } },
  161. { { { 0x2ae8, BIT(6) }, { 0x2ae8, BIT(0) }, { 0x2ae8, BIT(3) } } },
  162. { { { 0x2a90, BIT(0) }, { 0x2ae8, BIT(2) }, { 0x2a80, BIT(6) } } },
  163. { { { 0x2a90, BIT(3) }, { 0x2a90, BIT(2) }, { 0x2a90, BIT(1) } } },
  164. };
  165. static u32 const baudrate_table[] = { 115200, 921600, 1152000, 1500000 };
  166. static u8 const clock_table[] = { F81534_CLK_1_846_MHZ, F81534_CLK_14_77_MHZ,
  167. F81534_CLK_18_46_MHZ, F81534_CLK_24_MHZ };
  168. static int f81534_logic_to_phy_port(struct usb_serial *serial,
  169. struct usb_serial_port *port)
  170. {
  171. struct f81534_serial_private *serial_priv =
  172. usb_get_serial_data(port->serial);
  173. int count = 0;
  174. int i;
  175. for (i = 0; i < F81534_NUM_PORT; ++i) {
  176. if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
  177. continue;
  178. if (port->port_number == count)
  179. return i;
  180. ++count;
  181. }
  182. return -ENODEV;
  183. }
  184. static int f81534_set_register(struct usb_serial *serial, u16 reg, u8 data)
  185. {
  186. struct usb_interface *interface = serial->interface;
  187. struct usb_device *dev = serial->dev;
  188. size_t count = F81534_USB_MAX_RETRY;
  189. int status;
  190. u8 *tmp;
  191. tmp = kmalloc(sizeof(u8), GFP_KERNEL);
  192. if (!tmp)
  193. return -ENOMEM;
  194. *tmp = data;
  195. /*
  196. * Our device maybe not reply when heavily loading, We'll retry for
  197. * F81534_USB_MAX_RETRY times.
  198. */
  199. while (count--) {
  200. status = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
  201. F81534_SET_GET_REGISTER,
  202. USB_TYPE_VENDOR | USB_DIR_OUT,
  203. reg, 0, tmp, sizeof(u8),
  204. F81534_USB_TIMEOUT);
  205. if (status == sizeof(u8)) {
  206. status = 0;
  207. break;
  208. }
  209. }
  210. if (status < 0) {
  211. dev_err(&interface->dev, "%s: reg: %x data: %x failed: %d\n",
  212. __func__, reg, data, status);
  213. }
  214. kfree(tmp);
  215. return status;
  216. }
  217. static int f81534_get_register(struct usb_serial *serial, u16 reg, u8 *data)
  218. {
  219. struct usb_interface *interface = serial->interface;
  220. struct usb_device *dev = serial->dev;
  221. size_t count = F81534_USB_MAX_RETRY;
  222. int status;
  223. u8 *tmp;
  224. tmp = kmalloc(sizeof(u8), GFP_KERNEL);
  225. if (!tmp)
  226. return -ENOMEM;
  227. /*
  228. * Our device maybe not reply when heavily loading, We'll retry for
  229. * F81534_USB_MAX_RETRY times.
  230. */
  231. while (count--) {
  232. status = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
  233. F81534_SET_GET_REGISTER,
  234. USB_TYPE_VENDOR | USB_DIR_IN,
  235. reg, 0, tmp, sizeof(u8),
  236. F81534_USB_TIMEOUT);
  237. if (status > 0) {
  238. status = 0;
  239. break;
  240. } else if (status == 0) {
  241. status = -EIO;
  242. }
  243. }
  244. if (status < 0) {
  245. dev_err(&interface->dev, "%s: reg: %x failed: %d\n", __func__,
  246. reg, status);
  247. goto end;
  248. }
  249. *data = *tmp;
  250. end:
  251. kfree(tmp);
  252. return status;
  253. }
  254. static int f81534_set_mask_register(struct usb_serial *serial, u16 reg,
  255. u8 mask, u8 data)
  256. {
  257. int status;
  258. u8 tmp;
  259. status = f81534_get_register(serial, reg, &tmp);
  260. if (status)
  261. return status;
  262. tmp &= ~mask;
  263. tmp |= (mask & data);
  264. return f81534_set_register(serial, reg, tmp);
  265. }
  266. static int f81534_set_phy_port_register(struct usb_serial *serial, int phy,
  267. u16 reg, u8 data)
  268. {
  269. return f81534_set_register(serial, reg + F81534_UART_OFFSET * phy,
  270. data);
  271. }
  272. static int f81534_get_phy_port_register(struct usb_serial *serial, int phy,
  273. u16 reg, u8 *data)
  274. {
  275. return f81534_get_register(serial, reg + F81534_UART_OFFSET * phy,
  276. data);
  277. }
  278. static int f81534_set_port_register(struct usb_serial_port *port, u16 reg,
  279. u8 data)
  280. {
  281. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  282. return f81534_set_register(port->serial,
  283. reg + port_priv->phy_num * F81534_UART_OFFSET, data);
  284. }
  285. static int f81534_get_port_register(struct usb_serial_port *port, u16 reg,
  286. u8 *data)
  287. {
  288. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  289. return f81534_get_register(port->serial,
  290. reg + port_priv->phy_num * F81534_UART_OFFSET, data);
  291. }
  292. /*
  293. * If we try to access the internal flash via SPI bus, we should check the bus
  294. * status for every command. e.g., F81534_BUS_REG_START/F81534_BUS_REG_END
  295. */
  296. static int f81534_wait_for_spi_idle(struct usb_serial *serial)
  297. {
  298. size_t count = F81534_MAX_BUS_RETRY;
  299. u8 tmp;
  300. int status;
  301. do {
  302. status = f81534_get_register(serial, F81534_BUS_REG_STATUS,
  303. &tmp);
  304. if (status)
  305. return status;
  306. if (tmp & F81534_BUS_BUSY)
  307. continue;
  308. if (tmp & F81534_BUS_IDLE)
  309. break;
  310. } while (--count);
  311. if (!count) {
  312. dev_err(&serial->interface->dev,
  313. "%s: timed out waiting for idle SPI bus\n",
  314. __func__);
  315. return -EIO;
  316. }
  317. return f81534_set_register(serial, F81534_BUS_REG_STATUS,
  318. tmp & ~F81534_BUS_IDLE);
  319. }
  320. static int f81534_get_spi_register(struct usb_serial *serial, u16 reg,
  321. u8 *data)
  322. {
  323. int status;
  324. status = f81534_get_register(serial, reg, data);
  325. if (status)
  326. return status;
  327. return f81534_wait_for_spi_idle(serial);
  328. }
  329. static int f81534_set_spi_register(struct usb_serial *serial, u16 reg, u8 data)
  330. {
  331. int status;
  332. status = f81534_set_register(serial, reg, data);
  333. if (status)
  334. return status;
  335. return f81534_wait_for_spi_idle(serial);
  336. }
  337. static int f81534_read_flash(struct usb_serial *serial, u32 address,
  338. size_t size, u8 *buf)
  339. {
  340. u8 tmp_buf[F81534_MAX_DATA_BLOCK];
  341. size_t block = 0;
  342. size_t read_size;
  343. size_t count;
  344. int status;
  345. int offset;
  346. u16 reg_tmp;
  347. status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
  348. F81534_CMD_READ);
  349. if (status)
  350. return status;
  351. status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
  352. (address >> 16) & 0xff);
  353. if (status)
  354. return status;
  355. status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
  356. (address >> 8) & 0xff);
  357. if (status)
  358. return status;
  359. status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
  360. (address >> 0) & 0xff);
  361. if (status)
  362. return status;
  363. /* Continuous read mode */
  364. do {
  365. read_size = min_t(size_t, F81534_MAX_DATA_BLOCK, size);
  366. for (count = 0; count < read_size; ++count) {
  367. /* To write F81534_BUS_REG_END when final byte */
  368. if (size <= F81534_MAX_DATA_BLOCK &&
  369. read_size == count + 1)
  370. reg_tmp = F81534_BUS_REG_END;
  371. else
  372. reg_tmp = F81534_BUS_REG_START;
  373. /*
  374. * Dummy code, force IC to generate a read pulse, the
  375. * set of value 0xf1 is dont care (any value is ok)
  376. */
  377. status = f81534_set_spi_register(serial, reg_tmp,
  378. 0xf1);
  379. if (status)
  380. return status;
  381. status = f81534_get_spi_register(serial,
  382. F81534_BUS_READ_DATA,
  383. &tmp_buf[count]);
  384. if (status)
  385. return status;
  386. offset = count + block * F81534_MAX_DATA_BLOCK;
  387. buf[offset] = tmp_buf[count];
  388. }
  389. size -= read_size;
  390. ++block;
  391. } while (size);
  392. return 0;
  393. }
  394. static void f81534_prepare_write_buffer(struct usb_serial_port *port, u8 *buf)
  395. {
  396. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  397. int phy_num = port_priv->phy_num;
  398. u8 tx_len;
  399. int i;
  400. /*
  401. * The block layout is fixed with 4x128 Bytes, per 128 Bytes a port.
  402. * index 0: port phy idx (e.g., 0,1,2,3)
  403. * index 1: only F81534_TOKEN_WRITE
  404. * index 2: serial TX out length
  405. * index 3: fix to 0
  406. * index 4~127: serial out data block
  407. */
  408. for (i = 0; i < F81534_NUM_PORT; ++i) {
  409. buf[i * F81534_RECEIVE_BLOCK_SIZE] = i;
  410. buf[i * F81534_RECEIVE_BLOCK_SIZE + 1] = F81534_TOKEN_WRITE;
  411. buf[i * F81534_RECEIVE_BLOCK_SIZE + 2] = 0;
  412. buf[i * F81534_RECEIVE_BLOCK_SIZE + 3] = 0;
  413. }
  414. tx_len = kfifo_out_locked(&port->write_fifo,
  415. &buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 4],
  416. F81534_MAX_TX_SIZE, &port->lock);
  417. buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 2] = tx_len;
  418. }
  419. static int f81534_submit_writer(struct usb_serial_port *port, gfp_t mem_flags)
  420. {
  421. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  422. struct urb *urb;
  423. unsigned long flags;
  424. int result;
  425. /* Check is any data in write_fifo */
  426. spin_lock_irqsave(&port->lock, flags);
  427. if (kfifo_is_empty(&port->write_fifo)) {
  428. spin_unlock_irqrestore(&port->lock, flags);
  429. return 0;
  430. }
  431. spin_unlock_irqrestore(&port->lock, flags);
  432. /* Check H/W is TXEMPTY */
  433. if (!test_and_clear_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty))
  434. return 0;
  435. urb = port->write_urbs[0];
  436. f81534_prepare_write_buffer(port, port->bulk_out_buffers[0]);
  437. urb->transfer_buffer_length = F81534_WRITE_BUFFER_SIZE;
  438. result = usb_submit_urb(urb, mem_flags);
  439. if (result) {
  440. set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
  441. dev_err(&port->dev, "%s: submit failed: %d\n", __func__,
  442. result);
  443. return result;
  444. }
  445. usb_serial_port_softint(port);
  446. return 0;
  447. }
  448. static u32 f81534_calc_baud_divisor(u32 baudrate, u32 clockrate)
  449. {
  450. /* Round to nearest divisor */
  451. return DIV_ROUND_CLOSEST(clockrate, baudrate);
  452. }
  453. static int f81534_find_clk(u32 baudrate)
  454. {
  455. int idx;
  456. for (idx = 0; idx < ARRAY_SIZE(baudrate_table); ++idx) {
  457. if (baudrate <= baudrate_table[idx] &&
  458. baudrate_table[idx] % baudrate == 0)
  459. return idx;
  460. }
  461. return -EINVAL;
  462. }
  463. static int f81534_set_port_config(struct usb_serial_port *port,
  464. struct tty_struct *tty, u32 baudrate, u32 old_baudrate, u8 lcr)
  465. {
  466. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  467. u32 divisor;
  468. int status;
  469. int i;
  470. int idx;
  471. u8 value;
  472. u32 baud_list[] = {baudrate, old_baudrate, F81534_DEFAULT_BAUD_RATE};
  473. for (i = 0; i < ARRAY_SIZE(baud_list); ++i) {
  474. baudrate = baud_list[i];
  475. if (baudrate == 0) {
  476. tty_encode_baud_rate(tty, 0, 0);
  477. return 0;
  478. }
  479. idx = f81534_find_clk(baudrate);
  480. if (idx >= 0) {
  481. tty_encode_baud_rate(tty, baudrate, baudrate);
  482. break;
  483. }
  484. }
  485. if (idx < 0)
  486. return -EINVAL;
  487. port_priv->baud_base = baudrate_table[idx];
  488. port_priv->shadow_clk &= ~F81534_CLK_MASK;
  489. port_priv->shadow_clk |= clock_table[idx];
  490. status = f81534_set_port_register(port, F81534_CLOCK_REG,
  491. port_priv->shadow_clk);
  492. if (status) {
  493. dev_err(&port->dev, "CLOCK_REG setting failed\n");
  494. return status;
  495. }
  496. if (baudrate <= 1200)
  497. value = F81534_1X_RXTRIGGER; /* 128 FIFO & TL: 1x */
  498. else
  499. value = F81534_8X_RXTRIGGER; /* 128 FIFO & TL: 8x */
  500. status = f81534_set_port_register(port, F81534_CONFIG1_REG, value);
  501. if (status) {
  502. dev_err(&port->dev, "%s: CONFIG1 setting failed\n", __func__);
  503. return status;
  504. }
  505. if (baudrate <= 1200)
  506. value = UART_FCR_TRIGGER_1 | UART_FCR_ENABLE_FIFO; /* TL: 1 */
  507. else
  508. value = UART_FCR_TRIGGER_8 | UART_FCR_ENABLE_FIFO; /* TL: 8 */
  509. status = f81534_set_port_register(port, F81534_FIFO_CONTROL_REG,
  510. value);
  511. if (status) {
  512. dev_err(&port->dev, "%s: FCR setting failed\n", __func__);
  513. return status;
  514. }
  515. divisor = f81534_calc_baud_divisor(baudrate, port_priv->baud_base);
  516. mutex_lock(&port_priv->lcr_mutex);
  517. value = UART_LCR_DLAB;
  518. status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
  519. value);
  520. if (status) {
  521. dev_err(&port->dev, "%s: set LCR failed\n", __func__);
  522. goto out_unlock;
  523. }
  524. value = divisor & 0xff;
  525. status = f81534_set_port_register(port, F81534_DIVISOR_LSB_REG, value);
  526. if (status) {
  527. dev_err(&port->dev, "%s: set DLAB LSB failed\n", __func__);
  528. goto out_unlock;
  529. }
  530. value = (divisor >> 8) & 0xff;
  531. status = f81534_set_port_register(port, F81534_DIVISOR_MSB_REG, value);
  532. if (status) {
  533. dev_err(&port->dev, "%s: set DLAB MSB failed\n", __func__);
  534. goto out_unlock;
  535. }
  536. value = lcr | (port_priv->shadow_lcr & UART_LCR_SBC);
  537. status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
  538. value);
  539. if (status) {
  540. dev_err(&port->dev, "%s: set LCR failed\n", __func__);
  541. goto out_unlock;
  542. }
  543. port_priv->shadow_lcr = value;
  544. out_unlock:
  545. mutex_unlock(&port_priv->lcr_mutex);
  546. return status;
  547. }
  548. static int f81534_break_ctl(struct tty_struct *tty, int break_state)
  549. {
  550. struct usb_serial_port *port = tty->driver_data;
  551. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  552. int status;
  553. mutex_lock(&port_priv->lcr_mutex);
  554. if (break_state)
  555. port_priv->shadow_lcr |= UART_LCR_SBC;
  556. else
  557. port_priv->shadow_lcr &= ~UART_LCR_SBC;
  558. status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
  559. port_priv->shadow_lcr);
  560. if (status)
  561. dev_err(&port->dev, "set break failed: %d\n", status);
  562. mutex_unlock(&port_priv->lcr_mutex);
  563. return status;
  564. }
  565. static int f81534_update_mctrl(struct usb_serial_port *port, unsigned int set,
  566. unsigned int clear)
  567. {
  568. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  569. int status;
  570. u8 tmp;
  571. if (((set | clear) & (TIOCM_DTR | TIOCM_RTS)) == 0)
  572. return 0; /* no change */
  573. mutex_lock(&port_priv->mcr_mutex);
  574. /* 'Set' takes precedence over 'Clear' */
  575. clear &= ~set;
  576. /* Always enable UART_MCR_OUT2 */
  577. tmp = UART_MCR_OUT2 | port_priv->shadow_mcr;
  578. if (clear & TIOCM_DTR)
  579. tmp &= ~UART_MCR_DTR;
  580. if (clear & TIOCM_RTS)
  581. tmp &= ~UART_MCR_RTS;
  582. if (set & TIOCM_DTR)
  583. tmp |= UART_MCR_DTR;
  584. if (set & TIOCM_RTS)
  585. tmp |= UART_MCR_RTS;
  586. status = f81534_set_port_register(port, F81534_MODEM_CONTROL_REG, tmp);
  587. if (status < 0) {
  588. dev_err(&port->dev, "%s: MCR write failed\n", __func__);
  589. mutex_unlock(&port_priv->mcr_mutex);
  590. return status;
  591. }
  592. port_priv->shadow_mcr = tmp;
  593. mutex_unlock(&port_priv->mcr_mutex);
  594. return 0;
  595. }
  596. /*
  597. * This function will search the data area with token F81534_CUSTOM_VALID_TOKEN
  598. * for latest configuration index. If nothing found
  599. * (*index = F81534_CUSTOM_NO_CUSTOM_DATA), We'll load default configure in
  600. * F81534_DEF_CONF_ADDRESS_START section.
  601. *
  602. * Due to we only use block0 to save data, so *index should be 0 or
  603. * F81534_CUSTOM_NO_CUSTOM_DATA.
  604. */
  605. static int f81534_find_config_idx(struct usb_serial *serial, u8 *index)
  606. {
  607. u8 tmp;
  608. int status;
  609. status = f81534_read_flash(serial, F81534_CUSTOM_ADDRESS_START, 1,
  610. &tmp);
  611. if (status) {
  612. dev_err(&serial->interface->dev, "%s: read failed: %d\n",
  613. __func__, status);
  614. return status;
  615. }
  616. /* We'll use the custom data when the data is valid. */
  617. if (tmp == F81534_CUSTOM_VALID_TOKEN)
  618. *index = 0;
  619. else
  620. *index = F81534_CUSTOM_NO_CUSTOM_DATA;
  621. return 0;
  622. }
  623. /*
  624. * The F81532/534 will not report serial port to USB serial subsystem when
  625. * H/W DCD/DSR/CTS/RI/RX pin connected to ground.
  626. *
  627. * To detect RX pin status, we'll enable MCR interal loopback, disable it and
  628. * delayed for 60ms. It connected to ground If LSR register report UART_LSR_BI.
  629. */
  630. static bool f81534_check_port_hw_disabled(struct usb_serial *serial, int phy)
  631. {
  632. int status;
  633. u8 old_mcr;
  634. u8 msr;
  635. u8 lsr;
  636. u8 msr_mask;
  637. msr_mask = UART_MSR_DCD | UART_MSR_RI | UART_MSR_DSR | UART_MSR_CTS;
  638. status = f81534_get_phy_port_register(serial, phy,
  639. F81534_MODEM_STATUS_REG, &msr);
  640. if (status)
  641. return false;
  642. if ((msr & msr_mask) != msr_mask)
  643. return false;
  644. status = f81534_set_phy_port_register(serial, phy,
  645. F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO |
  646. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  647. if (status)
  648. return false;
  649. status = f81534_get_phy_port_register(serial, phy,
  650. F81534_MODEM_CONTROL_REG, &old_mcr);
  651. if (status)
  652. return false;
  653. status = f81534_set_phy_port_register(serial, phy,
  654. F81534_MODEM_CONTROL_REG, UART_MCR_LOOP);
  655. if (status)
  656. return false;
  657. status = f81534_set_phy_port_register(serial, phy,
  658. F81534_MODEM_CONTROL_REG, 0x0);
  659. if (status)
  660. return false;
  661. msleep(60);
  662. status = f81534_get_phy_port_register(serial, phy,
  663. F81534_LINE_STATUS_REG, &lsr);
  664. if (status)
  665. return false;
  666. status = f81534_set_phy_port_register(serial, phy,
  667. F81534_MODEM_CONTROL_REG, old_mcr);
  668. if (status)
  669. return false;
  670. if ((lsr & UART_LSR_BI) == UART_LSR_BI)
  671. return true;
  672. return false;
  673. }
  674. /*
  675. * We had 2 generation of F81532/534 IC. All has an internal storage.
  676. *
  677. * 1st is pure USB-to-TTL RS232 IC and designed for 4 ports only, no any
  678. * internal data will used. All mode and gpio control should manually set
  679. * by AP or Driver and all storage space value are 0xff. The
  680. * f81534_calc_num_ports() will run to final we marked as "oldest version"
  681. * for this IC.
  682. *
  683. * 2rd is designed to more generic to use any transceiver and this is our
  684. * mass production type. We'll save data in F81534_CUSTOM_ADDRESS_START
  685. * (0x2f00) with 9bytes. The 1st byte is a indicater. If the token is
  686. * F81534_CUSTOM_VALID_TOKEN(0xf0), the IC is 2nd gen type, the following
  687. * 4bytes save port mode (0:RS232/1:RS485 Invert/2:RS485), and the last
  688. * 4bytes save GPIO state(value from 0~7 to represent 3 GPIO output pin).
  689. * The f81534_calc_num_ports() will run to "new style" with checking
  690. * F81534_PORT_UNAVAILABLE section.
  691. */
  692. static int f81534_calc_num_ports(struct usb_serial *serial,
  693. struct usb_serial_endpoints *epds)
  694. {
  695. struct f81534_serial_private *serial_priv;
  696. struct device *dev = &serial->interface->dev;
  697. int size_bulk_in = usb_endpoint_maxp(epds->bulk_in[0]);
  698. int size_bulk_out = usb_endpoint_maxp(epds->bulk_out[0]);
  699. u8 num_port = 0;
  700. int index = 0;
  701. int status;
  702. int i;
  703. if (size_bulk_out != F81534_WRITE_BUFFER_SIZE ||
  704. size_bulk_in != F81534_MAX_RECEIVE_BLOCK_SIZE) {
  705. dev_err(dev, "unsupported endpoint max packet size\n");
  706. return -ENODEV;
  707. }
  708. serial_priv = devm_kzalloc(&serial->interface->dev,
  709. sizeof(*serial_priv), GFP_KERNEL);
  710. if (!serial_priv)
  711. return -ENOMEM;
  712. usb_set_serial_data(serial, serial_priv);
  713. mutex_init(&serial_priv->urb_mutex);
  714. /* Check had custom setting */
  715. status = f81534_find_config_idx(serial, &serial_priv->setting_idx);
  716. if (status) {
  717. dev_err(&serial->interface->dev, "%s: find idx failed: %d\n",
  718. __func__, status);
  719. return status;
  720. }
  721. /*
  722. * We'll read custom data only when data available, otherwise we'll
  723. * read default value instead.
  724. */
  725. if (serial_priv->setting_idx != F81534_CUSTOM_NO_CUSTOM_DATA) {
  726. status = f81534_read_flash(serial,
  727. F81534_CUSTOM_ADDRESS_START +
  728. F81534_CONF_OFFSET,
  729. sizeof(serial_priv->conf_data),
  730. serial_priv->conf_data);
  731. if (status) {
  732. dev_err(&serial->interface->dev,
  733. "%s: get custom data failed: %d\n",
  734. __func__, status);
  735. return status;
  736. }
  737. dev_dbg(&serial->interface->dev,
  738. "%s: read config from block: %d\n", __func__,
  739. serial_priv->setting_idx);
  740. } else {
  741. /* Read default board setting */
  742. status = f81534_read_flash(serial,
  743. F81534_DEF_CONF_ADDRESS_START,
  744. sizeof(serial_priv->conf_data),
  745. serial_priv->conf_data);
  746. if (status) {
  747. dev_err(&serial->interface->dev,
  748. "%s: read failed: %d\n", __func__,
  749. status);
  750. return status;
  751. }
  752. dev_dbg(&serial->interface->dev, "%s: read default config\n",
  753. __func__);
  754. }
  755. /* New style, find all possible ports */
  756. for (i = 0; i < F81534_NUM_PORT; ++i) {
  757. if (f81534_check_port_hw_disabled(serial, i))
  758. serial_priv->conf_data[i] |= F81534_PORT_UNAVAILABLE;
  759. if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
  760. continue;
  761. ++num_port;
  762. }
  763. if (!num_port) {
  764. dev_warn(&serial->interface->dev,
  765. "no config found, assuming 4 ports\n");
  766. num_port = 4; /* Nothing found, oldest version IC */
  767. }
  768. /* Assign phy-to-logic mapping */
  769. for (i = 0; i < F81534_NUM_PORT; ++i) {
  770. if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
  771. continue;
  772. serial_priv->tty_idx[i] = index++;
  773. dev_dbg(&serial->interface->dev,
  774. "%s: phy_num: %d, tty_idx: %d\n", __func__, i,
  775. serial_priv->tty_idx[i]);
  776. }
  777. /*
  778. * Setup bulk-out endpoint multiplexing. All ports share the same
  779. * bulk-out endpoint.
  780. */
  781. BUILD_BUG_ON(ARRAY_SIZE(epds->bulk_out) < F81534_NUM_PORT);
  782. for (i = 1; i < num_port; ++i)
  783. epds->bulk_out[i] = epds->bulk_out[0];
  784. epds->num_bulk_out = num_port;
  785. return num_port;
  786. }
  787. static void f81534_set_termios(struct tty_struct *tty,
  788. struct usb_serial_port *port,
  789. const struct ktermios *old_termios)
  790. {
  791. u8 new_lcr = 0;
  792. int status;
  793. u32 baud;
  794. u32 old_baud;
  795. if (C_BAUD(tty) == B0)
  796. f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
  797. else if (old_termios && (old_termios->c_cflag & CBAUD) == B0)
  798. f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
  799. if (C_PARENB(tty)) {
  800. new_lcr |= UART_LCR_PARITY;
  801. if (!C_PARODD(tty))
  802. new_lcr |= UART_LCR_EPAR;
  803. if (C_CMSPAR(tty))
  804. new_lcr |= UART_LCR_SPAR;
  805. }
  806. if (C_CSTOPB(tty))
  807. new_lcr |= UART_LCR_STOP;
  808. new_lcr |= UART_LCR_WLEN(tty_get_char_size(tty->termios.c_cflag));
  809. baud = tty_get_baud_rate(tty);
  810. if (!baud)
  811. return;
  812. if (old_termios)
  813. old_baud = tty_termios_baud_rate(old_termios);
  814. else
  815. old_baud = F81534_DEFAULT_BAUD_RATE;
  816. dev_dbg(&port->dev, "%s: baud: %d\n", __func__, baud);
  817. status = f81534_set_port_config(port, tty, baud, old_baud, new_lcr);
  818. if (status < 0) {
  819. dev_err(&port->dev, "%s: set port config failed: %d\n",
  820. __func__, status);
  821. }
  822. }
  823. static int f81534_submit_read_urb(struct usb_serial *serial, gfp_t flags)
  824. {
  825. return usb_serial_generic_submit_read_urbs(serial->port[0], flags);
  826. }
  827. static void f81534_msr_changed(struct usb_serial_port *port, u8 msr)
  828. {
  829. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  830. struct tty_struct *tty;
  831. unsigned long flags;
  832. u8 old_msr;
  833. if (!(msr & UART_MSR_ANY_DELTA))
  834. return;
  835. spin_lock_irqsave(&port_priv->msr_lock, flags);
  836. old_msr = port_priv->shadow_msr;
  837. port_priv->shadow_msr = msr;
  838. spin_unlock_irqrestore(&port_priv->msr_lock, flags);
  839. dev_dbg(&port->dev, "%s: MSR from %02x to %02x\n", __func__, old_msr,
  840. msr);
  841. /* Update input line counters */
  842. if (msr & UART_MSR_DCTS)
  843. port->icount.cts++;
  844. if (msr & UART_MSR_DDSR)
  845. port->icount.dsr++;
  846. if (msr & UART_MSR_DDCD)
  847. port->icount.dcd++;
  848. if (msr & UART_MSR_TERI)
  849. port->icount.rng++;
  850. wake_up_interruptible(&port->port.delta_msr_wait);
  851. if (!(msr & UART_MSR_DDCD))
  852. return;
  853. dev_dbg(&port->dev, "%s: DCD Changed: phy_num: %d from %x to %x\n",
  854. __func__, port_priv->phy_num, old_msr, msr);
  855. tty = tty_port_tty_get(&port->port);
  856. if (!tty)
  857. return;
  858. usb_serial_handle_dcd_change(port, tty, msr & UART_MSR_DCD);
  859. tty_kref_put(tty);
  860. }
  861. static int f81534_read_msr(struct usb_serial_port *port)
  862. {
  863. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  864. unsigned long flags;
  865. int status;
  866. u8 msr;
  867. /* Get MSR initial value */
  868. status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);
  869. if (status)
  870. return status;
  871. /* Force update current state */
  872. spin_lock_irqsave(&port_priv->msr_lock, flags);
  873. port_priv->shadow_msr = msr;
  874. spin_unlock_irqrestore(&port_priv->msr_lock, flags);
  875. return 0;
  876. }
  877. static int f81534_open(struct tty_struct *tty, struct usb_serial_port *port)
  878. {
  879. struct f81534_serial_private *serial_priv =
  880. usb_get_serial_data(port->serial);
  881. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  882. int status;
  883. status = f81534_set_port_register(port,
  884. F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO |
  885. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  886. if (status) {
  887. dev_err(&port->dev, "%s: Clear FIFO failed: %d\n", __func__,
  888. status);
  889. return status;
  890. }
  891. if (tty)
  892. f81534_set_termios(tty, port, NULL);
  893. status = f81534_read_msr(port);
  894. if (status)
  895. return status;
  896. mutex_lock(&serial_priv->urb_mutex);
  897. /* Submit Read URBs for first port opened */
  898. if (!serial_priv->opened_port) {
  899. status = f81534_submit_read_urb(port->serial, GFP_KERNEL);
  900. if (status)
  901. goto exit;
  902. }
  903. serial_priv->opened_port++;
  904. exit:
  905. mutex_unlock(&serial_priv->urb_mutex);
  906. set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
  907. return status;
  908. }
  909. static void f81534_close(struct usb_serial_port *port)
  910. {
  911. struct f81534_serial_private *serial_priv =
  912. usb_get_serial_data(port->serial);
  913. struct usb_serial_port *port0 = port->serial->port[0];
  914. unsigned long flags;
  915. size_t i;
  916. usb_kill_urb(port->write_urbs[0]);
  917. spin_lock_irqsave(&port->lock, flags);
  918. kfifo_reset_out(&port->write_fifo);
  919. spin_unlock_irqrestore(&port->lock, flags);
  920. /* Kill Read URBs when final port closed */
  921. mutex_lock(&serial_priv->urb_mutex);
  922. serial_priv->opened_port--;
  923. if (!serial_priv->opened_port) {
  924. for (i = 0; i < ARRAY_SIZE(port0->read_urbs); ++i)
  925. usb_kill_urb(port0->read_urbs[i]);
  926. }
  927. mutex_unlock(&serial_priv->urb_mutex);
  928. }
  929. static void f81534_get_serial_info(struct tty_struct *tty, struct serial_struct *ss)
  930. {
  931. struct usb_serial_port *port = tty->driver_data;
  932. struct f81534_port_private *port_priv;
  933. port_priv = usb_get_serial_port_data(port);
  934. ss->baud_base = port_priv->baud_base;
  935. }
  936. static void f81534_process_per_serial_block(struct usb_serial_port *port,
  937. u8 *data)
  938. {
  939. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  940. int phy_num = data[0];
  941. size_t read_size = 0;
  942. size_t i;
  943. char tty_flag;
  944. int status;
  945. u8 lsr;
  946. /*
  947. * The block layout is 128 Bytes
  948. * index 0: port phy idx (e.g., 0,1,2,3),
  949. * index 1: It's could be
  950. * F81534_TOKEN_RECEIVE
  951. * F81534_TOKEN_TX_EMPTY
  952. * F81534_TOKEN_MSR_CHANGE
  953. * index 2: serial in size (data+lsr, must be even)
  954. * meaningful for F81534_TOKEN_RECEIVE only
  955. * index 3: current MSR with this device
  956. * index 4~127: serial in data block (data+lsr, must be even)
  957. */
  958. switch (data[1]) {
  959. case F81534_TOKEN_TX_EMPTY:
  960. set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
  961. /* Try to submit writer */
  962. status = f81534_submit_writer(port, GFP_ATOMIC);
  963. if (status)
  964. dev_err(&port->dev, "%s: submit failed\n", __func__);
  965. return;
  966. case F81534_TOKEN_MSR_CHANGE:
  967. f81534_msr_changed(port, data[3]);
  968. return;
  969. case F81534_TOKEN_RECEIVE:
  970. read_size = data[2];
  971. if (read_size > F81534_MAX_RX_SIZE) {
  972. dev_err(&port->dev,
  973. "%s: phy: %d read_size: %zu larger than: %d\n",
  974. __func__, phy_num, read_size,
  975. F81534_MAX_RX_SIZE);
  976. return;
  977. }
  978. break;
  979. default:
  980. dev_warn(&port->dev, "%s: unknown token: %02x\n", __func__,
  981. data[1]);
  982. return;
  983. }
  984. for (i = 4; i < 4 + read_size; i += 2) {
  985. tty_flag = TTY_NORMAL;
  986. lsr = data[i + 1];
  987. if (lsr & UART_LSR_BRK_ERROR_BITS) {
  988. if (lsr & UART_LSR_BI) {
  989. tty_flag = TTY_BREAK;
  990. port->icount.brk++;
  991. usb_serial_handle_break(port);
  992. } else if (lsr & UART_LSR_PE) {
  993. tty_flag = TTY_PARITY;
  994. port->icount.parity++;
  995. } else if (lsr & UART_LSR_FE) {
  996. tty_flag = TTY_FRAME;
  997. port->icount.frame++;
  998. }
  999. if (lsr & UART_LSR_OE) {
  1000. port->icount.overrun++;
  1001. tty_insert_flip_char(&port->port, 0,
  1002. TTY_OVERRUN);
  1003. }
  1004. schedule_work(&port_priv->lsr_work);
  1005. }
  1006. if (port->sysrq) {
  1007. if (usb_serial_handle_sysrq_char(port, data[i]))
  1008. continue;
  1009. }
  1010. tty_insert_flip_char(&port->port, data[i], tty_flag);
  1011. }
  1012. tty_flip_buffer_push(&port->port);
  1013. }
  1014. static void f81534_process_read_urb(struct urb *urb)
  1015. {
  1016. struct f81534_serial_private *serial_priv;
  1017. struct usb_serial_port *port;
  1018. struct usb_serial *serial;
  1019. u8 *buf;
  1020. int phy_port_num;
  1021. int tty_port_num;
  1022. size_t i;
  1023. if (!urb->actual_length ||
  1024. urb->actual_length % F81534_RECEIVE_BLOCK_SIZE) {
  1025. return;
  1026. }
  1027. port = urb->context;
  1028. serial = port->serial;
  1029. buf = urb->transfer_buffer;
  1030. serial_priv = usb_get_serial_data(serial);
  1031. for (i = 0; i < urb->actual_length; i += F81534_RECEIVE_BLOCK_SIZE) {
  1032. phy_port_num = buf[i];
  1033. if (phy_port_num >= F81534_NUM_PORT) {
  1034. dev_err(&port->dev,
  1035. "%s: phy_port_num: %d larger than: %d\n",
  1036. __func__, phy_port_num, F81534_NUM_PORT);
  1037. continue;
  1038. }
  1039. tty_port_num = serial_priv->tty_idx[phy_port_num];
  1040. port = serial->port[tty_port_num];
  1041. if (tty_port_initialized(&port->port))
  1042. f81534_process_per_serial_block(port, &buf[i]);
  1043. }
  1044. }
  1045. static void f81534_write_usb_callback(struct urb *urb)
  1046. {
  1047. struct usb_serial_port *port = urb->context;
  1048. switch (urb->status) {
  1049. case 0:
  1050. break;
  1051. case -ENOENT:
  1052. case -ECONNRESET:
  1053. case -ESHUTDOWN:
  1054. dev_dbg(&port->dev, "%s - urb stopped: %d\n",
  1055. __func__, urb->status);
  1056. return;
  1057. case -EPIPE:
  1058. dev_err(&port->dev, "%s - urb stopped: %d\n",
  1059. __func__, urb->status);
  1060. return;
  1061. default:
  1062. dev_dbg(&port->dev, "%s - nonzero urb status: %d\n",
  1063. __func__, urb->status);
  1064. break;
  1065. }
  1066. }
  1067. static void f81534_lsr_worker(struct work_struct *work)
  1068. {
  1069. struct f81534_port_private *port_priv;
  1070. struct usb_serial_port *port;
  1071. int status;
  1072. u8 tmp;
  1073. port_priv = container_of(work, struct f81534_port_private, lsr_work);
  1074. port = port_priv->port;
  1075. status = f81534_get_port_register(port, F81534_LINE_STATUS_REG, &tmp);
  1076. if (status)
  1077. dev_warn(&port->dev, "read LSR failed: %d\n", status);
  1078. }
  1079. static int f81534_set_port_output_pin(struct usb_serial_port *port)
  1080. {
  1081. struct f81534_serial_private *serial_priv;
  1082. struct f81534_port_private *port_priv;
  1083. struct usb_serial *serial;
  1084. const struct f81534_port_out_pin *pins;
  1085. int status;
  1086. int i;
  1087. u8 value;
  1088. u8 idx;
  1089. serial = port->serial;
  1090. serial_priv = usb_get_serial_data(serial);
  1091. port_priv = usb_get_serial_port_data(port);
  1092. idx = F81534_CONF_INIT_GPIO_OFFSET + port_priv->phy_num;
  1093. value = serial_priv->conf_data[idx];
  1094. if (value >= F81534_CONF_GPIO_SHUTDOWN) {
  1095. /*
  1096. * Newer IC configure will make transceiver in shutdown mode on
  1097. * initial power on. We need enable it before using UARTs.
  1098. */
  1099. idx = F81534_CONF_WORK_GPIO_OFFSET + port_priv->phy_num;
  1100. value = serial_priv->conf_data[idx];
  1101. if (value >= F81534_CONF_GPIO_SHUTDOWN)
  1102. value = F81534_CONF_GPIO_RS232;
  1103. }
  1104. pins = &f81534_port_out_pins[port_priv->phy_num];
  1105. for (i = 0; i < ARRAY_SIZE(pins->pin); ++i) {
  1106. status = f81534_set_mask_register(serial,
  1107. pins->pin[i].reg_addr, pins->pin[i].reg_mask,
  1108. value & BIT(i) ? pins->pin[i].reg_mask : 0);
  1109. if (status)
  1110. return status;
  1111. }
  1112. dev_dbg(&port->dev, "Output pin (M0/M1/M2): %d\n", value);
  1113. return 0;
  1114. }
  1115. static int f81534_port_probe(struct usb_serial_port *port)
  1116. {
  1117. struct f81534_serial_private *serial_priv;
  1118. struct f81534_port_private *port_priv;
  1119. int ret;
  1120. u8 value;
  1121. serial_priv = usb_get_serial_data(port->serial);
  1122. port_priv = devm_kzalloc(&port->dev, sizeof(*port_priv), GFP_KERNEL);
  1123. if (!port_priv)
  1124. return -ENOMEM;
  1125. /*
  1126. * We'll make tx frame error when baud rate from 384~500kps. So we'll
  1127. * delay all tx data frame with 1bit.
  1128. */
  1129. port_priv->shadow_clk = F81534_UART_EN | F81534_CLK_TX_DELAY_1BIT;
  1130. spin_lock_init(&port_priv->msr_lock);
  1131. mutex_init(&port_priv->mcr_mutex);
  1132. mutex_init(&port_priv->lcr_mutex);
  1133. INIT_WORK(&port_priv->lsr_work, f81534_lsr_worker);
  1134. /* Assign logic-to-phy mapping */
  1135. ret = f81534_logic_to_phy_port(port->serial, port);
  1136. if (ret < 0)
  1137. return ret;
  1138. port_priv->phy_num = ret;
  1139. port_priv->port = port;
  1140. usb_set_serial_port_data(port, port_priv);
  1141. dev_dbg(&port->dev, "%s: port_number: %d, phy_num: %d\n", __func__,
  1142. port->port_number, port_priv->phy_num);
  1143. /*
  1144. * The F81532/534 will hang-up when enable LSR interrupt in IER and
  1145. * occur data overrun. So we'll disable the LSR interrupt in probe()
  1146. * and submit the LSR worker to clear LSR state when reported LSR error
  1147. * bit with bulk-in data in f81534_process_per_serial_block().
  1148. */
  1149. ret = f81534_set_port_register(port, F81534_INTERRUPT_ENABLE_REG,
  1150. UART_IER_RDI | UART_IER_THRI | UART_IER_MSI);
  1151. if (ret)
  1152. return ret;
  1153. value = serial_priv->conf_data[port_priv->phy_num];
  1154. switch (value & F81534_PORT_CONF_MODE_MASK) {
  1155. case F81534_PORT_CONF_RS485_INVERT:
  1156. port_priv->shadow_clk |= F81534_CLK_RS485_MODE |
  1157. F81534_CLK_RS485_INVERT;
  1158. dev_dbg(&port->dev, "RS485 invert mode\n");
  1159. break;
  1160. case F81534_PORT_CONF_RS485:
  1161. port_priv->shadow_clk |= F81534_CLK_RS485_MODE;
  1162. dev_dbg(&port->dev, "RS485 mode\n");
  1163. break;
  1164. default:
  1165. case F81534_PORT_CONF_RS232:
  1166. dev_dbg(&port->dev, "RS232 mode\n");
  1167. break;
  1168. }
  1169. return f81534_set_port_output_pin(port);
  1170. }
  1171. static void f81534_port_remove(struct usb_serial_port *port)
  1172. {
  1173. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  1174. flush_work(&port_priv->lsr_work);
  1175. }
  1176. static int f81534_tiocmget(struct tty_struct *tty)
  1177. {
  1178. struct usb_serial_port *port = tty->driver_data;
  1179. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  1180. int status;
  1181. int r;
  1182. u8 msr;
  1183. u8 mcr;
  1184. /* Read current MSR from device */
  1185. status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);
  1186. if (status)
  1187. return status;
  1188. mutex_lock(&port_priv->mcr_mutex);
  1189. mcr = port_priv->shadow_mcr;
  1190. mutex_unlock(&port_priv->mcr_mutex);
  1191. r = (mcr & UART_MCR_DTR ? TIOCM_DTR : 0) |
  1192. (mcr & UART_MCR_RTS ? TIOCM_RTS : 0) |
  1193. (msr & UART_MSR_CTS ? TIOCM_CTS : 0) |
  1194. (msr & UART_MSR_DCD ? TIOCM_CAR : 0) |
  1195. (msr & UART_MSR_RI ? TIOCM_RI : 0) |
  1196. (msr & UART_MSR_DSR ? TIOCM_DSR : 0);
  1197. return r;
  1198. }
  1199. static int f81534_tiocmset(struct tty_struct *tty, unsigned int set,
  1200. unsigned int clear)
  1201. {
  1202. struct usb_serial_port *port = tty->driver_data;
  1203. return f81534_update_mctrl(port, set, clear);
  1204. }
  1205. static void f81534_dtr_rts(struct usb_serial_port *port, int on)
  1206. {
  1207. if (on)
  1208. f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
  1209. else
  1210. f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
  1211. }
  1212. static int f81534_write(struct tty_struct *tty, struct usb_serial_port *port,
  1213. const u8 *buf, int count)
  1214. {
  1215. int bytes_out, status;
  1216. if (!count)
  1217. return 0;
  1218. bytes_out = kfifo_in_locked(&port->write_fifo, buf, count,
  1219. &port->lock);
  1220. status = f81534_submit_writer(port, GFP_ATOMIC);
  1221. if (status) {
  1222. dev_err(&port->dev, "%s: submit failed\n", __func__);
  1223. return status;
  1224. }
  1225. return bytes_out;
  1226. }
  1227. static bool f81534_tx_empty(struct usb_serial_port *port)
  1228. {
  1229. struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
  1230. return test_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
  1231. }
  1232. static int f81534_resume(struct usb_serial *serial)
  1233. {
  1234. struct f81534_serial_private *serial_priv =
  1235. usb_get_serial_data(serial);
  1236. struct usb_serial_port *port;
  1237. int error = 0;
  1238. int status;
  1239. size_t i;
  1240. /*
  1241. * We'll register port 0 bulkin when port had opened, It'll take all
  1242. * port received data, MSR register change and TX_EMPTY information.
  1243. */
  1244. mutex_lock(&serial_priv->urb_mutex);
  1245. if (serial_priv->opened_port) {
  1246. status = f81534_submit_read_urb(serial, GFP_NOIO);
  1247. if (status) {
  1248. mutex_unlock(&serial_priv->urb_mutex);
  1249. return status;
  1250. }
  1251. }
  1252. mutex_unlock(&serial_priv->urb_mutex);
  1253. for (i = 0; i < serial->num_ports; i++) {
  1254. port = serial->port[i];
  1255. if (!tty_port_initialized(&port->port))
  1256. continue;
  1257. status = f81534_submit_writer(port, GFP_NOIO);
  1258. if (status) {
  1259. dev_err(&port->dev, "%s: submit failed\n", __func__);
  1260. ++error;
  1261. }
  1262. }
  1263. if (error)
  1264. return -EIO;
  1265. return 0;
  1266. }
  1267. static struct usb_serial_driver f81534_device = {
  1268. .driver = {
  1269. .name = "f81534",
  1270. },
  1271. .description = DRIVER_DESC,
  1272. .id_table = f81534_id_table,
  1273. .num_bulk_in = 1,
  1274. .num_bulk_out = 1,
  1275. .open = f81534_open,
  1276. .close = f81534_close,
  1277. .write = f81534_write,
  1278. .tx_empty = f81534_tx_empty,
  1279. .calc_num_ports = f81534_calc_num_ports,
  1280. .port_probe = f81534_port_probe,
  1281. .port_remove = f81534_port_remove,
  1282. .break_ctl = f81534_break_ctl,
  1283. .dtr_rts = f81534_dtr_rts,
  1284. .process_read_urb = f81534_process_read_urb,
  1285. .get_serial = f81534_get_serial_info,
  1286. .tiocmget = f81534_tiocmget,
  1287. .tiocmset = f81534_tiocmset,
  1288. .write_bulk_callback = f81534_write_usb_callback,
  1289. .set_termios = f81534_set_termios,
  1290. .resume = f81534_resume,
  1291. };
  1292. static struct usb_serial_driver *const serial_drivers[] = {
  1293. &f81534_device, NULL
  1294. };
  1295. module_usb_serial_driver(serial_drivers, f81534_id_table);
  1296. MODULE_DEVICE_TABLE(usb, f81534_id_table);
  1297. MODULE_DESCRIPTION(DRIVER_DESC);
  1298. MODULE_AUTHOR("Peter Hong <Peter_Hong@fintek.com.tw>");
  1299. MODULE_AUTHOR("Tom Tsai <Tom_Tsai@fintek.com.tw>");
  1300. MODULE_LICENSE("GPL");