irq_sim.c 7.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2017-2018 Bartosz Golaszewski <brgl@bgdev.pl>
  4. * Copyright (C) 2020 Bartosz Golaszewski <bgolaszewski@baylibre.com>
  5. */
  6. #include <linux/cleanup.h>
  7. #include <linux/interrupt.h>
  8. #include <linux/irq.h>
  9. #include <linux/irq_sim.h>
  10. #include <linux/irq_work.h>
  11. #include <linux/slab.h>
  12. struct irq_sim_work_ctx {
  13. struct irq_work work;
  14. unsigned int irq_count;
  15. unsigned long *pending;
  16. struct irq_domain *domain;
  17. struct irq_sim_ops ops;
  18. void *user_data;
  19. };
  20. struct irq_sim_irq_ctx {
  21. bool enabled;
  22. struct irq_sim_work_ctx *work_ctx;
  23. };
  24. static void irq_sim_irqmask(struct irq_data *data)
  25. {
  26. struct irq_sim_irq_ctx *irq_ctx = irq_data_get_irq_chip_data(data);
  27. irq_ctx->enabled = false;
  28. }
  29. static void irq_sim_irqunmask(struct irq_data *data)
  30. {
  31. struct irq_sim_irq_ctx *irq_ctx = irq_data_get_irq_chip_data(data);
  32. irq_ctx->enabled = true;
  33. }
  34. static int irq_sim_set_type(struct irq_data *data, unsigned int type)
  35. {
  36. /* We only support rising and falling edge trigger types. */
  37. if (type & ~IRQ_TYPE_EDGE_BOTH)
  38. return -EINVAL;
  39. irqd_set_trigger_type(data, type);
  40. return 0;
  41. }
  42. static int irq_sim_get_irqchip_state(struct irq_data *data,
  43. enum irqchip_irq_state which, bool *state)
  44. {
  45. struct irq_sim_irq_ctx *irq_ctx = irq_data_get_irq_chip_data(data);
  46. irq_hw_number_t hwirq = irqd_to_hwirq(data);
  47. switch (which) {
  48. case IRQCHIP_STATE_PENDING:
  49. if (irq_ctx->enabled)
  50. *state = test_bit(hwirq, irq_ctx->work_ctx->pending);
  51. break;
  52. default:
  53. return -EINVAL;
  54. }
  55. return 0;
  56. }
  57. static int irq_sim_set_irqchip_state(struct irq_data *data,
  58. enum irqchip_irq_state which, bool state)
  59. {
  60. struct irq_sim_irq_ctx *irq_ctx = irq_data_get_irq_chip_data(data);
  61. irq_hw_number_t hwirq = irqd_to_hwirq(data);
  62. switch (which) {
  63. case IRQCHIP_STATE_PENDING:
  64. if (irq_ctx->enabled) {
  65. assign_bit(hwirq, irq_ctx->work_ctx->pending, state);
  66. if (state)
  67. irq_work_queue(&irq_ctx->work_ctx->work);
  68. }
  69. break;
  70. default:
  71. return -EINVAL;
  72. }
  73. return 0;
  74. }
  75. static int irq_sim_request_resources(struct irq_data *data)
  76. {
  77. struct irq_sim_irq_ctx *irq_ctx = irq_data_get_irq_chip_data(data);
  78. struct irq_sim_work_ctx *work_ctx = irq_ctx->work_ctx;
  79. irq_hw_number_t hwirq = irqd_to_hwirq(data);
  80. if (work_ctx->ops.irq_sim_irq_requested)
  81. return work_ctx->ops.irq_sim_irq_requested(work_ctx->domain,
  82. hwirq,
  83. work_ctx->user_data);
  84. return 0;
  85. }
  86. static void irq_sim_release_resources(struct irq_data *data)
  87. {
  88. struct irq_sim_irq_ctx *irq_ctx = irq_data_get_irq_chip_data(data);
  89. struct irq_sim_work_ctx *work_ctx = irq_ctx->work_ctx;
  90. irq_hw_number_t hwirq = irqd_to_hwirq(data);
  91. if (work_ctx->ops.irq_sim_irq_released)
  92. work_ctx->ops.irq_sim_irq_released(work_ctx->domain, hwirq,
  93. work_ctx->user_data);
  94. }
  95. static struct irq_chip irq_sim_irqchip = {
  96. .name = "irq_sim",
  97. .irq_mask = irq_sim_irqmask,
  98. .irq_unmask = irq_sim_irqunmask,
  99. .irq_set_type = irq_sim_set_type,
  100. .irq_get_irqchip_state = irq_sim_get_irqchip_state,
  101. .irq_set_irqchip_state = irq_sim_set_irqchip_state,
  102. .irq_request_resources = irq_sim_request_resources,
  103. .irq_release_resources = irq_sim_release_resources,
  104. };
  105. static void irq_sim_handle_irq(struct irq_work *work)
  106. {
  107. struct irq_sim_work_ctx *work_ctx;
  108. unsigned int offset = 0;
  109. int irqnum;
  110. work_ctx = container_of(work, struct irq_sim_work_ctx, work);
  111. while (!bitmap_empty(work_ctx->pending, work_ctx->irq_count)) {
  112. offset = find_next_bit(work_ctx->pending,
  113. work_ctx->irq_count, offset);
  114. clear_bit(offset, work_ctx->pending);
  115. irqnum = irq_find_mapping(work_ctx->domain, offset);
  116. handle_simple_irq(irq_to_desc(irqnum));
  117. }
  118. }
  119. static int irq_sim_domain_map(struct irq_domain *domain,
  120. unsigned int virq, irq_hw_number_t hw)
  121. {
  122. struct irq_sim_work_ctx *work_ctx = domain->host_data;
  123. struct irq_sim_irq_ctx *irq_ctx;
  124. irq_ctx = kzalloc(sizeof(*irq_ctx), GFP_KERNEL);
  125. if (!irq_ctx)
  126. return -ENOMEM;
  127. irq_set_chip(virq, &irq_sim_irqchip);
  128. irq_set_chip_data(virq, irq_ctx);
  129. irq_set_handler(virq, handle_simple_irq);
  130. irq_modify_status(virq, IRQ_NOREQUEST | IRQ_NOAUTOEN, IRQ_NOPROBE);
  131. irq_ctx->work_ctx = work_ctx;
  132. return 0;
  133. }
  134. static void irq_sim_domain_unmap(struct irq_domain *domain, unsigned int virq)
  135. {
  136. struct irq_sim_irq_ctx *irq_ctx;
  137. struct irq_data *irqd;
  138. irqd = irq_domain_get_irq_data(domain, virq);
  139. irq_ctx = irq_data_get_irq_chip_data(irqd);
  140. irq_set_handler(virq, NULL);
  141. irq_domain_reset_irq_data(irqd);
  142. kfree(irq_ctx);
  143. }
  144. static const struct irq_domain_ops irq_sim_domain_ops = {
  145. .map = irq_sim_domain_map,
  146. .unmap = irq_sim_domain_unmap,
  147. };
  148. /**
  149. * irq_domain_create_sim - Create a new interrupt simulator irq_domain and
  150. * allocate a range of dummy interrupts.
  151. *
  152. * @fwnode: struct fwnode_handle to be associated with this domain.
  153. * @num_irqs: Number of interrupts to allocate.
  154. *
  155. * On success: return a new irq_domain object.
  156. * On failure: a negative errno wrapped with ERR_PTR().
  157. */
  158. struct irq_domain *irq_domain_create_sim(struct fwnode_handle *fwnode,
  159. unsigned int num_irqs)
  160. {
  161. return irq_domain_create_sim_full(fwnode, num_irqs, NULL, NULL);
  162. }
  163. EXPORT_SYMBOL_GPL(irq_domain_create_sim);
  164. struct irq_domain *irq_domain_create_sim_full(struct fwnode_handle *fwnode,
  165. unsigned int num_irqs,
  166. const struct irq_sim_ops *ops,
  167. void *data)
  168. {
  169. struct irq_sim_work_ctx *work_ctx __free(kfree) =
  170. kzalloc(sizeof(*work_ctx), GFP_KERNEL);
  171. if (!work_ctx)
  172. return ERR_PTR(-ENOMEM);
  173. unsigned long *pending __free(bitmap) = bitmap_zalloc(num_irqs, GFP_KERNEL);
  174. if (!pending)
  175. return ERR_PTR(-ENOMEM);
  176. work_ctx->domain = irq_domain_create_linear(fwnode, num_irqs,
  177. &irq_sim_domain_ops,
  178. work_ctx);
  179. if (!work_ctx->domain)
  180. return ERR_PTR(-ENOMEM);
  181. work_ctx->irq_count = num_irqs;
  182. work_ctx->work = IRQ_WORK_INIT_HARD(irq_sim_handle_irq);
  183. work_ctx->pending = no_free_ptr(pending);
  184. work_ctx->user_data = data;
  185. if (ops)
  186. memcpy(&work_ctx->ops, ops, sizeof(*ops));
  187. return no_free_ptr(work_ctx)->domain;
  188. }
  189. EXPORT_SYMBOL_GPL(irq_domain_create_sim_full);
  190. /**
  191. * irq_domain_remove_sim - Deinitialize the interrupt simulator domain: free
  192. * the interrupt descriptors and allocated memory.
  193. *
  194. * @domain: The interrupt simulator domain to tear down.
  195. */
  196. void irq_domain_remove_sim(struct irq_domain *domain)
  197. {
  198. struct irq_sim_work_ctx *work_ctx = domain->host_data;
  199. irq_work_sync(&work_ctx->work);
  200. bitmap_free(work_ctx->pending);
  201. kfree(work_ctx);
  202. irq_domain_remove(domain);
  203. }
  204. EXPORT_SYMBOL_GPL(irq_domain_remove_sim);
  205. static void devm_irq_domain_remove_sim(void *data)
  206. {
  207. struct irq_domain *domain = data;
  208. irq_domain_remove_sim(domain);
  209. }
  210. /**
  211. * devm_irq_domain_create_sim - Create a new interrupt simulator for
  212. * a managed device.
  213. *
  214. * @dev: Device to initialize the simulator object for.
  215. * @fwnode: struct fwnode_handle to be associated with this domain.
  216. * @num_irqs: Number of interrupts to allocate
  217. *
  218. * On success: return a new irq_domain object.
  219. * On failure: a negative errno wrapped with ERR_PTR().
  220. */
  221. struct irq_domain *devm_irq_domain_create_sim(struct device *dev,
  222. struct fwnode_handle *fwnode,
  223. unsigned int num_irqs)
  224. {
  225. return devm_irq_domain_create_sim_full(dev, fwnode, num_irqs,
  226. NULL, NULL);
  227. }
  228. EXPORT_SYMBOL_GPL(devm_irq_domain_create_sim);
  229. struct irq_domain *
  230. devm_irq_domain_create_sim_full(struct device *dev,
  231. struct fwnode_handle *fwnode,
  232. unsigned int num_irqs,
  233. const struct irq_sim_ops *ops,
  234. void *data)
  235. {
  236. struct irq_domain *domain;
  237. int ret;
  238. domain = irq_domain_create_sim_full(fwnode, num_irqs, ops, data);
  239. if (IS_ERR(domain))
  240. return domain;
  241. ret = devm_add_action_or_reset(dev, devm_irq_domain_remove_sim, domain);
  242. if (ret)
  243. return ERR_PTR(ret);
  244. return domain;
  245. }
  246. EXPORT_SYMBOL_GPL(devm_irq_domain_create_sim_full);