digi00x-stream.c 10 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * digi00x-stream.c - a part of driver for Digidesign Digi 002/003 family
  4. *
  5. * Copyright (c) 2014-2015 Takashi Sakamoto
  6. */
  7. #include "digi00x.h"
  8. #define READY_TIMEOUT_MS 200
  9. const unsigned int snd_dg00x_stream_rates[SND_DG00X_RATE_COUNT] = {
  10. [SND_DG00X_RATE_44100] = 44100,
  11. [SND_DG00X_RATE_48000] = 48000,
  12. [SND_DG00X_RATE_88200] = 88200,
  13. [SND_DG00X_RATE_96000] = 96000,
  14. };
  15. /* Multi Bit Linear Audio data channels for each sampling transfer frequency. */
  16. const unsigned int
  17. snd_dg00x_stream_pcm_channels[SND_DG00X_RATE_COUNT] = {
  18. /* Analog/ADAT/SPDIF */
  19. [SND_DG00X_RATE_44100] = (8 + 8 + 2),
  20. [SND_DG00X_RATE_48000] = (8 + 8 + 2),
  21. /* Analog/SPDIF */
  22. [SND_DG00X_RATE_88200] = (8 + 2),
  23. [SND_DG00X_RATE_96000] = (8 + 2),
  24. };
  25. int snd_dg00x_stream_get_local_rate(struct snd_dg00x *dg00x, unsigned int *rate)
  26. {
  27. u32 data;
  28. __be32 reg;
  29. int err;
  30. err = snd_fw_transaction(dg00x->unit, TCODE_READ_QUADLET_REQUEST,
  31. DG00X_ADDR_BASE + DG00X_OFFSET_LOCAL_RATE,
  32. &reg, sizeof(reg), 0);
  33. if (err < 0)
  34. return err;
  35. data = be32_to_cpu(reg) & 0x0f;
  36. if (data < ARRAY_SIZE(snd_dg00x_stream_rates))
  37. *rate = snd_dg00x_stream_rates[data];
  38. else
  39. err = -EIO;
  40. return err;
  41. }
  42. int snd_dg00x_stream_set_local_rate(struct snd_dg00x *dg00x, unsigned int rate)
  43. {
  44. __be32 reg;
  45. unsigned int i;
  46. for (i = 0; i < ARRAY_SIZE(snd_dg00x_stream_rates); i++) {
  47. if (rate == snd_dg00x_stream_rates[i])
  48. break;
  49. }
  50. if (i == ARRAY_SIZE(snd_dg00x_stream_rates))
  51. return -EINVAL;
  52. reg = cpu_to_be32(i);
  53. return snd_fw_transaction(dg00x->unit, TCODE_WRITE_QUADLET_REQUEST,
  54. DG00X_ADDR_BASE + DG00X_OFFSET_LOCAL_RATE,
  55. &reg, sizeof(reg), 0);
  56. }
  57. int snd_dg00x_stream_get_clock(struct snd_dg00x *dg00x,
  58. enum snd_dg00x_clock *clock)
  59. {
  60. __be32 reg;
  61. int err;
  62. err = snd_fw_transaction(dg00x->unit, TCODE_READ_QUADLET_REQUEST,
  63. DG00X_ADDR_BASE + DG00X_OFFSET_CLOCK_SOURCE,
  64. &reg, sizeof(reg), 0);
  65. if (err < 0)
  66. return err;
  67. *clock = be32_to_cpu(reg) & 0x0f;
  68. if (*clock >= SND_DG00X_CLOCK_COUNT)
  69. err = -EIO;
  70. return err;
  71. }
  72. int snd_dg00x_stream_check_external_clock(struct snd_dg00x *dg00x, bool *detect)
  73. {
  74. __be32 reg;
  75. int err;
  76. err = snd_fw_transaction(dg00x->unit, TCODE_READ_QUADLET_REQUEST,
  77. DG00X_ADDR_BASE + DG00X_OFFSET_DETECT_EXTERNAL,
  78. &reg, sizeof(reg), 0);
  79. if (err >= 0)
  80. *detect = be32_to_cpu(reg) > 0;
  81. return err;
  82. }
  83. int snd_dg00x_stream_get_external_rate(struct snd_dg00x *dg00x,
  84. unsigned int *rate)
  85. {
  86. u32 data;
  87. __be32 reg;
  88. int err;
  89. err = snd_fw_transaction(dg00x->unit, TCODE_READ_QUADLET_REQUEST,
  90. DG00X_ADDR_BASE + DG00X_OFFSET_EXTERNAL_RATE,
  91. &reg, sizeof(reg), 0);
  92. if (err < 0)
  93. return err;
  94. data = be32_to_cpu(reg) & 0x0f;
  95. if (data < ARRAY_SIZE(snd_dg00x_stream_rates))
  96. *rate = snd_dg00x_stream_rates[data];
  97. /* This means desync. */
  98. else
  99. err = -EBUSY;
  100. return err;
  101. }
  102. static void finish_session(struct snd_dg00x *dg00x)
  103. {
  104. __be32 data;
  105. data = cpu_to_be32(0x00000003);
  106. snd_fw_transaction(dg00x->unit, TCODE_WRITE_QUADLET_REQUEST,
  107. DG00X_ADDR_BASE + DG00X_OFFSET_STREAMING_SET,
  108. &data, sizeof(data), 0);
  109. // Unregister isochronous channels for both direction.
  110. data = 0;
  111. snd_fw_transaction(dg00x->unit, TCODE_WRITE_QUADLET_REQUEST,
  112. DG00X_ADDR_BASE + DG00X_OFFSET_ISOC_CHANNELS,
  113. &data, sizeof(data), 0);
  114. // Just after finishing the session, the device may lost transmitting
  115. // functionality for a short time.
  116. msleep(50);
  117. }
  118. static int begin_session(struct snd_dg00x *dg00x)
  119. {
  120. __be32 data;
  121. u32 curr;
  122. int err;
  123. // Register isochronous channels for both direction.
  124. data = cpu_to_be32((dg00x->tx_resources.channel << 16) |
  125. dg00x->rx_resources.channel);
  126. err = snd_fw_transaction(dg00x->unit, TCODE_WRITE_QUADLET_REQUEST,
  127. DG00X_ADDR_BASE + DG00X_OFFSET_ISOC_CHANNELS,
  128. &data, sizeof(data), 0);
  129. if (err < 0)
  130. return err;
  131. err = snd_fw_transaction(dg00x->unit, TCODE_READ_QUADLET_REQUEST,
  132. DG00X_ADDR_BASE + DG00X_OFFSET_STREAMING_STATE,
  133. &data, sizeof(data), 0);
  134. if (err < 0)
  135. return err;
  136. curr = be32_to_cpu(data);
  137. if (curr == 0)
  138. curr = 2;
  139. curr--;
  140. while (curr > 0) {
  141. data = cpu_to_be32(curr);
  142. err = snd_fw_transaction(dg00x->unit,
  143. TCODE_WRITE_QUADLET_REQUEST,
  144. DG00X_ADDR_BASE +
  145. DG00X_OFFSET_STREAMING_SET,
  146. &data, sizeof(data), 0);
  147. if (err < 0)
  148. break;
  149. msleep(20);
  150. curr--;
  151. }
  152. return err;
  153. }
  154. static int keep_resources(struct snd_dg00x *dg00x, struct amdtp_stream *stream,
  155. unsigned int rate)
  156. {
  157. struct fw_iso_resources *resources;
  158. int i;
  159. int err;
  160. // Check sampling rate.
  161. for (i = 0; i < SND_DG00X_RATE_COUNT; i++) {
  162. if (snd_dg00x_stream_rates[i] == rate)
  163. break;
  164. }
  165. if (i == SND_DG00X_RATE_COUNT)
  166. return -EINVAL;
  167. if (stream == &dg00x->tx_stream)
  168. resources = &dg00x->tx_resources;
  169. else
  170. resources = &dg00x->rx_resources;
  171. err = amdtp_dot_set_parameters(stream, rate,
  172. snd_dg00x_stream_pcm_channels[i]);
  173. if (err < 0)
  174. return err;
  175. return fw_iso_resources_allocate(resources,
  176. amdtp_stream_get_max_payload(stream),
  177. fw_parent_device(dg00x->unit)->max_speed);
  178. }
  179. static int init_stream(struct snd_dg00x *dg00x, struct amdtp_stream *s)
  180. {
  181. struct fw_iso_resources *resources;
  182. enum amdtp_stream_direction dir;
  183. int err;
  184. if (s == &dg00x->tx_stream) {
  185. resources = &dg00x->tx_resources;
  186. dir = AMDTP_IN_STREAM;
  187. } else {
  188. resources = &dg00x->rx_resources;
  189. dir = AMDTP_OUT_STREAM;
  190. }
  191. err = fw_iso_resources_init(resources, dg00x->unit);
  192. if (err < 0)
  193. return err;
  194. err = amdtp_dot_init(s, dg00x->unit, dir);
  195. if (err < 0)
  196. fw_iso_resources_destroy(resources);
  197. return err;
  198. }
  199. static void destroy_stream(struct snd_dg00x *dg00x, struct amdtp_stream *s)
  200. {
  201. amdtp_stream_destroy(s);
  202. if (s == &dg00x->tx_stream)
  203. fw_iso_resources_destroy(&dg00x->tx_resources);
  204. else
  205. fw_iso_resources_destroy(&dg00x->rx_resources);
  206. }
  207. int snd_dg00x_stream_init_duplex(struct snd_dg00x *dg00x)
  208. {
  209. int err;
  210. err = init_stream(dg00x, &dg00x->rx_stream);
  211. if (err < 0)
  212. return err;
  213. err = init_stream(dg00x, &dg00x->tx_stream);
  214. if (err < 0) {
  215. destroy_stream(dg00x, &dg00x->rx_stream);
  216. return err;
  217. }
  218. err = amdtp_domain_init(&dg00x->domain);
  219. if (err < 0) {
  220. destroy_stream(dg00x, &dg00x->rx_stream);
  221. destroy_stream(dg00x, &dg00x->tx_stream);
  222. }
  223. return err;
  224. }
  225. /*
  226. * This function should be called before starting streams or after stopping
  227. * streams.
  228. */
  229. void snd_dg00x_stream_destroy_duplex(struct snd_dg00x *dg00x)
  230. {
  231. amdtp_domain_destroy(&dg00x->domain);
  232. destroy_stream(dg00x, &dg00x->rx_stream);
  233. destroy_stream(dg00x, &dg00x->tx_stream);
  234. }
  235. int snd_dg00x_stream_reserve_duplex(struct snd_dg00x *dg00x, unsigned int rate,
  236. unsigned int frames_per_period,
  237. unsigned int frames_per_buffer)
  238. {
  239. unsigned int curr_rate;
  240. int err;
  241. err = snd_dg00x_stream_get_local_rate(dg00x, &curr_rate);
  242. if (err < 0)
  243. return err;
  244. if (rate == 0)
  245. rate = curr_rate;
  246. if (dg00x->substreams_counter == 0 || curr_rate != rate) {
  247. amdtp_domain_stop(&dg00x->domain);
  248. finish_session(dg00x);
  249. fw_iso_resources_free(&dg00x->tx_resources);
  250. fw_iso_resources_free(&dg00x->rx_resources);
  251. err = snd_dg00x_stream_set_local_rate(dg00x, rate);
  252. if (err < 0)
  253. return err;
  254. err = keep_resources(dg00x, &dg00x->rx_stream, rate);
  255. if (err < 0)
  256. return err;
  257. err = keep_resources(dg00x, &dg00x->tx_stream, rate);
  258. if (err < 0) {
  259. fw_iso_resources_free(&dg00x->rx_resources);
  260. return err;
  261. }
  262. err = amdtp_domain_set_events_per_period(&dg00x->domain,
  263. frames_per_period, frames_per_buffer);
  264. if (err < 0) {
  265. fw_iso_resources_free(&dg00x->rx_resources);
  266. fw_iso_resources_free(&dg00x->tx_resources);
  267. return err;
  268. }
  269. }
  270. return 0;
  271. }
  272. int snd_dg00x_stream_start_duplex(struct snd_dg00x *dg00x)
  273. {
  274. unsigned int generation = dg00x->rx_resources.generation;
  275. int err = 0;
  276. if (dg00x->substreams_counter == 0)
  277. return 0;
  278. if (amdtp_streaming_error(&dg00x->tx_stream) ||
  279. amdtp_streaming_error(&dg00x->rx_stream)) {
  280. amdtp_domain_stop(&dg00x->domain);
  281. finish_session(dg00x);
  282. }
  283. if (generation != fw_parent_device(dg00x->unit)->card->generation) {
  284. err = fw_iso_resources_update(&dg00x->tx_resources);
  285. if (err < 0)
  286. goto error;
  287. err = fw_iso_resources_update(&dg00x->rx_resources);
  288. if (err < 0)
  289. goto error;
  290. }
  291. /*
  292. * No packets are transmitted without receiving packets, reagardless of
  293. * which source of clock is used.
  294. */
  295. if (!amdtp_stream_running(&dg00x->rx_stream)) {
  296. int spd = fw_parent_device(dg00x->unit)->max_speed;
  297. err = begin_session(dg00x);
  298. if (err < 0)
  299. goto error;
  300. err = amdtp_domain_add_stream(&dg00x->domain, &dg00x->rx_stream,
  301. dg00x->rx_resources.channel, spd);
  302. if (err < 0)
  303. goto error;
  304. err = amdtp_domain_add_stream(&dg00x->domain, &dg00x->tx_stream,
  305. dg00x->tx_resources.channel, spd);
  306. if (err < 0)
  307. goto error;
  308. // NOTE: The device doesn't start packet transmission till receiving any packet.
  309. // It ignores presentation time expressed by the value of syt field of CIP header
  310. // in received packets. The sequence of the number of data blocks per packet is
  311. // important for media clock recovery.
  312. err = amdtp_domain_start(&dg00x->domain, 0, true, true);
  313. if (err < 0)
  314. goto error;
  315. if (!amdtp_domain_wait_ready(&dg00x->domain, READY_TIMEOUT_MS)) {
  316. err = -ETIMEDOUT;
  317. goto error;
  318. }
  319. }
  320. return 0;
  321. error:
  322. amdtp_domain_stop(&dg00x->domain);
  323. finish_session(dg00x);
  324. return err;
  325. }
  326. void snd_dg00x_stream_stop_duplex(struct snd_dg00x *dg00x)
  327. {
  328. if (dg00x->substreams_counter == 0) {
  329. amdtp_domain_stop(&dg00x->domain);
  330. finish_session(dg00x);
  331. fw_iso_resources_free(&dg00x->tx_resources);
  332. fw_iso_resources_free(&dg00x->rx_resources);
  333. }
  334. }
  335. void snd_dg00x_stream_update_duplex(struct snd_dg00x *dg00x)
  336. {
  337. fw_iso_resources_update(&dg00x->tx_resources);
  338. fw_iso_resources_update(&dg00x->rx_resources);
  339. amdtp_stream_update(&dg00x->tx_stream);
  340. amdtp_stream_update(&dg00x->rx_stream);
  341. }
  342. void snd_dg00x_stream_lock_changed(struct snd_dg00x *dg00x)
  343. {
  344. dg00x->dev_lock_changed = true;
  345. wake_up(&dg00x->hwdep_wait);
  346. }
  347. int snd_dg00x_stream_lock_try(struct snd_dg00x *dg00x)
  348. {
  349. int err;
  350. spin_lock_irq(&dg00x->lock);
  351. /* user land lock this */
  352. if (dg00x->dev_lock_count < 0) {
  353. err = -EBUSY;
  354. goto end;
  355. }
  356. /* this is the first time */
  357. if (dg00x->dev_lock_count++ == 0)
  358. snd_dg00x_stream_lock_changed(dg00x);
  359. err = 0;
  360. end:
  361. spin_unlock_irq(&dg00x->lock);
  362. return err;
  363. }
  364. void snd_dg00x_stream_lock_release(struct snd_dg00x *dg00x)
  365. {
  366. spin_lock_irq(&dg00x->lock);
  367. if (WARN_ON(dg00x->dev_lock_count <= 0))
  368. goto end;
  369. if (--dg00x->dev_lock_count == 0)
  370. snd_dg00x_stream_lock_changed(dg00x);
  371. end:
  372. spin_unlock_irq(&dg00x->lock);
  373. }