ac97_pcm.c 20 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  4. * Universal interface for Audio Codec '97
  5. *
  6. * For more details look to AC '97 component specification revision 2.2
  7. * by Intel Corporation (http://developer.intel.com) and to datasheets
  8. * for specific codecs.
  9. */
  10. #include <linux/delay.h>
  11. #include <linux/init.h>
  12. #include <linux/slab.h>
  13. #include <linux/mutex.h>
  14. #include <linux/export.h>
  15. #include <sound/core.h>
  16. #include <sound/pcm.h>
  17. #include <sound/control.h>
  18. #include <sound/ac97_codec.h>
  19. #include <sound/asoundef.h>
  20. #include "ac97_id.h"
  21. #include "ac97_local.h"
  22. /*
  23. * PCM support
  24. */
  25. static const unsigned char rate_reg_tables[2][4][9] = {
  26. {
  27. /* standard rates */
  28. {
  29. /* 3&4 front, 7&8 rear, 6&9 center/lfe */
  30. AC97_PCM_FRONT_DAC_RATE, /* slot 3 */
  31. AC97_PCM_FRONT_DAC_RATE, /* slot 4 */
  32. 0xff, /* slot 5 */
  33. AC97_PCM_LFE_DAC_RATE, /* slot 6 */
  34. AC97_PCM_SURR_DAC_RATE, /* slot 7 */
  35. AC97_PCM_SURR_DAC_RATE, /* slot 8 */
  36. AC97_PCM_LFE_DAC_RATE, /* slot 9 */
  37. 0xff, /* slot 10 */
  38. 0xff, /* slot 11 */
  39. },
  40. {
  41. /* 7&8 front, 6&9 rear, 10&11 center/lfe */
  42. 0xff, /* slot 3 */
  43. 0xff, /* slot 4 */
  44. 0xff, /* slot 5 */
  45. AC97_PCM_SURR_DAC_RATE, /* slot 6 */
  46. AC97_PCM_FRONT_DAC_RATE, /* slot 7 */
  47. AC97_PCM_FRONT_DAC_RATE, /* slot 8 */
  48. AC97_PCM_SURR_DAC_RATE, /* slot 9 */
  49. AC97_PCM_LFE_DAC_RATE, /* slot 10 */
  50. AC97_PCM_LFE_DAC_RATE, /* slot 11 */
  51. },
  52. {
  53. /* 6&9 front, 10&11 rear, 3&4 center/lfe */
  54. AC97_PCM_LFE_DAC_RATE, /* slot 3 */
  55. AC97_PCM_LFE_DAC_RATE, /* slot 4 */
  56. 0xff, /* slot 5 */
  57. AC97_PCM_FRONT_DAC_RATE, /* slot 6 */
  58. 0xff, /* slot 7 */
  59. 0xff, /* slot 8 */
  60. AC97_PCM_FRONT_DAC_RATE, /* slot 9 */
  61. AC97_PCM_SURR_DAC_RATE, /* slot 10 */
  62. AC97_PCM_SURR_DAC_RATE, /* slot 11 */
  63. },
  64. {
  65. /* 10&11 front, 3&4 rear, 7&8 center/lfe */
  66. AC97_PCM_SURR_DAC_RATE, /* slot 3 */
  67. AC97_PCM_SURR_DAC_RATE, /* slot 4 */
  68. 0xff, /* slot 5 */
  69. 0xff, /* slot 6 */
  70. AC97_PCM_LFE_DAC_RATE, /* slot 7 */
  71. AC97_PCM_LFE_DAC_RATE, /* slot 8 */
  72. 0xff, /* slot 9 */
  73. AC97_PCM_FRONT_DAC_RATE, /* slot 10 */
  74. AC97_PCM_FRONT_DAC_RATE, /* slot 11 */
  75. },
  76. },
  77. {
  78. /* double rates */
  79. {
  80. /* 3&4 front, 7&8 front (t+1) */
  81. AC97_PCM_FRONT_DAC_RATE, /* slot 3 */
  82. AC97_PCM_FRONT_DAC_RATE, /* slot 4 */
  83. 0xff, /* slot 5 */
  84. 0xff, /* slot 6 */
  85. AC97_PCM_FRONT_DAC_RATE, /* slot 7 */
  86. AC97_PCM_FRONT_DAC_RATE, /* slot 8 */
  87. 0xff, /* slot 9 */
  88. 0xff, /* slot 10 */
  89. 0xff, /* slot 11 */
  90. },
  91. {
  92. /* not specified in the specification */
  93. 0xff, /* slot 3 */
  94. 0xff, /* slot 4 */
  95. 0xff, /* slot 5 */
  96. 0xff, /* slot 6 */
  97. 0xff, /* slot 7 */
  98. 0xff, /* slot 8 */
  99. 0xff, /* slot 9 */
  100. 0xff, /* slot 10 */
  101. 0xff, /* slot 11 */
  102. },
  103. {
  104. 0xff, /* slot 3 */
  105. 0xff, /* slot 4 */
  106. 0xff, /* slot 5 */
  107. 0xff, /* slot 6 */
  108. 0xff, /* slot 7 */
  109. 0xff, /* slot 8 */
  110. 0xff, /* slot 9 */
  111. 0xff, /* slot 10 */
  112. 0xff, /* slot 11 */
  113. },
  114. {
  115. 0xff, /* slot 3 */
  116. 0xff, /* slot 4 */
  117. 0xff, /* slot 5 */
  118. 0xff, /* slot 6 */
  119. 0xff, /* slot 7 */
  120. 0xff, /* slot 8 */
  121. 0xff, /* slot 9 */
  122. 0xff, /* slot 10 */
  123. 0xff, /* slot 11 */
  124. }
  125. }};
  126. /* FIXME: more various mappings for ADC? */
  127. static const unsigned char rate_cregs[9] = {
  128. AC97_PCM_LR_ADC_RATE, /* 3 */
  129. AC97_PCM_LR_ADC_RATE, /* 4 */
  130. 0xff, /* 5 */
  131. AC97_PCM_MIC_ADC_RATE, /* 6 */
  132. 0xff, /* 7 */
  133. 0xff, /* 8 */
  134. 0xff, /* 9 */
  135. 0xff, /* 10 */
  136. 0xff, /* 11 */
  137. };
  138. static unsigned char get_slot_reg(struct ac97_pcm *pcm, unsigned short cidx,
  139. unsigned short slot, int dbl)
  140. {
  141. if (slot < 3)
  142. return 0xff;
  143. if (slot > 11)
  144. return 0xff;
  145. if (pcm->spdif)
  146. return AC97_SPDIF; /* pseudo register */
  147. if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK)
  148. return rate_reg_tables[dbl][pcm->r[dbl].rate_table[cidx]][slot - 3];
  149. else
  150. return rate_cregs[slot - 3];
  151. }
  152. static int set_spdif_rate(struct snd_ac97 *ac97, unsigned short rate)
  153. {
  154. unsigned short old, bits, reg, mask;
  155. unsigned int sbits;
  156. if (! (ac97->ext_id & AC97_EI_SPDIF))
  157. return -ENODEV;
  158. /* TODO: double rate support */
  159. if (ac97->flags & AC97_CS_SPDIF) {
  160. switch (rate) {
  161. case 48000: bits = 0; break;
  162. case 44100: bits = 1 << AC97_SC_SPSR_SHIFT; break;
  163. default: /* invalid - disable output */
  164. snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
  165. return -EINVAL;
  166. }
  167. reg = AC97_CSR_SPDIF;
  168. mask = 1 << AC97_SC_SPSR_SHIFT;
  169. } else {
  170. if (ac97->id == AC97_ID_CM9739 && rate != 48000) {
  171. snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
  172. return -EINVAL;
  173. }
  174. switch (rate) {
  175. case 44100: bits = AC97_SC_SPSR_44K; break;
  176. case 48000: bits = AC97_SC_SPSR_48K; break;
  177. case 32000: bits = AC97_SC_SPSR_32K; break;
  178. default: /* invalid - disable output */
  179. snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
  180. return -EINVAL;
  181. }
  182. reg = AC97_SPDIF;
  183. mask = AC97_SC_SPSR_MASK;
  184. }
  185. mutex_lock(&ac97->reg_mutex);
  186. old = snd_ac97_read(ac97, reg) & mask;
  187. if (old != bits) {
  188. snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
  189. snd_ac97_update_bits_nolock(ac97, reg, mask, bits);
  190. /* update the internal spdif bits */
  191. sbits = ac97->spdif_status;
  192. if (sbits & IEC958_AES0_PROFESSIONAL) {
  193. sbits &= ~IEC958_AES0_PRO_FS;
  194. switch (rate) {
  195. case 44100: sbits |= IEC958_AES0_PRO_FS_44100; break;
  196. case 48000: sbits |= IEC958_AES0_PRO_FS_48000; break;
  197. case 32000: sbits |= IEC958_AES0_PRO_FS_32000; break;
  198. }
  199. } else {
  200. sbits &= ~(IEC958_AES3_CON_FS << 24);
  201. switch (rate) {
  202. case 44100: sbits |= IEC958_AES3_CON_FS_44100<<24; break;
  203. case 48000: sbits |= IEC958_AES3_CON_FS_48000<<24; break;
  204. case 32000: sbits |= IEC958_AES3_CON_FS_32000<<24; break;
  205. }
  206. }
  207. ac97->spdif_status = sbits;
  208. }
  209. snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, AC97_EA_SPDIF);
  210. mutex_unlock(&ac97->reg_mutex);
  211. return 0;
  212. }
  213. /**
  214. * snd_ac97_set_rate - change the rate of the given input/output.
  215. * @ac97: the ac97 instance
  216. * @reg: the register to change
  217. * @rate: the sample rate to set
  218. *
  219. * Changes the rate of the given input/output on the codec.
  220. * If the codec doesn't support VAR, the rate must be 48000 (except
  221. * for SPDIF).
  222. *
  223. * The valid registers are AC97_PCM_MIC_ADC_RATE,
  224. * AC97_PCM_FRONT_DAC_RATE, AC97_PCM_LR_ADC_RATE.
  225. * AC97_PCM_SURR_DAC_RATE and AC97_PCM_LFE_DAC_RATE are accepted
  226. * if the codec supports them.
  227. * AC97_SPDIF is accepted as a pseudo register to modify the SPDIF
  228. * status bits.
  229. *
  230. * Return: Zero if successful, or a negative error code on failure.
  231. */
  232. int snd_ac97_set_rate(struct snd_ac97 *ac97, int reg, unsigned int rate)
  233. {
  234. int dbl;
  235. unsigned int tmp;
  236. dbl = rate > 48000;
  237. if (dbl) {
  238. if (!(ac97->flags & AC97_DOUBLE_RATE))
  239. return -EINVAL;
  240. if (reg != AC97_PCM_FRONT_DAC_RATE)
  241. return -EINVAL;
  242. }
  243. snd_ac97_update_power(ac97, reg, 1);
  244. switch (reg) {
  245. case AC97_PCM_MIC_ADC_RATE:
  246. if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRM) == 0) /* MIC VRA */
  247. if (rate != 48000)
  248. return -EINVAL;
  249. break;
  250. case AC97_PCM_FRONT_DAC_RATE:
  251. case AC97_PCM_LR_ADC_RATE:
  252. if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRA) == 0) /* VRA */
  253. if (rate != 48000 && rate != 96000)
  254. return -EINVAL;
  255. break;
  256. case AC97_PCM_SURR_DAC_RATE:
  257. if (! (ac97->scaps & AC97_SCAP_SURROUND_DAC))
  258. return -EINVAL;
  259. break;
  260. case AC97_PCM_LFE_DAC_RATE:
  261. if (! (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC))
  262. return -EINVAL;
  263. break;
  264. case AC97_SPDIF:
  265. /* special case */
  266. return set_spdif_rate(ac97, rate);
  267. default:
  268. return -EINVAL;
  269. }
  270. if (dbl)
  271. rate /= 2;
  272. tmp = (rate * ac97->bus->clock) / 48000;
  273. if (tmp > 65535)
  274. return -EINVAL;
  275. if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE)
  276. snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS,
  277. AC97_EA_DRA, dbl ? AC97_EA_DRA : 0);
  278. snd_ac97_update(ac97, reg, tmp & 0xffff);
  279. snd_ac97_read(ac97, reg);
  280. if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE) {
  281. /* Intel controllers require double rate data to be put in
  282. * slots 7+8
  283. */
  284. snd_ac97_update_bits(ac97, AC97_GENERAL_PURPOSE,
  285. AC97_GP_DRSS_MASK,
  286. dbl ? AC97_GP_DRSS_78 : 0);
  287. snd_ac97_read(ac97, AC97_GENERAL_PURPOSE);
  288. }
  289. return 0;
  290. }
  291. EXPORT_SYMBOL(snd_ac97_set_rate);
  292. static unsigned short get_pslots(struct snd_ac97 *ac97, unsigned char *rate_table, unsigned short *spdif_slots)
  293. {
  294. if (!ac97_is_audio(ac97))
  295. return 0;
  296. if (ac97_is_rev22(ac97) || ac97_can_amap(ac97)) {
  297. unsigned short slots = 0;
  298. if (ac97_is_rev22(ac97)) {
  299. /* Note: it's simply emulation of AMAP behaviour */
  300. u16 es;
  301. es = ac97->regs[AC97_EXTENDED_ID] &= ~AC97_EI_DACS_SLOT_MASK;
  302. switch (ac97->addr) {
  303. case 1:
  304. case 2: es |= (1<<AC97_EI_DACS_SLOT_SHIFT); break;
  305. case 3: es |= (2<<AC97_EI_DACS_SLOT_SHIFT); break;
  306. }
  307. snd_ac97_write_cache(ac97, AC97_EXTENDED_ID, es);
  308. }
  309. switch (ac97->addr) {
  310. case 0:
  311. slots |= (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT);
  312. if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
  313. slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT);
  314. if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)
  315. slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
  316. if (ac97->ext_id & AC97_EI_SPDIF) {
  317. if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC))
  318. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT);
  319. else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC))
  320. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1);
  321. else
  322. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
  323. }
  324. *rate_table = 0;
  325. break;
  326. case 1:
  327. case 2:
  328. slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT);
  329. if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
  330. slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
  331. if (ac97->ext_id & AC97_EI_SPDIF) {
  332. if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC))
  333. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1);
  334. else
  335. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
  336. }
  337. *rate_table = 1;
  338. break;
  339. case 3:
  340. slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
  341. if (ac97->ext_id & AC97_EI_SPDIF)
  342. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
  343. *rate_table = 2;
  344. break;
  345. }
  346. return slots;
  347. } else {
  348. unsigned short slots;
  349. slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT);
  350. if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
  351. slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT);
  352. if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)
  353. slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
  354. if (ac97->ext_id & AC97_EI_SPDIF) {
  355. if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC))
  356. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT);
  357. else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC))
  358. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1);
  359. else
  360. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
  361. }
  362. *rate_table = 0;
  363. return slots;
  364. }
  365. }
  366. static unsigned short get_cslots(struct snd_ac97 *ac97)
  367. {
  368. unsigned short slots;
  369. if (!ac97_is_audio(ac97))
  370. return 0;
  371. slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT);
  372. slots |= (1<<AC97_SLOT_MIC);
  373. return slots;
  374. }
  375. static unsigned int get_rates(struct ac97_pcm *pcm, unsigned int cidx, unsigned short slots, int dbl)
  376. {
  377. int i, idx;
  378. unsigned int rates = ~0;
  379. unsigned char reg;
  380. for (i = 3; i < 12; i++) {
  381. if (!(slots & (1 << i)))
  382. continue;
  383. reg = get_slot_reg(pcm, cidx, i, dbl);
  384. switch (reg) {
  385. case AC97_PCM_FRONT_DAC_RATE: idx = AC97_RATES_FRONT_DAC; break;
  386. case AC97_PCM_SURR_DAC_RATE: idx = AC97_RATES_SURR_DAC; break;
  387. case AC97_PCM_LFE_DAC_RATE: idx = AC97_RATES_LFE_DAC; break;
  388. case AC97_PCM_LR_ADC_RATE: idx = AC97_RATES_ADC; break;
  389. case AC97_PCM_MIC_ADC_RATE: idx = AC97_RATES_MIC_ADC; break;
  390. default: idx = AC97_RATES_SPDIF; break;
  391. }
  392. rates &= pcm->r[dbl].codec[cidx]->rates[idx];
  393. }
  394. if (!dbl)
  395. rates &= ~(SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 |
  396. SNDRV_PCM_RATE_96000);
  397. return rates;
  398. }
  399. /**
  400. * snd_ac97_pcm_assign - assign AC97 slots to given PCM streams
  401. * @bus: the ac97 bus instance
  402. * @pcms_count: count of PCMs to be assigned
  403. * @pcms: PCMs to be assigned
  404. *
  405. * It assigns available AC97 slots for given PCMs. If none or only
  406. * some slots are available, pcm->xxx.slots and pcm->xxx.rslots[] members
  407. * are reduced and might be zero.
  408. *
  409. * Return: Zero if successful, or a negative error code on failure.
  410. */
  411. int snd_ac97_pcm_assign(struct snd_ac97_bus *bus,
  412. unsigned short pcms_count,
  413. const struct ac97_pcm *pcms)
  414. {
  415. int i, j, k;
  416. const struct ac97_pcm *pcm;
  417. struct ac97_pcm *rpcms, *rpcm;
  418. unsigned short avail_slots[2][4];
  419. unsigned char rate_table[2][4];
  420. unsigned short tmp, slots;
  421. unsigned short spdif_slots[4];
  422. unsigned int rates;
  423. struct snd_ac97 *codec;
  424. rpcms = kcalloc(pcms_count, sizeof(struct ac97_pcm), GFP_KERNEL);
  425. if (rpcms == NULL)
  426. return -ENOMEM;
  427. memset(avail_slots, 0, sizeof(avail_slots));
  428. memset(rate_table, 0, sizeof(rate_table));
  429. memset(spdif_slots, 0, sizeof(spdif_slots));
  430. for (i = 0; i < 4; i++) {
  431. codec = bus->codec[i];
  432. if (!codec)
  433. continue;
  434. avail_slots[0][i] = get_pslots(codec, &rate_table[0][i], &spdif_slots[i]);
  435. avail_slots[1][i] = get_cslots(codec);
  436. if (!(codec->scaps & AC97_SCAP_INDEP_SDIN)) {
  437. for (j = 0; j < i; j++) {
  438. if (bus->codec[j])
  439. avail_slots[1][i] &= ~avail_slots[1][j];
  440. }
  441. }
  442. }
  443. /* first step - exclusive devices */
  444. for (i = 0; i < pcms_count; i++) {
  445. pcm = &pcms[i];
  446. rpcm = &rpcms[i];
  447. /* low-level driver thinks that it's more clever */
  448. if (pcm->copy_flag) {
  449. *rpcm = *pcm;
  450. continue;
  451. }
  452. rpcm->stream = pcm->stream;
  453. rpcm->exclusive = pcm->exclusive;
  454. rpcm->spdif = pcm->spdif;
  455. rpcm->private_value = pcm->private_value;
  456. rpcm->bus = bus;
  457. rpcm->rates = ~0;
  458. slots = pcm->r[0].slots;
  459. for (j = 0; j < 4 && slots; j++) {
  460. if (!bus->codec[j])
  461. continue;
  462. rates = ~0;
  463. if (pcm->spdif && pcm->stream == 0)
  464. tmp = spdif_slots[j];
  465. else
  466. tmp = avail_slots[pcm->stream][j];
  467. if (pcm->exclusive) {
  468. /* exclusive access */
  469. tmp &= slots;
  470. for (k = 0; k < i; k++) {
  471. if (rpcm->stream == rpcms[k].stream)
  472. tmp &= ~rpcms[k].r[0].rslots[j];
  473. }
  474. } else {
  475. /* non-exclusive access */
  476. tmp &= pcm->r[0].slots;
  477. }
  478. if (tmp) {
  479. rpcm->r[0].rslots[j] = tmp;
  480. rpcm->r[0].codec[j] = bus->codec[j];
  481. rpcm->r[0].rate_table[j] = rate_table[pcm->stream][j];
  482. if (bus->no_vra)
  483. rates = SNDRV_PCM_RATE_48000;
  484. else
  485. rates = get_rates(rpcm, j, tmp, 0);
  486. if (pcm->exclusive)
  487. avail_slots[pcm->stream][j] &= ~tmp;
  488. }
  489. slots &= ~tmp;
  490. rpcm->r[0].slots |= tmp;
  491. rpcm->rates &= rates;
  492. }
  493. /* for double rate, we check the first codec only */
  494. if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK &&
  495. bus->codec[0] && (bus->codec[0]->flags & AC97_DOUBLE_RATE) &&
  496. rate_table[pcm->stream][0] == 0) {
  497. tmp = (1<<AC97_SLOT_PCM_LEFT) | (1<<AC97_SLOT_PCM_RIGHT) |
  498. (1<<AC97_SLOT_PCM_LEFT_0) | (1<<AC97_SLOT_PCM_RIGHT_0);
  499. if ((tmp & pcm->r[1].slots) == tmp) {
  500. rpcm->r[1].slots = tmp;
  501. rpcm->r[1].rslots[0] = tmp;
  502. rpcm->r[1].rate_table[0] = 0;
  503. rpcm->r[1].codec[0] = bus->codec[0];
  504. if (pcm->exclusive)
  505. avail_slots[pcm->stream][0] &= ~tmp;
  506. if (bus->no_vra)
  507. rates = SNDRV_PCM_RATE_96000;
  508. else
  509. rates = get_rates(rpcm, 0, tmp, 1);
  510. rpcm->rates |= rates;
  511. }
  512. }
  513. if (rpcm->rates == ~0)
  514. rpcm->rates = 0; /* not used */
  515. }
  516. bus->pcms_count = pcms_count;
  517. bus->pcms = rpcms;
  518. return 0;
  519. }
  520. EXPORT_SYMBOL(snd_ac97_pcm_assign);
  521. /**
  522. * snd_ac97_pcm_open - opens the given AC97 pcm
  523. * @pcm: the ac97 pcm instance
  524. * @rate: rate in Hz, if codec does not support VRA, this value must be 48000Hz
  525. * @cfg: output stream characteristics
  526. * @slots: a subset of allocated slots (snd_ac97_pcm_assign) for this pcm
  527. *
  528. * It locks the specified slots and sets the given rate to AC97 registers.
  529. *
  530. * Return: Zero if successful, or a negative error code on failure.
  531. */
  532. int snd_ac97_pcm_open(struct ac97_pcm *pcm, unsigned int rate,
  533. enum ac97_pcm_cfg cfg, unsigned short slots)
  534. {
  535. struct snd_ac97_bus *bus;
  536. int i, cidx, r, ok_flag;
  537. unsigned int reg_ok[4] = {0,0,0,0};
  538. unsigned char reg;
  539. int err = 0;
  540. r = rate > 48000;
  541. bus = pcm->bus;
  542. if (cfg == AC97_PCM_CFG_SPDIF) {
  543. for (cidx = 0; cidx < 4; cidx++)
  544. if (bus->codec[cidx] && (bus->codec[cidx]->ext_id & AC97_EI_SPDIF)) {
  545. err = set_spdif_rate(bus->codec[cidx], rate);
  546. if (err < 0)
  547. return err;
  548. }
  549. }
  550. spin_lock_irq(&pcm->bus->bus_lock);
  551. for (i = 3; i < 12; i++) {
  552. if (!(slots & (1 << i)))
  553. continue;
  554. ok_flag = 0;
  555. for (cidx = 0; cidx < 4; cidx++) {
  556. if (bus->used_slots[pcm->stream][cidx] & (1 << i)) {
  557. spin_unlock_irq(&pcm->bus->bus_lock);
  558. err = -EBUSY;
  559. goto error;
  560. }
  561. if (pcm->r[r].rslots[cidx] & (1 << i)) {
  562. bus->used_slots[pcm->stream][cidx] |= (1 << i);
  563. ok_flag++;
  564. }
  565. }
  566. if (!ok_flag) {
  567. spin_unlock_irq(&pcm->bus->bus_lock);
  568. dev_err(bus->card->dev,
  569. "cannot find configuration for AC97 slot %i\n",
  570. i);
  571. err = -EAGAIN;
  572. goto error;
  573. }
  574. }
  575. pcm->cur_dbl = r;
  576. spin_unlock_irq(&pcm->bus->bus_lock);
  577. for (i = 3; i < 12; i++) {
  578. if (!(slots & (1 << i)))
  579. continue;
  580. for (cidx = 0; cidx < 4; cidx++) {
  581. if (pcm->r[r].rslots[cidx] & (1 << i)) {
  582. reg = get_slot_reg(pcm, cidx, i, r);
  583. if (reg == 0xff) {
  584. dev_err(bus->card->dev,
  585. "invalid AC97 slot %i?\n", i);
  586. continue;
  587. }
  588. if (reg_ok[cidx] & (1 << (reg - AC97_PCM_FRONT_DAC_RATE)))
  589. continue;
  590. dev_dbg(bus->card->dev,
  591. "setting ac97 reg 0x%x to rate %d\n",
  592. reg, rate);
  593. err = snd_ac97_set_rate(pcm->r[r].codec[cidx], reg, rate);
  594. if (err < 0)
  595. dev_err(bus->card->dev,
  596. "error in snd_ac97_set_rate: cidx=%d, reg=0x%x, rate=%d, err=%d\n",
  597. cidx, reg, rate, err);
  598. else
  599. reg_ok[cidx] |= (1 << (reg - AC97_PCM_FRONT_DAC_RATE));
  600. }
  601. }
  602. }
  603. pcm->aslots = slots;
  604. return 0;
  605. error:
  606. pcm->aslots = slots;
  607. snd_ac97_pcm_close(pcm);
  608. return err;
  609. }
  610. EXPORT_SYMBOL(snd_ac97_pcm_open);
  611. /**
  612. * snd_ac97_pcm_close - closes the given AC97 pcm
  613. * @pcm: the ac97 pcm instance
  614. *
  615. * It frees the locked AC97 slots.
  616. *
  617. * Return: Zero.
  618. */
  619. int snd_ac97_pcm_close(struct ac97_pcm *pcm)
  620. {
  621. struct snd_ac97_bus *bus;
  622. unsigned short slots = pcm->aslots;
  623. int i, cidx;
  624. #ifdef CONFIG_SND_AC97_POWER_SAVE
  625. int r = pcm->cur_dbl;
  626. for (i = 3; i < 12; i++) {
  627. if (!(slots & (1 << i)))
  628. continue;
  629. for (cidx = 0; cidx < 4; cidx++) {
  630. if (pcm->r[r].rslots[cidx] & (1 << i)) {
  631. int reg = get_slot_reg(pcm, cidx, i, r);
  632. snd_ac97_update_power(pcm->r[r].codec[cidx],
  633. reg, 0);
  634. }
  635. }
  636. }
  637. #endif
  638. bus = pcm->bus;
  639. spin_lock_irq(&pcm->bus->bus_lock);
  640. for (i = 3; i < 12; i++) {
  641. if (!(slots & (1 << i)))
  642. continue;
  643. for (cidx = 0; cidx < 4; cidx++)
  644. bus->used_slots[pcm->stream][cidx] &= ~(1 << i);
  645. }
  646. pcm->aslots = 0;
  647. pcm->cur_dbl = 0;
  648. spin_unlock_irq(&pcm->bus->bus_lock);
  649. return 0;
  650. }
  651. EXPORT_SYMBOL(snd_ac97_pcm_close);
  652. static int double_rate_hw_constraint_rate(struct snd_pcm_hw_params *params,
  653. struct snd_pcm_hw_rule *rule)
  654. {
  655. struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
  656. if (channels->min > 2) {
  657. static const struct snd_interval single_rates = {
  658. .min = 1,
  659. .max = 48000,
  660. };
  661. struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
  662. return snd_interval_refine(rate, &single_rates);
  663. }
  664. return 0;
  665. }
  666. static int double_rate_hw_constraint_channels(struct snd_pcm_hw_params *params,
  667. struct snd_pcm_hw_rule *rule)
  668. {
  669. struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
  670. if (rate->min > 48000) {
  671. static const struct snd_interval double_rate_channels = {
  672. .min = 2,
  673. .max = 2,
  674. };
  675. struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
  676. return snd_interval_refine(channels, &double_rate_channels);
  677. }
  678. return 0;
  679. }
  680. /**
  681. * snd_ac97_pcm_double_rate_rules - set double rate constraints
  682. * @runtime: the runtime of the ac97 front playback pcm
  683. *
  684. * Installs the hardware constraint rules to prevent using double rates and
  685. * more than two channels at the same time.
  686. *
  687. * Return: Zero if successful, or a negative error code on failure.
  688. */
  689. int snd_ac97_pcm_double_rate_rules(struct snd_pcm_runtime *runtime)
  690. {
  691. int err;
  692. err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  693. double_rate_hw_constraint_rate, NULL,
  694. SNDRV_PCM_HW_PARAM_CHANNELS, -1);
  695. if (err < 0)
  696. return err;
  697. err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
  698. double_rate_hw_constraint_channels, NULL,
  699. SNDRV_PCM_HW_PARAM_RATE, -1);
  700. return err;
  701. }
  702. EXPORT_SYMBOL(snd_ac97_pcm_double_rate_rules);