via82xx.c 75 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * ALSA driver for VIA VT82xx (South Bridge)
  4. *
  5. * VT82C686A/B/C, VT8233A/C, VT8235
  6. *
  7. * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
  8. * Tjeerd.Mulder <Tjeerd.Mulder@fujitsu-siemens.com>
  9. * 2002 Takashi Iwai <tiwai@suse.de>
  10. */
  11. /*
  12. * Changes:
  13. *
  14. * Dec. 19, 2002 Takashi Iwai <tiwai@suse.de>
  15. * - use the DSX channels for the first pcm playback.
  16. * (on VIA8233, 8233C and 8235 only)
  17. * this will allow you play simultaneously up to 4 streams.
  18. * multi-channel playback is assigned to the second device
  19. * on these chips.
  20. * - support the secondary capture (on VIA8233/C,8235)
  21. * - SPDIF support
  22. * the DSX3 channel can be used for SPDIF output.
  23. * on VIA8233A, this channel is assigned to the second pcm
  24. * playback.
  25. * the card config of alsa-lib will assign the correct
  26. * device for applications.
  27. * - clean up the code, separate low-level initialization
  28. * routines for each chipset.
  29. *
  30. * Sep. 26, 2005 Karsten Wiese <annabellesgarden@yahoo.de>
  31. * - Optimize position calculation for the 823x chips.
  32. */
  33. #include <linux/io.h>
  34. #include <linux/delay.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/init.h>
  37. #include <linux/pci.h>
  38. #include <linux/slab.h>
  39. #include <linux/gameport.h>
  40. #include <linux/module.h>
  41. #include <sound/core.h>
  42. #include <sound/pcm.h>
  43. #include <sound/pcm_params.h>
  44. #include <sound/info.h>
  45. #include <sound/tlv.h>
  46. #include <sound/ac97_codec.h>
  47. #include <sound/mpu401.h>
  48. #include <sound/initval.h>
  49. #if 0
  50. #define POINTER_DEBUG
  51. #endif
  52. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  53. MODULE_DESCRIPTION("VIA VT82xx audio");
  54. MODULE_LICENSE("GPL");
  55. #if IS_REACHABLE(CONFIG_GAMEPORT)
  56. #define SUPPORT_JOYSTICK 1
  57. #endif
  58. static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
  59. static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
  60. static long mpu_port;
  61. #ifdef SUPPORT_JOYSTICK
  62. static bool joystick;
  63. #endif
  64. static int ac97_clock = 48000;
  65. static char *ac97_quirk;
  66. static int dxs_support;
  67. static int dxs_init_volume = 31;
  68. static int nodelay;
  69. module_param(index, int, 0444);
  70. MODULE_PARM_DESC(index, "Index value for VIA 82xx bridge.");
  71. module_param(id, charp, 0444);
  72. MODULE_PARM_DESC(id, "ID string for VIA 82xx bridge.");
  73. module_param_hw(mpu_port, long, ioport, 0444);
  74. MODULE_PARM_DESC(mpu_port, "MPU-401 port. (VT82C686x only)");
  75. #ifdef SUPPORT_JOYSTICK
  76. module_param(joystick, bool, 0444);
  77. MODULE_PARM_DESC(joystick, "Enable joystick. (VT82C686x only)");
  78. #endif
  79. module_param(ac97_clock, int, 0444);
  80. MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
  81. module_param(ac97_quirk, charp, 0444);
  82. MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
  83. module_param(dxs_support, int, 0444);
  84. MODULE_PARM_DESC(dxs_support, "Support for DXS channels (0 = auto, 1 = enable, 2 = disable, 3 = 48k only, 4 = no VRA, 5 = enable any sample rate)");
  85. module_param(dxs_init_volume, int, 0644);
  86. MODULE_PARM_DESC(dxs_init_volume, "initial DXS volume (0-31)");
  87. module_param(nodelay, int, 0444);
  88. MODULE_PARM_DESC(nodelay, "Disable 500ms init delay");
  89. /* just for backward compatibility */
  90. static bool enable;
  91. module_param(enable, bool, 0444);
  92. /* revision numbers for via686 */
  93. #define VIA_REV_686_A 0x10
  94. #define VIA_REV_686_B 0x11
  95. #define VIA_REV_686_C 0x12
  96. #define VIA_REV_686_D 0x13
  97. #define VIA_REV_686_E 0x14
  98. #define VIA_REV_686_H 0x20
  99. /* revision numbers for via8233 */
  100. #define VIA_REV_PRE_8233 0x10 /* not in market */
  101. #define VIA_REV_8233C 0x20 /* 2 rec, 4 pb, 1 multi-pb */
  102. #define VIA_REV_8233 0x30 /* 2 rec, 4 pb, 1 multi-pb, spdif */
  103. #define VIA_REV_8233A 0x40 /* 1 rec, 1 multi-pb, spdf */
  104. #define VIA_REV_8235 0x50 /* 2 rec, 4 pb, 1 multi-pb, spdif */
  105. #define VIA_REV_8237 0x60
  106. #define VIA_REV_8251 0x70
  107. /*
  108. * Direct registers
  109. */
  110. #define VIAREG(via, x) ((via)->port + VIA_REG_##x)
  111. #define VIADEV_REG(viadev, x) ((viadev)->port + VIA_REG_##x)
  112. /* common offsets */
  113. #define VIA_REG_OFFSET_STATUS 0x00 /* byte - channel status */
  114. #define VIA_REG_STAT_ACTIVE 0x80 /* RO */
  115. #define VIA8233_SHADOW_STAT_ACTIVE 0x08 /* RO */
  116. #define VIA_REG_STAT_PAUSED 0x40 /* RO */
  117. #define VIA_REG_STAT_TRIGGER_QUEUED 0x08 /* RO */
  118. #define VIA_REG_STAT_STOPPED 0x04 /* RWC */
  119. #define VIA_REG_STAT_EOL 0x02 /* RWC */
  120. #define VIA_REG_STAT_FLAG 0x01 /* RWC */
  121. #define VIA_REG_OFFSET_CONTROL 0x01 /* byte - channel control */
  122. #define VIA_REG_CTRL_START 0x80 /* WO */
  123. #define VIA_REG_CTRL_TERMINATE 0x40 /* WO */
  124. #define VIA_REG_CTRL_AUTOSTART 0x20
  125. #define VIA_REG_CTRL_PAUSE 0x08 /* RW */
  126. #define VIA_REG_CTRL_INT_STOP 0x04
  127. #define VIA_REG_CTRL_INT_EOL 0x02
  128. #define VIA_REG_CTRL_INT_FLAG 0x01
  129. #define VIA_REG_CTRL_RESET 0x01 /* RW - probably reset? undocumented */
  130. #define VIA_REG_CTRL_INT (VIA_REG_CTRL_INT_FLAG | VIA_REG_CTRL_INT_EOL | VIA_REG_CTRL_AUTOSTART)
  131. #define VIA_REG_OFFSET_TYPE 0x02 /* byte - channel type (686 only) */
  132. #define VIA_REG_TYPE_AUTOSTART 0x80 /* RW - autostart at EOL */
  133. #define VIA_REG_TYPE_16BIT 0x20 /* RW */
  134. #define VIA_REG_TYPE_STEREO 0x10 /* RW */
  135. #define VIA_REG_TYPE_INT_LLINE 0x00
  136. #define VIA_REG_TYPE_INT_LSAMPLE 0x04
  137. #define VIA_REG_TYPE_INT_LESSONE 0x08
  138. #define VIA_REG_TYPE_INT_MASK 0x0c
  139. #define VIA_REG_TYPE_INT_EOL 0x02
  140. #define VIA_REG_TYPE_INT_FLAG 0x01
  141. #define VIA_REG_OFFSET_TABLE_PTR 0x04 /* dword - channel table pointer */
  142. #define VIA_REG_OFFSET_CURR_PTR 0x04 /* dword - channel current pointer */
  143. #define VIA_REG_OFFSET_STOP_IDX 0x08 /* dword - stop index, channel type, sample rate */
  144. #define VIA8233_REG_TYPE_16BIT 0x00200000 /* RW */
  145. #define VIA8233_REG_TYPE_STEREO 0x00100000 /* RW */
  146. #define VIA_REG_OFFSET_CURR_COUNT 0x0c /* dword - channel current count (24 bit) */
  147. #define VIA_REG_OFFSET_CURR_INDEX 0x0f /* byte - channel current index (for via8233 only) */
  148. #define DEFINE_VIA_REGSET(name,val) \
  149. enum {\
  150. VIA_REG_##name##_STATUS = (val),\
  151. VIA_REG_##name##_CONTROL = (val) + 0x01,\
  152. VIA_REG_##name##_TYPE = (val) + 0x02,\
  153. VIA_REG_##name##_TABLE_PTR = (val) + 0x04,\
  154. VIA_REG_##name##_CURR_PTR = (val) + 0x04,\
  155. VIA_REG_##name##_STOP_IDX = (val) + 0x08,\
  156. VIA_REG_##name##_CURR_COUNT = (val) + 0x0c,\
  157. }
  158. /* playback block */
  159. DEFINE_VIA_REGSET(PLAYBACK, 0x00);
  160. DEFINE_VIA_REGSET(CAPTURE, 0x10);
  161. DEFINE_VIA_REGSET(FM, 0x20);
  162. /* AC'97 */
  163. #define VIA_REG_AC97 0x80 /* dword */
  164. #define VIA_REG_AC97_CODEC_ID_MASK (3<<30)
  165. #define VIA_REG_AC97_CODEC_ID_SHIFT 30
  166. #define VIA_REG_AC97_CODEC_ID_PRIMARY 0x00
  167. #define VIA_REG_AC97_CODEC_ID_SECONDARY 0x01
  168. #define VIA_REG_AC97_SECONDARY_VALID (1<<27)
  169. #define VIA_REG_AC97_PRIMARY_VALID (1<<25)
  170. #define VIA_REG_AC97_BUSY (1<<24)
  171. #define VIA_REG_AC97_READ (1<<23)
  172. #define VIA_REG_AC97_CMD_SHIFT 16
  173. #define VIA_REG_AC97_CMD_MASK 0x7e
  174. #define VIA_REG_AC97_DATA_SHIFT 0
  175. #define VIA_REG_AC97_DATA_MASK 0xffff
  176. #define VIA_REG_SGD_SHADOW 0x84 /* dword */
  177. /* via686 */
  178. #define VIA_REG_SGD_STAT_PB_FLAG (1<<0)
  179. #define VIA_REG_SGD_STAT_CP_FLAG (1<<1)
  180. #define VIA_REG_SGD_STAT_FM_FLAG (1<<2)
  181. #define VIA_REG_SGD_STAT_PB_EOL (1<<4)
  182. #define VIA_REG_SGD_STAT_CP_EOL (1<<5)
  183. #define VIA_REG_SGD_STAT_FM_EOL (1<<6)
  184. #define VIA_REG_SGD_STAT_PB_STOP (1<<8)
  185. #define VIA_REG_SGD_STAT_CP_STOP (1<<9)
  186. #define VIA_REG_SGD_STAT_FM_STOP (1<<10)
  187. #define VIA_REG_SGD_STAT_PB_ACTIVE (1<<12)
  188. #define VIA_REG_SGD_STAT_CP_ACTIVE (1<<13)
  189. #define VIA_REG_SGD_STAT_FM_ACTIVE (1<<14)
  190. /* via8233 */
  191. #define VIA8233_REG_SGD_STAT_FLAG (1<<0)
  192. #define VIA8233_REG_SGD_STAT_EOL (1<<1)
  193. #define VIA8233_REG_SGD_STAT_STOP (1<<2)
  194. #define VIA8233_REG_SGD_STAT_ACTIVE (1<<3)
  195. #define VIA8233_INTR_MASK(chan) ((VIA8233_REG_SGD_STAT_FLAG|VIA8233_REG_SGD_STAT_EOL) << ((chan) * 4))
  196. #define VIA8233_REG_SGD_CHAN_SDX 0
  197. #define VIA8233_REG_SGD_CHAN_MULTI 4
  198. #define VIA8233_REG_SGD_CHAN_REC 6
  199. #define VIA8233_REG_SGD_CHAN_REC1 7
  200. #define VIA_REG_GPI_STATUS 0x88
  201. #define VIA_REG_GPI_INTR 0x8c
  202. /* multi-channel and capture registers for via8233 */
  203. DEFINE_VIA_REGSET(MULTPLAY, 0x40);
  204. DEFINE_VIA_REGSET(CAPTURE_8233, 0x60);
  205. /* via8233-specific registers */
  206. #define VIA_REG_OFS_PLAYBACK_VOLUME_L 0x02 /* byte */
  207. #define VIA_REG_OFS_PLAYBACK_VOLUME_R 0x03 /* byte */
  208. #define VIA_REG_OFS_MULTPLAY_FORMAT 0x02 /* byte - format and channels */
  209. #define VIA_REG_MULTPLAY_FMT_8BIT 0x00
  210. #define VIA_REG_MULTPLAY_FMT_16BIT 0x80
  211. #define VIA_REG_MULTPLAY_FMT_CH_MASK 0x70 /* # channels << 4 (valid = 1,2,4,6) */
  212. #define VIA_REG_OFS_CAPTURE_FIFO 0x02 /* byte - bit 6 = fifo enable */
  213. #define VIA_REG_CAPTURE_FIFO_ENABLE 0x40
  214. #define VIA_DXS_MAX_VOLUME 31 /* max. volume (attenuation) of reg 0x32/33 */
  215. #define VIA_REG_CAPTURE_CHANNEL 0x63 /* byte - input select */
  216. #define VIA_REG_CAPTURE_CHANNEL_MIC 0x4
  217. #define VIA_REG_CAPTURE_CHANNEL_LINE 0
  218. #define VIA_REG_CAPTURE_SELECT_CODEC 0x03 /* recording source codec (0 = primary) */
  219. #define VIA_TBL_BIT_FLAG 0x40000000
  220. #define VIA_TBL_BIT_EOL 0x80000000
  221. /* pci space */
  222. #define VIA_ACLINK_STAT 0x40
  223. #define VIA_ACLINK_C11_READY 0x20
  224. #define VIA_ACLINK_C10_READY 0x10
  225. #define VIA_ACLINK_C01_READY 0x04 /* secondary codec ready */
  226. #define VIA_ACLINK_LOWPOWER 0x02 /* low-power state */
  227. #define VIA_ACLINK_C00_READY 0x01 /* primary codec ready */
  228. #define VIA_ACLINK_CTRL 0x41
  229. #define VIA_ACLINK_CTRL_ENABLE 0x80 /* 0: disable, 1: enable */
  230. #define VIA_ACLINK_CTRL_RESET 0x40 /* 0: assert, 1: de-assert */
  231. #define VIA_ACLINK_CTRL_SYNC 0x20 /* 0: release SYNC, 1: force SYNC hi */
  232. #define VIA_ACLINK_CTRL_SDO 0x10 /* 0: release SDO, 1: force SDO hi */
  233. #define VIA_ACLINK_CTRL_VRA 0x08 /* 0: disable VRA, 1: enable VRA */
  234. #define VIA_ACLINK_CTRL_PCM 0x04 /* 0: disable PCM, 1: enable PCM */
  235. #define VIA_ACLINK_CTRL_FM 0x02 /* via686 only */
  236. #define VIA_ACLINK_CTRL_SB 0x01 /* via686 only */
  237. #define VIA_ACLINK_CTRL_INIT (VIA_ACLINK_CTRL_ENABLE|\
  238. VIA_ACLINK_CTRL_RESET|\
  239. VIA_ACLINK_CTRL_PCM|\
  240. VIA_ACLINK_CTRL_VRA)
  241. #define VIA_FUNC_ENABLE 0x42
  242. #define VIA_FUNC_MIDI_PNP 0x80 /* FIXME: it's 0x40 in the datasheet! */
  243. #define VIA_FUNC_MIDI_IRQMASK 0x40 /* FIXME: not documented! */
  244. #define VIA_FUNC_RX2C_WRITE 0x20
  245. #define VIA_FUNC_SB_FIFO_EMPTY 0x10
  246. #define VIA_FUNC_ENABLE_GAME 0x08
  247. #define VIA_FUNC_ENABLE_FM 0x04
  248. #define VIA_FUNC_ENABLE_MIDI 0x02
  249. #define VIA_FUNC_ENABLE_SB 0x01
  250. #define VIA_PNP_CONTROL 0x43
  251. #define VIA_FM_NMI_CTRL 0x48
  252. #define VIA8233_VOLCHG_CTRL 0x48
  253. #define VIA8233_SPDIF_CTRL 0x49
  254. #define VIA8233_SPDIF_DX3 0x08
  255. #define VIA8233_SPDIF_SLOT_MASK 0x03
  256. #define VIA8233_SPDIF_SLOT_1011 0x00
  257. #define VIA8233_SPDIF_SLOT_34 0x01
  258. #define VIA8233_SPDIF_SLOT_78 0x02
  259. #define VIA8233_SPDIF_SLOT_69 0x03
  260. /*
  261. */
  262. #define VIA_DXS_AUTO 0
  263. #define VIA_DXS_ENABLE 1
  264. #define VIA_DXS_DISABLE 2
  265. #define VIA_DXS_48K 3
  266. #define VIA_DXS_NO_VRA 4
  267. #define VIA_DXS_SRC 5
  268. /*
  269. * pcm stream
  270. */
  271. struct snd_via_sg_table {
  272. unsigned int offset;
  273. unsigned int size;
  274. } ;
  275. #define VIA_TABLE_SIZE 255
  276. #define VIA_MAX_BUFSIZE (1<<24)
  277. struct viadev {
  278. unsigned int reg_offset;
  279. unsigned long port;
  280. int direction; /* playback = 0, capture = 1 */
  281. struct snd_pcm_substream *substream;
  282. int running;
  283. unsigned int tbl_entries; /* # descriptors */
  284. struct snd_dma_buffer table;
  285. struct snd_via_sg_table *idx_table;
  286. /* for recovery from the unexpected pointer */
  287. unsigned int lastpos;
  288. unsigned int fragsize;
  289. unsigned int bufsize;
  290. unsigned int bufsize2;
  291. int hwptr_done; /* processed frame position in the buffer */
  292. int in_interrupt;
  293. int shadow_shift;
  294. };
  295. enum { TYPE_CARD_VIA686 = 1, TYPE_CARD_VIA8233 };
  296. enum { TYPE_VIA686, TYPE_VIA8233, TYPE_VIA8233A };
  297. #define VIA_MAX_DEVS 7 /* 4 playback, 1 multi, 2 capture */
  298. struct via_rate_lock {
  299. spinlock_t lock;
  300. int rate;
  301. int used;
  302. };
  303. struct via82xx {
  304. int irq;
  305. unsigned long port;
  306. struct resource *mpu_res;
  307. int chip_type;
  308. unsigned char revision;
  309. unsigned char old_legacy;
  310. unsigned char old_legacy_cfg;
  311. unsigned char legacy_saved;
  312. unsigned char legacy_cfg_saved;
  313. unsigned char spdif_ctrl_saved;
  314. unsigned char capture_src_saved[2];
  315. unsigned int mpu_port_saved;
  316. unsigned char playback_volume[4][2]; /* for VIA8233/C/8235; default = 0 */
  317. unsigned char playback_volume_c[2]; /* for VIA8233/C/8235; default = 0 */
  318. unsigned int intr_mask; /* SGD_SHADOW mask to check interrupts */
  319. struct pci_dev *pci;
  320. struct snd_card *card;
  321. unsigned int num_devs;
  322. unsigned int playback_devno, multi_devno, capture_devno;
  323. struct viadev devs[VIA_MAX_DEVS];
  324. struct via_rate_lock rates[2]; /* playback and capture */
  325. unsigned int dxs_fixed: 1; /* DXS channel accepts only 48kHz */
  326. unsigned int no_vra: 1; /* no need to set VRA on DXS channels */
  327. unsigned int dxs_src: 1; /* use full SRC capabilities of DXS */
  328. unsigned int spdif_on: 1; /* only spdif rates work to external DACs */
  329. struct snd_pcm *pcms[2];
  330. struct snd_rawmidi *rmidi;
  331. struct snd_kcontrol *dxs_controls[4];
  332. struct snd_ac97_bus *ac97_bus;
  333. struct snd_ac97 *ac97;
  334. unsigned int ac97_clock;
  335. unsigned int ac97_secondary; /* secondary AC'97 codec is present */
  336. spinlock_t reg_lock;
  337. struct snd_info_entry *proc_entry;
  338. #ifdef SUPPORT_JOYSTICK
  339. struct gameport *gameport;
  340. #endif
  341. };
  342. static const struct pci_device_id snd_via82xx_ids[] = {
  343. /* 0x1106, 0x3058 */
  344. { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C686_5), TYPE_CARD_VIA686, }, /* 686A */
  345. /* 0x1106, 0x3059 */
  346. { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_8233_5), TYPE_CARD_VIA8233, }, /* VT8233 */
  347. { 0, }
  348. };
  349. MODULE_DEVICE_TABLE(pci, snd_via82xx_ids);
  350. /*
  351. */
  352. /*
  353. * allocate and initialize the descriptor buffers
  354. * periods = number of periods
  355. * fragsize = period size in bytes
  356. */
  357. static int build_via_table(struct viadev *dev, struct snd_pcm_substream *substream,
  358. struct pci_dev *pci,
  359. unsigned int periods, unsigned int fragsize)
  360. {
  361. unsigned int i, idx, ofs, rest;
  362. struct via82xx *chip = snd_pcm_substream_chip(substream);
  363. __le32 *pgtbl;
  364. if (dev->table.area == NULL) {
  365. /* the start of each lists must be aligned to 8 bytes,
  366. * but the kernel pages are much bigger, so we don't care
  367. */
  368. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
  369. PAGE_ALIGN(VIA_TABLE_SIZE * 2 * 8),
  370. &dev->table) < 0)
  371. return -ENOMEM;
  372. }
  373. if (! dev->idx_table) {
  374. dev->idx_table = kmalloc_array(VIA_TABLE_SIZE,
  375. sizeof(*dev->idx_table),
  376. GFP_KERNEL);
  377. if (! dev->idx_table)
  378. return -ENOMEM;
  379. }
  380. /* fill the entries */
  381. idx = 0;
  382. ofs = 0;
  383. pgtbl = (__le32 *)dev->table.area;
  384. for (i = 0; i < periods; i++) {
  385. rest = fragsize;
  386. /* fill descriptors for a period.
  387. * a period can be split to several descriptors if it's
  388. * over page boundary.
  389. */
  390. do {
  391. unsigned int r;
  392. unsigned int flag;
  393. unsigned int addr;
  394. if (idx >= VIA_TABLE_SIZE) {
  395. dev_err(&pci->dev, "too much table size!\n");
  396. return -EINVAL;
  397. }
  398. addr = snd_pcm_sgbuf_get_addr(substream, ofs);
  399. pgtbl[idx << 1] = cpu_to_le32(addr);
  400. r = snd_pcm_sgbuf_get_chunk_size(substream, ofs, rest);
  401. rest -= r;
  402. if (! rest) {
  403. if (i == periods - 1)
  404. flag = VIA_TBL_BIT_EOL; /* buffer boundary */
  405. else
  406. flag = VIA_TBL_BIT_FLAG; /* period boundary */
  407. } else
  408. flag = 0; /* period continues to the next */
  409. /*
  410. dev_dbg(&pci->dev,
  411. "tbl %d: at %d size %d (rest %d)\n",
  412. idx, ofs, r, rest);
  413. */
  414. pgtbl[(idx<<1) + 1] = cpu_to_le32(r | flag);
  415. dev->idx_table[idx].offset = ofs;
  416. dev->idx_table[idx].size = r;
  417. ofs += r;
  418. idx++;
  419. } while (rest > 0);
  420. }
  421. dev->tbl_entries = idx;
  422. dev->bufsize = periods * fragsize;
  423. dev->bufsize2 = dev->bufsize / 2;
  424. dev->fragsize = fragsize;
  425. return 0;
  426. }
  427. static int clean_via_table(struct viadev *dev, struct snd_pcm_substream *substream,
  428. struct pci_dev *pci)
  429. {
  430. if (dev->table.area) {
  431. snd_dma_free_pages(&dev->table);
  432. dev->table.area = NULL;
  433. }
  434. kfree(dev->idx_table);
  435. dev->idx_table = NULL;
  436. return 0;
  437. }
  438. /*
  439. * Basic I/O
  440. */
  441. static inline unsigned int snd_via82xx_codec_xread(struct via82xx *chip)
  442. {
  443. return inl(VIAREG(chip, AC97));
  444. }
  445. static inline void snd_via82xx_codec_xwrite(struct via82xx *chip, unsigned int val)
  446. {
  447. outl(val, VIAREG(chip, AC97));
  448. }
  449. static int snd_via82xx_codec_ready(struct via82xx *chip, int secondary)
  450. {
  451. unsigned int timeout = 1000; /* 1ms */
  452. unsigned int val;
  453. while (timeout-- > 0) {
  454. udelay(1);
  455. val = snd_via82xx_codec_xread(chip);
  456. if (!(val & VIA_REG_AC97_BUSY))
  457. return val & 0xffff;
  458. }
  459. dev_err(chip->card->dev, "codec_ready: codec %i is not ready [0x%x]\n",
  460. secondary, snd_via82xx_codec_xread(chip));
  461. return -EIO;
  462. }
  463. static int snd_via82xx_codec_valid(struct via82xx *chip, int secondary)
  464. {
  465. unsigned int timeout = 1000; /* 1ms */
  466. unsigned int val, val1;
  467. unsigned int stat = !secondary ? VIA_REG_AC97_PRIMARY_VALID :
  468. VIA_REG_AC97_SECONDARY_VALID;
  469. while (timeout-- > 0) {
  470. val = snd_via82xx_codec_xread(chip);
  471. val1 = val & (VIA_REG_AC97_BUSY | stat);
  472. if (val1 == stat)
  473. return val & 0xffff;
  474. udelay(1);
  475. }
  476. return -EIO;
  477. }
  478. static void snd_via82xx_codec_wait(struct snd_ac97 *ac97)
  479. {
  480. struct via82xx *chip = ac97->private_data;
  481. __always_unused int err;
  482. err = snd_via82xx_codec_ready(chip, ac97->num);
  483. /* here we need to wait fairly for long time.. */
  484. if (!nodelay)
  485. msleep(500);
  486. }
  487. static void snd_via82xx_codec_write(struct snd_ac97 *ac97,
  488. unsigned short reg,
  489. unsigned short val)
  490. {
  491. struct via82xx *chip = ac97->private_data;
  492. unsigned int xval;
  493. xval = !ac97->num ? VIA_REG_AC97_CODEC_ID_PRIMARY : VIA_REG_AC97_CODEC_ID_SECONDARY;
  494. xval <<= VIA_REG_AC97_CODEC_ID_SHIFT;
  495. xval |= reg << VIA_REG_AC97_CMD_SHIFT;
  496. xval |= val << VIA_REG_AC97_DATA_SHIFT;
  497. snd_via82xx_codec_xwrite(chip, xval);
  498. snd_via82xx_codec_ready(chip, ac97->num);
  499. }
  500. static unsigned short snd_via82xx_codec_read(struct snd_ac97 *ac97, unsigned short reg)
  501. {
  502. struct via82xx *chip = ac97->private_data;
  503. unsigned int xval, val = 0xffff;
  504. int again = 0;
  505. xval = ac97->num << VIA_REG_AC97_CODEC_ID_SHIFT;
  506. xval |= ac97->num ? VIA_REG_AC97_SECONDARY_VALID : VIA_REG_AC97_PRIMARY_VALID;
  507. xval |= VIA_REG_AC97_READ;
  508. xval |= (reg & 0x7f) << VIA_REG_AC97_CMD_SHIFT;
  509. while (1) {
  510. if (again++ > 3) {
  511. dev_err(chip->card->dev,
  512. "codec_read: codec %i is not valid [0x%x]\n",
  513. ac97->num, snd_via82xx_codec_xread(chip));
  514. return 0xffff;
  515. }
  516. snd_via82xx_codec_xwrite(chip, xval);
  517. udelay (20);
  518. if (snd_via82xx_codec_valid(chip, ac97->num) >= 0) {
  519. udelay(25);
  520. val = snd_via82xx_codec_xread(chip);
  521. break;
  522. }
  523. }
  524. return val & 0xffff;
  525. }
  526. static void snd_via82xx_channel_reset(struct via82xx *chip, struct viadev *viadev)
  527. {
  528. outb(VIA_REG_CTRL_PAUSE | VIA_REG_CTRL_TERMINATE | VIA_REG_CTRL_RESET,
  529. VIADEV_REG(viadev, OFFSET_CONTROL));
  530. inb(VIADEV_REG(viadev, OFFSET_CONTROL));
  531. udelay(50);
  532. /* disable interrupts */
  533. outb(0x00, VIADEV_REG(viadev, OFFSET_CONTROL));
  534. /* clear interrupts */
  535. outb(0x03, VIADEV_REG(viadev, OFFSET_STATUS));
  536. outb(0x00, VIADEV_REG(viadev, OFFSET_TYPE)); /* for via686 */
  537. // outl(0, VIADEV_REG(viadev, OFFSET_CURR_PTR));
  538. viadev->lastpos = 0;
  539. viadev->hwptr_done = 0;
  540. }
  541. /*
  542. * Interrupt handler
  543. * Used for 686 and 8233A
  544. */
  545. static irqreturn_t snd_via686_interrupt(int irq, void *dev_id)
  546. {
  547. struct via82xx *chip = dev_id;
  548. unsigned int status;
  549. unsigned int i;
  550. status = inl(VIAREG(chip, SGD_SHADOW));
  551. if (! (status & chip->intr_mask)) {
  552. if (chip->rmidi)
  553. /* check mpu401 interrupt */
  554. return snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
  555. return IRQ_NONE;
  556. }
  557. /* check status for each stream */
  558. spin_lock(&chip->reg_lock);
  559. for (i = 0; i < chip->num_devs; i++) {
  560. struct viadev *viadev = &chip->devs[i];
  561. unsigned char c_status = inb(VIADEV_REG(viadev, OFFSET_STATUS));
  562. if (! (c_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG|VIA_REG_STAT_STOPPED)))
  563. continue;
  564. if (viadev->substream && viadev->running) {
  565. /*
  566. * Update hwptr_done based on 'period elapsed'
  567. * interrupts. We'll use it, when the chip returns 0
  568. * for OFFSET_CURR_COUNT.
  569. */
  570. if (c_status & VIA_REG_STAT_EOL)
  571. viadev->hwptr_done = 0;
  572. else
  573. viadev->hwptr_done += viadev->fragsize;
  574. viadev->in_interrupt = c_status;
  575. spin_unlock(&chip->reg_lock);
  576. snd_pcm_period_elapsed(viadev->substream);
  577. spin_lock(&chip->reg_lock);
  578. viadev->in_interrupt = 0;
  579. }
  580. outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */
  581. }
  582. spin_unlock(&chip->reg_lock);
  583. return IRQ_HANDLED;
  584. }
  585. /*
  586. * Interrupt handler
  587. */
  588. static irqreturn_t snd_via8233_interrupt(int irq, void *dev_id)
  589. {
  590. struct via82xx *chip = dev_id;
  591. unsigned int status;
  592. unsigned int i;
  593. int irqreturn = 0;
  594. /* check status for each stream */
  595. spin_lock(&chip->reg_lock);
  596. status = inl(VIAREG(chip, SGD_SHADOW));
  597. for (i = 0; i < chip->num_devs; i++) {
  598. struct viadev *viadev = &chip->devs[i];
  599. struct snd_pcm_substream *substream;
  600. unsigned char c_status, shadow_status;
  601. shadow_status = (status >> viadev->shadow_shift) &
  602. (VIA8233_SHADOW_STAT_ACTIVE|VIA_REG_STAT_EOL|
  603. VIA_REG_STAT_FLAG);
  604. c_status = shadow_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG);
  605. if (!c_status)
  606. continue;
  607. substream = viadev->substream;
  608. if (substream && viadev->running) {
  609. /*
  610. * Update hwptr_done based on 'period elapsed'
  611. * interrupts. We'll use it, when the chip returns 0
  612. * for OFFSET_CURR_COUNT.
  613. */
  614. if (c_status & VIA_REG_STAT_EOL)
  615. viadev->hwptr_done = 0;
  616. else
  617. viadev->hwptr_done += viadev->fragsize;
  618. viadev->in_interrupt = c_status;
  619. if (shadow_status & VIA8233_SHADOW_STAT_ACTIVE)
  620. viadev->in_interrupt |= VIA_REG_STAT_ACTIVE;
  621. spin_unlock(&chip->reg_lock);
  622. snd_pcm_period_elapsed(substream);
  623. spin_lock(&chip->reg_lock);
  624. viadev->in_interrupt = 0;
  625. }
  626. outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */
  627. irqreturn = 1;
  628. }
  629. spin_unlock(&chip->reg_lock);
  630. return IRQ_RETVAL(irqreturn);
  631. }
  632. /*
  633. * PCM callbacks
  634. */
  635. /*
  636. * trigger callback
  637. */
  638. static int snd_via82xx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  639. {
  640. struct via82xx *chip = snd_pcm_substream_chip(substream);
  641. struct viadev *viadev = substream->runtime->private_data;
  642. unsigned char val;
  643. if (chip->chip_type != TYPE_VIA686)
  644. val = VIA_REG_CTRL_INT;
  645. else
  646. val = 0;
  647. switch (cmd) {
  648. case SNDRV_PCM_TRIGGER_START:
  649. case SNDRV_PCM_TRIGGER_RESUME:
  650. val |= VIA_REG_CTRL_START;
  651. viadev->running = 1;
  652. break;
  653. case SNDRV_PCM_TRIGGER_STOP:
  654. case SNDRV_PCM_TRIGGER_SUSPEND:
  655. val = VIA_REG_CTRL_TERMINATE;
  656. viadev->running = 0;
  657. break;
  658. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  659. val |= VIA_REG_CTRL_PAUSE;
  660. viadev->running = 0;
  661. break;
  662. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  663. viadev->running = 1;
  664. break;
  665. default:
  666. return -EINVAL;
  667. }
  668. outb(val, VIADEV_REG(viadev, OFFSET_CONTROL));
  669. if (cmd == SNDRV_PCM_TRIGGER_STOP)
  670. snd_via82xx_channel_reset(chip, viadev);
  671. return 0;
  672. }
  673. /*
  674. * pointer callbacks
  675. */
  676. /*
  677. * calculate the linear position at the given sg-buffer index and the rest count
  678. */
  679. #define check_invalid_pos(viadev,pos) \
  680. ((pos) < viadev->lastpos && ((pos) >= viadev->bufsize2 ||\
  681. viadev->lastpos < viadev->bufsize2))
  682. static inline unsigned int calc_linear_pos(struct via82xx *chip,
  683. struct viadev *viadev,
  684. unsigned int idx,
  685. unsigned int count)
  686. {
  687. unsigned int size, base, res;
  688. size = viadev->idx_table[idx].size;
  689. base = viadev->idx_table[idx].offset;
  690. res = base + size - count;
  691. if (res >= viadev->bufsize)
  692. res -= viadev->bufsize;
  693. /* check the validity of the calculated position */
  694. if (size < count) {
  695. dev_dbg(chip->card->dev,
  696. "invalid via82xx_cur_ptr (size = %d, count = %d)\n",
  697. (int)size, (int)count);
  698. res = viadev->lastpos;
  699. } else {
  700. if (! count) {
  701. /* Some mobos report count = 0 on the DMA boundary,
  702. * i.e. count = size indeed.
  703. * Let's check whether this step is above the expected size.
  704. */
  705. int delta = res - viadev->lastpos;
  706. if (delta < 0)
  707. delta += viadev->bufsize;
  708. if ((unsigned int)delta > viadev->fragsize)
  709. res = base;
  710. }
  711. if (check_invalid_pos(viadev, res)) {
  712. #ifdef POINTER_DEBUG
  713. dev_dbg(chip->card->dev,
  714. "fail: idx = %i/%i, lastpos = 0x%x, bufsize2 = 0x%x, offsize = 0x%x, size = 0x%x, count = 0x%x\n",
  715. idx, viadev->tbl_entries,
  716. viadev->lastpos, viadev->bufsize2,
  717. viadev->idx_table[idx].offset,
  718. viadev->idx_table[idx].size, count);
  719. #endif
  720. /* count register returns full size when end of buffer is reached */
  721. res = base + size;
  722. if (check_invalid_pos(viadev, res)) {
  723. dev_dbg(chip->card->dev,
  724. "invalid via82xx_cur_ptr (2), using last valid pointer\n");
  725. res = viadev->lastpos;
  726. }
  727. }
  728. }
  729. return res;
  730. }
  731. /*
  732. * get the current pointer on via686
  733. */
  734. static snd_pcm_uframes_t snd_via686_pcm_pointer(struct snd_pcm_substream *substream)
  735. {
  736. struct via82xx *chip = snd_pcm_substream_chip(substream);
  737. struct viadev *viadev = substream->runtime->private_data;
  738. unsigned int idx, ptr, count, res;
  739. if (snd_BUG_ON(!viadev->tbl_entries))
  740. return 0;
  741. if (!(inb(VIADEV_REG(viadev, OFFSET_STATUS)) & VIA_REG_STAT_ACTIVE))
  742. return 0;
  743. spin_lock(&chip->reg_lock);
  744. count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT)) & 0xffffff;
  745. /* The via686a does not have the current index register,
  746. * so we need to calculate the index from CURR_PTR.
  747. */
  748. ptr = inl(VIADEV_REG(viadev, OFFSET_CURR_PTR));
  749. if (ptr <= (unsigned int)viadev->table.addr)
  750. idx = 0;
  751. else /* CURR_PTR holds the address + 8 */
  752. idx = ((ptr - (unsigned int)viadev->table.addr) / 8 - 1) % viadev->tbl_entries;
  753. res = calc_linear_pos(chip, viadev, idx, count);
  754. viadev->lastpos = res; /* remember the last position */
  755. spin_unlock(&chip->reg_lock);
  756. return bytes_to_frames(substream->runtime, res);
  757. }
  758. /*
  759. * get the current pointer on via823x
  760. */
  761. static snd_pcm_uframes_t snd_via8233_pcm_pointer(struct snd_pcm_substream *substream)
  762. {
  763. struct via82xx *chip = snd_pcm_substream_chip(substream);
  764. struct viadev *viadev = substream->runtime->private_data;
  765. unsigned int idx, count, res;
  766. int status;
  767. if (snd_BUG_ON(!viadev->tbl_entries))
  768. return 0;
  769. spin_lock(&chip->reg_lock);
  770. count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT));
  771. status = viadev->in_interrupt;
  772. if (!status)
  773. status = inb(VIADEV_REG(viadev, OFFSET_STATUS));
  774. /* An apparent bug in the 8251 is worked around by sending a
  775. * REG_CTRL_START. */
  776. if (chip->revision == VIA_REV_8251 && (status & VIA_REG_STAT_EOL))
  777. snd_via82xx_pcm_trigger(substream, SNDRV_PCM_TRIGGER_START);
  778. if (!(status & VIA_REG_STAT_ACTIVE)) {
  779. res = 0;
  780. goto unlock;
  781. }
  782. if (count & 0xffffff) {
  783. idx = count >> 24;
  784. if (idx >= viadev->tbl_entries) {
  785. #ifdef POINTER_DEBUG
  786. dev_dbg(chip->card->dev,
  787. "fail: invalid idx = %i/%i\n", idx,
  788. viadev->tbl_entries);
  789. #endif
  790. res = viadev->lastpos;
  791. } else {
  792. count &= 0xffffff;
  793. res = calc_linear_pos(chip, viadev, idx, count);
  794. }
  795. } else {
  796. res = viadev->hwptr_done;
  797. if (!viadev->in_interrupt) {
  798. if (status & VIA_REG_STAT_EOL) {
  799. res = 0;
  800. } else
  801. if (status & VIA_REG_STAT_FLAG) {
  802. res += viadev->fragsize;
  803. }
  804. }
  805. }
  806. unlock:
  807. viadev->lastpos = res;
  808. spin_unlock(&chip->reg_lock);
  809. return bytes_to_frames(substream->runtime, res);
  810. }
  811. /*
  812. * hw_params callback:
  813. * allocate the buffer and build up the buffer description table
  814. */
  815. static int snd_via82xx_hw_params(struct snd_pcm_substream *substream,
  816. struct snd_pcm_hw_params *hw_params)
  817. {
  818. struct via82xx *chip = snd_pcm_substream_chip(substream);
  819. struct viadev *viadev = substream->runtime->private_data;
  820. return build_via_table(viadev, substream, chip->pci,
  821. params_periods(hw_params),
  822. params_period_bytes(hw_params));
  823. }
  824. /*
  825. * hw_free callback:
  826. * clean up the buffer description table and release the buffer
  827. */
  828. static int snd_via82xx_hw_free(struct snd_pcm_substream *substream)
  829. {
  830. struct via82xx *chip = snd_pcm_substream_chip(substream);
  831. struct viadev *viadev = substream->runtime->private_data;
  832. clean_via_table(viadev, substream, chip->pci);
  833. return 0;
  834. }
  835. /*
  836. * set up the table pointer
  837. */
  838. static void snd_via82xx_set_table_ptr(struct via82xx *chip, struct viadev *viadev)
  839. {
  840. snd_via82xx_codec_ready(chip, 0);
  841. outl((u32)viadev->table.addr, VIADEV_REG(viadev, OFFSET_TABLE_PTR));
  842. udelay(20);
  843. snd_via82xx_codec_ready(chip, 0);
  844. }
  845. /*
  846. * prepare callback for playback and capture on via686
  847. */
  848. static void via686_setup_format(struct via82xx *chip, struct viadev *viadev,
  849. struct snd_pcm_runtime *runtime)
  850. {
  851. snd_via82xx_channel_reset(chip, viadev);
  852. /* this must be set after channel_reset */
  853. snd_via82xx_set_table_ptr(chip, viadev);
  854. outb(VIA_REG_TYPE_AUTOSTART |
  855. (runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA_REG_TYPE_16BIT : 0) |
  856. (runtime->channels > 1 ? VIA_REG_TYPE_STEREO : 0) |
  857. ((viadev->reg_offset & 0x10) == 0 ? VIA_REG_TYPE_INT_LSAMPLE : 0) |
  858. VIA_REG_TYPE_INT_EOL |
  859. VIA_REG_TYPE_INT_FLAG, VIADEV_REG(viadev, OFFSET_TYPE));
  860. }
  861. static int snd_via686_playback_prepare(struct snd_pcm_substream *substream)
  862. {
  863. struct via82xx *chip = snd_pcm_substream_chip(substream);
  864. struct viadev *viadev = substream->runtime->private_data;
  865. struct snd_pcm_runtime *runtime = substream->runtime;
  866. snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
  867. snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
  868. via686_setup_format(chip, viadev, runtime);
  869. return 0;
  870. }
  871. static int snd_via686_capture_prepare(struct snd_pcm_substream *substream)
  872. {
  873. struct via82xx *chip = snd_pcm_substream_chip(substream);
  874. struct viadev *viadev = substream->runtime->private_data;
  875. struct snd_pcm_runtime *runtime = substream->runtime;
  876. snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
  877. via686_setup_format(chip, viadev, runtime);
  878. return 0;
  879. }
  880. /*
  881. * lock the current rate
  882. */
  883. static int via_lock_rate(struct via_rate_lock *rec, int rate)
  884. {
  885. int changed = 0;
  886. spin_lock_irq(&rec->lock);
  887. if (rec->rate != rate) {
  888. if (rec->rate && rec->used > 1) /* already set */
  889. changed = -EINVAL;
  890. else {
  891. rec->rate = rate;
  892. changed = 1;
  893. }
  894. }
  895. spin_unlock_irq(&rec->lock);
  896. return changed;
  897. }
  898. /*
  899. * prepare callback for DSX playback on via823x
  900. */
  901. static int snd_via8233_playback_prepare(struct snd_pcm_substream *substream)
  902. {
  903. struct via82xx *chip = snd_pcm_substream_chip(substream);
  904. struct viadev *viadev = substream->runtime->private_data;
  905. struct snd_pcm_runtime *runtime = substream->runtime;
  906. int ac97_rate = chip->dxs_src ? 48000 : runtime->rate;
  907. int rate_changed;
  908. u32 rbits;
  909. rate_changed = via_lock_rate(&chip->rates[0], ac97_rate);
  910. if (rate_changed < 0)
  911. return rate_changed;
  912. if (rate_changed)
  913. snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE,
  914. chip->no_vra ? 48000 : runtime->rate);
  915. if (chip->spdif_on && viadev->reg_offset == 0x30)
  916. snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
  917. if (runtime->rate == 48000)
  918. rbits = 0xfffff;
  919. else
  920. rbits = (0x100000 / 48000) * runtime->rate +
  921. ((0x100000 % 48000) * runtime->rate) / 48000;
  922. snd_BUG_ON(rbits & ~0xfffff);
  923. snd_via82xx_channel_reset(chip, viadev);
  924. snd_via82xx_set_table_ptr(chip, viadev);
  925. outb(chip->playback_volume[viadev->reg_offset / 0x10][0],
  926. VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_L));
  927. outb(chip->playback_volume[viadev->reg_offset / 0x10][1],
  928. VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_R));
  929. outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) | /* format */
  930. (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) | /* stereo */
  931. rbits | /* rate */
  932. 0xff000000, /* STOP index is never reached */
  933. VIADEV_REG(viadev, OFFSET_STOP_IDX));
  934. udelay(20);
  935. snd_via82xx_codec_ready(chip, 0);
  936. return 0;
  937. }
  938. /*
  939. * prepare callback for multi-channel playback on via823x
  940. */
  941. static int snd_via8233_multi_prepare(struct snd_pcm_substream *substream)
  942. {
  943. struct via82xx *chip = snd_pcm_substream_chip(substream);
  944. struct viadev *viadev = substream->runtime->private_data;
  945. struct snd_pcm_runtime *runtime = substream->runtime;
  946. unsigned int slots;
  947. int fmt;
  948. if (via_lock_rate(&chip->rates[0], runtime->rate) < 0)
  949. return -EINVAL;
  950. snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
  951. snd_ac97_set_rate(chip->ac97, AC97_PCM_SURR_DAC_RATE, runtime->rate);
  952. snd_ac97_set_rate(chip->ac97, AC97_PCM_LFE_DAC_RATE, runtime->rate);
  953. snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
  954. snd_via82xx_channel_reset(chip, viadev);
  955. snd_via82xx_set_table_ptr(chip, viadev);
  956. fmt = (runtime->format == SNDRV_PCM_FORMAT_S16_LE) ?
  957. VIA_REG_MULTPLAY_FMT_16BIT : VIA_REG_MULTPLAY_FMT_8BIT;
  958. fmt |= runtime->channels << 4;
  959. outb(fmt, VIADEV_REG(viadev, OFS_MULTPLAY_FORMAT));
  960. #if 0
  961. if (chip->revision == VIA_REV_8233A)
  962. slots = 0;
  963. else
  964. #endif
  965. {
  966. /* set sample number to slot 3, 4, 7, 8, 6, 9 (for VIA8233/C,8235) */
  967. /* corresponding to FL, FR, RL, RR, C, LFE ?? */
  968. switch (runtime->channels) {
  969. case 1: slots = (1<<0) | (1<<4); break;
  970. case 2: slots = (1<<0) | (2<<4); break;
  971. case 3: slots = (1<<0) | (2<<4) | (5<<8); break;
  972. case 4: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12); break;
  973. case 5: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16); break;
  974. case 6: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16) | (6<<20); break;
  975. default: slots = 0; break;
  976. }
  977. }
  978. /* STOP index is never reached */
  979. outl(0xff000000 | slots, VIADEV_REG(viadev, OFFSET_STOP_IDX));
  980. udelay(20);
  981. snd_via82xx_codec_ready(chip, 0);
  982. return 0;
  983. }
  984. /*
  985. * prepare callback for capture on via823x
  986. */
  987. static int snd_via8233_capture_prepare(struct snd_pcm_substream *substream)
  988. {
  989. struct via82xx *chip = snd_pcm_substream_chip(substream);
  990. struct viadev *viadev = substream->runtime->private_data;
  991. struct snd_pcm_runtime *runtime = substream->runtime;
  992. if (via_lock_rate(&chip->rates[1], runtime->rate) < 0)
  993. return -EINVAL;
  994. snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
  995. snd_via82xx_channel_reset(chip, viadev);
  996. snd_via82xx_set_table_ptr(chip, viadev);
  997. outb(VIA_REG_CAPTURE_FIFO_ENABLE, VIADEV_REG(viadev, OFS_CAPTURE_FIFO));
  998. outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) |
  999. (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) |
  1000. 0xff000000, /* STOP index is never reached */
  1001. VIADEV_REG(viadev, OFFSET_STOP_IDX));
  1002. udelay(20);
  1003. snd_via82xx_codec_ready(chip, 0);
  1004. return 0;
  1005. }
  1006. /*
  1007. * pcm hardware definition, identical for both playback and capture
  1008. */
  1009. static const struct snd_pcm_hardware snd_via82xx_hw =
  1010. {
  1011. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  1012. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  1013. SNDRV_PCM_INFO_MMAP_VALID |
  1014. /* SNDRV_PCM_INFO_RESUME | */
  1015. SNDRV_PCM_INFO_PAUSE),
  1016. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  1017. .rates = SNDRV_PCM_RATE_48000,
  1018. .rate_min = 48000,
  1019. .rate_max = 48000,
  1020. .channels_min = 1,
  1021. .channels_max = 2,
  1022. .buffer_bytes_max = VIA_MAX_BUFSIZE,
  1023. .period_bytes_min = 32,
  1024. .period_bytes_max = VIA_MAX_BUFSIZE / 2,
  1025. .periods_min = 2,
  1026. .periods_max = VIA_TABLE_SIZE / 2,
  1027. .fifo_size = 0,
  1028. };
  1029. /*
  1030. * open callback skeleton
  1031. */
  1032. static int snd_via82xx_pcm_open(struct via82xx *chip, struct viadev *viadev,
  1033. struct snd_pcm_substream *substream)
  1034. {
  1035. struct snd_pcm_runtime *runtime = substream->runtime;
  1036. int err;
  1037. struct via_rate_lock *ratep;
  1038. bool use_src = false;
  1039. runtime->hw = snd_via82xx_hw;
  1040. /* set the hw rate condition */
  1041. ratep = &chip->rates[viadev->direction];
  1042. spin_lock_irq(&ratep->lock);
  1043. ratep->used++;
  1044. if (chip->spdif_on && viadev->reg_offset == 0x30) {
  1045. /* DXS#3 and spdif is on */
  1046. runtime->hw.rates = chip->ac97->rates[AC97_RATES_SPDIF];
  1047. snd_pcm_limit_hw_rates(runtime);
  1048. } else if (chip->dxs_fixed && viadev->reg_offset < 0x40) {
  1049. /* fixed DXS playback rate */
  1050. runtime->hw.rates = SNDRV_PCM_RATE_48000;
  1051. runtime->hw.rate_min = runtime->hw.rate_max = 48000;
  1052. } else if (chip->dxs_src && viadev->reg_offset < 0x40) {
  1053. /* use full SRC capabilities of DXS */
  1054. runtime->hw.rates = (SNDRV_PCM_RATE_CONTINUOUS |
  1055. SNDRV_PCM_RATE_8000_48000);
  1056. runtime->hw.rate_min = 8000;
  1057. runtime->hw.rate_max = 48000;
  1058. use_src = true;
  1059. } else if (! ratep->rate) {
  1060. int idx = viadev->direction ? AC97_RATES_ADC : AC97_RATES_FRONT_DAC;
  1061. runtime->hw.rates = chip->ac97->rates[idx];
  1062. snd_pcm_limit_hw_rates(runtime);
  1063. } else {
  1064. /* a fixed rate */
  1065. runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
  1066. runtime->hw.rate_max = runtime->hw.rate_min = ratep->rate;
  1067. }
  1068. spin_unlock_irq(&ratep->lock);
  1069. /* we may remove following constaint when we modify table entries
  1070. in interrupt */
  1071. err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
  1072. if (err < 0)
  1073. return err;
  1074. if (use_src) {
  1075. err = snd_pcm_hw_rule_noresample(runtime, 48000);
  1076. if (err < 0)
  1077. return err;
  1078. }
  1079. runtime->private_data = viadev;
  1080. viadev->substream = substream;
  1081. return 0;
  1082. }
  1083. /*
  1084. * open callback for playback on via686
  1085. */
  1086. static int snd_via686_playback_open(struct snd_pcm_substream *substream)
  1087. {
  1088. struct via82xx *chip = snd_pcm_substream_chip(substream);
  1089. struct viadev *viadev = &chip->devs[chip->playback_devno + substream->number];
  1090. int err;
  1091. err = snd_via82xx_pcm_open(chip, viadev, substream);
  1092. if (err < 0)
  1093. return err;
  1094. return 0;
  1095. }
  1096. /*
  1097. * open callback for playback on via823x DXS
  1098. */
  1099. static int snd_via8233_playback_open(struct snd_pcm_substream *substream)
  1100. {
  1101. struct via82xx *chip = snd_pcm_substream_chip(substream);
  1102. struct viadev *viadev;
  1103. unsigned int stream;
  1104. int err;
  1105. viadev = &chip->devs[chip->playback_devno + substream->number];
  1106. err = snd_via82xx_pcm_open(chip, viadev, substream);
  1107. if (err < 0)
  1108. return err;
  1109. stream = viadev->reg_offset / 0x10;
  1110. if (chip->dxs_controls[stream]) {
  1111. chip->playback_volume[stream][0] =
  1112. VIA_DXS_MAX_VOLUME - (dxs_init_volume & 31);
  1113. chip->playback_volume[stream][1] =
  1114. VIA_DXS_MAX_VOLUME - (dxs_init_volume & 31);
  1115. chip->dxs_controls[stream]->vd[0].access &=
  1116. ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  1117. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
  1118. SNDRV_CTL_EVENT_MASK_INFO,
  1119. &chip->dxs_controls[stream]->id);
  1120. }
  1121. return 0;
  1122. }
  1123. /*
  1124. * open callback for playback on via823x multi-channel
  1125. */
  1126. static int snd_via8233_multi_open(struct snd_pcm_substream *substream)
  1127. {
  1128. struct via82xx *chip = snd_pcm_substream_chip(substream);
  1129. struct viadev *viadev = &chip->devs[chip->multi_devno];
  1130. int err;
  1131. /* channels constraint for VIA8233A
  1132. * 3 and 5 channels are not supported
  1133. */
  1134. static const unsigned int channels[] = {
  1135. 1, 2, 4, 6
  1136. };
  1137. static const struct snd_pcm_hw_constraint_list hw_constraints_channels = {
  1138. .count = ARRAY_SIZE(channels),
  1139. .list = channels,
  1140. .mask = 0,
  1141. };
  1142. err = snd_via82xx_pcm_open(chip, viadev, substream);
  1143. if (err < 0)
  1144. return err;
  1145. substream->runtime->hw.channels_max = 6;
  1146. if (chip->revision == VIA_REV_8233A)
  1147. snd_pcm_hw_constraint_list(substream->runtime, 0,
  1148. SNDRV_PCM_HW_PARAM_CHANNELS,
  1149. &hw_constraints_channels);
  1150. return 0;
  1151. }
  1152. /*
  1153. * open callback for capture on via686 and via823x
  1154. */
  1155. static int snd_via82xx_capture_open(struct snd_pcm_substream *substream)
  1156. {
  1157. struct via82xx *chip = snd_pcm_substream_chip(substream);
  1158. struct viadev *viadev = &chip->devs[chip->capture_devno + substream->pcm->device];
  1159. return snd_via82xx_pcm_open(chip, viadev, substream);
  1160. }
  1161. /*
  1162. * close callback
  1163. */
  1164. static int snd_via82xx_pcm_close(struct snd_pcm_substream *substream)
  1165. {
  1166. struct via82xx *chip = snd_pcm_substream_chip(substream);
  1167. struct viadev *viadev = substream->runtime->private_data;
  1168. struct via_rate_lock *ratep;
  1169. /* release the rate lock */
  1170. ratep = &chip->rates[viadev->direction];
  1171. spin_lock_irq(&ratep->lock);
  1172. ratep->used--;
  1173. if (! ratep->used)
  1174. ratep->rate = 0;
  1175. spin_unlock_irq(&ratep->lock);
  1176. if (! ratep->rate) {
  1177. if (! viadev->direction) {
  1178. snd_ac97_update_power(chip->ac97,
  1179. AC97_PCM_FRONT_DAC_RATE, 0);
  1180. snd_ac97_update_power(chip->ac97,
  1181. AC97_PCM_SURR_DAC_RATE, 0);
  1182. snd_ac97_update_power(chip->ac97,
  1183. AC97_PCM_LFE_DAC_RATE, 0);
  1184. } else
  1185. snd_ac97_update_power(chip->ac97,
  1186. AC97_PCM_LR_ADC_RATE, 0);
  1187. }
  1188. viadev->substream = NULL;
  1189. return 0;
  1190. }
  1191. static int snd_via8233_playback_close(struct snd_pcm_substream *substream)
  1192. {
  1193. struct via82xx *chip = snd_pcm_substream_chip(substream);
  1194. struct viadev *viadev = substream->runtime->private_data;
  1195. unsigned int stream;
  1196. stream = viadev->reg_offset / 0x10;
  1197. if (chip->dxs_controls[stream]) {
  1198. chip->dxs_controls[stream]->vd[0].access |=
  1199. SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  1200. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO,
  1201. &chip->dxs_controls[stream]->id);
  1202. }
  1203. return snd_via82xx_pcm_close(substream);
  1204. }
  1205. /* via686 playback callbacks */
  1206. static const struct snd_pcm_ops snd_via686_playback_ops = {
  1207. .open = snd_via686_playback_open,
  1208. .close = snd_via82xx_pcm_close,
  1209. .hw_params = snd_via82xx_hw_params,
  1210. .hw_free = snd_via82xx_hw_free,
  1211. .prepare = snd_via686_playback_prepare,
  1212. .trigger = snd_via82xx_pcm_trigger,
  1213. .pointer = snd_via686_pcm_pointer,
  1214. };
  1215. /* via686 capture callbacks */
  1216. static const struct snd_pcm_ops snd_via686_capture_ops = {
  1217. .open = snd_via82xx_capture_open,
  1218. .close = snd_via82xx_pcm_close,
  1219. .hw_params = snd_via82xx_hw_params,
  1220. .hw_free = snd_via82xx_hw_free,
  1221. .prepare = snd_via686_capture_prepare,
  1222. .trigger = snd_via82xx_pcm_trigger,
  1223. .pointer = snd_via686_pcm_pointer,
  1224. };
  1225. /* via823x DSX playback callbacks */
  1226. static const struct snd_pcm_ops snd_via8233_playback_ops = {
  1227. .open = snd_via8233_playback_open,
  1228. .close = snd_via8233_playback_close,
  1229. .hw_params = snd_via82xx_hw_params,
  1230. .hw_free = snd_via82xx_hw_free,
  1231. .prepare = snd_via8233_playback_prepare,
  1232. .trigger = snd_via82xx_pcm_trigger,
  1233. .pointer = snd_via8233_pcm_pointer,
  1234. };
  1235. /* via823x multi-channel playback callbacks */
  1236. static const struct snd_pcm_ops snd_via8233_multi_ops = {
  1237. .open = snd_via8233_multi_open,
  1238. .close = snd_via82xx_pcm_close,
  1239. .hw_params = snd_via82xx_hw_params,
  1240. .hw_free = snd_via82xx_hw_free,
  1241. .prepare = snd_via8233_multi_prepare,
  1242. .trigger = snd_via82xx_pcm_trigger,
  1243. .pointer = snd_via8233_pcm_pointer,
  1244. };
  1245. /* via823x capture callbacks */
  1246. static const struct snd_pcm_ops snd_via8233_capture_ops = {
  1247. .open = snd_via82xx_capture_open,
  1248. .close = snd_via82xx_pcm_close,
  1249. .hw_params = snd_via82xx_hw_params,
  1250. .hw_free = snd_via82xx_hw_free,
  1251. .prepare = snd_via8233_capture_prepare,
  1252. .trigger = snd_via82xx_pcm_trigger,
  1253. .pointer = snd_via8233_pcm_pointer,
  1254. };
  1255. static void init_viadev(struct via82xx *chip, int idx, unsigned int reg_offset,
  1256. int shadow_pos, int direction)
  1257. {
  1258. chip->devs[idx].reg_offset = reg_offset;
  1259. chip->devs[idx].shadow_shift = shadow_pos * 4;
  1260. chip->devs[idx].direction = direction;
  1261. chip->devs[idx].port = chip->port + reg_offset;
  1262. }
  1263. /*
  1264. * create pcm instances for VIA8233, 8233C and 8235 (not 8233A)
  1265. */
  1266. static int snd_via8233_pcm_new(struct via82xx *chip)
  1267. {
  1268. struct snd_pcm *pcm;
  1269. struct snd_pcm_chmap *chmap;
  1270. int i, err;
  1271. chip->playback_devno = 0; /* x 4 */
  1272. chip->multi_devno = 4; /* x 1 */
  1273. chip->capture_devno = 5; /* x 2 */
  1274. chip->num_devs = 7;
  1275. chip->intr_mask = 0x33033333; /* FLAG|EOL for rec0-1, mc, sdx0-3 */
  1276. /* PCM #0: 4 DSX playbacks and 1 capture */
  1277. err = snd_pcm_new(chip->card, chip->card->shortname, 0, 4, 1, &pcm);
  1278. if (err < 0)
  1279. return err;
  1280. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops);
  1281. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
  1282. pcm->private_data = chip;
  1283. strcpy(pcm->name, chip->card->shortname);
  1284. chip->pcms[0] = pcm;
  1285. /* set up playbacks */
  1286. for (i = 0; i < 4; i++)
  1287. init_viadev(chip, i, 0x10 * i, i, 0);
  1288. /* capture */
  1289. init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1);
  1290. snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
  1291. &chip->pci->dev,
  1292. 64*1024, VIA_MAX_BUFSIZE);
  1293. err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1294. snd_pcm_std_chmaps, 2, 0,
  1295. &chmap);
  1296. if (err < 0)
  1297. return err;
  1298. /* PCM #1: multi-channel playback and 2nd capture */
  1299. err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 1, &pcm);
  1300. if (err < 0)
  1301. return err;
  1302. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops);
  1303. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
  1304. pcm->private_data = chip;
  1305. strcpy(pcm->name, chip->card->shortname);
  1306. chip->pcms[1] = pcm;
  1307. /* set up playback */
  1308. init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0);
  1309. /* set up capture */
  1310. init_viadev(chip, chip->capture_devno + 1, VIA_REG_CAPTURE_8233_STATUS + 0x10, 7, 1);
  1311. snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
  1312. &chip->pci->dev,
  1313. 64*1024, VIA_MAX_BUFSIZE);
  1314. err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1315. snd_pcm_alt_chmaps, 6, 0,
  1316. &chmap);
  1317. if (err < 0)
  1318. return err;
  1319. chip->ac97->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap;
  1320. return 0;
  1321. }
  1322. /*
  1323. * create pcm instances for VIA8233A
  1324. */
  1325. static int snd_via8233a_pcm_new(struct via82xx *chip)
  1326. {
  1327. struct snd_pcm *pcm;
  1328. struct snd_pcm_chmap *chmap;
  1329. int err;
  1330. chip->multi_devno = 0;
  1331. chip->playback_devno = 1;
  1332. chip->capture_devno = 2;
  1333. chip->num_devs = 3;
  1334. chip->intr_mask = 0x03033000; /* FLAG|EOL for rec0, mc, sdx3 */
  1335. /* PCM #0: multi-channel playback and capture */
  1336. err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm);
  1337. if (err < 0)
  1338. return err;
  1339. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops);
  1340. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
  1341. pcm->private_data = chip;
  1342. strcpy(pcm->name, chip->card->shortname);
  1343. chip->pcms[0] = pcm;
  1344. /* set up playback */
  1345. init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0);
  1346. /* capture */
  1347. init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1);
  1348. snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
  1349. &chip->pci->dev,
  1350. 64*1024, VIA_MAX_BUFSIZE);
  1351. err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1352. snd_pcm_alt_chmaps, 6, 0,
  1353. &chmap);
  1354. if (err < 0)
  1355. return err;
  1356. chip->ac97->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap;
  1357. /* SPDIF supported? */
  1358. if (! ac97_can_spdif(chip->ac97))
  1359. return 0;
  1360. /* PCM #1: DXS3 playback (for spdif) */
  1361. err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 0, &pcm);
  1362. if (err < 0)
  1363. return err;
  1364. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops);
  1365. pcm->private_data = chip;
  1366. strcpy(pcm->name, chip->card->shortname);
  1367. chip->pcms[1] = pcm;
  1368. /* set up playback */
  1369. init_viadev(chip, chip->playback_devno, 0x30, 3, 0);
  1370. snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
  1371. &chip->pci->dev,
  1372. 64*1024, VIA_MAX_BUFSIZE);
  1373. return 0;
  1374. }
  1375. /*
  1376. * create a pcm instance for via686a/b
  1377. */
  1378. static int snd_via686_pcm_new(struct via82xx *chip)
  1379. {
  1380. struct snd_pcm *pcm;
  1381. int err;
  1382. chip->playback_devno = 0;
  1383. chip->capture_devno = 1;
  1384. chip->num_devs = 2;
  1385. chip->intr_mask = 0x77; /* FLAG | EOL for PB, CP, FM */
  1386. err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm);
  1387. if (err < 0)
  1388. return err;
  1389. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via686_playback_ops);
  1390. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via686_capture_ops);
  1391. pcm->private_data = chip;
  1392. strcpy(pcm->name, chip->card->shortname);
  1393. chip->pcms[0] = pcm;
  1394. init_viadev(chip, 0, VIA_REG_PLAYBACK_STATUS, 0, 0);
  1395. init_viadev(chip, 1, VIA_REG_CAPTURE_STATUS, 0, 1);
  1396. snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
  1397. &chip->pci->dev,
  1398. 64*1024, VIA_MAX_BUFSIZE);
  1399. return 0;
  1400. }
  1401. /*
  1402. * Mixer part
  1403. */
  1404. static int snd_via8233_capture_source_info(struct snd_kcontrol *kcontrol,
  1405. struct snd_ctl_elem_info *uinfo)
  1406. {
  1407. /* formerly they were "Line" and "Mic", but it looks like that they
  1408. * have nothing to do with the actual physical connections...
  1409. */
  1410. static const char * const texts[2] = {
  1411. "Input1", "Input2"
  1412. };
  1413. return snd_ctl_enum_info(uinfo, 1, 2, texts);
  1414. }
  1415. static int snd_via8233_capture_source_get(struct snd_kcontrol *kcontrol,
  1416. struct snd_ctl_elem_value *ucontrol)
  1417. {
  1418. struct via82xx *chip = snd_kcontrol_chip(kcontrol);
  1419. unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL);
  1420. ucontrol->value.enumerated.item[0] = inb(port) & VIA_REG_CAPTURE_CHANNEL_MIC ? 1 : 0;
  1421. return 0;
  1422. }
  1423. static int snd_via8233_capture_source_put(struct snd_kcontrol *kcontrol,
  1424. struct snd_ctl_elem_value *ucontrol)
  1425. {
  1426. struct via82xx *chip = snd_kcontrol_chip(kcontrol);
  1427. unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL);
  1428. u8 val, oval;
  1429. spin_lock_irq(&chip->reg_lock);
  1430. oval = inb(port);
  1431. val = oval & ~VIA_REG_CAPTURE_CHANNEL_MIC;
  1432. if (ucontrol->value.enumerated.item[0])
  1433. val |= VIA_REG_CAPTURE_CHANNEL_MIC;
  1434. if (val != oval)
  1435. outb(val, port);
  1436. spin_unlock_irq(&chip->reg_lock);
  1437. return val != oval;
  1438. }
  1439. static struct snd_kcontrol_new snd_via8233_capture_source = {
  1440. .name = "Input Source Select",
  1441. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1442. .info = snd_via8233_capture_source_info,
  1443. .get = snd_via8233_capture_source_get,
  1444. .put = snd_via8233_capture_source_put,
  1445. };
  1446. #define snd_via8233_dxs3_spdif_info snd_ctl_boolean_mono_info
  1447. static int snd_via8233_dxs3_spdif_get(struct snd_kcontrol *kcontrol,
  1448. struct snd_ctl_elem_value *ucontrol)
  1449. {
  1450. struct via82xx *chip = snd_kcontrol_chip(kcontrol);
  1451. u8 val;
  1452. pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val);
  1453. ucontrol->value.integer.value[0] = (val & VIA8233_SPDIF_DX3) ? 1 : 0;
  1454. return 0;
  1455. }
  1456. static int snd_via8233_dxs3_spdif_put(struct snd_kcontrol *kcontrol,
  1457. struct snd_ctl_elem_value *ucontrol)
  1458. {
  1459. struct via82xx *chip = snd_kcontrol_chip(kcontrol);
  1460. u8 val, oval;
  1461. pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &oval);
  1462. val = oval & ~VIA8233_SPDIF_DX3;
  1463. if (ucontrol->value.integer.value[0])
  1464. val |= VIA8233_SPDIF_DX3;
  1465. /* save the spdif flag for rate filtering */
  1466. chip->spdif_on = ucontrol->value.integer.value[0] ? 1 : 0;
  1467. if (val != oval) {
  1468. pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val);
  1469. return 1;
  1470. }
  1471. return 0;
  1472. }
  1473. static const struct snd_kcontrol_new snd_via8233_dxs3_spdif_control = {
  1474. .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH),
  1475. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1476. .info = snd_via8233_dxs3_spdif_info,
  1477. .get = snd_via8233_dxs3_spdif_get,
  1478. .put = snd_via8233_dxs3_spdif_put,
  1479. };
  1480. static int snd_via8233_dxs_volume_info(struct snd_kcontrol *kcontrol,
  1481. struct snd_ctl_elem_info *uinfo)
  1482. {
  1483. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1484. uinfo->count = 2;
  1485. uinfo->value.integer.min = 0;
  1486. uinfo->value.integer.max = VIA_DXS_MAX_VOLUME;
  1487. return 0;
  1488. }
  1489. static int snd_via8233_dxs_volume_get(struct snd_kcontrol *kcontrol,
  1490. struct snd_ctl_elem_value *ucontrol)
  1491. {
  1492. struct via82xx *chip = snd_kcontrol_chip(kcontrol);
  1493. unsigned int idx = kcontrol->id.subdevice;
  1494. ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][0];
  1495. ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][1];
  1496. return 0;
  1497. }
  1498. static int snd_via8233_pcmdxs_volume_get(struct snd_kcontrol *kcontrol,
  1499. struct snd_ctl_elem_value *ucontrol)
  1500. {
  1501. struct via82xx *chip = snd_kcontrol_chip(kcontrol);
  1502. ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[0];
  1503. ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[1];
  1504. return 0;
  1505. }
  1506. static int snd_via8233_dxs_volume_put(struct snd_kcontrol *kcontrol,
  1507. struct snd_ctl_elem_value *ucontrol)
  1508. {
  1509. struct via82xx *chip = snd_kcontrol_chip(kcontrol);
  1510. unsigned int idx = kcontrol->id.subdevice;
  1511. unsigned long port = chip->port + 0x10 * idx;
  1512. unsigned char val;
  1513. int i, change = 0;
  1514. for (i = 0; i < 2; i++) {
  1515. val = ucontrol->value.integer.value[i];
  1516. if (val > VIA_DXS_MAX_VOLUME)
  1517. val = VIA_DXS_MAX_VOLUME;
  1518. val = VIA_DXS_MAX_VOLUME - val;
  1519. change |= val != chip->playback_volume[idx][i];
  1520. if (change) {
  1521. chip->playback_volume[idx][i] = val;
  1522. outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
  1523. }
  1524. }
  1525. return change;
  1526. }
  1527. static int snd_via8233_pcmdxs_volume_put(struct snd_kcontrol *kcontrol,
  1528. struct snd_ctl_elem_value *ucontrol)
  1529. {
  1530. struct via82xx *chip = snd_kcontrol_chip(kcontrol);
  1531. unsigned int idx;
  1532. unsigned char val;
  1533. int i, change = 0;
  1534. for (i = 0; i < 2; i++) {
  1535. val = ucontrol->value.integer.value[i];
  1536. if (val > VIA_DXS_MAX_VOLUME)
  1537. val = VIA_DXS_MAX_VOLUME;
  1538. val = VIA_DXS_MAX_VOLUME - val;
  1539. if (val != chip->playback_volume_c[i]) {
  1540. change = 1;
  1541. chip->playback_volume_c[i] = val;
  1542. for (idx = 0; idx < 4; idx++) {
  1543. unsigned long port = chip->port + 0x10 * idx;
  1544. chip->playback_volume[idx][i] = val;
  1545. outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
  1546. }
  1547. }
  1548. }
  1549. return change;
  1550. }
  1551. static const DECLARE_TLV_DB_SCALE(db_scale_dxs, -4650, 150, 1);
  1552. static const struct snd_kcontrol_new snd_via8233_pcmdxs_volume_control = {
  1553. .name = "PCM Playback Volume",
  1554. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1555. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1556. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1557. .info = snd_via8233_dxs_volume_info,
  1558. .get = snd_via8233_pcmdxs_volume_get,
  1559. .put = snd_via8233_pcmdxs_volume_put,
  1560. .tlv = { .p = db_scale_dxs }
  1561. };
  1562. static const struct snd_kcontrol_new snd_via8233_dxs_volume_control = {
  1563. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1564. .device = 0,
  1565. /* .subdevice set later */
  1566. .name = "PCM Playback Volume",
  1567. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1568. SNDRV_CTL_ELEM_ACCESS_TLV_READ |
  1569. SNDRV_CTL_ELEM_ACCESS_INACTIVE,
  1570. .info = snd_via8233_dxs_volume_info,
  1571. .get = snd_via8233_dxs_volume_get,
  1572. .put = snd_via8233_dxs_volume_put,
  1573. .tlv = { .p = db_scale_dxs }
  1574. };
  1575. /*
  1576. */
  1577. static void snd_via82xx_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
  1578. {
  1579. struct via82xx *chip = bus->private_data;
  1580. chip->ac97_bus = NULL;
  1581. }
  1582. static void snd_via82xx_mixer_free_ac97(struct snd_ac97 *ac97)
  1583. {
  1584. struct via82xx *chip = ac97->private_data;
  1585. chip->ac97 = NULL;
  1586. }
  1587. static const struct ac97_quirk ac97_quirks[] = {
  1588. {
  1589. .subvendor = 0x1106,
  1590. .subdevice = 0x4161,
  1591. .codec_id = 0x56494161, /* VT1612A */
  1592. .name = "Soltek SL-75DRV5",
  1593. .type = AC97_TUNE_NONE
  1594. },
  1595. { /* FIXME: which codec? */
  1596. .subvendor = 0x1106,
  1597. .subdevice = 0x4161,
  1598. .name = "ASRock K7VT2",
  1599. .type = AC97_TUNE_HP_ONLY
  1600. },
  1601. {
  1602. .subvendor = 0x110a,
  1603. .subdevice = 0x0079,
  1604. .name = "Fujitsu Siemens D1289",
  1605. .type = AC97_TUNE_HP_ONLY
  1606. },
  1607. {
  1608. .subvendor = 0x1019,
  1609. .subdevice = 0x0a81,
  1610. .name = "ECS K7VTA3",
  1611. .type = AC97_TUNE_HP_ONLY
  1612. },
  1613. {
  1614. .subvendor = 0x1019,
  1615. .subdevice = 0x0a85,
  1616. .name = "ECS L7VMM2",
  1617. .type = AC97_TUNE_HP_ONLY
  1618. },
  1619. {
  1620. .subvendor = 0x1019,
  1621. .subdevice = 0x1841,
  1622. .name = "ECS K7VTA3",
  1623. .type = AC97_TUNE_HP_ONLY
  1624. },
  1625. {
  1626. .subvendor = 0x1849,
  1627. .subdevice = 0x3059,
  1628. .name = "ASRock K7VM2",
  1629. .type = AC97_TUNE_HP_ONLY /* VT1616 */
  1630. },
  1631. {
  1632. .subvendor = 0x14cd,
  1633. .subdevice = 0x7002,
  1634. .name = "Unknown",
  1635. .type = AC97_TUNE_ALC_JACK
  1636. },
  1637. {
  1638. .subvendor = 0x1071,
  1639. .subdevice = 0x8590,
  1640. .name = "Mitac Mobo",
  1641. .type = AC97_TUNE_ALC_JACK
  1642. },
  1643. {
  1644. .subvendor = 0x161f,
  1645. .subdevice = 0x202b,
  1646. .name = "Arima Notebook",
  1647. .type = AC97_TUNE_HP_ONLY,
  1648. },
  1649. {
  1650. .subvendor = 0x161f,
  1651. .subdevice = 0x2032,
  1652. .name = "Targa Traveller 811",
  1653. .type = AC97_TUNE_HP_ONLY,
  1654. },
  1655. {
  1656. .subvendor = 0x161f,
  1657. .subdevice = 0x2032,
  1658. .name = "m680x",
  1659. .type = AC97_TUNE_HP_ONLY, /* http://launchpad.net/bugs/38546 */
  1660. },
  1661. {
  1662. .subvendor = 0x1297,
  1663. .subdevice = 0xa232,
  1664. .name = "Shuttle AK32VN",
  1665. .type = AC97_TUNE_HP_ONLY
  1666. },
  1667. { } /* terminator */
  1668. };
  1669. static int snd_via82xx_mixer_new(struct via82xx *chip, const char *quirk_override)
  1670. {
  1671. struct snd_ac97_template ac97;
  1672. int err;
  1673. static const struct snd_ac97_bus_ops ops = {
  1674. .write = snd_via82xx_codec_write,
  1675. .read = snd_via82xx_codec_read,
  1676. .wait = snd_via82xx_codec_wait,
  1677. };
  1678. err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
  1679. if (err < 0)
  1680. return err;
  1681. chip->ac97_bus->private_free = snd_via82xx_mixer_free_ac97_bus;
  1682. chip->ac97_bus->clock = chip->ac97_clock;
  1683. memset(&ac97, 0, sizeof(ac97));
  1684. ac97.private_data = chip;
  1685. ac97.private_free = snd_via82xx_mixer_free_ac97;
  1686. ac97.pci = chip->pci;
  1687. ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE;
  1688. err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
  1689. if (err < 0)
  1690. return err;
  1691. snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
  1692. if (chip->chip_type != TYPE_VIA686) {
  1693. /* use slot 10/11 */
  1694. snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4);
  1695. }
  1696. return 0;
  1697. }
  1698. #ifdef SUPPORT_JOYSTICK
  1699. #define JOYSTICK_ADDR 0x200
  1700. static int snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy)
  1701. {
  1702. struct gameport *gp;
  1703. if (!joystick)
  1704. return -ENODEV;
  1705. if (!devm_request_region(chip->card->dev, JOYSTICK_ADDR, 8,
  1706. "VIA686 gameport")) {
  1707. dev_warn(chip->card->dev, "cannot reserve joystick port %#x\n",
  1708. JOYSTICK_ADDR);
  1709. return -EBUSY;
  1710. }
  1711. chip->gameport = gp = gameport_allocate_port();
  1712. if (!gp) {
  1713. dev_err(chip->card->dev,
  1714. "cannot allocate memory for gameport\n");
  1715. return -ENOMEM;
  1716. }
  1717. gameport_set_name(gp, "VIA686 Gameport");
  1718. gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
  1719. gameport_set_dev_parent(gp, &chip->pci->dev);
  1720. gp->io = JOYSTICK_ADDR;
  1721. /* Enable legacy joystick port */
  1722. *legacy |= VIA_FUNC_ENABLE_GAME;
  1723. pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, *legacy);
  1724. gameport_register_port(chip->gameport);
  1725. return 0;
  1726. }
  1727. static void snd_via686_free_gameport(struct via82xx *chip)
  1728. {
  1729. if (chip->gameport) {
  1730. gameport_unregister_port(chip->gameport);
  1731. chip->gameport = NULL;
  1732. }
  1733. }
  1734. #else
  1735. static inline int snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy)
  1736. {
  1737. return -ENOSYS;
  1738. }
  1739. static inline void snd_via686_free_gameport(struct via82xx *chip) { }
  1740. #endif
  1741. /*
  1742. *
  1743. */
  1744. static int snd_via8233_init_misc(struct via82xx *chip)
  1745. {
  1746. int i, err, caps;
  1747. unsigned char val;
  1748. caps = chip->chip_type == TYPE_VIA8233A ? 1 : 2;
  1749. for (i = 0; i < caps; i++) {
  1750. snd_via8233_capture_source.index = i;
  1751. err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_capture_source, chip));
  1752. if (err < 0)
  1753. return err;
  1754. }
  1755. if (ac97_can_spdif(chip->ac97)) {
  1756. err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_dxs3_spdif_control, chip));
  1757. if (err < 0)
  1758. return err;
  1759. }
  1760. if (chip->chip_type != TYPE_VIA8233A) {
  1761. /* when no h/w PCM volume control is found, use DXS volume control
  1762. * as the PCM vol control
  1763. */
  1764. if (!snd_ctl_find_id_mixer(chip->card, "PCM Playback Volume")) {
  1765. dev_info(chip->card->dev,
  1766. "Using DXS as PCM Playback\n");
  1767. err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_pcmdxs_volume_control, chip));
  1768. if (err < 0)
  1769. return err;
  1770. }
  1771. else /* Using DXS when PCM emulation is enabled is really weird */
  1772. {
  1773. for (i = 0; i < 4; ++i) {
  1774. struct snd_kcontrol *kctl;
  1775. kctl = snd_ctl_new1(
  1776. &snd_via8233_dxs_volume_control, chip);
  1777. if (!kctl)
  1778. return -ENOMEM;
  1779. kctl->id.subdevice = i;
  1780. err = snd_ctl_add(chip->card, kctl);
  1781. if (err < 0)
  1782. return err;
  1783. chip->dxs_controls[i] = kctl;
  1784. }
  1785. }
  1786. }
  1787. /* select spdif data slot 10/11 */
  1788. pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val);
  1789. val = (val & ~VIA8233_SPDIF_SLOT_MASK) | VIA8233_SPDIF_SLOT_1011;
  1790. val &= ~VIA8233_SPDIF_DX3; /* SPDIF off as default */
  1791. pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val);
  1792. return 0;
  1793. }
  1794. static int snd_via686_init_misc(struct via82xx *chip)
  1795. {
  1796. unsigned char legacy, legacy_cfg;
  1797. int rev_h = 0;
  1798. legacy = chip->old_legacy;
  1799. legacy_cfg = chip->old_legacy_cfg;
  1800. legacy |= VIA_FUNC_MIDI_IRQMASK; /* FIXME: correct? (disable MIDI) */
  1801. legacy &= ~VIA_FUNC_ENABLE_GAME; /* disable joystick */
  1802. if (chip->revision >= VIA_REV_686_H) {
  1803. rev_h = 1;
  1804. if (mpu_port >= 0x200) { /* force MIDI */
  1805. mpu_port &= 0xfffc;
  1806. pci_write_config_dword(chip->pci, 0x18, mpu_port | 0x01);
  1807. chip->mpu_port_saved = mpu_port;
  1808. } else {
  1809. mpu_port = pci_resource_start(chip->pci, 2);
  1810. }
  1811. } else {
  1812. switch (mpu_port) { /* force MIDI */
  1813. case 0x300:
  1814. case 0x310:
  1815. case 0x320:
  1816. case 0x330:
  1817. legacy_cfg &= ~(3 << 2);
  1818. legacy_cfg |= (mpu_port & 0x0030) >> 2;
  1819. break;
  1820. default: /* no, use BIOS settings */
  1821. if (legacy & VIA_FUNC_ENABLE_MIDI)
  1822. mpu_port = 0x300 + ((legacy_cfg & 0x000c) << 2);
  1823. break;
  1824. }
  1825. }
  1826. if (mpu_port >= 0x200)
  1827. chip->mpu_res = devm_request_region(&chip->pci->dev, mpu_port,
  1828. 2, "VIA82xx MPU401");
  1829. if (chip->mpu_res) {
  1830. if (rev_h)
  1831. legacy |= VIA_FUNC_MIDI_PNP; /* enable PCI I/O 2 */
  1832. legacy |= VIA_FUNC_ENABLE_MIDI;
  1833. } else {
  1834. if (rev_h)
  1835. legacy &= ~VIA_FUNC_MIDI_PNP; /* disable PCI I/O 2 */
  1836. legacy &= ~VIA_FUNC_ENABLE_MIDI;
  1837. mpu_port = 0;
  1838. }
  1839. pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy);
  1840. pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, legacy_cfg);
  1841. if (chip->mpu_res) {
  1842. if (snd_mpu401_uart_new(chip->card, 0, MPU401_HW_VIA686A,
  1843. mpu_port, MPU401_INFO_INTEGRATED |
  1844. MPU401_INFO_IRQ_HOOK, -1,
  1845. &chip->rmidi) < 0) {
  1846. dev_warn(chip->card->dev,
  1847. "unable to initialize MPU-401 at 0x%lx, skipping\n",
  1848. mpu_port);
  1849. legacy &= ~VIA_FUNC_ENABLE_MIDI;
  1850. } else {
  1851. legacy &= ~VIA_FUNC_MIDI_IRQMASK; /* enable MIDI interrupt */
  1852. }
  1853. pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy);
  1854. }
  1855. snd_via686_create_gameport(chip, &legacy);
  1856. chip->legacy_saved = legacy;
  1857. chip->legacy_cfg_saved = legacy_cfg;
  1858. return 0;
  1859. }
  1860. /*
  1861. * proc interface
  1862. */
  1863. static void snd_via82xx_proc_read(struct snd_info_entry *entry,
  1864. struct snd_info_buffer *buffer)
  1865. {
  1866. struct via82xx *chip = entry->private_data;
  1867. int i;
  1868. snd_iprintf(buffer, "%s\n\n", chip->card->longname);
  1869. for (i = 0; i < 0xa0; i += 4) {
  1870. snd_iprintf(buffer, "%02x: %08x\n", i, inl(chip->port + i));
  1871. }
  1872. }
  1873. static void snd_via82xx_proc_init(struct via82xx *chip)
  1874. {
  1875. snd_card_ro_proc_new(chip->card, "via82xx", chip,
  1876. snd_via82xx_proc_read);
  1877. }
  1878. /*
  1879. *
  1880. */
  1881. static int snd_via82xx_chip_init(struct via82xx *chip)
  1882. {
  1883. unsigned int val;
  1884. unsigned long end_time;
  1885. unsigned char pval;
  1886. #if 0 /* broken on K7M? */
  1887. if (chip->chip_type == TYPE_VIA686)
  1888. /* disable all legacy ports */
  1889. pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, 0);
  1890. #endif
  1891. pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);
  1892. if (! (pval & VIA_ACLINK_C00_READY)) { /* codec not ready? */
  1893. /* deassert ACLink reset, force SYNC */
  1894. pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,
  1895. VIA_ACLINK_CTRL_ENABLE |
  1896. VIA_ACLINK_CTRL_RESET |
  1897. VIA_ACLINK_CTRL_SYNC);
  1898. udelay(100);
  1899. #if 1 /* FIXME: should we do full reset here for all chip models? */
  1900. pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, 0x00);
  1901. udelay(100);
  1902. #else
  1903. /* deassert ACLink reset, force SYNC (warm AC'97 reset) */
  1904. pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,
  1905. VIA_ACLINK_CTRL_RESET|VIA_ACLINK_CTRL_SYNC);
  1906. udelay(2);
  1907. #endif
  1908. /* ACLink on, deassert ACLink reset, VSR, SGD data out */
  1909. /* note - FM data out has trouble with non VRA codecs !! */
  1910. pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);
  1911. udelay(100);
  1912. }
  1913. /* Make sure VRA is enabled, in case we didn't do a
  1914. * complete codec reset, above */
  1915. pci_read_config_byte(chip->pci, VIA_ACLINK_CTRL, &pval);
  1916. if ((pval & VIA_ACLINK_CTRL_INIT) != VIA_ACLINK_CTRL_INIT) {
  1917. /* ACLink on, deassert ACLink reset, VSR, SGD data out */
  1918. /* note - FM data out has trouble with non VRA codecs !! */
  1919. pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);
  1920. udelay(100);
  1921. }
  1922. /* wait until codec ready */
  1923. end_time = jiffies + msecs_to_jiffies(750);
  1924. do {
  1925. pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);
  1926. if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */
  1927. break;
  1928. schedule_timeout_uninterruptible(1);
  1929. } while (time_before(jiffies, end_time));
  1930. val = snd_via82xx_codec_xread(chip);
  1931. if (val & VIA_REG_AC97_BUSY)
  1932. dev_err(chip->card->dev,
  1933. "AC'97 codec is not ready [0x%x]\n", val);
  1934. #if 0 /* FIXME: we don't support the second codec yet so skip the detection now.. */
  1935. snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |
  1936. VIA_REG_AC97_SECONDARY_VALID |
  1937. (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));
  1938. end_time = jiffies + msecs_to_jiffies(750);
  1939. snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |
  1940. VIA_REG_AC97_SECONDARY_VALID |
  1941. (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));
  1942. do {
  1943. val = snd_via82xx_codec_xread(chip);
  1944. if (val & VIA_REG_AC97_SECONDARY_VALID) {
  1945. chip->ac97_secondary = 1;
  1946. goto __ac97_ok2;
  1947. }
  1948. schedule_timeout_uninterruptible(1);
  1949. } while (time_before(jiffies, end_time));
  1950. /* This is ok, the most of motherboards have only one codec */
  1951. __ac97_ok2:
  1952. #endif
  1953. if (chip->chip_type == TYPE_VIA686) {
  1954. /* route FM trap to IRQ, disable FM trap */
  1955. pci_write_config_byte(chip->pci, VIA_FM_NMI_CTRL, 0);
  1956. /* disable all GPI interrupts */
  1957. outl(0, VIAREG(chip, GPI_INTR));
  1958. }
  1959. if (chip->chip_type != TYPE_VIA686) {
  1960. /* Workaround for Award BIOS bug:
  1961. * DXS channels don't work properly with VRA if MC97 is disabled.
  1962. */
  1963. struct pci_dev *pci;
  1964. pci = pci_get_device(0x1106, 0x3068, NULL); /* MC97 */
  1965. if (pci) {
  1966. unsigned char data;
  1967. pci_read_config_byte(pci, 0x44, &data);
  1968. pci_write_config_byte(pci, 0x44, data | 0x40);
  1969. pci_dev_put(pci);
  1970. }
  1971. }
  1972. if (chip->chip_type != TYPE_VIA8233A) {
  1973. int i, idx;
  1974. for (idx = 0; idx < 4; idx++) {
  1975. unsigned long port = chip->port + 0x10 * idx;
  1976. for (i = 0; i < 2; i++) {
  1977. chip->playback_volume[idx][i]=chip->playback_volume_c[i];
  1978. outb(chip->playback_volume_c[i],
  1979. port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
  1980. }
  1981. }
  1982. }
  1983. return 0;
  1984. }
  1985. /*
  1986. * power management
  1987. */
  1988. static int snd_via82xx_suspend(struct device *dev)
  1989. {
  1990. struct snd_card *card = dev_get_drvdata(dev);
  1991. struct via82xx *chip = card->private_data;
  1992. int i;
  1993. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  1994. for (i = 0; i < chip->num_devs; i++)
  1995. snd_via82xx_channel_reset(chip, &chip->devs[i]);
  1996. snd_ac97_suspend(chip->ac97);
  1997. /* save misc values */
  1998. if (chip->chip_type != TYPE_VIA686) {
  1999. pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &chip->spdif_ctrl_saved);
  2000. chip->capture_src_saved[0] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL);
  2001. chip->capture_src_saved[1] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10);
  2002. }
  2003. return 0;
  2004. }
  2005. static int snd_via82xx_resume(struct device *dev)
  2006. {
  2007. struct snd_card *card = dev_get_drvdata(dev);
  2008. struct via82xx *chip = card->private_data;
  2009. int i;
  2010. snd_via82xx_chip_init(chip);
  2011. if (chip->chip_type == TYPE_VIA686) {
  2012. if (chip->mpu_port_saved)
  2013. pci_write_config_dword(chip->pci, 0x18, chip->mpu_port_saved | 0x01);
  2014. pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->legacy_saved);
  2015. pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->legacy_cfg_saved);
  2016. } else {
  2017. pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, chip->spdif_ctrl_saved);
  2018. outb(chip->capture_src_saved[0], chip->port + VIA_REG_CAPTURE_CHANNEL);
  2019. outb(chip->capture_src_saved[1], chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10);
  2020. }
  2021. snd_ac97_resume(chip->ac97);
  2022. for (i = 0; i < chip->num_devs; i++)
  2023. snd_via82xx_channel_reset(chip, &chip->devs[i]);
  2024. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  2025. return 0;
  2026. }
  2027. static DEFINE_SIMPLE_DEV_PM_OPS(snd_via82xx_pm, snd_via82xx_suspend, snd_via82xx_resume);
  2028. static void snd_via82xx_free(struct snd_card *card)
  2029. {
  2030. struct via82xx *chip = card->private_data;
  2031. unsigned int i;
  2032. /* disable interrupts */
  2033. for (i = 0; i < chip->num_devs; i++)
  2034. snd_via82xx_channel_reset(chip, &chip->devs[i]);
  2035. if (chip->chip_type == TYPE_VIA686) {
  2036. snd_via686_free_gameport(chip);
  2037. pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->old_legacy);
  2038. pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->old_legacy_cfg);
  2039. }
  2040. }
  2041. static int snd_via82xx_create(struct snd_card *card,
  2042. struct pci_dev *pci,
  2043. int chip_type,
  2044. int revision,
  2045. unsigned int ac97_clock)
  2046. {
  2047. struct via82xx *chip = card->private_data;
  2048. int err;
  2049. err = pcim_enable_device(pci);
  2050. if (err < 0)
  2051. return err;
  2052. chip->chip_type = chip_type;
  2053. chip->revision = revision;
  2054. spin_lock_init(&chip->reg_lock);
  2055. spin_lock_init(&chip->rates[0].lock);
  2056. spin_lock_init(&chip->rates[1].lock);
  2057. chip->card = card;
  2058. chip->pci = pci;
  2059. chip->irq = -1;
  2060. pci_read_config_byte(pci, VIA_FUNC_ENABLE, &chip->old_legacy);
  2061. pci_read_config_byte(pci, VIA_PNP_CONTROL, &chip->old_legacy_cfg);
  2062. pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE,
  2063. chip->old_legacy & ~(VIA_FUNC_ENABLE_SB|VIA_FUNC_ENABLE_FM));
  2064. err = pci_request_regions(pci, card->driver);
  2065. if (err < 0)
  2066. return err;
  2067. chip->port = pci_resource_start(pci, 0);
  2068. if (devm_request_irq(&pci->dev, pci->irq,
  2069. chip_type == TYPE_VIA8233 ?
  2070. snd_via8233_interrupt : snd_via686_interrupt,
  2071. IRQF_SHARED,
  2072. KBUILD_MODNAME, chip)) {
  2073. dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
  2074. return -EBUSY;
  2075. }
  2076. chip->irq = pci->irq;
  2077. card->sync_irq = chip->irq;
  2078. card->private_free = snd_via82xx_free;
  2079. if (ac97_clock >= 8000 && ac97_clock <= 48000)
  2080. chip->ac97_clock = ac97_clock;
  2081. err = snd_via82xx_chip_init(chip);
  2082. if (err < 0)
  2083. return err;
  2084. /* The 8233 ac97 controller does not implement the master bit
  2085. * in the pci command register. IMHO this is a violation of the PCI spec.
  2086. * We call pci_set_master here because it does not hurt. */
  2087. pci_set_master(pci);
  2088. return 0;
  2089. }
  2090. struct via823x_info {
  2091. int revision;
  2092. char *name;
  2093. int type;
  2094. };
  2095. static const struct via823x_info via823x_cards[] = {
  2096. { VIA_REV_PRE_8233, "VIA 8233-Pre", TYPE_VIA8233 },
  2097. { VIA_REV_8233C, "VIA 8233C", TYPE_VIA8233 },
  2098. { VIA_REV_8233, "VIA 8233", TYPE_VIA8233 },
  2099. { VIA_REV_8233A, "VIA 8233A", TYPE_VIA8233A },
  2100. { VIA_REV_8235, "VIA 8235", TYPE_VIA8233 },
  2101. { VIA_REV_8237, "VIA 8237", TYPE_VIA8233 },
  2102. { VIA_REV_8251, "VIA 8251", TYPE_VIA8233 },
  2103. };
  2104. /*
  2105. * auto detection of DXS channel supports.
  2106. */
  2107. static const struct snd_pci_quirk dxs_allowlist[] = {
  2108. SND_PCI_QUIRK(0x1005, 0x4710, "Avance Logic Mobo", VIA_DXS_ENABLE),
  2109. SND_PCI_QUIRK(0x1019, 0x0996, "ESC Mobo", VIA_DXS_48K),
  2110. SND_PCI_QUIRK(0x1019, 0x0a81, "ECS K7VTA3 v8.0", VIA_DXS_NO_VRA),
  2111. SND_PCI_QUIRK(0x1019, 0x0a85, "ECS L7VMM2", VIA_DXS_NO_VRA),
  2112. SND_PCI_QUIRK_VENDOR(0x1019, "ESC K8", VIA_DXS_SRC),
  2113. SND_PCI_QUIRK(0x1019, 0xaa01, "ESC K8T890-A", VIA_DXS_SRC),
  2114. SND_PCI_QUIRK(0x1025, 0x0033, "Acer Inspire 1353LM", VIA_DXS_NO_VRA),
  2115. SND_PCI_QUIRK(0x1025, 0x0046, "Acer Aspire 1524 WLMi", VIA_DXS_SRC),
  2116. SND_PCI_QUIRK_VENDOR(0x1043, "ASUS A7/A8", VIA_DXS_NO_VRA),
  2117. SND_PCI_QUIRK_VENDOR(0x1071, "Diverse Notebook", VIA_DXS_NO_VRA),
  2118. SND_PCI_QUIRK(0x10cf, 0x118e, "FSC Laptop", VIA_DXS_ENABLE),
  2119. SND_PCI_QUIRK_VENDOR(0x1106, "ASRock", VIA_DXS_SRC),
  2120. SND_PCI_QUIRK(0x1297, 0xa231, "Shuttle AK31v2", VIA_DXS_SRC),
  2121. SND_PCI_QUIRK(0x1297, 0xa232, "Shuttle", VIA_DXS_SRC),
  2122. SND_PCI_QUIRK(0x1297, 0xc160, "Shuttle Sk41G", VIA_DXS_SRC),
  2123. SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte GA-7VAXP", VIA_DXS_ENABLE),
  2124. SND_PCI_QUIRK(0x1462, 0x3800, "MSI KT266", VIA_DXS_ENABLE),
  2125. SND_PCI_QUIRK(0x1462, 0x7120, "MSI KT4V", VIA_DXS_ENABLE),
  2126. SND_PCI_QUIRK(0x1462, 0x7142, "MSI K8MM-V", VIA_DXS_ENABLE),
  2127. SND_PCI_QUIRK_VENDOR(0x1462, "MSI Mobo", VIA_DXS_SRC),
  2128. SND_PCI_QUIRK(0x147b, 0x1401, "ABIT KD7(-RAID)", VIA_DXS_ENABLE),
  2129. SND_PCI_QUIRK(0x147b, 0x1411, "ABIT VA-20", VIA_DXS_ENABLE),
  2130. SND_PCI_QUIRK(0x147b, 0x1413, "ABIT KV8 Pro", VIA_DXS_ENABLE),
  2131. SND_PCI_QUIRK(0x147b, 0x1415, "ABIT AV8", VIA_DXS_NO_VRA),
  2132. SND_PCI_QUIRK(0x14ff, 0x0403, "Twinhead mobo", VIA_DXS_ENABLE),
  2133. SND_PCI_QUIRK(0x14ff, 0x0408, "Twinhead laptop", VIA_DXS_SRC),
  2134. SND_PCI_QUIRK(0x1558, 0x4701, "Clevo D470", VIA_DXS_SRC),
  2135. SND_PCI_QUIRK(0x1584, 0x8120, "Diverse Laptop", VIA_DXS_ENABLE),
  2136. SND_PCI_QUIRK(0x1584, 0x8123, "Targa/Uniwill", VIA_DXS_NO_VRA),
  2137. SND_PCI_QUIRK(0x161f, 0x202b, "Amira Notebook", VIA_DXS_NO_VRA),
  2138. SND_PCI_QUIRK(0x161f, 0x2032, "m680x machines", VIA_DXS_48K),
  2139. SND_PCI_QUIRK(0x1631, 0xe004, "PB EasyNote 3174", VIA_DXS_ENABLE),
  2140. SND_PCI_QUIRK(0x1695, 0x3005, "EPoX EP-8K9A", VIA_DXS_ENABLE),
  2141. SND_PCI_QUIRK_VENDOR(0x1695, "EPoX mobo", VIA_DXS_SRC),
  2142. SND_PCI_QUIRK_VENDOR(0x16f3, "Jetway K8", VIA_DXS_SRC),
  2143. SND_PCI_QUIRK_VENDOR(0x1734, "FSC Laptop", VIA_DXS_SRC),
  2144. SND_PCI_QUIRK(0x1849, 0x3059, "ASRock K7VM2", VIA_DXS_NO_VRA),
  2145. SND_PCI_QUIRK_VENDOR(0x1849, "ASRock mobo", VIA_DXS_SRC),
  2146. SND_PCI_QUIRK(0x1919, 0x200a, "Soltek SL-K8", VIA_DXS_NO_VRA),
  2147. SND_PCI_QUIRK(0x4005, 0x4710, "MSI K7T266", VIA_DXS_SRC),
  2148. { } /* terminator */
  2149. };
  2150. static int check_dxs_list(struct pci_dev *pci, int revision)
  2151. {
  2152. const struct snd_pci_quirk *w;
  2153. w = snd_pci_quirk_lookup(pci, dxs_allowlist);
  2154. if (w) {
  2155. dev_dbg(&pci->dev, "DXS allow list for %s found\n",
  2156. snd_pci_quirk_name(w));
  2157. return w->value;
  2158. }
  2159. /* for newer revision, default to DXS_SRC */
  2160. if (revision >= VIA_REV_8235)
  2161. return VIA_DXS_SRC;
  2162. /*
  2163. * not detected, try 48k rate only to be sure.
  2164. */
  2165. dev_info(&pci->dev, "Assuming DXS channels with 48k fixed sample rate.\n");
  2166. dev_info(&pci->dev, " Please try dxs_support=5 option\n");
  2167. dev_info(&pci->dev, " and report if it works on your machine.\n");
  2168. dev_info(&pci->dev, " For more details, read ALSA-Configuration.txt.\n");
  2169. return VIA_DXS_48K;
  2170. };
  2171. static int __snd_via82xx_probe(struct pci_dev *pci,
  2172. const struct pci_device_id *pci_id)
  2173. {
  2174. struct snd_card *card;
  2175. struct via82xx *chip;
  2176. int chip_type = 0, card_type;
  2177. unsigned int i;
  2178. int err;
  2179. err = snd_devm_card_new(&pci->dev, index, id, THIS_MODULE,
  2180. sizeof(*chip), &card);
  2181. if (err < 0)
  2182. return err;
  2183. chip = card->private_data;
  2184. card_type = pci_id->driver_data;
  2185. switch (card_type) {
  2186. case TYPE_CARD_VIA686:
  2187. strcpy(card->driver, "VIA686A");
  2188. sprintf(card->shortname, "VIA 82C686A/B rev%x", pci->revision);
  2189. chip_type = TYPE_VIA686;
  2190. break;
  2191. case TYPE_CARD_VIA8233:
  2192. chip_type = TYPE_VIA8233;
  2193. sprintf(card->shortname, "VIA 823x rev%x", pci->revision);
  2194. for (i = 0; i < ARRAY_SIZE(via823x_cards); i++) {
  2195. if (pci->revision == via823x_cards[i].revision) {
  2196. chip_type = via823x_cards[i].type;
  2197. strcpy(card->shortname, via823x_cards[i].name);
  2198. break;
  2199. }
  2200. }
  2201. if (chip_type != TYPE_VIA8233A) {
  2202. if (dxs_support == VIA_DXS_AUTO)
  2203. dxs_support = check_dxs_list(pci, pci->revision);
  2204. /* force to use VIA8233 or 8233A model according to
  2205. * dxs_support module option
  2206. */
  2207. if (dxs_support == VIA_DXS_DISABLE)
  2208. chip_type = TYPE_VIA8233A;
  2209. else
  2210. chip_type = TYPE_VIA8233;
  2211. }
  2212. if (chip_type == TYPE_VIA8233A)
  2213. strcpy(card->driver, "VIA8233A");
  2214. else if (pci->revision >= VIA_REV_8237)
  2215. strcpy(card->driver, "VIA8237"); /* no slog assignment */
  2216. else
  2217. strcpy(card->driver, "VIA8233");
  2218. break;
  2219. default:
  2220. dev_err(card->dev, "invalid card type %d\n", card_type);
  2221. return -EINVAL;
  2222. }
  2223. err = snd_via82xx_create(card, pci, chip_type, pci->revision,
  2224. ac97_clock);
  2225. if (err < 0)
  2226. return err;
  2227. err = snd_via82xx_mixer_new(chip, ac97_quirk);
  2228. if (err < 0)
  2229. return err;
  2230. if (chip_type == TYPE_VIA686) {
  2231. err = snd_via686_pcm_new(chip);
  2232. if (err < 0)
  2233. return err;
  2234. err = snd_via686_init_misc(chip);
  2235. if (err < 0)
  2236. return err;
  2237. } else {
  2238. if (chip_type == TYPE_VIA8233A) {
  2239. err = snd_via8233a_pcm_new(chip);
  2240. if (err < 0)
  2241. return err;
  2242. // chip->dxs_fixed = 1; /* FIXME: use 48k for DXS #3? */
  2243. } else {
  2244. err = snd_via8233_pcm_new(chip);
  2245. if (err < 0)
  2246. return err;
  2247. if (dxs_support == VIA_DXS_48K)
  2248. chip->dxs_fixed = 1;
  2249. else if (dxs_support == VIA_DXS_NO_VRA)
  2250. chip->no_vra = 1;
  2251. else if (dxs_support == VIA_DXS_SRC) {
  2252. chip->no_vra = 1;
  2253. chip->dxs_src = 1;
  2254. }
  2255. }
  2256. err = snd_via8233_init_misc(chip);
  2257. if (err < 0)
  2258. return err;
  2259. }
  2260. /* disable interrupts */
  2261. for (i = 0; i < chip->num_devs; i++)
  2262. snd_via82xx_channel_reset(chip, &chip->devs[i]);
  2263. snprintf(card->longname, sizeof(card->longname),
  2264. "%s with %s at %#lx, irq %d", card->shortname,
  2265. snd_ac97_get_short_name(chip->ac97), chip->port, chip->irq);
  2266. snd_via82xx_proc_init(chip);
  2267. err = snd_card_register(card);
  2268. if (err < 0)
  2269. return err;
  2270. pci_set_drvdata(pci, card);
  2271. return 0;
  2272. }
  2273. static int snd_via82xx_probe(struct pci_dev *pci,
  2274. const struct pci_device_id *pci_id)
  2275. {
  2276. return snd_card_free_on_error(&pci->dev, __snd_via82xx_probe(pci, pci_id));
  2277. }
  2278. static struct pci_driver via82xx_driver = {
  2279. .name = KBUILD_MODNAME,
  2280. .id_table = snd_via82xx_ids,
  2281. .probe = snd_via82xx_probe,
  2282. .driver = {
  2283. .pm = &snd_via82xx_pm,
  2284. },
  2285. };
  2286. module_pci_driver(via82xx_driver);