loader.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. //
  3. // Copyright(c) 2021-2022 Intel Corporation
  4. //
  5. // Authors: Cezary Rojewski <cezary.rojewski@intel.com>
  6. // Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>
  7. //
  8. #include <linux/firmware.h>
  9. #include <linux/module.h>
  10. #include <linux/slab.h>
  11. #include <sound/hdaudio.h>
  12. #include <sound/hdaudio_ext.h>
  13. #include "avs.h"
  14. #include "cldma.h"
  15. #include "messages.h"
  16. #include "registers.h"
  17. #include "topology.h"
  18. #define AVS_ROM_STS_MASK 0xFF
  19. #define AVS_ROM_INIT_DONE 0x1
  20. #define SKL_ROM_BASEFW_ENTERED 0xF
  21. #define APL_ROM_FW_ENTERED 0x5
  22. #define AVS_ROM_INIT_POLLING_US 5
  23. #define SKL_ROM_INIT_TIMEOUT_US 1000000
  24. #define APL_ROM_INIT_TIMEOUT_US 300000
  25. #define APL_ROM_INIT_RETRIES 3
  26. #define AVS_FW_INIT_POLLING_US 500
  27. #define AVS_FW_INIT_TIMEOUT_MS 3000
  28. #define AVS_FW_INIT_TIMEOUT_US (AVS_FW_INIT_TIMEOUT_MS * 1000)
  29. #define AVS_CLDMA_START_DELAY_MS 100
  30. #define AVS_ROOT_DIR "intel/avs"
  31. #define AVS_BASEFW_FILENAME "dsp_basefw.bin"
  32. #define AVS_EXT_MANIFEST_MAGIC 0x31454124
  33. #define SKL_MANIFEST_MAGIC 0x00000006
  34. #define SKL_ADSPFW_OFFSET 0x284
  35. #define APL_MANIFEST_MAGIC 0x44504324
  36. #define APL_ADSPFW_OFFSET 0x2000
  37. /* Occasionally, engineering (release candidate) firmware is provided for testing. */
  38. static bool debug_ignore_fw_version;
  39. module_param_named(ignore_fw_version, debug_ignore_fw_version, bool, 0444);
  40. MODULE_PARM_DESC(ignore_fw_version, "Ignore firmware version check 0=no (default), 1=yes");
  41. #define AVS_LIB_NAME_SIZE 8
  42. struct avs_fw_manifest {
  43. u32 id;
  44. u32 len;
  45. char name[AVS_LIB_NAME_SIZE];
  46. u32 preload_page_count;
  47. u32 img_flags;
  48. u32 feature_mask;
  49. struct avs_fw_version version;
  50. } __packed;
  51. static_assert(sizeof(struct avs_fw_manifest) == 36);
  52. struct avs_fw_ext_manifest {
  53. u32 id;
  54. u32 len;
  55. u16 version_major;
  56. u16 version_minor;
  57. u32 entries;
  58. } __packed;
  59. static_assert(sizeof(struct avs_fw_ext_manifest) == 16);
  60. static int avs_fw_ext_manifest_strip(struct firmware *fw)
  61. {
  62. struct avs_fw_ext_manifest *man;
  63. if (fw->size < sizeof(*man))
  64. return -EINVAL;
  65. man = (struct avs_fw_ext_manifest *)fw->data;
  66. if (man->id == AVS_EXT_MANIFEST_MAGIC) {
  67. fw->data += man->len;
  68. fw->size -= man->len;
  69. }
  70. return 0;
  71. }
  72. static int avs_fw_manifest_offset(struct firmware *fw)
  73. {
  74. /* Header type found in first DWORD of fw binary. */
  75. u32 magic = *(u32 *)fw->data;
  76. switch (magic) {
  77. case SKL_MANIFEST_MAGIC:
  78. return SKL_ADSPFW_OFFSET;
  79. case APL_MANIFEST_MAGIC:
  80. return APL_ADSPFW_OFFSET;
  81. default:
  82. return -EINVAL;
  83. }
  84. }
  85. static int avs_fw_manifest_strip_verify(struct avs_dev *adev, struct firmware *fw,
  86. const struct avs_fw_version *min)
  87. {
  88. struct avs_fw_manifest *man;
  89. int offset, ret;
  90. ret = avs_fw_ext_manifest_strip(fw);
  91. if (ret)
  92. return ret;
  93. offset = avs_fw_manifest_offset(fw);
  94. if (offset < 0)
  95. return offset;
  96. if (fw->size < offset + sizeof(*man))
  97. return -EINVAL;
  98. if (!min)
  99. return 0;
  100. man = (struct avs_fw_manifest *)(fw->data + offset);
  101. if (man->version.major != min->major ||
  102. man->version.minor != min->minor ||
  103. man->version.hotfix != min->hotfix ||
  104. man->version.build < min->build) {
  105. dev_warn(adev->dev, "bad FW version %d.%d.%d.%d, expected %d.%d.%d.%d or newer\n",
  106. man->version.major, man->version.minor,
  107. man->version.hotfix, man->version.build,
  108. min->major, min->minor, min->hotfix, min->build);
  109. if (!debug_ignore_fw_version)
  110. return -EINVAL;
  111. }
  112. return 0;
  113. }
  114. int avs_cldma_load_basefw(struct avs_dev *adev, struct firmware *fw)
  115. {
  116. struct hda_cldma *cl = &code_loader;
  117. unsigned int reg;
  118. int ret;
  119. ret = avs_dsp_op(adev, power, AVS_MAIN_CORE_MASK, true);
  120. if (ret < 0)
  121. return ret;
  122. ret = avs_dsp_op(adev, reset, AVS_MAIN_CORE_MASK, false);
  123. if (ret < 0)
  124. return ret;
  125. ret = hda_cldma_reset(cl);
  126. if (ret < 0) {
  127. dev_err(adev->dev, "cldma reset failed: %d\n", ret);
  128. return ret;
  129. }
  130. hda_cldma_setup(cl);
  131. ret = avs_dsp_op(adev, stall, AVS_MAIN_CORE_MASK, false);
  132. if (ret < 0)
  133. return ret;
  134. reinit_completion(&adev->fw_ready);
  135. avs_dsp_op(adev, int_control, true);
  136. /* await ROM init */
  137. ret = snd_hdac_adsp_readl_poll(adev, AVS_FW_REG_STATUS(adev), reg,
  138. (reg & AVS_ROM_INIT_DONE) == AVS_ROM_INIT_DONE,
  139. AVS_ROM_INIT_POLLING_US, SKL_ROM_INIT_TIMEOUT_US);
  140. if (ret < 0) {
  141. dev_err(adev->dev, "rom init timeout: %d\n", ret);
  142. avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
  143. return ret;
  144. }
  145. hda_cldma_set_data(cl, (void *)fw->data, fw->size);
  146. /* transfer firmware */
  147. hda_cldma_transfer(cl, 0);
  148. ret = snd_hdac_adsp_readl_poll(adev, AVS_FW_REG_STATUS(adev), reg,
  149. (reg & AVS_ROM_STS_MASK) == SKL_ROM_BASEFW_ENTERED,
  150. AVS_FW_INIT_POLLING_US, AVS_FW_INIT_TIMEOUT_US);
  151. hda_cldma_stop(cl);
  152. if (ret < 0) {
  153. dev_err(adev->dev, "transfer fw failed: %d\n", ret);
  154. avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
  155. return ret;
  156. }
  157. return 0;
  158. }
  159. int avs_cldma_load_library(struct avs_dev *adev, struct firmware *lib, u32 id)
  160. {
  161. struct hda_cldma *cl = &code_loader;
  162. int ret;
  163. hda_cldma_set_data(cl, (void *)lib->data, lib->size);
  164. /* transfer modules manifest */
  165. hda_cldma_transfer(cl, msecs_to_jiffies(AVS_CLDMA_START_DELAY_MS));
  166. /* DMA id ignored as there is only ever one code-loader DMA */
  167. ret = avs_ipc_load_library(adev, 0, id);
  168. hda_cldma_stop(cl);
  169. if (ret) {
  170. ret = AVS_IPC_RET(ret);
  171. dev_err(adev->dev, "transfer lib %d failed: %d\n", id, ret);
  172. }
  173. return ret;
  174. }
  175. static int avs_cldma_load_module(struct avs_dev *adev, struct avs_module_entry *mentry)
  176. {
  177. struct hda_cldma *cl = &code_loader;
  178. const struct firmware *mod;
  179. char *mod_name;
  180. int ret;
  181. mod_name = kasprintf(GFP_KERNEL, "%s/%s/dsp_mod_%pUL.bin", AVS_ROOT_DIR,
  182. adev->spec->name, mentry->uuid.b);
  183. if (!mod_name)
  184. return -ENOMEM;
  185. ret = avs_request_firmware(adev, &mod, mod_name);
  186. kfree(mod_name);
  187. if (ret < 0)
  188. return ret;
  189. avs_hda_power_gating_enable(adev, false);
  190. avs_hda_clock_gating_enable(adev, false);
  191. avs_hda_l1sen_enable(adev, false);
  192. hda_cldma_set_data(cl, (void *)mod->data, mod->size);
  193. hda_cldma_transfer(cl, msecs_to_jiffies(AVS_CLDMA_START_DELAY_MS));
  194. ret = avs_ipc_load_modules(adev, &mentry->module_id, 1);
  195. hda_cldma_stop(cl);
  196. avs_hda_l1sen_enable(adev, true);
  197. avs_hda_clock_gating_enable(adev, true);
  198. avs_hda_power_gating_enable(adev, true);
  199. if (ret) {
  200. dev_err(adev->dev, "load module %d failed: %d\n", mentry->module_id, ret);
  201. avs_release_last_firmware(adev);
  202. return AVS_IPC_RET(ret);
  203. }
  204. return 0;
  205. }
  206. int avs_cldma_transfer_modules(struct avs_dev *adev, bool load,
  207. struct avs_module_entry *mods, u32 num_mods)
  208. {
  209. u16 *mod_ids;
  210. int ret, i;
  211. /* Either load to DSP or unload them to free space. */
  212. if (load) {
  213. for (i = 0; i < num_mods; i++) {
  214. ret = avs_cldma_load_module(adev, &mods[i]);
  215. if (ret)
  216. return ret;
  217. }
  218. return 0;
  219. }
  220. mod_ids = kcalloc(num_mods, sizeof(u16), GFP_KERNEL);
  221. if (!mod_ids)
  222. return -ENOMEM;
  223. for (i = 0; i < num_mods; i++)
  224. mod_ids[i] = mods[i].module_id;
  225. ret = avs_ipc_unload_modules(adev, mod_ids, num_mods);
  226. kfree(mod_ids);
  227. if (ret)
  228. return AVS_IPC_RET(ret);
  229. return 0;
  230. }
  231. static int
  232. avs_hda_init_rom(struct avs_dev *adev, unsigned int dma_id, bool purge)
  233. {
  234. const struct avs_spec *const spec = adev->spec;
  235. unsigned int corex_mask, reg;
  236. int ret;
  237. corex_mask = spec->core_init_mask & ~AVS_MAIN_CORE_MASK;
  238. ret = avs_dsp_op(adev, power, spec->core_init_mask, true);
  239. if (ret < 0)
  240. goto err;
  241. ret = avs_dsp_op(adev, reset, AVS_MAIN_CORE_MASK, false);
  242. if (ret < 0)
  243. goto err;
  244. reinit_completion(&adev->fw_ready);
  245. avs_dsp_op(adev, int_control, true);
  246. /* set boot config */
  247. ret = avs_ipc_set_boot_config(adev, dma_id, purge);
  248. if (ret) {
  249. ret = AVS_IPC_RET(ret);
  250. goto err;
  251. }
  252. /* await ROM init */
  253. ret = snd_hdac_adsp_readl_poll(adev, spec->sram->rom_status_offset, reg,
  254. (reg & 0xF) == AVS_ROM_INIT_DONE ||
  255. (reg & 0xF) == APL_ROM_FW_ENTERED,
  256. AVS_ROM_INIT_POLLING_US, APL_ROM_INIT_TIMEOUT_US);
  257. if (ret < 0) {
  258. dev_err(adev->dev, "rom init timeout: %d\n", ret);
  259. goto err;
  260. }
  261. /* power down non-main cores */
  262. if (corex_mask) {
  263. ret = avs_dsp_op(adev, power, corex_mask, false);
  264. if (ret < 0)
  265. goto err;
  266. }
  267. return 0;
  268. err:
  269. avs_dsp_core_disable(adev, spec->core_init_mask);
  270. return ret;
  271. }
  272. static int avs_imr_load_basefw(struct avs_dev *adev)
  273. {
  274. int ret;
  275. /* DMA id ignored when flashing from IMR as no transfer occurs. */
  276. ret = avs_hda_init_rom(adev, 0, false);
  277. if (ret < 0) {
  278. dev_err(adev->dev, "rom init failed: %d\n", ret);
  279. return ret;
  280. }
  281. ret = wait_for_completion_timeout(&adev->fw_ready,
  282. msecs_to_jiffies(AVS_FW_INIT_TIMEOUT_MS));
  283. if (!ret) {
  284. dev_err(adev->dev, "firmware ready timeout\n");
  285. avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
  286. return -ETIMEDOUT;
  287. }
  288. return 0;
  289. }
  290. int avs_hda_load_basefw(struct avs_dev *adev, struct firmware *fw)
  291. {
  292. struct snd_pcm_substream substream;
  293. struct snd_dma_buffer dmab;
  294. struct hdac_ext_stream *estream;
  295. struct hdac_stream *hstream;
  296. struct hdac_bus *bus = &adev->base.core;
  297. unsigned int sdfmt, reg;
  298. int ret, i;
  299. /* configure hda dma */
  300. memset(&substream, 0, sizeof(substream));
  301. substream.stream = SNDRV_PCM_STREAM_PLAYBACK;
  302. estream = snd_hdac_ext_stream_assign(bus, &substream,
  303. HDAC_EXT_STREAM_TYPE_HOST);
  304. if (!estream)
  305. return -ENODEV;
  306. hstream = hdac_stream(estream);
  307. /* code loading performed with default format */
  308. sdfmt = snd_hdac_stream_format(1, 32, 48000);
  309. ret = snd_hdac_dsp_prepare(hstream, sdfmt, fw->size, &dmab);
  310. if (ret < 0)
  311. goto release_stream;
  312. /* enable SPIB for hda stream */
  313. snd_hdac_stream_spbcap_enable(bus, true, hstream->index);
  314. ret = snd_hdac_stream_set_spib(bus, hstream, fw->size);
  315. if (ret)
  316. goto cleanup_resources;
  317. memcpy(dmab.area, fw->data, fw->size);
  318. for (i = 0; i < APL_ROM_INIT_RETRIES; i++) {
  319. unsigned int dma_id = hstream->stream_tag - 1;
  320. ret = avs_hda_init_rom(adev, dma_id, true);
  321. if (!ret)
  322. break;
  323. dev_info(adev->dev, "#%d rom init fail: %d\n", i + 1, ret);
  324. }
  325. if (ret < 0)
  326. goto cleanup_resources;
  327. /* transfer firmware */
  328. snd_hdac_dsp_trigger(hstream, true);
  329. ret = snd_hdac_adsp_readl_poll(adev, AVS_FW_REG_STATUS(adev), reg,
  330. (reg & AVS_ROM_STS_MASK) == APL_ROM_FW_ENTERED,
  331. AVS_FW_INIT_POLLING_US, AVS_FW_INIT_TIMEOUT_US);
  332. snd_hdac_dsp_trigger(hstream, false);
  333. if (ret < 0) {
  334. dev_err(adev->dev, "transfer fw failed: %d\n", ret);
  335. avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
  336. }
  337. cleanup_resources:
  338. /* disable SPIB for hda stream */
  339. snd_hdac_stream_spbcap_enable(bus, false, hstream->index);
  340. snd_hdac_stream_set_spib(bus, hstream, 0);
  341. snd_hdac_dsp_cleanup(hstream, &dmab);
  342. release_stream:
  343. snd_hdac_ext_stream_release(estream, HDAC_EXT_STREAM_TYPE_HOST);
  344. return ret;
  345. }
  346. int avs_hda_load_library(struct avs_dev *adev, struct firmware *lib, u32 id)
  347. {
  348. struct snd_pcm_substream substream;
  349. struct snd_dma_buffer dmab;
  350. struct hdac_ext_stream *estream;
  351. struct hdac_stream *stream;
  352. struct hdac_bus *bus = &adev->base.core;
  353. unsigned int sdfmt;
  354. int ret;
  355. /* configure hda dma */
  356. memset(&substream, 0, sizeof(substream));
  357. substream.stream = SNDRV_PCM_STREAM_PLAYBACK;
  358. estream = snd_hdac_ext_stream_assign(bus, &substream,
  359. HDAC_EXT_STREAM_TYPE_HOST);
  360. if (!estream)
  361. return -ENODEV;
  362. stream = hdac_stream(estream);
  363. /* code loading performed with default format */
  364. sdfmt = snd_hdac_stream_format(1, 32, 48000);
  365. ret = snd_hdac_dsp_prepare(stream, sdfmt, lib->size, &dmab);
  366. if (ret < 0)
  367. goto release_stream;
  368. /* enable SPIB for hda stream */
  369. snd_hdac_stream_spbcap_enable(bus, true, stream->index);
  370. snd_hdac_stream_set_spib(bus, stream, lib->size);
  371. memcpy(dmab.area, lib->data, lib->size);
  372. /* transfer firmware */
  373. snd_hdac_dsp_trigger(stream, true);
  374. ret = avs_ipc_load_library(adev, stream->stream_tag - 1, id);
  375. snd_hdac_dsp_trigger(stream, false);
  376. if (ret) {
  377. dev_err(adev->dev, "transfer lib %d failed: %d\n", id, ret);
  378. ret = AVS_IPC_RET(ret);
  379. }
  380. /* disable SPIB for hda stream */
  381. snd_hdac_stream_spbcap_enable(bus, false, stream->index);
  382. snd_hdac_stream_set_spib(bus, stream, 0);
  383. snd_hdac_dsp_cleanup(stream, &dmab);
  384. release_stream:
  385. snd_hdac_ext_stream_release(estream, HDAC_EXT_STREAM_TYPE_HOST);
  386. return ret;
  387. }
  388. int avs_hda_transfer_modules(struct avs_dev *adev, bool load,
  389. struct avs_module_entry *mods, u32 num_mods)
  390. {
  391. /*
  392. * All platforms without CLDMA are equipped with IMR,
  393. * and thus the module transferring is offloaded to DSP.
  394. */
  395. return 0;
  396. }
  397. int avs_dsp_load_libraries(struct avs_dev *adev, struct avs_tplg_library *libs, u32 num_libs)
  398. {
  399. int start, id, i = 0;
  400. int ret;
  401. /* Calculate the id to assign for the next lib. */
  402. for (id = 0; id < adev->fw_cfg.max_libs_count; id++)
  403. if (adev->lib_names[id][0] == '\0')
  404. break;
  405. if (id + num_libs >= adev->fw_cfg.max_libs_count)
  406. return -EINVAL;
  407. start = id;
  408. while (i < num_libs) {
  409. struct avs_fw_manifest *man;
  410. const struct firmware *fw;
  411. struct firmware stripped_fw;
  412. char *filename;
  413. int j;
  414. filename = kasprintf(GFP_KERNEL, "%s/%s/%s", AVS_ROOT_DIR, adev->spec->name,
  415. libs[i].name);
  416. if (!filename)
  417. return -ENOMEM;
  418. /*
  419. * If any call after this one fails, requested firmware is not released with
  420. * avs_release_last_firmware() as failing to load code results in need for reload
  421. * of entire driver module. And then avs_release_firmwares() is in place already.
  422. */
  423. ret = avs_request_firmware(adev, &fw, filename);
  424. kfree(filename);
  425. if (ret < 0)
  426. return ret;
  427. stripped_fw = *fw;
  428. ret = avs_fw_manifest_strip_verify(adev, &stripped_fw, NULL);
  429. if (ret) {
  430. dev_err(adev->dev, "invalid library data: %d\n", ret);
  431. return ret;
  432. }
  433. ret = avs_fw_manifest_offset(&stripped_fw);
  434. if (ret < 0)
  435. return ret;
  436. man = (struct avs_fw_manifest *)(stripped_fw.data + ret);
  437. /* Don't load anything that's already in DSP memory. */
  438. for (j = 0; j < id; j++)
  439. if (!strncmp(adev->lib_names[j], man->name, AVS_LIB_NAME_SIZE))
  440. goto next_lib;
  441. ret = avs_dsp_op(adev, load_lib, &stripped_fw, id);
  442. if (ret)
  443. return ret;
  444. strscpy(adev->lib_names[id], man->name, AVS_LIB_NAME_SIZE);
  445. id++;
  446. next_lib:
  447. i++;
  448. }
  449. return start == id ? 1 : 0;
  450. }
  451. static int avs_dsp_load_basefw(struct avs_dev *adev)
  452. {
  453. const struct avs_fw_version *min_req;
  454. const struct avs_spec *const spec = adev->spec;
  455. const struct firmware *fw;
  456. struct firmware stripped_fw;
  457. char *filename;
  458. int ret;
  459. filename = kasprintf(GFP_KERNEL, "%s/%s/%s", AVS_ROOT_DIR, spec->name, AVS_BASEFW_FILENAME);
  460. if (!filename)
  461. return -ENOMEM;
  462. ret = avs_request_firmware(adev, &fw, filename);
  463. kfree(filename);
  464. if (ret < 0) {
  465. dev_err(adev->dev, "request firmware failed: %d\n", ret);
  466. return ret;
  467. }
  468. stripped_fw = *fw;
  469. min_req = &adev->spec->min_fw_version;
  470. ret = avs_fw_manifest_strip_verify(adev, &stripped_fw, min_req);
  471. if (ret < 0) {
  472. dev_err(adev->dev, "invalid firmware data: %d\n", ret);
  473. goto release_fw;
  474. }
  475. ret = avs_dsp_op(adev, load_basefw, &stripped_fw);
  476. if (ret < 0) {
  477. dev_err(adev->dev, "basefw load failed: %d\n", ret);
  478. goto release_fw;
  479. }
  480. ret = wait_for_completion_timeout(&adev->fw_ready,
  481. msecs_to_jiffies(AVS_FW_INIT_TIMEOUT_MS));
  482. if (!ret) {
  483. dev_err(adev->dev, "firmware ready timeout\n");
  484. avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
  485. ret = -ETIMEDOUT;
  486. goto release_fw;
  487. }
  488. return 0;
  489. release_fw:
  490. avs_release_last_firmware(adev);
  491. return ret;
  492. }
  493. int avs_dsp_boot_firmware(struct avs_dev *adev, bool purge)
  494. {
  495. struct avs_soc_component *acomp;
  496. int ret, i;
  497. /* Forgo full boot if flash from IMR succeeds. */
  498. if (!purge && avs_platattr_test(adev, IMR)) {
  499. ret = avs_imr_load_basefw(adev);
  500. if (!ret)
  501. return 0;
  502. dev_dbg(adev->dev, "firmware flash from imr failed: %d\n", ret);
  503. }
  504. /* Full boot, clear cached data except for basefw (slot 0). */
  505. for (i = 1; i < adev->fw_cfg.max_libs_count; i++)
  506. memset(adev->lib_names[i], 0, AVS_LIB_NAME_SIZE);
  507. avs_hda_power_gating_enable(adev, false);
  508. avs_hda_clock_gating_enable(adev, false);
  509. avs_hda_l1sen_enable(adev, false);
  510. ret = avs_dsp_load_basefw(adev);
  511. if (ret)
  512. goto reenable_gating;
  513. mutex_lock(&adev->comp_list_mutex);
  514. list_for_each_entry(acomp, &adev->comp_list, node) {
  515. struct avs_tplg *tplg = acomp->tplg;
  516. ret = avs_dsp_load_libraries(adev, tplg->libs, tplg->num_libs);
  517. if (ret < 0)
  518. break;
  519. }
  520. mutex_unlock(&adev->comp_list_mutex);
  521. reenable_gating:
  522. avs_hda_l1sen_enable(adev, true);
  523. avs_hda_clock_gating_enable(adev, true);
  524. avs_hda_power_gating_enable(adev, true);
  525. if (ret < 0)
  526. return ret;
  527. /* With all code loaded, refresh module information. */
  528. ret = avs_module_info_init(adev, true);
  529. if (ret) {
  530. dev_err(adev->dev, "init module info failed: %d\n", ret);
  531. return ret;
  532. }
  533. return 0;
  534. }
  535. int avs_dsp_first_boot_firmware(struct avs_dev *adev)
  536. {
  537. int ret, i;
  538. if (avs_platattr_test(adev, CLDMA)) {
  539. ret = hda_cldma_init(&code_loader, &adev->base.core,
  540. adev->dsp_ba, AVS_CL_DEFAULT_BUFFER_SIZE);
  541. if (ret < 0) {
  542. dev_err(adev->dev, "cldma init failed: %d\n", ret);
  543. return ret;
  544. }
  545. }
  546. ret = avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
  547. if (ret < 0)
  548. return ret;
  549. ret = avs_dsp_boot_firmware(adev, true);
  550. if (ret < 0) {
  551. dev_err(adev->dev, "firmware boot failed: %d\n", ret);
  552. return ret;
  553. }
  554. ret = avs_ipc_get_hw_config(adev, &adev->hw_cfg);
  555. if (ret) {
  556. dev_err(adev->dev, "get hw cfg failed: %d\n", ret);
  557. return AVS_IPC_RET(ret);
  558. }
  559. ret = avs_ipc_get_fw_config(adev, &adev->fw_cfg);
  560. if (ret) {
  561. dev_err(adev->dev, "get fw cfg failed: %d\n", ret);
  562. return AVS_IPC_RET(ret);
  563. }
  564. adev->core_refs = devm_kcalloc(adev->dev, adev->hw_cfg.dsp_cores,
  565. sizeof(*adev->core_refs), GFP_KERNEL);
  566. adev->lib_names = devm_kcalloc(adev->dev, adev->fw_cfg.max_libs_count,
  567. sizeof(*adev->lib_names), GFP_KERNEL);
  568. if (!adev->core_refs || !adev->lib_names)
  569. return -ENOMEM;
  570. for (i = 0; i < adev->fw_cfg.max_libs_count; i++) {
  571. adev->lib_names[i] = devm_kzalloc(adev->dev, AVS_LIB_NAME_SIZE, GFP_KERNEL);
  572. if (!adev->lib_names[i])
  573. return -ENOMEM;
  574. }
  575. /* basefw always occupies slot 0 */
  576. strscpy(adev->lib_names[0], "BASEFW", AVS_LIB_NAME_SIZE);
  577. ida_init(&adev->ppl_ida);
  578. return 0;
  579. }