hda-pcm.c 10 KB

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  1. // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
  2. //
  3. // This file is provided under a dual BSD/GPLv2 license. When using or
  4. // redistributing this file, you may do so under either license.
  5. //
  6. // Copyright(c) 2018 Intel Corporation
  7. //
  8. // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com>
  9. // Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
  10. // Rander Wang <rander.wang@intel.com>
  11. // Keyon Jie <yang.jie@linux.intel.com>
  12. //
  13. /*
  14. * Hardware interface for generic Intel audio DSP HDA IP
  15. */
  16. #include <linux/moduleparam.h>
  17. #include <sound/hda_register.h>
  18. #include <sound/pcm_params.h>
  19. #include <trace/events/sof_intel.h>
  20. #include "../sof-audio.h"
  21. #include "../ops.h"
  22. #include "hda.h"
  23. #define SDnFMT_BASE(x) ((x) << 14)
  24. #define SDnFMT_MULT(x) (((x) - 1) << 11)
  25. #define SDnFMT_DIV(x) (((x) - 1) << 8)
  26. #define SDnFMT_BITS(x) ((x) << 4)
  27. #define SDnFMT_CHAN(x) ((x) << 0)
  28. #define HDA_MAX_PERIOD_TIME_HEADROOM 10
  29. static bool hda_always_enable_dmi_l1;
  30. module_param_named(always_enable_dmi_l1, hda_always_enable_dmi_l1, bool, 0444);
  31. MODULE_PARM_DESC(always_enable_dmi_l1, "SOF HDA always enable DMI l1");
  32. static bool hda_disable_rewinds;
  33. module_param_named(disable_rewinds, hda_disable_rewinds, bool, 0444);
  34. MODULE_PARM_DESC(disable_rewinds, "SOF HDA disable rewinds");
  35. u32 hda_dsp_get_mult_div(struct snd_sof_dev *sdev, int rate)
  36. {
  37. switch (rate) {
  38. case 8000:
  39. return SDnFMT_DIV(6);
  40. case 9600:
  41. return SDnFMT_DIV(5);
  42. case 11025:
  43. return SDnFMT_BASE(1) | SDnFMT_DIV(4);
  44. case 16000:
  45. return SDnFMT_DIV(3);
  46. case 22050:
  47. return SDnFMT_BASE(1) | SDnFMT_DIV(2);
  48. case 32000:
  49. return SDnFMT_DIV(3) | SDnFMT_MULT(2);
  50. case 44100:
  51. return SDnFMT_BASE(1);
  52. case 48000:
  53. return 0;
  54. case 88200:
  55. return SDnFMT_BASE(1) | SDnFMT_MULT(2);
  56. case 96000:
  57. return SDnFMT_MULT(2);
  58. case 176400:
  59. return SDnFMT_BASE(1) | SDnFMT_MULT(4);
  60. case 192000:
  61. return SDnFMT_MULT(4);
  62. default:
  63. dev_warn(sdev->dev, "can't find div rate %d using 48kHz\n",
  64. rate);
  65. return 0; /* use 48KHz if not found */
  66. }
  67. };
  68. u32 hda_dsp_get_bits(struct snd_sof_dev *sdev, int sample_bits)
  69. {
  70. switch (sample_bits) {
  71. case 8:
  72. return SDnFMT_BITS(0);
  73. case 16:
  74. return SDnFMT_BITS(1);
  75. case 20:
  76. return SDnFMT_BITS(2);
  77. case 24:
  78. return SDnFMT_BITS(3);
  79. case 32:
  80. return SDnFMT_BITS(4);
  81. default:
  82. dev_warn(sdev->dev, "can't find %d bits using 16bit\n",
  83. sample_bits);
  84. return SDnFMT_BITS(1); /* use 16bits format if not found */
  85. }
  86. };
  87. int hda_dsp_pcm_hw_params(struct snd_sof_dev *sdev,
  88. struct snd_pcm_substream *substream,
  89. struct snd_pcm_hw_params *params,
  90. struct snd_sof_platform_stream_params *platform_params)
  91. {
  92. struct hdac_stream *hstream = substream->runtime->private_data;
  93. struct hdac_ext_stream *hext_stream = stream_to_hdac_ext_stream(hstream);
  94. struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
  95. struct snd_dma_buffer *dmab;
  96. int ret;
  97. hstream->substream = substream;
  98. dmab = substream->runtime->dma_buffer_p;
  99. /*
  100. * Use the codec required format val (which is link_bps adjusted) when
  101. * the DSP is not in use
  102. */
  103. if (!sdev->dspless_mode_selected) {
  104. u32 rate = hda_dsp_get_mult_div(sdev, params_rate(params));
  105. u32 bits = hda_dsp_get_bits(sdev, params_width(params));
  106. hstream->format_val = rate | bits | (params_channels(params) - 1);
  107. }
  108. hstream->bufsize = params_buffer_bytes(params);
  109. hstream->period_bytes = params_period_bytes(params);
  110. hstream->no_period_wakeup =
  111. (params->info & SNDRV_PCM_INFO_NO_PERIOD_WAKEUP) &&
  112. (params->flags & SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP);
  113. ret = hda_dsp_stream_hw_params(sdev, hext_stream, dmab, params);
  114. if (ret < 0) {
  115. dev_err(sdev->dev, "error: hdac prepare failed: %d\n", ret);
  116. return ret;
  117. }
  118. /* enable SPIB when rewinds are disabled */
  119. if (hda_disable_rewinds)
  120. hda_dsp_stream_spib_config(sdev, hext_stream, HDA_DSP_SPIB_ENABLE, 0);
  121. else
  122. hda_dsp_stream_spib_config(sdev, hext_stream, HDA_DSP_SPIB_DISABLE, 0);
  123. if (hda)
  124. platform_params->no_ipc_position = hda->no_ipc_position;
  125. platform_params->stream_tag = hstream->stream_tag;
  126. return 0;
  127. }
  128. EXPORT_SYMBOL_NS(hda_dsp_pcm_hw_params, SND_SOC_SOF_INTEL_HDA_COMMON);
  129. /* update SPIB register with appl position */
  130. int hda_dsp_pcm_ack(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream)
  131. {
  132. struct hdac_stream *hstream = substream->runtime->private_data;
  133. struct snd_pcm_runtime *runtime = substream->runtime;
  134. ssize_t appl_pos, buf_size;
  135. u32 spib;
  136. appl_pos = frames_to_bytes(runtime, runtime->control->appl_ptr);
  137. buf_size = frames_to_bytes(runtime, runtime->buffer_size);
  138. spib = appl_pos % buf_size;
  139. /* Allowable value for SPIB is 1 byte to max buffer size */
  140. if (!spib)
  141. spib = buf_size;
  142. sof_io_write(sdev, hstream->spib_addr, spib);
  143. return 0;
  144. }
  145. EXPORT_SYMBOL_NS(hda_dsp_pcm_ack, SND_SOC_SOF_INTEL_HDA_COMMON);
  146. int hda_dsp_pcm_trigger(struct snd_sof_dev *sdev,
  147. struct snd_pcm_substream *substream, int cmd)
  148. {
  149. struct hdac_stream *hstream = substream->runtime->private_data;
  150. struct hdac_ext_stream *hext_stream = stream_to_hdac_ext_stream(hstream);
  151. return hda_dsp_stream_trigger(sdev, hext_stream, cmd);
  152. }
  153. EXPORT_SYMBOL_NS(hda_dsp_pcm_trigger, SND_SOC_SOF_INTEL_HDA_COMMON);
  154. snd_pcm_uframes_t hda_dsp_pcm_pointer(struct snd_sof_dev *sdev,
  155. struct snd_pcm_substream *substream)
  156. {
  157. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  158. struct snd_soc_component *scomp = sdev->component;
  159. struct hdac_stream *hstream = substream->runtime->private_data;
  160. struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
  161. struct snd_sof_pcm *spcm;
  162. snd_pcm_uframes_t pos;
  163. spcm = snd_sof_find_spcm_dai(scomp, rtd);
  164. if (!spcm) {
  165. dev_warn_ratelimited(sdev->dev, "warn: can't find PCM with DAI ID %d\n",
  166. rtd->dai_link->id);
  167. return 0;
  168. }
  169. if (hda && !hda->no_ipc_position) {
  170. /* read position from IPC position */
  171. pos = spcm->stream[substream->stream].posn.host_posn;
  172. goto found;
  173. }
  174. pos = hda_dsp_stream_get_position(hstream, substream->stream, true);
  175. found:
  176. pos = bytes_to_frames(substream->runtime, pos);
  177. trace_sof_intel_hda_dsp_pcm(sdev, hstream, substream, pos);
  178. return pos;
  179. }
  180. EXPORT_SYMBOL_NS(hda_dsp_pcm_pointer, SND_SOC_SOF_INTEL_HDA_COMMON);
  181. int hda_dsp_pcm_open(struct snd_sof_dev *sdev,
  182. struct snd_pcm_substream *substream)
  183. {
  184. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  185. struct snd_pcm_runtime *runtime = substream->runtime;
  186. struct snd_soc_component *scomp = sdev->component;
  187. struct hdac_ext_stream *dsp_stream;
  188. struct snd_sof_pcm *spcm;
  189. int direction = substream->stream;
  190. u32 flags = 0;
  191. spcm = snd_sof_find_spcm_dai(scomp, rtd);
  192. if (!spcm) {
  193. dev_err(sdev->dev, "error: can't find PCM with DAI ID %d\n", rtd->dai_link->id);
  194. return -EINVAL;
  195. }
  196. /*
  197. * if we want the .ack to work, we need to prevent the control from being mapped.
  198. * The status can still be mapped.
  199. */
  200. if (hda_disable_rewinds)
  201. runtime->hw.info |= SNDRV_PCM_INFO_NO_REWINDS | SNDRV_PCM_INFO_SYNC_APPLPTR;
  202. /*
  203. * All playback streams are DMI L1 capable, capture streams need
  204. * pause push/release to be disabled
  205. */
  206. if (hda_always_enable_dmi_l1 && direction == SNDRV_PCM_STREAM_CAPTURE)
  207. runtime->hw.info &= ~SNDRV_PCM_INFO_PAUSE;
  208. if (hda_always_enable_dmi_l1 ||
  209. direction == SNDRV_PCM_STREAM_PLAYBACK ||
  210. spcm->stream[substream->stream].d0i3_compatible)
  211. flags |= SOF_HDA_STREAM_DMI_L1_COMPATIBLE;
  212. dsp_stream = hda_dsp_stream_get(sdev, direction, flags);
  213. if (!dsp_stream) {
  214. dev_err(sdev->dev, "error: no stream available\n");
  215. return -ENODEV;
  216. }
  217. /* minimum as per HDA spec */
  218. snd_pcm_hw_constraint_step(substream->runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 4);
  219. /* avoid circular buffer wrap in middle of period */
  220. snd_pcm_hw_constraint_integer(substream->runtime,
  221. SNDRV_PCM_HW_PARAM_PERIODS);
  222. /* Limit the maximum number of periods to not exceed the BDL entries count */
  223. if (runtime->hw.periods_max > HDA_DSP_MAX_BDL_ENTRIES)
  224. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIODS,
  225. runtime->hw.periods_min,
  226. HDA_DSP_MAX_BDL_ENTRIES);
  227. /* Only S16 and S32 supported by HDA hardware when used without DSP */
  228. if (sdev->dspless_mode_selected)
  229. snd_pcm_hw_constraint_mask64(substream->runtime, SNDRV_PCM_HW_PARAM_FORMAT,
  230. SNDRV_PCM_FMTBIT_S16 | SNDRV_PCM_FMTBIT_S32);
  231. /*
  232. * The dsp_max_burst_size_in_ms is the length of the maximum burst size
  233. * of the host DMA in the ALSA buffer.
  234. *
  235. * On playback start the DMA will transfer dsp_max_burst_size_in_ms
  236. * amount of data in one initial burst to fill up the host DMA buffer.
  237. * Consequent DMA burst sizes are shorter and their length can vary.
  238. * To avoid immediate xrun by the initial burst we need to place
  239. * constraint on the period size (via PERIOD_TIME) to cover the size of
  240. * the host buffer.
  241. * We need to add headroom of max 10ms as the firmware needs time to
  242. * settle to the 1ms pacing and initially it can run faster for few
  243. * internal periods.
  244. *
  245. * On capture the DMA will transfer 1ms chunks.
  246. */
  247. if (spcm->stream[direction].dsp_max_burst_size_in_ms) {
  248. unsigned int period_time = spcm->stream[direction].dsp_max_burst_size_in_ms;
  249. /*
  250. * add headroom over the maximum burst size to cover the time
  251. * needed for the DMA pace to settle.
  252. * Limit the headroom time to HDA_MAX_PERIOD_TIME_HEADROOM
  253. */
  254. period_time += min(period_time, HDA_MAX_PERIOD_TIME_HEADROOM);
  255. snd_pcm_hw_constraint_minmax(substream->runtime,
  256. SNDRV_PCM_HW_PARAM_PERIOD_TIME,
  257. period_time * USEC_PER_MSEC,
  258. UINT_MAX);
  259. }
  260. /* binding pcm substream to hda stream */
  261. substream->runtime->private_data = &dsp_stream->hstream;
  262. /*
  263. * Reset the llp cache values (they are used for LLP compensation in
  264. * case the counter is not reset)
  265. */
  266. dsp_stream->pplcllpl = 0;
  267. dsp_stream->pplcllpu = 0;
  268. return 0;
  269. }
  270. EXPORT_SYMBOL_NS(hda_dsp_pcm_open, SND_SOC_SOF_INTEL_HDA_COMMON);
  271. int hda_dsp_pcm_close(struct snd_sof_dev *sdev,
  272. struct snd_pcm_substream *substream)
  273. {
  274. struct hdac_stream *hstream = substream->runtime->private_data;
  275. int direction = substream->stream;
  276. int ret;
  277. ret = hda_dsp_stream_put(sdev, direction, hstream->stream_tag);
  278. if (ret) {
  279. dev_dbg(sdev->dev, "stream %s not opened!\n", substream->name);
  280. return -ENODEV;
  281. }
  282. /* unbinding pcm substream to hda stream */
  283. substream->runtime->private_data = NULL;
  284. return 0;
  285. }
  286. EXPORT_SYMBOL_NS(hda_dsp_pcm_close, SND_SOC_SOF_INTEL_HDA_COMMON);