ipc3-pcm.c 14 KB

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  1. // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
  2. //
  3. // This file is provided under a dual BSD/GPLv2 license. When using or
  4. // redistributing this file, you may do so under either license.
  5. //
  6. // Copyright(c) 2021 Intel Corporation
  7. //
  8. //
  9. #include <sound/pcm_params.h>
  10. #include "ipc3-priv.h"
  11. #include "ops.h"
  12. #include "sof-priv.h"
  13. #include "sof-audio.h"
  14. static int sof_ipc3_pcm_hw_free(struct snd_soc_component *component,
  15. struct snd_pcm_substream *substream)
  16. {
  17. struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component);
  18. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  19. struct sof_ipc_stream stream;
  20. struct snd_sof_pcm *spcm;
  21. spcm = snd_sof_find_spcm_dai(component, rtd);
  22. if (!spcm)
  23. return -EINVAL;
  24. if (!spcm->prepared[substream->stream])
  25. return 0;
  26. stream.hdr.size = sizeof(stream);
  27. stream.hdr.cmd = SOF_IPC_GLB_STREAM_MSG | SOF_IPC_STREAM_PCM_FREE;
  28. stream.comp_id = spcm->stream[substream->stream].comp_id;
  29. /* send IPC to the DSP */
  30. return sof_ipc_tx_message_no_reply(sdev->ipc, &stream, sizeof(stream));
  31. }
  32. static int sof_ipc3_pcm_hw_params(struct snd_soc_component *component,
  33. struct snd_pcm_substream *substream,
  34. struct snd_pcm_hw_params *params,
  35. struct snd_sof_platform_stream_params *platform_params)
  36. {
  37. struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component);
  38. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  39. struct sof_ipc_fw_version *v = &sdev->fw_ready.version;
  40. struct snd_pcm_runtime *runtime = substream->runtime;
  41. struct sof_ipc_pcm_params_reply ipc_params_reply;
  42. struct sof_ipc_pcm_params pcm;
  43. struct snd_sof_pcm *spcm;
  44. int ret;
  45. spcm = snd_sof_find_spcm_dai(component, rtd);
  46. if (!spcm)
  47. return -EINVAL;
  48. memset(&pcm, 0, sizeof(pcm));
  49. /* number of pages should be rounded up */
  50. pcm.params.buffer.pages = PFN_UP(runtime->dma_bytes);
  51. /* set IPC PCM parameters */
  52. pcm.hdr.size = sizeof(pcm);
  53. pcm.hdr.cmd = SOF_IPC_GLB_STREAM_MSG | SOF_IPC_STREAM_PCM_PARAMS;
  54. pcm.comp_id = spcm->stream[substream->stream].comp_id;
  55. pcm.params.hdr.size = sizeof(pcm.params);
  56. pcm.params.buffer.phy_addr = spcm->stream[substream->stream].page_table.addr;
  57. pcm.params.buffer.size = runtime->dma_bytes;
  58. pcm.params.direction = substream->stream;
  59. pcm.params.sample_valid_bytes = params_width(params) >> 3;
  60. pcm.params.buffer_fmt = SOF_IPC_BUFFER_INTERLEAVED;
  61. pcm.params.rate = params_rate(params);
  62. pcm.params.channels = params_channels(params);
  63. pcm.params.host_period_bytes = params_period_bytes(params);
  64. /* container size */
  65. ret = snd_pcm_format_physical_width(params_format(params));
  66. if (ret < 0)
  67. return ret;
  68. pcm.params.sample_container_bytes = ret >> 3;
  69. /* format */
  70. switch (params_format(params)) {
  71. case SNDRV_PCM_FORMAT_S16:
  72. pcm.params.frame_fmt = SOF_IPC_FRAME_S16_LE;
  73. break;
  74. case SNDRV_PCM_FORMAT_S24:
  75. pcm.params.frame_fmt = SOF_IPC_FRAME_S24_4LE;
  76. break;
  77. case SNDRV_PCM_FORMAT_S32:
  78. pcm.params.frame_fmt = SOF_IPC_FRAME_S32_LE;
  79. break;
  80. case SNDRV_PCM_FORMAT_FLOAT:
  81. pcm.params.frame_fmt = SOF_IPC_FRAME_FLOAT;
  82. break;
  83. default:
  84. return -EINVAL;
  85. }
  86. /* Update the IPC message with information from the platform */
  87. pcm.params.stream_tag = platform_params->stream_tag;
  88. if (platform_params->use_phy_address)
  89. pcm.params.buffer.phy_addr = platform_params->phy_addr;
  90. if (platform_params->no_ipc_position) {
  91. /* For older ABIs set host_period_bytes to zero to inform
  92. * FW we don't want position updates. Newer versions use
  93. * no_stream_position for this purpose.
  94. */
  95. if (v->abi_version < SOF_ABI_VER(3, 10, 0))
  96. pcm.params.host_period_bytes = 0;
  97. else
  98. pcm.params.no_stream_position = 1;
  99. }
  100. if (platform_params->cont_update_posn)
  101. pcm.params.cont_update_posn = 1;
  102. dev_dbg(component->dev, "stream_tag %d", pcm.params.stream_tag);
  103. /* send hw_params IPC to the DSP */
  104. ret = sof_ipc_tx_message(sdev->ipc, &pcm, sizeof(pcm),
  105. &ipc_params_reply, sizeof(ipc_params_reply));
  106. if (ret < 0) {
  107. dev_err(component->dev, "HW params ipc failed for stream %d\n",
  108. pcm.params.stream_tag);
  109. return ret;
  110. }
  111. ret = snd_sof_set_stream_data_offset(sdev, &spcm->stream[substream->stream],
  112. ipc_params_reply.posn_offset);
  113. if (ret < 0) {
  114. dev_err(component->dev, "%s: invalid stream data offset for PCM %d\n",
  115. __func__, spcm->pcm.pcm_id);
  116. return ret;
  117. }
  118. return ret;
  119. }
  120. static int sof_ipc3_pcm_trigger(struct snd_soc_component *component,
  121. struct snd_pcm_substream *substream, int cmd)
  122. {
  123. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  124. struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component);
  125. struct sof_ipc_stream stream;
  126. struct snd_sof_pcm *spcm;
  127. spcm = snd_sof_find_spcm_dai(component, rtd);
  128. if (!spcm)
  129. return -EINVAL;
  130. stream.hdr.size = sizeof(stream);
  131. stream.hdr.cmd = SOF_IPC_GLB_STREAM_MSG;
  132. stream.comp_id = spcm->stream[substream->stream].comp_id;
  133. switch (cmd) {
  134. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  135. stream.hdr.cmd |= SOF_IPC_STREAM_TRIG_PAUSE;
  136. break;
  137. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  138. stream.hdr.cmd |= SOF_IPC_STREAM_TRIG_RELEASE;
  139. break;
  140. case SNDRV_PCM_TRIGGER_START:
  141. stream.hdr.cmd |= SOF_IPC_STREAM_TRIG_START;
  142. break;
  143. case SNDRV_PCM_TRIGGER_SUSPEND:
  144. fallthrough;
  145. case SNDRV_PCM_TRIGGER_STOP:
  146. stream.hdr.cmd |= SOF_IPC_STREAM_TRIG_STOP;
  147. break;
  148. default:
  149. dev_err(component->dev, "Unhandled trigger cmd %d\n", cmd);
  150. return -EINVAL;
  151. }
  152. /* send IPC to the DSP */
  153. return sof_ipc_tx_message_no_reply(sdev->ipc, &stream, sizeof(stream));
  154. }
  155. static void ssp_dai_config_pcm_params_match(struct snd_sof_dev *sdev, const char *link_name,
  156. struct snd_pcm_hw_params *params)
  157. {
  158. struct sof_ipc_dai_config *config;
  159. struct snd_sof_dai *dai;
  160. int i;
  161. /*
  162. * Search for all matching DAIs as we can have both playback and capture DAI
  163. * associated with the same link.
  164. */
  165. list_for_each_entry(dai, &sdev->dai_list, list) {
  166. if (!dai->name || strcmp(link_name, dai->name))
  167. continue;
  168. for (i = 0; i < dai->number_configs; i++) {
  169. struct sof_dai_private_data *private = dai->private;
  170. config = &private->dai_config[i];
  171. if (config->ssp.fsync_rate == params_rate(params)) {
  172. dev_dbg(sdev->dev, "DAI config %d matches pcm hw params\n", i);
  173. dai->current_config = i;
  174. break;
  175. }
  176. }
  177. }
  178. }
  179. static int sof_ipc3_pcm_dai_link_fixup(struct snd_soc_pcm_runtime *rtd,
  180. struct snd_pcm_hw_params *params)
  181. {
  182. struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, SOF_AUDIO_PCM_DRV_NAME);
  183. struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
  184. struct snd_sof_dai *dai = snd_sof_find_dai(component, (char *)rtd->dai_link->name);
  185. struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
  186. struct snd_mask *fmt = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT);
  187. struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component);
  188. struct sof_dai_private_data *private;
  189. struct snd_soc_dpcm *dpcm;
  190. if (!dai) {
  191. dev_err(component->dev, "%s: No DAI found with name %s\n", __func__,
  192. rtd->dai_link->name);
  193. return -EINVAL;
  194. }
  195. private = dai->private;
  196. if (!private) {
  197. dev_err(component->dev, "%s: No private data found for DAI %s\n", __func__,
  198. rtd->dai_link->name);
  199. return -EINVAL;
  200. }
  201. /* read format from topology */
  202. snd_mask_none(fmt);
  203. switch (private->comp_dai->config.frame_fmt) {
  204. case SOF_IPC_FRAME_S16_LE:
  205. snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S16_LE);
  206. break;
  207. case SOF_IPC_FRAME_S24_4LE:
  208. snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S24_LE);
  209. break;
  210. case SOF_IPC_FRAME_S32_LE:
  211. snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S32_LE);
  212. break;
  213. default:
  214. dev_err(component->dev, "No available DAI format!\n");
  215. return -EINVAL;
  216. }
  217. /* read rate and channels from topology */
  218. switch (private->dai_config->type) {
  219. case SOF_DAI_INTEL_SSP:
  220. /* search for config to pcm params match, if not found use default */
  221. ssp_dai_config_pcm_params_match(sdev, (char *)rtd->dai_link->name, params);
  222. rate->min = private->dai_config[dai->current_config].ssp.fsync_rate;
  223. rate->max = private->dai_config[dai->current_config].ssp.fsync_rate;
  224. channels->min = private->dai_config[dai->current_config].ssp.tdm_slots;
  225. channels->max = private->dai_config[dai->current_config].ssp.tdm_slots;
  226. dev_dbg(component->dev, "rate_min: %d rate_max: %d\n", rate->min, rate->max);
  227. dev_dbg(component->dev, "channels_min: %d channels_max: %d\n",
  228. channels->min, channels->max);
  229. break;
  230. case SOF_DAI_INTEL_DMIC:
  231. /* DMIC only supports 16 or 32 bit formats */
  232. if (private->comp_dai->config.frame_fmt == SOF_IPC_FRAME_S24_4LE) {
  233. dev_err(component->dev, "Invalid fmt %d for DAI type %d\n",
  234. private->comp_dai->config.frame_fmt,
  235. private->dai_config->type);
  236. }
  237. break;
  238. case SOF_DAI_INTEL_HDA:
  239. /*
  240. * HDAudio does not follow the default trigger
  241. * sequence due to firmware implementation
  242. */
  243. for_each_dpcm_fe(rtd, SNDRV_PCM_STREAM_PLAYBACK, dpcm) {
  244. struct snd_soc_pcm_runtime *fe = dpcm->fe;
  245. fe->dai_link->trigger[SNDRV_PCM_STREAM_PLAYBACK] =
  246. SND_SOC_DPCM_TRIGGER_POST;
  247. }
  248. break;
  249. case SOF_DAI_INTEL_ALH:
  250. /*
  251. * Dai could run with different channel count compared with
  252. * front end, so get dai channel count from topology
  253. */
  254. channels->min = private->dai_config->alh.channels;
  255. channels->max = private->dai_config->alh.channels;
  256. break;
  257. case SOF_DAI_IMX_ESAI:
  258. rate->min = private->dai_config->esai.fsync_rate;
  259. rate->max = private->dai_config->esai.fsync_rate;
  260. channels->min = private->dai_config->esai.tdm_slots;
  261. channels->max = private->dai_config->esai.tdm_slots;
  262. dev_dbg(component->dev, "rate_min: %d rate_max: %d\n", rate->min, rate->max);
  263. dev_dbg(component->dev, "channels_min: %d channels_max: %d\n",
  264. channels->min, channels->max);
  265. break;
  266. case SOF_DAI_MEDIATEK_AFE:
  267. rate->min = private->dai_config->afe.rate;
  268. rate->max = private->dai_config->afe.rate;
  269. channels->min = private->dai_config->afe.channels;
  270. channels->max = private->dai_config->afe.channels;
  271. snd_mask_none(fmt);
  272. switch (private->dai_config->afe.format) {
  273. case SOF_IPC_FRAME_S16_LE:
  274. snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S16_LE);
  275. break;
  276. case SOF_IPC_FRAME_S24_4LE:
  277. snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S24_LE);
  278. break;
  279. case SOF_IPC_FRAME_S32_LE:
  280. snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S32_LE);
  281. break;
  282. default:
  283. dev_err(component->dev, "Not available format!\n");
  284. return -EINVAL;
  285. }
  286. dev_dbg(component->dev, "rate_min: %d rate_max: %d\n", rate->min, rate->max);
  287. dev_dbg(component->dev, "channels_min: %d channels_max: %d\n",
  288. channels->min, channels->max);
  289. break;
  290. case SOF_DAI_IMX_SAI:
  291. rate->min = private->dai_config->sai.fsync_rate;
  292. rate->max = private->dai_config->sai.fsync_rate;
  293. channels->min = private->dai_config->sai.tdm_slots;
  294. channels->max = private->dai_config->sai.tdm_slots;
  295. dev_dbg(component->dev, "rate_min: %d rate_max: %d\n", rate->min, rate->max);
  296. dev_dbg(component->dev, "channels_min: %d channels_max: %d\n",
  297. channels->min, channels->max);
  298. break;
  299. case SOF_DAI_AMD_BT:
  300. rate->min = private->dai_config->acpbt.fsync_rate;
  301. rate->max = private->dai_config->acpbt.fsync_rate;
  302. channels->min = private->dai_config->acpbt.tdm_slots;
  303. channels->max = private->dai_config->acpbt.tdm_slots;
  304. dev_dbg(component->dev,
  305. "AMD_BT rate_min: %d rate_max: %d\n", rate->min, rate->max);
  306. dev_dbg(component->dev, "AMD_BT channels_min: %d channels_max: %d\n",
  307. channels->min, channels->max);
  308. break;
  309. case SOF_DAI_AMD_SP:
  310. case SOF_DAI_AMD_SP_VIRTUAL:
  311. rate->min = private->dai_config->acpsp.fsync_rate;
  312. rate->max = private->dai_config->acpsp.fsync_rate;
  313. channels->min = private->dai_config->acpsp.tdm_slots;
  314. channels->max = private->dai_config->acpsp.tdm_slots;
  315. dev_dbg(component->dev,
  316. "AMD_SP rate_min: %d rate_max: %d\n", rate->min, rate->max);
  317. dev_dbg(component->dev, "AMD_SP channels_min: %d channels_max: %d\n",
  318. channels->min, channels->max);
  319. break;
  320. case SOF_DAI_AMD_HS:
  321. case SOF_DAI_AMD_HS_VIRTUAL:
  322. rate->min = private->dai_config->acphs.fsync_rate;
  323. rate->max = private->dai_config->acphs.fsync_rate;
  324. channels->min = private->dai_config->acphs.tdm_slots;
  325. channels->max = private->dai_config->acphs.tdm_slots;
  326. dev_dbg(component->dev,
  327. "AMD_HS channel_max: %d rate_max: %d\n", channels->max, rate->max);
  328. break;
  329. case SOF_DAI_AMD_DMIC:
  330. rate->min = private->dai_config->acpdmic.pdm_rate;
  331. rate->max = private->dai_config->acpdmic.pdm_rate;
  332. channels->min = private->dai_config->acpdmic.pdm_ch;
  333. channels->max = private->dai_config->acpdmic.pdm_ch;
  334. dev_dbg(component->dev,
  335. "AMD_DMIC rate_min: %d rate_max: %d\n", rate->min, rate->max);
  336. dev_dbg(component->dev, "AMD_DMIC channels_min: %d channels_max: %d\n",
  337. channels->min, channels->max);
  338. break;
  339. case SOF_DAI_IMX_MICFIL:
  340. rate->min = private->dai_config->micfil.pdm_rate;
  341. rate->max = private->dai_config->micfil.pdm_rate;
  342. channels->min = private->dai_config->micfil.pdm_ch;
  343. channels->max = private->dai_config->micfil.pdm_ch;
  344. dev_dbg(component->dev,
  345. "MICFIL PDM rate_min: %d rate_max: %d\n", rate->min, rate->max);
  346. dev_dbg(component->dev, "MICFIL PDM channels_min: %d channels_max: %d\n",
  347. channels->min, channels->max);
  348. break;
  349. case SOF_DAI_AMD_SDW:
  350. /* change the default trigger sequence as per HW implementation */
  351. for_each_dpcm_fe(rtd, SNDRV_PCM_STREAM_PLAYBACK, dpcm) {
  352. struct snd_soc_pcm_runtime *fe = dpcm->fe;
  353. fe->dai_link->trigger[SNDRV_PCM_STREAM_PLAYBACK] =
  354. SND_SOC_DPCM_TRIGGER_POST;
  355. }
  356. for_each_dpcm_fe(rtd, SNDRV_PCM_STREAM_CAPTURE, dpcm) {
  357. struct snd_soc_pcm_runtime *fe = dpcm->fe;
  358. fe->dai_link->trigger[SNDRV_PCM_STREAM_CAPTURE] =
  359. SND_SOC_DPCM_TRIGGER_POST;
  360. }
  361. rate->min = private->dai_config->acp_sdw.rate;
  362. rate->max = private->dai_config->acp_sdw.rate;
  363. channels->min = private->dai_config->acp_sdw.channels;
  364. channels->max = private->dai_config->acp_sdw.channels;
  365. dev_dbg(component->dev,
  366. "AMD_SDW rate_min: %d rate_max: %d\n", rate->min, rate->max);
  367. dev_dbg(component->dev, "AMD_SDW channels_min: %d channels_max: %d\n",
  368. channels->min, channels->max);
  369. break;
  370. default:
  371. dev_err(component->dev, "Invalid DAI type %d\n", private->dai_config->type);
  372. break;
  373. }
  374. return 0;
  375. }
  376. const struct sof_ipc_pcm_ops ipc3_pcm_ops = {
  377. .hw_params = sof_ipc3_pcm_hw_params,
  378. .hw_free = sof_ipc3_pcm_hw_free,
  379. .trigger = sof_ipc3_pcm_trigger,
  380. .dai_link_fixup = sof_ipc3_pcm_dai_link_fixup,
  381. .reset_hw_params_during_stop = true,
  382. .d0i3_supported_in_s0ix = true,
  383. };