sun4i-codec.c 59 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright 2014 Emilio López <emilio@elopez.com.ar>
  4. * Copyright 2014 Jon Smirl <jonsmirl@gmail.com>
  5. * Copyright 2015 Maxime Ripard <maxime.ripard@free-electrons.com>
  6. * Copyright 2015 Adam Sampson <ats@offog.org>
  7. * Copyright 2016 Chen-Yu Tsai <wens@csie.org>
  8. *
  9. * Based on the Allwinner SDK driver, released under the GPL.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/delay.h>
  16. #include <linux/slab.h>
  17. #include <linux/clk.h>
  18. #include <linux/regmap.h>
  19. #include <linux/reset.h>
  20. #include <linux/gpio/consumer.h>
  21. #include <sound/core.h>
  22. #include <sound/jack.h>
  23. #include <sound/pcm.h>
  24. #include <sound/pcm_params.h>
  25. #include <sound/soc.h>
  26. #include <sound/tlv.h>
  27. #include <sound/initval.h>
  28. #include <sound/dmaengine_pcm.h>
  29. /* Codec DAC digital controls and FIFO registers */
  30. #define SUN4I_CODEC_DAC_DPC (0x00)
  31. #define SUN4I_CODEC_DAC_DPC_EN_DA (31)
  32. #define SUN4I_CODEC_DAC_DPC_DVOL (12)
  33. #define SUN4I_CODEC_DAC_FIFOC (0x04)
  34. #define SUN4I_CODEC_DAC_FIFOC_DAC_FS (29)
  35. #define SUN4I_CODEC_DAC_FIFOC_FIR_VERSION (28)
  36. #define SUN4I_CODEC_DAC_FIFOC_SEND_LASAT (26)
  37. #define SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE (24)
  38. #define SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT (21)
  39. #define SUN4I_CODEC_DAC_FIFOC_TX_TRIG_LEVEL (8)
  40. #define SUN4I_CODEC_DAC_FIFOC_MONO_EN (6)
  41. #define SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS (5)
  42. #define SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN (4)
  43. #define SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH (0)
  44. #define SUN4I_CODEC_DAC_FIFOS (0x08)
  45. #define SUN4I_CODEC_DAC_TXDATA (0x0c)
  46. /* Codec DAC side analog signal controls */
  47. #define SUN4I_CODEC_DAC_ACTL (0x10)
  48. #define SUN4I_CODEC_DAC_ACTL_DACAENR (31)
  49. #define SUN4I_CODEC_DAC_ACTL_DACAENL (30)
  50. #define SUN4I_CODEC_DAC_ACTL_MIXEN (29)
  51. #define SUN4I_CODEC_DAC_ACTL_LNG (26)
  52. #define SUN4I_CODEC_DAC_ACTL_FMG (23)
  53. #define SUN4I_CODEC_DAC_ACTL_MICG (20)
  54. #define SUN4I_CODEC_DAC_ACTL_LLNS (19)
  55. #define SUN4I_CODEC_DAC_ACTL_RLNS (18)
  56. #define SUN4I_CODEC_DAC_ACTL_LFMS (17)
  57. #define SUN4I_CODEC_DAC_ACTL_RFMS (16)
  58. #define SUN4I_CODEC_DAC_ACTL_LDACLMIXS (15)
  59. #define SUN4I_CODEC_DAC_ACTL_RDACRMIXS (14)
  60. #define SUN4I_CODEC_DAC_ACTL_LDACRMIXS (13)
  61. #define SUN4I_CODEC_DAC_ACTL_MIC1LS (12)
  62. #define SUN4I_CODEC_DAC_ACTL_MIC1RS (11)
  63. #define SUN4I_CODEC_DAC_ACTL_MIC2LS (10)
  64. #define SUN4I_CODEC_DAC_ACTL_MIC2RS (9)
  65. #define SUN4I_CODEC_DAC_ACTL_DACPAS (8)
  66. #define SUN4I_CODEC_DAC_ACTL_MIXPAS (7)
  67. #define SUN4I_CODEC_DAC_ACTL_PA_MUTE (6)
  68. #define SUN4I_CODEC_DAC_ACTL_PA_VOL (0)
  69. #define SUN4I_CODEC_DAC_TUNE (0x14)
  70. #define SUN4I_CODEC_DAC_DEBUG (0x18)
  71. /* Codec ADC digital controls and FIFO registers */
  72. #define SUN4I_CODEC_ADC_FIFOC (0x1c)
  73. #define SUN4I_CODEC_ADC_FIFOC_ADC_FS (29)
  74. #define SUN4I_CODEC_ADC_FIFOC_EN_AD (28)
  75. #define SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE (24)
  76. #define SUN4I_CODEC_ADC_FIFOC_RX_TRIG_LEVEL (8)
  77. #define SUN4I_CODEC_ADC_FIFOC_MONO_EN (7)
  78. #define SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS (6)
  79. #define SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN (4)
  80. #define SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH (0)
  81. #define SUN4I_CODEC_ADC_FIFOS (0x20)
  82. #define SUN4I_CODEC_ADC_RXDATA (0x24)
  83. /* Codec ADC side analog signal controls */
  84. #define SUN4I_CODEC_ADC_ACTL (0x28)
  85. #define SUN4I_CODEC_ADC_ACTL_ADC_R_EN (31)
  86. #define SUN4I_CODEC_ADC_ACTL_ADC_L_EN (30)
  87. #define SUN4I_CODEC_ADC_ACTL_PREG1EN (29)
  88. #define SUN4I_CODEC_ADC_ACTL_PREG2EN (28)
  89. #define SUN4I_CODEC_ADC_ACTL_VMICEN (27)
  90. #define SUN4I_CODEC_ADC_ACTL_PREG1 (25)
  91. #define SUN4I_CODEC_ADC_ACTL_PREG2 (23)
  92. #define SUN4I_CODEC_ADC_ACTL_VADCG (20)
  93. #define SUN4I_CODEC_ADC_ACTL_ADCIS (17)
  94. #define SUN4I_CODEC_ADC_ACTL_LNPREG (13)
  95. #define SUN4I_CODEC_ADC_ACTL_PA_EN (4)
  96. #define SUN4I_CODEC_ADC_ACTL_DDE (3)
  97. #define SUN4I_CODEC_ADC_DEBUG (0x2c)
  98. /* FIFO counters */
  99. #define SUN4I_CODEC_DAC_TXCNT (0x30)
  100. #define SUN4I_CODEC_ADC_RXCNT (0x34)
  101. /* Calibration register (sun7i only) */
  102. #define SUN7I_CODEC_AC_DAC_CAL (0x38)
  103. /* Microphone controls (sun7i only) */
  104. #define SUN7I_CODEC_AC_MIC_PHONE_CAL (0x3c)
  105. #define SUN7I_CODEC_AC_MIC_PHONE_CAL_PREG1 (29)
  106. #define SUN7I_CODEC_AC_MIC_PHONE_CAL_PREG2 (26)
  107. /*
  108. * sun6i specific registers
  109. *
  110. * sun6i shares the same digital control and FIFO registers as sun4i,
  111. * but only the DAC digital controls are at the same offset. The others
  112. * have been moved around to accommodate extra analog controls.
  113. */
  114. /* Codec DAC digital controls and FIFO registers */
  115. #define SUN6I_CODEC_ADC_FIFOC (0x10)
  116. #define SUN6I_CODEC_ADC_FIFOC_EN_AD (28)
  117. #define SUN6I_CODEC_ADC_FIFOS (0x14)
  118. #define SUN6I_CODEC_ADC_RXDATA (0x18)
  119. /* Output mixer and gain controls */
  120. #define SUN6I_CODEC_OM_DACA_CTRL (0x20)
  121. #define SUN6I_CODEC_OM_DACA_CTRL_DACAREN (31)
  122. #define SUN6I_CODEC_OM_DACA_CTRL_DACALEN (30)
  123. #define SUN6I_CODEC_OM_DACA_CTRL_RMIXEN (29)
  124. #define SUN6I_CODEC_OM_DACA_CTRL_LMIXEN (28)
  125. #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC1 (23)
  126. #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC2 (22)
  127. #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_PHONE (21)
  128. #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_PHONEP (20)
  129. #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_LINEINR (19)
  130. #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACR (18)
  131. #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACL (17)
  132. #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC1 (16)
  133. #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC2 (15)
  134. #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_PHONE (14)
  135. #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_PHONEN (13)
  136. #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_LINEINL (12)
  137. #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACL (11)
  138. #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACR (10)
  139. #define SUN6I_CODEC_OM_DACA_CTRL_RHPIS (9)
  140. #define SUN6I_CODEC_OM_DACA_CTRL_LHPIS (8)
  141. #define SUN6I_CODEC_OM_DACA_CTRL_RHPPAMUTE (7)
  142. #define SUN6I_CODEC_OM_DACA_CTRL_LHPPAMUTE (6)
  143. #define SUN6I_CODEC_OM_DACA_CTRL_HPVOL (0)
  144. #define SUN6I_CODEC_OM_PA_CTRL (0x24)
  145. #define SUN6I_CODEC_OM_PA_CTRL_HPPAEN (31)
  146. #define SUN6I_CODEC_OM_PA_CTRL_HPCOM_CTL (29)
  147. #define SUN6I_CODEC_OM_PA_CTRL_COMPTEN (28)
  148. #define SUN6I_CODEC_OM_PA_CTRL_MIC1G (15)
  149. #define SUN6I_CODEC_OM_PA_CTRL_MIC2G (12)
  150. #define SUN6I_CODEC_OM_PA_CTRL_LINEING (9)
  151. #define SUN6I_CODEC_OM_PA_CTRL_PHONEG (6)
  152. #define SUN6I_CODEC_OM_PA_CTRL_PHONEPG (3)
  153. #define SUN6I_CODEC_OM_PA_CTRL_PHONENG (0)
  154. /* Microphone, line out and phone out controls */
  155. #define SUN6I_CODEC_MIC_CTRL (0x28)
  156. #define SUN6I_CODEC_MIC_CTRL_HBIASEN (31)
  157. #define SUN6I_CODEC_MIC_CTRL_MBIASEN (30)
  158. #define SUN6I_CODEC_MIC_CTRL_MIC1AMPEN (28)
  159. #define SUN6I_CODEC_MIC_CTRL_MIC1BOOST (25)
  160. #define SUN6I_CODEC_MIC_CTRL_MIC2AMPEN (24)
  161. #define SUN6I_CODEC_MIC_CTRL_MIC2BOOST (21)
  162. #define SUN6I_CODEC_MIC_CTRL_MIC2SLT (20)
  163. #define SUN6I_CODEC_MIC_CTRL_LINEOUTLEN (19)
  164. #define SUN6I_CODEC_MIC_CTRL_LINEOUTREN (18)
  165. #define SUN6I_CODEC_MIC_CTRL_LINEOUTLSRC (17)
  166. #define SUN6I_CODEC_MIC_CTRL_LINEOUTRSRC (16)
  167. #define SUN6I_CODEC_MIC_CTRL_LINEOUTVC (11)
  168. #define SUN6I_CODEC_MIC_CTRL_PHONEPREG (8)
  169. /* ADC mixer controls */
  170. #define SUN6I_CODEC_ADC_ACTL (0x2c)
  171. #define SUN6I_CODEC_ADC_ACTL_ADCREN (31)
  172. #define SUN6I_CODEC_ADC_ACTL_ADCLEN (30)
  173. #define SUN6I_CODEC_ADC_ACTL_ADCRG (27)
  174. #define SUN6I_CODEC_ADC_ACTL_ADCLG (24)
  175. #define SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC1 (13)
  176. #define SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC2 (12)
  177. #define SUN6I_CODEC_ADC_ACTL_RADCMIX_PHONE (11)
  178. #define SUN6I_CODEC_ADC_ACTL_RADCMIX_PHONEP (10)
  179. #define SUN6I_CODEC_ADC_ACTL_RADCMIX_LINEINR (9)
  180. #define SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXR (8)
  181. #define SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXL (7)
  182. #define SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC1 (6)
  183. #define SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC2 (5)
  184. #define SUN6I_CODEC_ADC_ACTL_LADCMIX_PHONE (4)
  185. #define SUN6I_CODEC_ADC_ACTL_LADCMIX_PHONEN (3)
  186. #define SUN6I_CODEC_ADC_ACTL_LADCMIX_LINEINL (2)
  187. #define SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXL (1)
  188. #define SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXR (0)
  189. /* Analog performance tuning controls */
  190. #define SUN6I_CODEC_ADDA_TUNE (0x30)
  191. /* Calibration controls */
  192. #define SUN6I_CODEC_CALIBRATION (0x34)
  193. /* FIFO counters */
  194. #define SUN6I_CODEC_DAC_TXCNT (0x40)
  195. #define SUN6I_CODEC_ADC_RXCNT (0x44)
  196. /* headset jack detection and button support registers */
  197. #define SUN6I_CODEC_HMIC_CTL (0x50)
  198. #define SUN6I_CODEC_HMIC_DATA (0x54)
  199. /* TODO sun6i DAP (Digital Audio Processing) bits */
  200. /* FIFO counters moved on A23 */
  201. #define SUN8I_A23_CODEC_DAC_TXCNT (0x1c)
  202. #define SUN8I_A23_CODEC_ADC_RXCNT (0x20)
  203. /* TX FIFO moved on H3 */
  204. #define SUN8I_H3_CODEC_DAC_TXDATA (0x20)
  205. #define SUN8I_H3_CODEC_DAC_DBG (0x48)
  206. #define SUN8I_H3_CODEC_ADC_DBG (0x4c)
  207. /* TODO H3 DAP (Digital Audio Processing) bits */
  208. struct sun4i_codec {
  209. struct device *dev;
  210. struct regmap *regmap;
  211. struct clk *clk_apb;
  212. struct clk *clk_module;
  213. struct reset_control *rst;
  214. struct gpio_desc *gpio_pa;
  215. struct gpio_desc *gpio_hp;
  216. /* ADC_FIFOC register is at different offset on different SoCs */
  217. struct regmap_field *reg_adc_fifoc;
  218. struct snd_dmaengine_dai_dma_data capture_dma_data;
  219. struct snd_dmaengine_dai_dma_data playback_dma_data;
  220. };
  221. static void sun4i_codec_start_playback(struct sun4i_codec *scodec)
  222. {
  223. /* Flush TX FIFO */
  224. regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
  225. BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH));
  226. /* Enable DAC DRQ */
  227. regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
  228. BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN));
  229. }
  230. static void sun4i_codec_stop_playback(struct sun4i_codec *scodec)
  231. {
  232. /* Disable DAC DRQ */
  233. regmap_clear_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
  234. BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN));
  235. }
  236. static void sun4i_codec_start_capture(struct sun4i_codec *scodec)
  237. {
  238. /* Enable ADC DRQ */
  239. regmap_field_set_bits(scodec->reg_adc_fifoc,
  240. BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN));
  241. }
  242. static void sun4i_codec_stop_capture(struct sun4i_codec *scodec)
  243. {
  244. /* Disable ADC DRQ */
  245. regmap_field_clear_bits(scodec->reg_adc_fifoc,
  246. BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN));
  247. }
  248. static int sun4i_codec_trigger(struct snd_pcm_substream *substream, int cmd,
  249. struct snd_soc_dai *dai)
  250. {
  251. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  252. struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
  253. switch (cmd) {
  254. case SNDRV_PCM_TRIGGER_START:
  255. case SNDRV_PCM_TRIGGER_RESUME:
  256. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  257. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  258. sun4i_codec_start_playback(scodec);
  259. else
  260. sun4i_codec_start_capture(scodec);
  261. break;
  262. case SNDRV_PCM_TRIGGER_STOP:
  263. case SNDRV_PCM_TRIGGER_SUSPEND:
  264. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  265. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  266. sun4i_codec_stop_playback(scodec);
  267. else
  268. sun4i_codec_stop_capture(scodec);
  269. break;
  270. default:
  271. return -EINVAL;
  272. }
  273. return 0;
  274. }
  275. static int sun4i_codec_prepare_capture(struct snd_pcm_substream *substream,
  276. struct snd_soc_dai *dai)
  277. {
  278. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  279. struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
  280. /* Flush RX FIFO */
  281. regmap_field_set_bits(scodec->reg_adc_fifoc,
  282. BIT(SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH));
  283. /* Set RX FIFO trigger level */
  284. regmap_field_update_bits(scodec->reg_adc_fifoc,
  285. 0xf << SUN4I_CODEC_ADC_FIFOC_RX_TRIG_LEVEL,
  286. 0x7 << SUN4I_CODEC_ADC_FIFOC_RX_TRIG_LEVEL);
  287. /*
  288. * FIXME: Undocumented in the datasheet, but
  289. * Allwinner's code mentions that it is
  290. * related to microphone gain
  291. */
  292. if (of_device_is_compatible(scodec->dev->of_node,
  293. "allwinner,sun4i-a10-codec") ||
  294. of_device_is_compatible(scodec->dev->of_node,
  295. "allwinner,sun7i-a20-codec")) {
  296. regmap_update_bits(scodec->regmap, SUN4I_CODEC_ADC_ACTL,
  297. 0x3 << 25,
  298. 0x1 << 25);
  299. }
  300. if (of_device_is_compatible(scodec->dev->of_node,
  301. "allwinner,sun7i-a20-codec"))
  302. /* FIXME: Undocumented bits */
  303. regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_TUNE,
  304. 0x3 << 8,
  305. 0x1 << 8);
  306. return 0;
  307. }
  308. static int sun4i_codec_prepare_playback(struct snd_pcm_substream *substream,
  309. struct snd_soc_dai *dai)
  310. {
  311. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  312. struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
  313. u32 val;
  314. /* Flush the TX FIFO */
  315. regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
  316. BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH));
  317. /* Set TX FIFO Empty Trigger Level */
  318. regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
  319. 0x3f << SUN4I_CODEC_DAC_FIFOC_TX_TRIG_LEVEL,
  320. 0xf << SUN4I_CODEC_DAC_FIFOC_TX_TRIG_LEVEL);
  321. if (substream->runtime->rate > 32000)
  322. /* Use 64 bits FIR filter */
  323. val = 0;
  324. else
  325. /* Use 32 bits FIR filter */
  326. val = BIT(SUN4I_CODEC_DAC_FIFOC_FIR_VERSION);
  327. regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
  328. BIT(SUN4I_CODEC_DAC_FIFOC_FIR_VERSION),
  329. val);
  330. /* Send zeros when we have an underrun */
  331. regmap_clear_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
  332. BIT(SUN4I_CODEC_DAC_FIFOC_SEND_LASAT));
  333. return 0;
  334. };
  335. static int sun4i_codec_prepare(struct snd_pcm_substream *substream,
  336. struct snd_soc_dai *dai)
  337. {
  338. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  339. return sun4i_codec_prepare_playback(substream, dai);
  340. return sun4i_codec_prepare_capture(substream, dai);
  341. }
  342. static unsigned long sun4i_codec_get_mod_freq(struct snd_pcm_hw_params *params)
  343. {
  344. unsigned int rate = params_rate(params);
  345. switch (rate) {
  346. case 176400:
  347. case 88200:
  348. case 44100:
  349. case 33075:
  350. case 22050:
  351. case 14700:
  352. case 11025:
  353. case 7350:
  354. return 22579200;
  355. case 192000:
  356. case 96000:
  357. case 48000:
  358. case 32000:
  359. case 24000:
  360. case 16000:
  361. case 12000:
  362. case 8000:
  363. return 24576000;
  364. default:
  365. return 0;
  366. }
  367. }
  368. static int sun4i_codec_get_hw_rate(struct snd_pcm_hw_params *params)
  369. {
  370. unsigned int rate = params_rate(params);
  371. switch (rate) {
  372. case 192000:
  373. case 176400:
  374. return 6;
  375. case 96000:
  376. case 88200:
  377. return 7;
  378. case 48000:
  379. case 44100:
  380. return 0;
  381. case 32000:
  382. case 33075:
  383. return 1;
  384. case 24000:
  385. case 22050:
  386. return 2;
  387. case 16000:
  388. case 14700:
  389. return 3;
  390. case 12000:
  391. case 11025:
  392. return 4;
  393. case 8000:
  394. case 7350:
  395. return 5;
  396. default:
  397. return -EINVAL;
  398. }
  399. }
  400. static int sun4i_codec_hw_params_capture(struct sun4i_codec *scodec,
  401. struct snd_pcm_hw_params *params,
  402. unsigned int hwrate)
  403. {
  404. /* Set ADC sample rate */
  405. regmap_field_update_bits(scodec->reg_adc_fifoc,
  406. 7 << SUN4I_CODEC_ADC_FIFOC_ADC_FS,
  407. hwrate << SUN4I_CODEC_ADC_FIFOC_ADC_FS);
  408. /* Set the number of channels we want to use */
  409. if (params_channels(params) == 1)
  410. regmap_field_set_bits(scodec->reg_adc_fifoc,
  411. BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN));
  412. else
  413. regmap_field_clear_bits(scodec->reg_adc_fifoc,
  414. BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN));
  415. /* Set the number of sample bits to either 16 or 24 bits */
  416. if (hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min == 32) {
  417. regmap_field_set_bits(scodec->reg_adc_fifoc,
  418. BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS));
  419. regmap_field_clear_bits(scodec->reg_adc_fifoc,
  420. BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE));
  421. scodec->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
  422. } else {
  423. regmap_field_clear_bits(scodec->reg_adc_fifoc,
  424. BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS));
  425. /* Fill most significant bits with valid data MSB */
  426. regmap_field_set_bits(scodec->reg_adc_fifoc,
  427. BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE));
  428. scodec->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
  429. }
  430. return 0;
  431. }
  432. static int sun4i_codec_hw_params_playback(struct sun4i_codec *scodec,
  433. struct snd_pcm_hw_params *params,
  434. unsigned int hwrate)
  435. {
  436. u32 val;
  437. /* Set DAC sample rate */
  438. regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
  439. 7 << SUN4I_CODEC_DAC_FIFOC_DAC_FS,
  440. hwrate << SUN4I_CODEC_DAC_FIFOC_DAC_FS);
  441. /* Set the number of channels we want to use */
  442. if (params_channels(params) == 1)
  443. val = BIT(SUN4I_CODEC_DAC_FIFOC_MONO_EN);
  444. else
  445. val = 0;
  446. regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
  447. BIT(SUN4I_CODEC_DAC_FIFOC_MONO_EN),
  448. val);
  449. /* Set the number of sample bits to either 16 or 24 bits */
  450. if (hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min == 32) {
  451. regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
  452. BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS));
  453. /* Set TX FIFO mode to padding the LSBs with 0 */
  454. regmap_clear_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
  455. BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE));
  456. scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
  457. } else {
  458. regmap_clear_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
  459. BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS));
  460. /* Set TX FIFO mode to repeat the MSB */
  461. regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
  462. BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE));
  463. scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
  464. }
  465. return 0;
  466. }
  467. static int sun4i_codec_hw_params(struct snd_pcm_substream *substream,
  468. struct snd_pcm_hw_params *params,
  469. struct snd_soc_dai *dai)
  470. {
  471. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  472. struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
  473. unsigned long clk_freq;
  474. int ret, hwrate;
  475. clk_freq = sun4i_codec_get_mod_freq(params);
  476. if (!clk_freq)
  477. return -EINVAL;
  478. ret = clk_set_rate(scodec->clk_module, clk_freq);
  479. if (ret)
  480. return ret;
  481. hwrate = sun4i_codec_get_hw_rate(params);
  482. if (hwrate < 0)
  483. return hwrate;
  484. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  485. return sun4i_codec_hw_params_playback(scodec, params,
  486. hwrate);
  487. return sun4i_codec_hw_params_capture(scodec, params,
  488. hwrate);
  489. }
  490. static int sun4i_codec_startup(struct snd_pcm_substream *substream,
  491. struct snd_soc_dai *dai)
  492. {
  493. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  494. struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
  495. /*
  496. * Stop issuing DRQ when we have room for less than 16 samples
  497. * in our TX FIFO
  498. */
  499. regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
  500. 3 << SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT);
  501. return clk_prepare_enable(scodec->clk_module);
  502. }
  503. static void sun4i_codec_shutdown(struct snd_pcm_substream *substream,
  504. struct snd_soc_dai *dai)
  505. {
  506. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  507. struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
  508. clk_disable_unprepare(scodec->clk_module);
  509. }
  510. static const struct snd_soc_dai_ops sun4i_codec_dai_ops = {
  511. .startup = sun4i_codec_startup,
  512. .shutdown = sun4i_codec_shutdown,
  513. .trigger = sun4i_codec_trigger,
  514. .hw_params = sun4i_codec_hw_params,
  515. .prepare = sun4i_codec_prepare,
  516. };
  517. #define SUN4I_CODEC_RATES ( \
  518. SNDRV_PCM_RATE_8000_48000 | \
  519. SNDRV_PCM_RATE_12000 | \
  520. SNDRV_PCM_RATE_24000 | \
  521. SNDRV_PCM_RATE_96000 | \
  522. SNDRV_PCM_RATE_192000)
  523. static struct snd_soc_dai_driver sun4i_codec_dai = {
  524. .name = "Codec",
  525. .ops = &sun4i_codec_dai_ops,
  526. .playback = {
  527. .stream_name = "Codec Playback",
  528. .channels_min = 1,
  529. .channels_max = 2,
  530. .rate_min = 8000,
  531. .rate_max = 192000,
  532. .rates = SUN4I_CODEC_RATES,
  533. .formats = SNDRV_PCM_FMTBIT_S16_LE |
  534. SNDRV_PCM_FMTBIT_S32_LE,
  535. .sig_bits = 24,
  536. },
  537. .capture = {
  538. .stream_name = "Codec Capture",
  539. .channels_min = 1,
  540. .channels_max = 2,
  541. .rate_min = 8000,
  542. .rate_max = 48000,
  543. .rates = SUN4I_CODEC_RATES,
  544. .formats = SNDRV_PCM_FMTBIT_S16_LE |
  545. SNDRV_PCM_FMTBIT_S32_LE,
  546. .sig_bits = 24,
  547. },
  548. };
  549. /*** sun4i Codec ***/
  550. static const struct snd_kcontrol_new sun4i_codec_pa_mute =
  551. SOC_DAPM_SINGLE("Switch", SUN4I_CODEC_DAC_ACTL,
  552. SUN4I_CODEC_DAC_ACTL_PA_MUTE, 1, 0);
  553. static DECLARE_TLV_DB_SCALE(sun4i_codec_pa_volume_scale, -6300, 100, 1);
  554. static DECLARE_TLV_DB_SCALE(sun4i_codec_linein_loopback_gain_scale, -150, 150,
  555. 0);
  556. static DECLARE_TLV_DB_SCALE(sun4i_codec_linein_preamp_gain_scale, -1200, 300,
  557. 0);
  558. static DECLARE_TLV_DB_SCALE(sun4i_codec_fmin_loopback_gain_scale, -450, 150,
  559. 0);
  560. static DECLARE_TLV_DB_SCALE(sun4i_codec_micin_loopback_gain_scale, -450, 150,
  561. 0);
  562. static DECLARE_TLV_DB_RANGE(sun4i_codec_micin_preamp_gain_scale,
  563. 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
  564. 1, 7, TLV_DB_SCALE_ITEM(3500, 300, 0));
  565. static DECLARE_TLV_DB_RANGE(sun7i_codec_micin_preamp_gain_scale,
  566. 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
  567. 1, 7, TLV_DB_SCALE_ITEM(2400, 300, 0));
  568. static const struct snd_kcontrol_new sun4i_codec_controls[] = {
  569. SOC_SINGLE_TLV("Power Amplifier Volume", SUN4I_CODEC_DAC_ACTL,
  570. SUN4I_CODEC_DAC_ACTL_PA_VOL, 0x3F, 0,
  571. sun4i_codec_pa_volume_scale),
  572. SOC_SINGLE_TLV("Line Playback Volume", SUN4I_CODEC_DAC_ACTL,
  573. SUN4I_CODEC_DAC_ACTL_LNG, 1, 0,
  574. sun4i_codec_linein_loopback_gain_scale),
  575. SOC_SINGLE_TLV("Line Boost Volume", SUN4I_CODEC_ADC_ACTL,
  576. SUN4I_CODEC_ADC_ACTL_LNPREG, 7, 0,
  577. sun4i_codec_linein_preamp_gain_scale),
  578. SOC_SINGLE_TLV("FM Playback Volume", SUN4I_CODEC_DAC_ACTL,
  579. SUN4I_CODEC_DAC_ACTL_FMG, 3, 0,
  580. sun4i_codec_fmin_loopback_gain_scale),
  581. SOC_SINGLE_TLV("Mic Playback Volume", SUN4I_CODEC_DAC_ACTL,
  582. SUN4I_CODEC_DAC_ACTL_MICG, 7, 0,
  583. sun4i_codec_micin_loopback_gain_scale),
  584. SOC_SINGLE_TLV("Mic1 Boost Volume", SUN4I_CODEC_ADC_ACTL,
  585. SUN4I_CODEC_ADC_ACTL_PREG1, 3, 0,
  586. sun4i_codec_micin_preamp_gain_scale),
  587. SOC_SINGLE_TLV("Mic2 Boost Volume", SUN4I_CODEC_ADC_ACTL,
  588. SUN4I_CODEC_ADC_ACTL_PREG2, 3, 0,
  589. sun4i_codec_micin_preamp_gain_scale),
  590. };
  591. static const struct snd_kcontrol_new sun7i_codec_controls[] = {
  592. SOC_SINGLE_TLV("Power Amplifier Volume", SUN4I_CODEC_DAC_ACTL,
  593. SUN4I_CODEC_DAC_ACTL_PA_VOL, 0x3F, 0,
  594. sun4i_codec_pa_volume_scale),
  595. SOC_SINGLE_TLV("Line Playback Volume", SUN4I_CODEC_DAC_ACTL,
  596. SUN4I_CODEC_DAC_ACTL_LNG, 1, 0,
  597. sun4i_codec_linein_loopback_gain_scale),
  598. SOC_SINGLE_TLV("Line Boost Volume", SUN4I_CODEC_ADC_ACTL,
  599. SUN4I_CODEC_ADC_ACTL_LNPREG, 7, 0,
  600. sun4i_codec_linein_preamp_gain_scale),
  601. SOC_SINGLE_TLV("FM Playback Volume", SUN4I_CODEC_DAC_ACTL,
  602. SUN4I_CODEC_DAC_ACTL_FMG, 3, 0,
  603. sun4i_codec_fmin_loopback_gain_scale),
  604. SOC_SINGLE_TLV("Mic Playback Volume", SUN4I_CODEC_DAC_ACTL,
  605. SUN4I_CODEC_DAC_ACTL_MICG, 7, 0,
  606. sun4i_codec_micin_loopback_gain_scale),
  607. SOC_SINGLE_TLV("Mic1 Boost Volume", SUN7I_CODEC_AC_MIC_PHONE_CAL,
  608. SUN7I_CODEC_AC_MIC_PHONE_CAL_PREG1, 7, 0,
  609. sun7i_codec_micin_preamp_gain_scale),
  610. SOC_SINGLE_TLV("Mic2 Boost Volume", SUN7I_CODEC_AC_MIC_PHONE_CAL,
  611. SUN7I_CODEC_AC_MIC_PHONE_CAL_PREG2, 7, 0,
  612. sun7i_codec_micin_preamp_gain_scale),
  613. };
  614. static const struct snd_kcontrol_new sun4i_codec_mixer_controls[] = {
  615. SOC_DAPM_SINGLE("Left Mixer Left DAC Playback Switch",
  616. SUN4I_CODEC_DAC_ACTL, SUN4I_CODEC_DAC_ACTL_LDACLMIXS,
  617. 1, 0),
  618. SOC_DAPM_SINGLE("Right Mixer Right DAC Playback Switch",
  619. SUN4I_CODEC_DAC_ACTL, SUN4I_CODEC_DAC_ACTL_RDACRMIXS,
  620. 1, 0),
  621. SOC_DAPM_SINGLE("Right Mixer Left DAC Playback Switch",
  622. SUN4I_CODEC_DAC_ACTL,
  623. SUN4I_CODEC_DAC_ACTL_LDACRMIXS, 1, 0),
  624. SOC_DAPM_DOUBLE("Line Playback Switch", SUN4I_CODEC_DAC_ACTL,
  625. SUN4I_CODEC_DAC_ACTL_LLNS,
  626. SUN4I_CODEC_DAC_ACTL_RLNS, 1, 0),
  627. SOC_DAPM_DOUBLE("FM Playback Switch", SUN4I_CODEC_DAC_ACTL,
  628. SUN4I_CODEC_DAC_ACTL_LFMS,
  629. SUN4I_CODEC_DAC_ACTL_RFMS, 1, 0),
  630. SOC_DAPM_DOUBLE("Mic1 Playback Switch", SUN4I_CODEC_DAC_ACTL,
  631. SUN4I_CODEC_DAC_ACTL_MIC1LS,
  632. SUN4I_CODEC_DAC_ACTL_MIC1RS, 1, 0),
  633. SOC_DAPM_DOUBLE("Mic2 Playback Switch", SUN4I_CODEC_DAC_ACTL,
  634. SUN4I_CODEC_DAC_ACTL_MIC2LS,
  635. SUN4I_CODEC_DAC_ACTL_MIC2RS, 1, 0),
  636. };
  637. static const struct snd_kcontrol_new sun4i_codec_pa_mixer_controls[] = {
  638. SOC_DAPM_SINGLE("DAC Playback Switch", SUN4I_CODEC_DAC_ACTL,
  639. SUN4I_CODEC_DAC_ACTL_DACPAS, 1, 0),
  640. SOC_DAPM_SINGLE("Mixer Playback Switch", SUN4I_CODEC_DAC_ACTL,
  641. SUN4I_CODEC_DAC_ACTL_MIXPAS, 1, 0),
  642. };
  643. static const struct snd_soc_dapm_widget sun4i_codec_codec_dapm_widgets[] = {
  644. /* Digital parts of the ADCs */
  645. SND_SOC_DAPM_SUPPLY("ADC", SUN4I_CODEC_ADC_FIFOC,
  646. SUN4I_CODEC_ADC_FIFOC_EN_AD, 0,
  647. NULL, 0),
  648. /* Digital parts of the DACs */
  649. SND_SOC_DAPM_SUPPLY("DAC", SUN4I_CODEC_DAC_DPC,
  650. SUN4I_CODEC_DAC_DPC_EN_DA, 0,
  651. NULL, 0),
  652. /* Analog parts of the ADCs */
  653. SND_SOC_DAPM_ADC("Left ADC", "Codec Capture", SUN4I_CODEC_ADC_ACTL,
  654. SUN4I_CODEC_ADC_ACTL_ADC_L_EN, 0),
  655. SND_SOC_DAPM_ADC("Right ADC", "Codec Capture", SUN4I_CODEC_ADC_ACTL,
  656. SUN4I_CODEC_ADC_ACTL_ADC_R_EN, 0),
  657. /* Analog parts of the DACs */
  658. SND_SOC_DAPM_DAC("Left DAC", "Codec Playback", SUN4I_CODEC_DAC_ACTL,
  659. SUN4I_CODEC_DAC_ACTL_DACAENL, 0),
  660. SND_SOC_DAPM_DAC("Right DAC", "Codec Playback", SUN4I_CODEC_DAC_ACTL,
  661. SUN4I_CODEC_DAC_ACTL_DACAENR, 0),
  662. /* Mixers */
  663. SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
  664. sun4i_codec_mixer_controls,
  665. ARRAY_SIZE(sun4i_codec_mixer_controls)),
  666. SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
  667. sun4i_codec_mixer_controls,
  668. ARRAY_SIZE(sun4i_codec_mixer_controls)),
  669. /* Global Mixer Enable */
  670. SND_SOC_DAPM_SUPPLY("Mixer Enable", SUN4I_CODEC_DAC_ACTL,
  671. SUN4I_CODEC_DAC_ACTL_MIXEN, 0, NULL, 0),
  672. /* VMIC */
  673. SND_SOC_DAPM_SUPPLY("VMIC", SUN4I_CODEC_ADC_ACTL,
  674. SUN4I_CODEC_ADC_ACTL_VMICEN, 0, NULL, 0),
  675. /* Mic Pre-Amplifiers */
  676. SND_SOC_DAPM_PGA("MIC1 Pre-Amplifier", SUN4I_CODEC_ADC_ACTL,
  677. SUN4I_CODEC_ADC_ACTL_PREG1EN, 0, NULL, 0),
  678. SND_SOC_DAPM_PGA("MIC2 Pre-Amplifier", SUN4I_CODEC_ADC_ACTL,
  679. SUN4I_CODEC_ADC_ACTL_PREG2EN, 0, NULL, 0),
  680. /* Power Amplifier */
  681. SND_SOC_DAPM_MIXER("Power Amplifier", SUN4I_CODEC_ADC_ACTL,
  682. SUN4I_CODEC_ADC_ACTL_PA_EN, 0,
  683. sun4i_codec_pa_mixer_controls,
  684. ARRAY_SIZE(sun4i_codec_pa_mixer_controls)),
  685. SND_SOC_DAPM_SWITCH("Power Amplifier Mute", SND_SOC_NOPM, 0, 0,
  686. &sun4i_codec_pa_mute),
  687. SND_SOC_DAPM_INPUT("Line Right"),
  688. SND_SOC_DAPM_INPUT("Line Left"),
  689. SND_SOC_DAPM_INPUT("FM Right"),
  690. SND_SOC_DAPM_INPUT("FM Left"),
  691. SND_SOC_DAPM_INPUT("Mic1"),
  692. SND_SOC_DAPM_INPUT("Mic2"),
  693. SND_SOC_DAPM_OUTPUT("HP Right"),
  694. SND_SOC_DAPM_OUTPUT("HP Left"),
  695. };
  696. static const struct snd_soc_dapm_route sun4i_codec_codec_dapm_routes[] = {
  697. /* Left ADC / DAC Routes */
  698. { "Left ADC", NULL, "ADC" },
  699. { "Left DAC", NULL, "DAC" },
  700. /* Right ADC / DAC Routes */
  701. { "Right ADC", NULL, "ADC" },
  702. { "Right DAC", NULL, "DAC" },
  703. /* Right Mixer Routes */
  704. { "Right Mixer", NULL, "Mixer Enable" },
  705. { "Right Mixer", "Right Mixer Left DAC Playback Switch", "Left DAC" },
  706. { "Right Mixer", "Right Mixer Right DAC Playback Switch", "Right DAC" },
  707. { "Right Mixer", "Line Playback Switch", "Line Right" },
  708. { "Right Mixer", "FM Playback Switch", "FM Right" },
  709. { "Right Mixer", "Mic1 Playback Switch", "MIC1 Pre-Amplifier" },
  710. { "Right Mixer", "Mic2 Playback Switch", "MIC2 Pre-Amplifier" },
  711. /* Left Mixer Routes */
  712. { "Left Mixer", NULL, "Mixer Enable" },
  713. { "Left Mixer", "Left Mixer Left DAC Playback Switch", "Left DAC" },
  714. { "Left Mixer", "Line Playback Switch", "Line Left" },
  715. { "Left Mixer", "FM Playback Switch", "FM Left" },
  716. { "Left Mixer", "Mic1 Playback Switch", "MIC1 Pre-Amplifier" },
  717. { "Left Mixer", "Mic2 Playback Switch", "MIC2 Pre-Amplifier" },
  718. /* Power Amplifier Routes */
  719. { "Power Amplifier", "Mixer Playback Switch", "Left Mixer" },
  720. { "Power Amplifier", "Mixer Playback Switch", "Right Mixer" },
  721. { "Power Amplifier", "DAC Playback Switch", "Left DAC" },
  722. { "Power Amplifier", "DAC Playback Switch", "Right DAC" },
  723. /* Headphone Output Routes */
  724. { "Power Amplifier Mute", "Switch", "Power Amplifier" },
  725. { "HP Right", NULL, "Power Amplifier Mute" },
  726. { "HP Left", NULL, "Power Amplifier Mute" },
  727. /* Mic1 Routes */
  728. { "Left ADC", NULL, "MIC1 Pre-Amplifier" },
  729. { "Right ADC", NULL, "MIC1 Pre-Amplifier" },
  730. { "MIC1 Pre-Amplifier", NULL, "Mic1"},
  731. { "Mic1", NULL, "VMIC" },
  732. /* Mic2 Routes */
  733. { "Left ADC", NULL, "MIC2 Pre-Amplifier" },
  734. { "Right ADC", NULL, "MIC2 Pre-Amplifier" },
  735. { "MIC2 Pre-Amplifier", NULL, "Mic2"},
  736. { "Mic2", NULL, "VMIC" },
  737. };
  738. static const struct snd_soc_component_driver sun4i_codec_codec = {
  739. .controls = sun4i_codec_controls,
  740. .num_controls = ARRAY_SIZE(sun4i_codec_controls),
  741. .dapm_widgets = sun4i_codec_codec_dapm_widgets,
  742. .num_dapm_widgets = ARRAY_SIZE(sun4i_codec_codec_dapm_widgets),
  743. .dapm_routes = sun4i_codec_codec_dapm_routes,
  744. .num_dapm_routes = ARRAY_SIZE(sun4i_codec_codec_dapm_routes),
  745. .idle_bias_on = 1,
  746. .use_pmdown_time = 1,
  747. .endianness = 1,
  748. };
  749. static const struct snd_soc_component_driver sun7i_codec_codec = {
  750. .controls = sun7i_codec_controls,
  751. .num_controls = ARRAY_SIZE(sun7i_codec_controls),
  752. .dapm_widgets = sun4i_codec_codec_dapm_widgets,
  753. .num_dapm_widgets = ARRAY_SIZE(sun4i_codec_codec_dapm_widgets),
  754. .dapm_routes = sun4i_codec_codec_dapm_routes,
  755. .num_dapm_routes = ARRAY_SIZE(sun4i_codec_codec_dapm_routes),
  756. .idle_bias_on = 1,
  757. .use_pmdown_time = 1,
  758. .endianness = 1,
  759. };
  760. /*** sun6i Codec ***/
  761. /* mixer controls */
  762. static const struct snd_kcontrol_new sun6i_codec_mixer_controls[] = {
  763. SOC_DAPM_DOUBLE("DAC Playback Switch",
  764. SUN6I_CODEC_OM_DACA_CTRL,
  765. SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACL,
  766. SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACR, 1, 0),
  767. SOC_DAPM_DOUBLE("DAC Reversed Playback Switch",
  768. SUN6I_CODEC_OM_DACA_CTRL,
  769. SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACR,
  770. SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACL, 1, 0),
  771. SOC_DAPM_DOUBLE("Line In Playback Switch",
  772. SUN6I_CODEC_OM_DACA_CTRL,
  773. SUN6I_CODEC_OM_DACA_CTRL_LMIX_LINEINL,
  774. SUN6I_CODEC_OM_DACA_CTRL_RMIX_LINEINR, 1, 0),
  775. SOC_DAPM_DOUBLE("Mic1 Playback Switch",
  776. SUN6I_CODEC_OM_DACA_CTRL,
  777. SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC1,
  778. SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC1, 1, 0),
  779. SOC_DAPM_DOUBLE("Mic2 Playback Switch",
  780. SUN6I_CODEC_OM_DACA_CTRL,
  781. SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC2,
  782. SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC2, 1, 0),
  783. };
  784. /* ADC mixer controls */
  785. static const struct snd_kcontrol_new sun6i_codec_adc_mixer_controls[] = {
  786. SOC_DAPM_DOUBLE("Mixer Capture Switch",
  787. SUN6I_CODEC_ADC_ACTL,
  788. SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXL,
  789. SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXR, 1, 0),
  790. SOC_DAPM_DOUBLE("Mixer Reversed Capture Switch",
  791. SUN6I_CODEC_ADC_ACTL,
  792. SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXR,
  793. SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXL, 1, 0),
  794. SOC_DAPM_DOUBLE("Line In Capture Switch",
  795. SUN6I_CODEC_ADC_ACTL,
  796. SUN6I_CODEC_ADC_ACTL_LADCMIX_LINEINL,
  797. SUN6I_CODEC_ADC_ACTL_RADCMIX_LINEINR, 1, 0),
  798. SOC_DAPM_DOUBLE("Mic1 Capture Switch",
  799. SUN6I_CODEC_ADC_ACTL,
  800. SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC1,
  801. SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC1, 1, 0),
  802. SOC_DAPM_DOUBLE("Mic2 Capture Switch",
  803. SUN6I_CODEC_ADC_ACTL,
  804. SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC2,
  805. SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC2, 1, 0),
  806. };
  807. /* headphone controls */
  808. static const char * const sun6i_codec_hp_src_enum_text[] = {
  809. "DAC", "Mixer",
  810. };
  811. static SOC_ENUM_DOUBLE_DECL(sun6i_codec_hp_src_enum,
  812. SUN6I_CODEC_OM_DACA_CTRL,
  813. SUN6I_CODEC_OM_DACA_CTRL_LHPIS,
  814. SUN6I_CODEC_OM_DACA_CTRL_RHPIS,
  815. sun6i_codec_hp_src_enum_text);
  816. static const struct snd_kcontrol_new sun6i_codec_hp_src[] = {
  817. SOC_DAPM_ENUM("Headphone Source Playback Route",
  818. sun6i_codec_hp_src_enum),
  819. };
  820. /* microphone controls */
  821. static const char * const sun6i_codec_mic2_src_enum_text[] = {
  822. "Mic2", "Mic3",
  823. };
  824. static SOC_ENUM_SINGLE_DECL(sun6i_codec_mic2_src_enum,
  825. SUN6I_CODEC_MIC_CTRL,
  826. SUN6I_CODEC_MIC_CTRL_MIC2SLT,
  827. sun6i_codec_mic2_src_enum_text);
  828. static const struct snd_kcontrol_new sun6i_codec_mic2_src[] = {
  829. SOC_DAPM_ENUM("Mic2 Amplifier Source Route",
  830. sun6i_codec_mic2_src_enum),
  831. };
  832. /* line out controls */
  833. static const char * const sun6i_codec_lineout_src_enum_text[] = {
  834. "Stereo", "Mono Differential",
  835. };
  836. static SOC_ENUM_DOUBLE_DECL(sun6i_codec_lineout_src_enum,
  837. SUN6I_CODEC_MIC_CTRL,
  838. SUN6I_CODEC_MIC_CTRL_LINEOUTLSRC,
  839. SUN6I_CODEC_MIC_CTRL_LINEOUTRSRC,
  840. sun6i_codec_lineout_src_enum_text);
  841. static const struct snd_kcontrol_new sun6i_codec_lineout_src[] = {
  842. SOC_DAPM_ENUM("Line Out Source Playback Route",
  843. sun6i_codec_lineout_src_enum),
  844. };
  845. /* volume / mute controls */
  846. static const DECLARE_TLV_DB_SCALE(sun6i_codec_dvol_scale, -7308, 116, 0);
  847. static const DECLARE_TLV_DB_SCALE(sun6i_codec_hp_vol_scale, -6300, 100, 1);
  848. static const DECLARE_TLV_DB_SCALE(sun6i_codec_out_mixer_pregain_scale,
  849. -450, 150, 0);
  850. static const DECLARE_TLV_DB_RANGE(sun6i_codec_lineout_vol_scale,
  851. 0, 1, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
  852. 2, 31, TLV_DB_SCALE_ITEM(-4350, 150, 0),
  853. );
  854. static const DECLARE_TLV_DB_RANGE(sun6i_codec_mic_gain_scale,
  855. 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
  856. 1, 7, TLV_DB_SCALE_ITEM(2400, 300, 0),
  857. );
  858. static const struct snd_kcontrol_new sun6i_codec_codec_widgets[] = {
  859. SOC_SINGLE_TLV("DAC Playback Volume", SUN4I_CODEC_DAC_DPC,
  860. SUN4I_CODEC_DAC_DPC_DVOL, 0x3f, 1,
  861. sun6i_codec_dvol_scale),
  862. SOC_SINGLE_TLV("Headphone Playback Volume",
  863. SUN6I_CODEC_OM_DACA_CTRL,
  864. SUN6I_CODEC_OM_DACA_CTRL_HPVOL, 0x3f, 0,
  865. sun6i_codec_hp_vol_scale),
  866. SOC_SINGLE_TLV("Line Out Playback Volume",
  867. SUN6I_CODEC_MIC_CTRL,
  868. SUN6I_CODEC_MIC_CTRL_LINEOUTVC, 0x1f, 0,
  869. sun6i_codec_lineout_vol_scale),
  870. SOC_DOUBLE("Headphone Playback Switch",
  871. SUN6I_CODEC_OM_DACA_CTRL,
  872. SUN6I_CODEC_OM_DACA_CTRL_LHPPAMUTE,
  873. SUN6I_CODEC_OM_DACA_CTRL_RHPPAMUTE, 1, 0),
  874. SOC_DOUBLE("Line Out Playback Switch",
  875. SUN6I_CODEC_MIC_CTRL,
  876. SUN6I_CODEC_MIC_CTRL_LINEOUTLEN,
  877. SUN6I_CODEC_MIC_CTRL_LINEOUTREN, 1, 0),
  878. /* Mixer pre-gains */
  879. SOC_SINGLE_TLV("Line In Playback Volume",
  880. SUN6I_CODEC_OM_PA_CTRL, SUN6I_CODEC_OM_PA_CTRL_LINEING,
  881. 0x7, 0, sun6i_codec_out_mixer_pregain_scale),
  882. SOC_SINGLE_TLV("Mic1 Playback Volume",
  883. SUN6I_CODEC_OM_PA_CTRL, SUN6I_CODEC_OM_PA_CTRL_MIC1G,
  884. 0x7, 0, sun6i_codec_out_mixer_pregain_scale),
  885. SOC_SINGLE_TLV("Mic2 Playback Volume",
  886. SUN6I_CODEC_OM_PA_CTRL, SUN6I_CODEC_OM_PA_CTRL_MIC2G,
  887. 0x7, 0, sun6i_codec_out_mixer_pregain_scale),
  888. /* Microphone Amp boost gains */
  889. SOC_SINGLE_TLV("Mic1 Boost Volume", SUN6I_CODEC_MIC_CTRL,
  890. SUN6I_CODEC_MIC_CTRL_MIC1BOOST, 0x7, 0,
  891. sun6i_codec_mic_gain_scale),
  892. SOC_SINGLE_TLV("Mic2 Boost Volume", SUN6I_CODEC_MIC_CTRL,
  893. SUN6I_CODEC_MIC_CTRL_MIC2BOOST, 0x7, 0,
  894. sun6i_codec_mic_gain_scale),
  895. SOC_DOUBLE_TLV("ADC Capture Volume",
  896. SUN6I_CODEC_ADC_ACTL, SUN6I_CODEC_ADC_ACTL_ADCLG,
  897. SUN6I_CODEC_ADC_ACTL_ADCRG, 0x7, 0,
  898. sun6i_codec_out_mixer_pregain_scale),
  899. };
  900. static const struct snd_soc_dapm_widget sun6i_codec_codec_dapm_widgets[] = {
  901. /* Microphone inputs */
  902. SND_SOC_DAPM_INPUT("MIC1"),
  903. SND_SOC_DAPM_INPUT("MIC2"),
  904. SND_SOC_DAPM_INPUT("MIC3"),
  905. /* Microphone Bias */
  906. SND_SOC_DAPM_SUPPLY("HBIAS", SUN6I_CODEC_MIC_CTRL,
  907. SUN6I_CODEC_MIC_CTRL_HBIASEN, 0, NULL, 0),
  908. SND_SOC_DAPM_SUPPLY("MBIAS", SUN6I_CODEC_MIC_CTRL,
  909. SUN6I_CODEC_MIC_CTRL_MBIASEN, 0, NULL, 0),
  910. /* Mic input path */
  911. SND_SOC_DAPM_MUX("Mic2 Amplifier Source Route",
  912. SND_SOC_NOPM, 0, 0, sun6i_codec_mic2_src),
  913. SND_SOC_DAPM_PGA("Mic1 Amplifier", SUN6I_CODEC_MIC_CTRL,
  914. SUN6I_CODEC_MIC_CTRL_MIC1AMPEN, 0, NULL, 0),
  915. SND_SOC_DAPM_PGA("Mic2 Amplifier", SUN6I_CODEC_MIC_CTRL,
  916. SUN6I_CODEC_MIC_CTRL_MIC2AMPEN, 0, NULL, 0),
  917. /* Line In */
  918. SND_SOC_DAPM_INPUT("LINEIN"),
  919. /* Digital parts of the ADCs */
  920. SND_SOC_DAPM_SUPPLY("ADC Enable", SUN6I_CODEC_ADC_FIFOC,
  921. SUN6I_CODEC_ADC_FIFOC_EN_AD, 0,
  922. NULL, 0),
  923. /* Analog parts of the ADCs */
  924. SND_SOC_DAPM_ADC("Left ADC", "Codec Capture", SUN6I_CODEC_ADC_ACTL,
  925. SUN6I_CODEC_ADC_ACTL_ADCLEN, 0),
  926. SND_SOC_DAPM_ADC("Right ADC", "Codec Capture", SUN6I_CODEC_ADC_ACTL,
  927. SUN6I_CODEC_ADC_ACTL_ADCREN, 0),
  928. /* ADC Mixers */
  929. SOC_MIXER_ARRAY("Left ADC Mixer", SND_SOC_NOPM, 0, 0,
  930. sun6i_codec_adc_mixer_controls),
  931. SOC_MIXER_ARRAY("Right ADC Mixer", SND_SOC_NOPM, 0, 0,
  932. sun6i_codec_adc_mixer_controls),
  933. /* Digital parts of the DACs */
  934. SND_SOC_DAPM_SUPPLY("DAC Enable", SUN4I_CODEC_DAC_DPC,
  935. SUN4I_CODEC_DAC_DPC_EN_DA, 0,
  936. NULL, 0),
  937. /* Analog parts of the DACs */
  938. SND_SOC_DAPM_DAC("Left DAC", "Codec Playback",
  939. SUN6I_CODEC_OM_DACA_CTRL,
  940. SUN6I_CODEC_OM_DACA_CTRL_DACALEN, 0),
  941. SND_SOC_DAPM_DAC("Right DAC", "Codec Playback",
  942. SUN6I_CODEC_OM_DACA_CTRL,
  943. SUN6I_CODEC_OM_DACA_CTRL_DACAREN, 0),
  944. /* Mixers */
  945. SOC_MIXER_ARRAY("Left Mixer", SUN6I_CODEC_OM_DACA_CTRL,
  946. SUN6I_CODEC_OM_DACA_CTRL_LMIXEN, 0,
  947. sun6i_codec_mixer_controls),
  948. SOC_MIXER_ARRAY("Right Mixer", SUN6I_CODEC_OM_DACA_CTRL,
  949. SUN6I_CODEC_OM_DACA_CTRL_RMIXEN, 0,
  950. sun6i_codec_mixer_controls),
  951. /* Headphone output path */
  952. SND_SOC_DAPM_MUX("Headphone Source Playback Route",
  953. SND_SOC_NOPM, 0, 0, sun6i_codec_hp_src),
  954. SND_SOC_DAPM_OUT_DRV("Headphone Amp", SUN6I_CODEC_OM_PA_CTRL,
  955. SUN6I_CODEC_OM_PA_CTRL_HPPAEN, 0, NULL, 0),
  956. SND_SOC_DAPM_SUPPLY("HPCOM Protection", SUN6I_CODEC_OM_PA_CTRL,
  957. SUN6I_CODEC_OM_PA_CTRL_COMPTEN, 0, NULL, 0),
  958. SND_SOC_DAPM_REG(snd_soc_dapm_supply, "HPCOM", SUN6I_CODEC_OM_PA_CTRL,
  959. SUN6I_CODEC_OM_PA_CTRL_HPCOM_CTL, 0x3, 0x3, 0),
  960. SND_SOC_DAPM_OUTPUT("HP"),
  961. /* Line Out path */
  962. SND_SOC_DAPM_MUX("Line Out Source Playback Route",
  963. SND_SOC_NOPM, 0, 0, sun6i_codec_lineout_src),
  964. SND_SOC_DAPM_OUTPUT("LINEOUT"),
  965. };
  966. static const struct snd_soc_dapm_route sun6i_codec_codec_dapm_routes[] = {
  967. /* DAC Routes */
  968. { "Left DAC", NULL, "DAC Enable" },
  969. { "Right DAC", NULL, "DAC Enable" },
  970. /* Microphone Routes */
  971. { "Mic1 Amplifier", NULL, "MIC1"},
  972. { "Mic2 Amplifier Source Route", "Mic2", "MIC2" },
  973. { "Mic2 Amplifier Source Route", "Mic3", "MIC3" },
  974. { "Mic2 Amplifier", NULL, "Mic2 Amplifier Source Route"},
  975. /* Left Mixer Routes */
  976. { "Left Mixer", "DAC Playback Switch", "Left DAC" },
  977. { "Left Mixer", "DAC Reversed Playback Switch", "Right DAC" },
  978. { "Left Mixer", "Line In Playback Switch", "LINEIN" },
  979. { "Left Mixer", "Mic1 Playback Switch", "Mic1 Amplifier" },
  980. { "Left Mixer", "Mic2 Playback Switch", "Mic2 Amplifier" },
  981. /* Right Mixer Routes */
  982. { "Right Mixer", "DAC Playback Switch", "Right DAC" },
  983. { "Right Mixer", "DAC Reversed Playback Switch", "Left DAC" },
  984. { "Right Mixer", "Line In Playback Switch", "LINEIN" },
  985. { "Right Mixer", "Mic1 Playback Switch", "Mic1 Amplifier" },
  986. { "Right Mixer", "Mic2 Playback Switch", "Mic2 Amplifier" },
  987. /* Left ADC Mixer Routes */
  988. { "Left ADC Mixer", "Mixer Capture Switch", "Left Mixer" },
  989. { "Left ADC Mixer", "Mixer Reversed Capture Switch", "Right Mixer" },
  990. { "Left ADC Mixer", "Line In Capture Switch", "LINEIN" },
  991. { "Left ADC Mixer", "Mic1 Capture Switch", "Mic1 Amplifier" },
  992. { "Left ADC Mixer", "Mic2 Capture Switch", "Mic2 Amplifier" },
  993. /* Right ADC Mixer Routes */
  994. { "Right ADC Mixer", "Mixer Capture Switch", "Right Mixer" },
  995. { "Right ADC Mixer", "Mixer Reversed Capture Switch", "Left Mixer" },
  996. { "Right ADC Mixer", "Line In Capture Switch", "LINEIN" },
  997. { "Right ADC Mixer", "Mic1 Capture Switch", "Mic1 Amplifier" },
  998. { "Right ADC Mixer", "Mic2 Capture Switch", "Mic2 Amplifier" },
  999. /* Headphone Routes */
  1000. { "Headphone Source Playback Route", "DAC", "Left DAC" },
  1001. { "Headphone Source Playback Route", "DAC", "Right DAC" },
  1002. { "Headphone Source Playback Route", "Mixer", "Left Mixer" },
  1003. { "Headphone Source Playback Route", "Mixer", "Right Mixer" },
  1004. { "Headphone Amp", NULL, "Headphone Source Playback Route" },
  1005. { "HP", NULL, "Headphone Amp" },
  1006. { "HPCOM", NULL, "HPCOM Protection" },
  1007. /* Line Out Routes */
  1008. { "Line Out Source Playback Route", "Stereo", "Left Mixer" },
  1009. { "Line Out Source Playback Route", "Stereo", "Right Mixer" },
  1010. { "Line Out Source Playback Route", "Mono Differential", "Left Mixer" },
  1011. { "Line Out Source Playback Route", "Mono Differential", "Right Mixer" },
  1012. { "LINEOUT", NULL, "Line Out Source Playback Route" },
  1013. /* ADC Routes */
  1014. { "Left ADC", NULL, "ADC Enable" },
  1015. { "Right ADC", NULL, "ADC Enable" },
  1016. { "Left ADC", NULL, "Left ADC Mixer" },
  1017. { "Right ADC", NULL, "Right ADC Mixer" },
  1018. };
  1019. static const struct snd_soc_component_driver sun6i_codec_codec = {
  1020. .controls = sun6i_codec_codec_widgets,
  1021. .num_controls = ARRAY_SIZE(sun6i_codec_codec_widgets),
  1022. .dapm_widgets = sun6i_codec_codec_dapm_widgets,
  1023. .num_dapm_widgets = ARRAY_SIZE(sun6i_codec_codec_dapm_widgets),
  1024. .dapm_routes = sun6i_codec_codec_dapm_routes,
  1025. .num_dapm_routes = ARRAY_SIZE(sun6i_codec_codec_dapm_routes),
  1026. .idle_bias_on = 1,
  1027. .use_pmdown_time = 1,
  1028. .endianness = 1,
  1029. };
  1030. /* sun8i A23 codec */
  1031. static const struct snd_kcontrol_new sun8i_a23_codec_codec_controls[] = {
  1032. SOC_SINGLE_TLV("DAC Playback Volume", SUN4I_CODEC_DAC_DPC,
  1033. SUN4I_CODEC_DAC_DPC_DVOL, 0x3f, 1,
  1034. sun6i_codec_dvol_scale),
  1035. };
  1036. static const struct snd_soc_dapm_widget sun8i_a23_codec_codec_widgets[] = {
  1037. /* Digital parts of the ADCs */
  1038. SND_SOC_DAPM_SUPPLY("ADC Enable", SUN6I_CODEC_ADC_FIFOC,
  1039. SUN6I_CODEC_ADC_FIFOC_EN_AD, 0, NULL, 0),
  1040. /* Digital parts of the DACs */
  1041. SND_SOC_DAPM_SUPPLY("DAC Enable", SUN4I_CODEC_DAC_DPC,
  1042. SUN4I_CODEC_DAC_DPC_EN_DA, 0, NULL, 0),
  1043. };
  1044. static const struct snd_soc_component_driver sun8i_a23_codec_codec = {
  1045. .controls = sun8i_a23_codec_codec_controls,
  1046. .num_controls = ARRAY_SIZE(sun8i_a23_codec_codec_controls),
  1047. .dapm_widgets = sun8i_a23_codec_codec_widgets,
  1048. .num_dapm_widgets = ARRAY_SIZE(sun8i_a23_codec_codec_widgets),
  1049. .idle_bias_on = 1,
  1050. .use_pmdown_time = 1,
  1051. .endianness = 1,
  1052. };
  1053. static const struct snd_soc_component_driver sun4i_codec_component = {
  1054. .name = "sun4i-codec",
  1055. .legacy_dai_naming = 1,
  1056. #ifdef CONFIG_DEBUG_FS
  1057. .debugfs_prefix = "cpu",
  1058. #endif
  1059. };
  1060. #define SUN4I_CODEC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
  1061. SNDRV_PCM_FMTBIT_S32_LE)
  1062. static int sun4i_codec_dai_probe(struct snd_soc_dai *dai)
  1063. {
  1064. struct snd_soc_card *card = snd_soc_dai_get_drvdata(dai);
  1065. struct sun4i_codec *scodec = snd_soc_card_get_drvdata(card);
  1066. snd_soc_dai_init_dma_data(dai, &scodec->playback_dma_data,
  1067. &scodec->capture_dma_data);
  1068. return 0;
  1069. }
  1070. static const struct snd_soc_dai_ops dummy_dai_ops = {
  1071. .probe = sun4i_codec_dai_probe,
  1072. };
  1073. static struct snd_soc_dai_driver dummy_cpu_dai = {
  1074. .name = "sun4i-codec-cpu-dai",
  1075. .playback = {
  1076. .stream_name = "Playback",
  1077. .channels_min = 1,
  1078. .channels_max = 2,
  1079. .rates = SUN4I_CODEC_RATES,
  1080. .formats = SUN4I_CODEC_FORMATS,
  1081. .sig_bits = 24,
  1082. },
  1083. .capture = {
  1084. .stream_name = "Capture",
  1085. .channels_min = 1,
  1086. .channels_max = 2,
  1087. .rates = SUN4I_CODEC_RATES,
  1088. .formats = SUN4I_CODEC_FORMATS,
  1089. .sig_bits = 24,
  1090. },
  1091. .ops = &dummy_dai_ops,
  1092. };
  1093. static struct snd_soc_jack sun4i_headphone_jack;
  1094. static struct snd_soc_jack_pin sun4i_headphone_jack_pins[] = {
  1095. { .pin = "Headphone", .mask = SND_JACK_HEADPHONE },
  1096. };
  1097. static struct snd_soc_jack_gpio sun4i_headphone_jack_gpio = {
  1098. .name = "hp-det",
  1099. .report = SND_JACK_HEADPHONE,
  1100. .debounce_time = 150,
  1101. };
  1102. static int sun4i_codec_machine_init(struct snd_soc_pcm_runtime *rtd)
  1103. {
  1104. struct snd_soc_card *card = rtd->card;
  1105. struct sun4i_codec *scodec = snd_soc_card_get_drvdata(card);
  1106. int ret;
  1107. if (scodec->gpio_hp) {
  1108. ret = snd_soc_card_jack_new_pins(card, "Headphone Jack",
  1109. SND_JACK_HEADPHONE,
  1110. &sun4i_headphone_jack,
  1111. sun4i_headphone_jack_pins,
  1112. ARRAY_SIZE(sun4i_headphone_jack_pins));
  1113. if (ret) {
  1114. dev_err(rtd->dev,
  1115. "Headphone jack creation failed: %d\n", ret);
  1116. return ret;
  1117. }
  1118. sun4i_headphone_jack_gpio.desc = scodec->gpio_hp;
  1119. ret = snd_soc_jack_add_gpios(&sun4i_headphone_jack, 1,
  1120. &sun4i_headphone_jack_gpio);
  1121. if (ret) {
  1122. dev_err(rtd->dev, "Headphone GPIO not added: %d\n", ret);
  1123. return ret;
  1124. }
  1125. }
  1126. return 0;
  1127. }
  1128. static struct snd_soc_dai_link *sun4i_codec_create_link(struct device *dev,
  1129. int *num_links)
  1130. {
  1131. struct snd_soc_dai_link *link = devm_kzalloc(dev, sizeof(*link),
  1132. GFP_KERNEL);
  1133. struct snd_soc_dai_link_component *dlc = devm_kzalloc(dev,
  1134. 3 * sizeof(*dlc), GFP_KERNEL);
  1135. if (!link || !dlc)
  1136. return NULL;
  1137. link->cpus = &dlc[0];
  1138. link->codecs = &dlc[1];
  1139. link->platforms = &dlc[2];
  1140. link->num_cpus = 1;
  1141. link->num_codecs = 1;
  1142. link->num_platforms = 1;
  1143. link->name = "cdc";
  1144. link->stream_name = "CDC PCM";
  1145. link->codecs->dai_name = "Codec";
  1146. link->cpus->dai_name = dev_name(dev);
  1147. link->codecs->name = dev_name(dev);
  1148. link->platforms->name = dev_name(dev);
  1149. link->dai_fmt = SND_SOC_DAIFMT_I2S;
  1150. link->init = sun4i_codec_machine_init;
  1151. *num_links = 1;
  1152. return link;
  1153. };
  1154. static int sun4i_codec_spk_event(struct snd_soc_dapm_widget *w,
  1155. struct snd_kcontrol *k, int event)
  1156. {
  1157. struct sun4i_codec *scodec = snd_soc_card_get_drvdata(w->dapm->card);
  1158. gpiod_set_value_cansleep(scodec->gpio_pa,
  1159. !!SND_SOC_DAPM_EVENT_ON(event));
  1160. if (SND_SOC_DAPM_EVENT_ON(event)) {
  1161. /*
  1162. * Need a delay to wait for DAC to push the data. 700ms seems
  1163. * to be the best compromise not to feel this delay while
  1164. * playing a sound.
  1165. */
  1166. msleep(700);
  1167. }
  1168. return 0;
  1169. }
  1170. static const struct snd_soc_dapm_widget sun4i_codec_card_dapm_widgets[] = {
  1171. SND_SOC_DAPM_SPK("Speaker", sun4i_codec_spk_event),
  1172. };
  1173. static const struct snd_soc_dapm_route sun4i_codec_card_dapm_routes[] = {
  1174. { "Speaker", NULL, "HP Right" },
  1175. { "Speaker", NULL, "HP Left" },
  1176. };
  1177. static struct snd_soc_card *sun4i_codec_create_card(struct device *dev)
  1178. {
  1179. struct snd_soc_card *card;
  1180. card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
  1181. if (!card)
  1182. return ERR_PTR(-ENOMEM);
  1183. card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
  1184. if (!card->dai_link)
  1185. return ERR_PTR(-ENOMEM);
  1186. card->dev = dev;
  1187. card->owner = THIS_MODULE;
  1188. card->name = "sun4i-codec";
  1189. card->dapm_widgets = sun4i_codec_card_dapm_widgets;
  1190. card->num_dapm_widgets = ARRAY_SIZE(sun4i_codec_card_dapm_widgets);
  1191. card->dapm_routes = sun4i_codec_card_dapm_routes;
  1192. card->num_dapm_routes = ARRAY_SIZE(sun4i_codec_card_dapm_routes);
  1193. return card;
  1194. };
  1195. static const struct snd_soc_dapm_widget sun6i_codec_card_dapm_widgets[] = {
  1196. SND_SOC_DAPM_HP("Headphone", NULL),
  1197. SND_SOC_DAPM_LINE("Line In", NULL),
  1198. SND_SOC_DAPM_LINE("Line Out", NULL),
  1199. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  1200. SND_SOC_DAPM_MIC("Mic", NULL),
  1201. SND_SOC_DAPM_SPK("Speaker", sun4i_codec_spk_event),
  1202. };
  1203. static struct snd_soc_card *sun6i_codec_create_card(struct device *dev)
  1204. {
  1205. struct snd_soc_card *card;
  1206. int ret;
  1207. card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
  1208. if (!card)
  1209. return ERR_PTR(-ENOMEM);
  1210. card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
  1211. if (!card->dai_link)
  1212. return ERR_PTR(-ENOMEM);
  1213. card->dev = dev;
  1214. card->owner = THIS_MODULE;
  1215. card->name = "A31 Audio Codec";
  1216. card->dapm_widgets = sun6i_codec_card_dapm_widgets;
  1217. card->num_dapm_widgets = ARRAY_SIZE(sun6i_codec_card_dapm_widgets);
  1218. card->fully_routed = true;
  1219. ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
  1220. if (ret)
  1221. dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
  1222. return card;
  1223. };
  1224. /* Connect digital side enables to analog side widgets */
  1225. static const struct snd_soc_dapm_route sun8i_codec_card_routes[] = {
  1226. /* ADC Routes */
  1227. { "Left ADC", NULL, "ADC Enable" },
  1228. { "Right ADC", NULL, "ADC Enable" },
  1229. { "Codec Capture", NULL, "Left ADC" },
  1230. { "Codec Capture", NULL, "Right ADC" },
  1231. /* DAC Routes */
  1232. { "Left DAC", NULL, "DAC Enable" },
  1233. { "Right DAC", NULL, "DAC Enable" },
  1234. { "Left DAC", NULL, "Codec Playback" },
  1235. { "Right DAC", NULL, "Codec Playback" },
  1236. };
  1237. static struct snd_soc_aux_dev aux_dev = {
  1238. .dlc = COMP_EMPTY(),
  1239. };
  1240. static struct snd_soc_card *sun8i_a23_codec_create_card(struct device *dev)
  1241. {
  1242. struct snd_soc_card *card;
  1243. int ret;
  1244. card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
  1245. if (!card)
  1246. return ERR_PTR(-ENOMEM);
  1247. aux_dev.dlc.of_node = of_parse_phandle(dev->of_node,
  1248. "allwinner,codec-analog-controls",
  1249. 0);
  1250. if (!aux_dev.dlc.of_node) {
  1251. dev_err(dev, "Can't find analog controls for codec.\n");
  1252. return ERR_PTR(-EINVAL);
  1253. }
  1254. card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
  1255. if (!card->dai_link)
  1256. return ERR_PTR(-ENOMEM);
  1257. card->dev = dev;
  1258. card->owner = THIS_MODULE;
  1259. card->name = "A23 Audio Codec";
  1260. card->dapm_widgets = sun6i_codec_card_dapm_widgets;
  1261. card->num_dapm_widgets = ARRAY_SIZE(sun6i_codec_card_dapm_widgets);
  1262. card->dapm_routes = sun8i_codec_card_routes;
  1263. card->num_dapm_routes = ARRAY_SIZE(sun8i_codec_card_routes);
  1264. card->aux_dev = &aux_dev;
  1265. card->num_aux_devs = 1;
  1266. card->fully_routed = true;
  1267. ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
  1268. if (ret)
  1269. dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
  1270. return card;
  1271. };
  1272. static struct snd_soc_card *sun8i_h3_codec_create_card(struct device *dev)
  1273. {
  1274. struct snd_soc_card *card;
  1275. int ret;
  1276. card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
  1277. if (!card)
  1278. return ERR_PTR(-ENOMEM);
  1279. aux_dev.dlc.of_node = of_parse_phandle(dev->of_node,
  1280. "allwinner,codec-analog-controls",
  1281. 0);
  1282. if (!aux_dev.dlc.of_node) {
  1283. dev_err(dev, "Can't find analog controls for codec.\n");
  1284. return ERR_PTR(-EINVAL);
  1285. }
  1286. card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
  1287. if (!card->dai_link)
  1288. return ERR_PTR(-ENOMEM);
  1289. card->dev = dev;
  1290. card->owner = THIS_MODULE;
  1291. card->name = "H3 Audio Codec";
  1292. card->dapm_widgets = sun6i_codec_card_dapm_widgets;
  1293. card->num_dapm_widgets = ARRAY_SIZE(sun6i_codec_card_dapm_widgets);
  1294. card->dapm_routes = sun8i_codec_card_routes;
  1295. card->num_dapm_routes = ARRAY_SIZE(sun8i_codec_card_routes);
  1296. card->aux_dev = &aux_dev;
  1297. card->num_aux_devs = 1;
  1298. card->fully_routed = true;
  1299. ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
  1300. if (ret)
  1301. dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
  1302. return card;
  1303. };
  1304. static struct snd_soc_card *sun8i_v3s_codec_create_card(struct device *dev)
  1305. {
  1306. struct snd_soc_card *card;
  1307. int ret;
  1308. card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
  1309. if (!card)
  1310. return ERR_PTR(-ENOMEM);
  1311. aux_dev.dlc.of_node = of_parse_phandle(dev->of_node,
  1312. "allwinner,codec-analog-controls",
  1313. 0);
  1314. if (!aux_dev.dlc.of_node) {
  1315. dev_err(dev, "Can't find analog controls for codec.\n");
  1316. return ERR_PTR(-EINVAL);
  1317. }
  1318. card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
  1319. if (!card->dai_link)
  1320. return ERR_PTR(-ENOMEM);
  1321. card->dev = dev;
  1322. card->owner = THIS_MODULE;
  1323. card->name = "V3s Audio Codec";
  1324. card->dapm_widgets = sun6i_codec_card_dapm_widgets;
  1325. card->num_dapm_widgets = ARRAY_SIZE(sun6i_codec_card_dapm_widgets);
  1326. card->dapm_routes = sun8i_codec_card_routes;
  1327. card->num_dapm_routes = ARRAY_SIZE(sun8i_codec_card_routes);
  1328. card->aux_dev = &aux_dev;
  1329. card->num_aux_devs = 1;
  1330. card->fully_routed = true;
  1331. ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
  1332. if (ret)
  1333. dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
  1334. return card;
  1335. };
  1336. static const struct regmap_config sun4i_codec_regmap_config = {
  1337. .reg_bits = 32,
  1338. .reg_stride = 4,
  1339. .val_bits = 32,
  1340. .max_register = SUN4I_CODEC_ADC_RXCNT,
  1341. };
  1342. static const struct regmap_config sun6i_codec_regmap_config = {
  1343. .reg_bits = 32,
  1344. .reg_stride = 4,
  1345. .val_bits = 32,
  1346. .max_register = SUN6I_CODEC_HMIC_DATA,
  1347. };
  1348. static const struct regmap_config sun7i_codec_regmap_config = {
  1349. .reg_bits = 32,
  1350. .reg_stride = 4,
  1351. .val_bits = 32,
  1352. .max_register = SUN7I_CODEC_AC_MIC_PHONE_CAL,
  1353. };
  1354. static const struct regmap_config sun8i_a23_codec_regmap_config = {
  1355. .reg_bits = 32,
  1356. .reg_stride = 4,
  1357. .val_bits = 32,
  1358. .max_register = SUN8I_A23_CODEC_ADC_RXCNT,
  1359. };
  1360. static const struct regmap_config sun8i_h3_codec_regmap_config = {
  1361. .reg_bits = 32,
  1362. .reg_stride = 4,
  1363. .val_bits = 32,
  1364. .max_register = SUN8I_H3_CODEC_ADC_DBG,
  1365. };
  1366. static const struct regmap_config sun8i_v3s_codec_regmap_config = {
  1367. .reg_bits = 32,
  1368. .reg_stride = 4,
  1369. .val_bits = 32,
  1370. .max_register = SUN8I_H3_CODEC_ADC_DBG,
  1371. };
  1372. struct sun4i_codec_quirks {
  1373. const struct regmap_config *regmap_config;
  1374. const struct snd_soc_component_driver *codec;
  1375. struct snd_soc_card * (*create_card)(struct device *dev);
  1376. struct reg_field reg_adc_fifoc; /* used for regmap_field */
  1377. unsigned int reg_dac_txdata; /* TX FIFO offset for DMA config */
  1378. unsigned int reg_adc_rxdata; /* RX FIFO offset for DMA config */
  1379. bool has_reset;
  1380. };
  1381. static const struct sun4i_codec_quirks sun4i_codec_quirks = {
  1382. .regmap_config = &sun4i_codec_regmap_config,
  1383. .codec = &sun4i_codec_codec,
  1384. .create_card = sun4i_codec_create_card,
  1385. .reg_adc_fifoc = REG_FIELD(SUN4I_CODEC_ADC_FIFOC, 0, 31),
  1386. .reg_dac_txdata = SUN4I_CODEC_DAC_TXDATA,
  1387. .reg_adc_rxdata = SUN4I_CODEC_ADC_RXDATA,
  1388. };
  1389. static const struct sun4i_codec_quirks sun6i_a31_codec_quirks = {
  1390. .regmap_config = &sun6i_codec_regmap_config,
  1391. .codec = &sun6i_codec_codec,
  1392. .create_card = sun6i_codec_create_card,
  1393. .reg_adc_fifoc = REG_FIELD(SUN6I_CODEC_ADC_FIFOC, 0, 31),
  1394. .reg_dac_txdata = SUN4I_CODEC_DAC_TXDATA,
  1395. .reg_adc_rxdata = SUN6I_CODEC_ADC_RXDATA,
  1396. .has_reset = true,
  1397. };
  1398. static const struct sun4i_codec_quirks sun7i_codec_quirks = {
  1399. .regmap_config = &sun7i_codec_regmap_config,
  1400. .codec = &sun7i_codec_codec,
  1401. .create_card = sun4i_codec_create_card,
  1402. .reg_adc_fifoc = REG_FIELD(SUN4I_CODEC_ADC_FIFOC, 0, 31),
  1403. .reg_dac_txdata = SUN4I_CODEC_DAC_TXDATA,
  1404. .reg_adc_rxdata = SUN4I_CODEC_ADC_RXDATA,
  1405. };
  1406. static const struct sun4i_codec_quirks sun8i_a23_codec_quirks = {
  1407. .regmap_config = &sun8i_a23_codec_regmap_config,
  1408. .codec = &sun8i_a23_codec_codec,
  1409. .create_card = sun8i_a23_codec_create_card,
  1410. .reg_adc_fifoc = REG_FIELD(SUN6I_CODEC_ADC_FIFOC, 0, 31),
  1411. .reg_dac_txdata = SUN4I_CODEC_DAC_TXDATA,
  1412. .reg_adc_rxdata = SUN6I_CODEC_ADC_RXDATA,
  1413. .has_reset = true,
  1414. };
  1415. static const struct sun4i_codec_quirks sun8i_h3_codec_quirks = {
  1416. .regmap_config = &sun8i_h3_codec_regmap_config,
  1417. /*
  1418. * TODO Share the codec structure with A23 for now.
  1419. * This should be split out when adding digital audio
  1420. * processing support for the H3.
  1421. */
  1422. .codec = &sun8i_a23_codec_codec,
  1423. .create_card = sun8i_h3_codec_create_card,
  1424. .reg_adc_fifoc = REG_FIELD(SUN6I_CODEC_ADC_FIFOC, 0, 31),
  1425. .reg_dac_txdata = SUN8I_H3_CODEC_DAC_TXDATA,
  1426. .reg_adc_rxdata = SUN6I_CODEC_ADC_RXDATA,
  1427. .has_reset = true,
  1428. };
  1429. static const struct sun4i_codec_quirks sun8i_v3s_codec_quirks = {
  1430. .regmap_config = &sun8i_v3s_codec_regmap_config,
  1431. /*
  1432. * TODO The codec structure should be split out, like
  1433. * H3, when adding digital audio processing support.
  1434. */
  1435. .codec = &sun8i_a23_codec_codec,
  1436. .create_card = sun8i_v3s_codec_create_card,
  1437. .reg_adc_fifoc = REG_FIELD(SUN6I_CODEC_ADC_FIFOC, 0, 31),
  1438. .reg_dac_txdata = SUN8I_H3_CODEC_DAC_TXDATA,
  1439. .reg_adc_rxdata = SUN6I_CODEC_ADC_RXDATA,
  1440. .has_reset = true,
  1441. };
  1442. static const struct of_device_id sun4i_codec_of_match[] = {
  1443. {
  1444. .compatible = "allwinner,sun4i-a10-codec",
  1445. .data = &sun4i_codec_quirks,
  1446. },
  1447. {
  1448. .compatible = "allwinner,sun6i-a31-codec",
  1449. .data = &sun6i_a31_codec_quirks,
  1450. },
  1451. {
  1452. .compatible = "allwinner,sun7i-a20-codec",
  1453. .data = &sun7i_codec_quirks,
  1454. },
  1455. {
  1456. .compatible = "allwinner,sun8i-a23-codec",
  1457. .data = &sun8i_a23_codec_quirks,
  1458. },
  1459. {
  1460. .compatible = "allwinner,sun8i-h3-codec",
  1461. .data = &sun8i_h3_codec_quirks,
  1462. },
  1463. {
  1464. .compatible = "allwinner,sun8i-v3s-codec",
  1465. .data = &sun8i_v3s_codec_quirks,
  1466. },
  1467. {}
  1468. };
  1469. MODULE_DEVICE_TABLE(of, sun4i_codec_of_match);
  1470. static int sun4i_codec_probe(struct platform_device *pdev)
  1471. {
  1472. struct snd_soc_card *card;
  1473. struct sun4i_codec *scodec;
  1474. const struct sun4i_codec_quirks *quirks;
  1475. struct resource *res;
  1476. void __iomem *base;
  1477. int ret;
  1478. scodec = devm_kzalloc(&pdev->dev, sizeof(*scodec), GFP_KERNEL);
  1479. if (!scodec)
  1480. return -ENOMEM;
  1481. scodec->dev = &pdev->dev;
  1482. base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
  1483. if (IS_ERR(base))
  1484. return PTR_ERR(base);
  1485. quirks = of_device_get_match_data(&pdev->dev);
  1486. if (quirks == NULL) {
  1487. dev_err(&pdev->dev, "Failed to determine the quirks to use\n");
  1488. return -ENODEV;
  1489. }
  1490. scodec->regmap = devm_regmap_init_mmio(&pdev->dev, base,
  1491. quirks->regmap_config);
  1492. if (IS_ERR(scodec->regmap)) {
  1493. dev_err(&pdev->dev, "Failed to create our regmap\n");
  1494. return PTR_ERR(scodec->regmap);
  1495. }
  1496. /* Get the clocks from the DT */
  1497. scodec->clk_apb = devm_clk_get(&pdev->dev, "apb");
  1498. if (IS_ERR(scodec->clk_apb)) {
  1499. dev_err(&pdev->dev, "Failed to get the APB clock\n");
  1500. return PTR_ERR(scodec->clk_apb);
  1501. }
  1502. scodec->clk_module = devm_clk_get(&pdev->dev, "codec");
  1503. if (IS_ERR(scodec->clk_module)) {
  1504. dev_err(&pdev->dev, "Failed to get the module clock\n");
  1505. return PTR_ERR(scodec->clk_module);
  1506. }
  1507. if (quirks->has_reset) {
  1508. scodec->rst = devm_reset_control_get_exclusive(&pdev->dev,
  1509. NULL);
  1510. if (IS_ERR(scodec->rst)) {
  1511. dev_err(&pdev->dev, "Failed to get reset control\n");
  1512. return PTR_ERR(scodec->rst);
  1513. }
  1514. }
  1515. scodec->gpio_pa = devm_gpiod_get_optional(&pdev->dev, "allwinner,pa",
  1516. GPIOD_OUT_LOW);
  1517. if (IS_ERR(scodec->gpio_pa)) {
  1518. ret = PTR_ERR(scodec->gpio_pa);
  1519. dev_err_probe(&pdev->dev, ret, "Failed to get pa gpio\n");
  1520. return ret;
  1521. }
  1522. scodec->gpio_hp = devm_gpiod_get_optional(&pdev->dev, "hp-det", GPIOD_IN);
  1523. if (IS_ERR(scodec->gpio_hp)) {
  1524. ret = PTR_ERR(scodec->gpio_hp);
  1525. dev_err_probe(&pdev->dev, ret, "Failed to get hp-det gpio\n");
  1526. return ret;
  1527. }
  1528. /* reg_field setup */
  1529. scodec->reg_adc_fifoc = devm_regmap_field_alloc(&pdev->dev,
  1530. scodec->regmap,
  1531. quirks->reg_adc_fifoc);
  1532. if (IS_ERR(scodec->reg_adc_fifoc)) {
  1533. ret = PTR_ERR(scodec->reg_adc_fifoc);
  1534. dev_err(&pdev->dev, "Failed to create regmap fields: %d\n",
  1535. ret);
  1536. return ret;
  1537. }
  1538. /* Enable the bus clock */
  1539. if (clk_prepare_enable(scodec->clk_apb)) {
  1540. dev_err(&pdev->dev, "Failed to enable the APB clock\n");
  1541. return -EINVAL;
  1542. }
  1543. /* Deassert the reset control */
  1544. if (scodec->rst) {
  1545. ret = reset_control_deassert(scodec->rst);
  1546. if (ret) {
  1547. dev_err(&pdev->dev,
  1548. "Failed to deassert the reset control\n");
  1549. goto err_clk_disable;
  1550. }
  1551. }
  1552. /* DMA configuration for TX FIFO */
  1553. scodec->playback_dma_data.addr = res->start + quirks->reg_dac_txdata;
  1554. scodec->playback_dma_data.maxburst = 8;
  1555. scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
  1556. /* DMA configuration for RX FIFO */
  1557. scodec->capture_dma_data.addr = res->start + quirks->reg_adc_rxdata;
  1558. scodec->capture_dma_data.maxburst = 8;
  1559. scodec->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
  1560. ret = devm_snd_soc_register_component(&pdev->dev, quirks->codec,
  1561. &sun4i_codec_dai, 1);
  1562. if (ret) {
  1563. dev_err(&pdev->dev, "Failed to register our codec\n");
  1564. goto err_assert_reset;
  1565. }
  1566. ret = devm_snd_soc_register_component(&pdev->dev,
  1567. &sun4i_codec_component,
  1568. &dummy_cpu_dai, 1);
  1569. if (ret) {
  1570. dev_err(&pdev->dev, "Failed to register our DAI\n");
  1571. goto err_assert_reset;
  1572. }
  1573. ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
  1574. if (ret) {
  1575. dev_err(&pdev->dev, "Failed to register against DMAEngine\n");
  1576. goto err_assert_reset;
  1577. }
  1578. card = quirks->create_card(&pdev->dev);
  1579. if (IS_ERR(card)) {
  1580. ret = PTR_ERR(card);
  1581. dev_err(&pdev->dev, "Failed to create our card\n");
  1582. goto err_assert_reset;
  1583. }
  1584. snd_soc_card_set_drvdata(card, scodec);
  1585. ret = snd_soc_register_card(card);
  1586. if (ret) {
  1587. dev_err_probe(&pdev->dev, ret, "Failed to register our card\n");
  1588. goto err_assert_reset;
  1589. }
  1590. return 0;
  1591. err_assert_reset:
  1592. if (scodec->rst)
  1593. reset_control_assert(scodec->rst);
  1594. err_clk_disable:
  1595. clk_disable_unprepare(scodec->clk_apb);
  1596. return ret;
  1597. }
  1598. static void sun4i_codec_remove(struct platform_device *pdev)
  1599. {
  1600. struct snd_soc_card *card = platform_get_drvdata(pdev);
  1601. struct sun4i_codec *scodec = snd_soc_card_get_drvdata(card);
  1602. snd_soc_unregister_card(card);
  1603. if (scodec->rst)
  1604. reset_control_assert(scodec->rst);
  1605. clk_disable_unprepare(scodec->clk_apb);
  1606. }
  1607. static struct platform_driver sun4i_codec_driver = {
  1608. .driver = {
  1609. .name = "sun4i-codec",
  1610. .of_match_table = sun4i_codec_of_match,
  1611. },
  1612. .probe = sun4i_codec_probe,
  1613. .remove = sun4i_codec_remove,
  1614. };
  1615. module_platform_driver(sun4i_codec_driver);
  1616. MODULE_DESCRIPTION("Allwinner A10 codec driver");
  1617. MODULE_AUTHOR("Emilio López <emilio@elopez.com.ar>");
  1618. MODULE_AUTHOR("Jon Smirl <jonsmirl@gmail.com>");
  1619. MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
  1620. MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
  1621. MODULE_LICENSE("GPL");