ndtest.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  3. #include <linux/platform_device.h>
  4. #include <linux/device.h>
  5. #include <linux/module.h>
  6. #include <linux/genalloc.h>
  7. #include <linux/vmalloc.h>
  8. #include <linux/dma-mapping.h>
  9. #include <linux/list_sort.h>
  10. #include <linux/libnvdimm.h>
  11. #include <linux/ndctl.h>
  12. #include <nd-core.h>
  13. #include <linux/printk.h>
  14. #include <linux/seq_buf.h>
  15. #include <linux/papr_scm.h>
  16. #include <uapi/linux/papr_pdsm.h>
  17. #include "../watermark.h"
  18. #include "nfit_test.h"
  19. #include "ndtest.h"
  20. enum {
  21. DIMM_SIZE = SZ_32M,
  22. LABEL_SIZE = SZ_128K,
  23. NUM_INSTANCES = 2,
  24. NUM_DCR = 4,
  25. NDTEST_MAX_MAPPING = 6,
  26. };
  27. #define NDTEST_SCM_DIMM_CMD_MASK \
  28. ((1ul << ND_CMD_GET_CONFIG_SIZE) | \
  29. (1ul << ND_CMD_GET_CONFIG_DATA) | \
  30. (1ul << ND_CMD_SET_CONFIG_DATA) | \
  31. (1ul << ND_CMD_CALL))
  32. #define NFIT_DIMM_HANDLE(node, socket, imc, chan, dimm) \
  33. (((node & 0xfff) << 16) | ((socket & 0xf) << 12) \
  34. | ((imc & 0xf) << 8) | ((chan & 0xf) << 4) | (dimm & 0xf))
  35. static DEFINE_SPINLOCK(ndtest_lock);
  36. static struct ndtest_priv *instances[NUM_INSTANCES];
  37. static const struct class ndtest_dimm_class = {
  38. .name = "nfit_test_dimm",
  39. };
  40. static struct gen_pool *ndtest_pool;
  41. static struct ndtest_dimm dimm_group1[] = {
  42. {
  43. .size = DIMM_SIZE,
  44. .handle = NFIT_DIMM_HANDLE(0, 0, 0, 0, 0),
  45. .uuid_str = "1e5c75d2-b618-11ea-9aa3-507b9ddc0f72",
  46. .physical_id = 0,
  47. .num_formats = 2,
  48. },
  49. {
  50. .size = DIMM_SIZE,
  51. .handle = NFIT_DIMM_HANDLE(0, 0, 0, 0, 1),
  52. .uuid_str = "1c4d43ac-b618-11ea-be80-507b9ddc0f72",
  53. .physical_id = 1,
  54. .num_formats = 2,
  55. },
  56. {
  57. .size = DIMM_SIZE,
  58. .handle = NFIT_DIMM_HANDLE(0, 0, 1, 0, 0),
  59. .uuid_str = "a9f17ffc-b618-11ea-b36d-507b9ddc0f72",
  60. .physical_id = 2,
  61. .num_formats = 2,
  62. },
  63. {
  64. .size = DIMM_SIZE,
  65. .handle = NFIT_DIMM_HANDLE(0, 0, 1, 0, 1),
  66. .uuid_str = "b6b83b22-b618-11ea-8aae-507b9ddc0f72",
  67. .physical_id = 3,
  68. .num_formats = 2,
  69. },
  70. {
  71. .size = DIMM_SIZE,
  72. .handle = NFIT_DIMM_HANDLE(0, 1, 0, 0, 0),
  73. .uuid_str = "bf9baaee-b618-11ea-b181-507b9ddc0f72",
  74. .physical_id = 4,
  75. .num_formats = 2,
  76. },
  77. };
  78. static struct ndtest_dimm dimm_group2[] = {
  79. {
  80. .size = DIMM_SIZE,
  81. .handle = NFIT_DIMM_HANDLE(1, 0, 0, 0, 0),
  82. .uuid_str = "ca0817e2-b618-11ea-9db3-507b9ddc0f72",
  83. .physical_id = 0,
  84. .num_formats = 1,
  85. .flags = PAPR_PMEM_UNARMED | PAPR_PMEM_EMPTY |
  86. PAPR_PMEM_SAVE_FAILED | PAPR_PMEM_SHUTDOWN_DIRTY |
  87. PAPR_PMEM_HEALTH_FATAL,
  88. },
  89. };
  90. static struct ndtest_mapping region0_mapping[] = {
  91. {
  92. .dimm = 0,
  93. .position = 0,
  94. .start = 0,
  95. .size = SZ_16M,
  96. },
  97. {
  98. .dimm = 1,
  99. .position = 1,
  100. .start = 0,
  101. .size = SZ_16M,
  102. }
  103. };
  104. static struct ndtest_mapping region1_mapping[] = {
  105. {
  106. .dimm = 0,
  107. .position = 0,
  108. .start = SZ_16M,
  109. .size = SZ_16M,
  110. },
  111. {
  112. .dimm = 1,
  113. .position = 1,
  114. .start = SZ_16M,
  115. .size = SZ_16M,
  116. },
  117. {
  118. .dimm = 2,
  119. .position = 2,
  120. .start = SZ_16M,
  121. .size = SZ_16M,
  122. },
  123. {
  124. .dimm = 3,
  125. .position = 3,
  126. .start = SZ_16M,
  127. .size = SZ_16M,
  128. },
  129. };
  130. static struct ndtest_region bus0_regions[] = {
  131. {
  132. .type = ND_DEVICE_NAMESPACE_PMEM,
  133. .num_mappings = ARRAY_SIZE(region0_mapping),
  134. .mapping = region0_mapping,
  135. .size = DIMM_SIZE,
  136. .range_index = 1,
  137. },
  138. {
  139. .type = ND_DEVICE_NAMESPACE_PMEM,
  140. .num_mappings = ARRAY_SIZE(region1_mapping),
  141. .mapping = region1_mapping,
  142. .size = DIMM_SIZE * 2,
  143. .range_index = 2,
  144. },
  145. };
  146. static struct ndtest_mapping region6_mapping[] = {
  147. {
  148. .dimm = 0,
  149. .position = 0,
  150. .start = 0,
  151. .size = DIMM_SIZE,
  152. },
  153. };
  154. static struct ndtest_region bus1_regions[] = {
  155. {
  156. .type = ND_DEVICE_NAMESPACE_IO,
  157. .num_mappings = ARRAY_SIZE(region6_mapping),
  158. .mapping = region6_mapping,
  159. .size = DIMM_SIZE,
  160. .range_index = 1,
  161. },
  162. };
  163. static struct ndtest_config bus_configs[NUM_INSTANCES] = {
  164. /* bus 1 */
  165. {
  166. .dimm_start = 0,
  167. .dimm_count = ARRAY_SIZE(dimm_group1),
  168. .dimms = dimm_group1,
  169. .regions = bus0_regions,
  170. .num_regions = ARRAY_SIZE(bus0_regions),
  171. },
  172. /* bus 2 */
  173. {
  174. .dimm_start = ARRAY_SIZE(dimm_group1),
  175. .dimm_count = ARRAY_SIZE(dimm_group2),
  176. .dimms = dimm_group2,
  177. .regions = bus1_regions,
  178. .num_regions = ARRAY_SIZE(bus1_regions),
  179. },
  180. };
  181. static inline struct ndtest_priv *to_ndtest_priv(struct device *dev)
  182. {
  183. struct platform_device *pdev = to_platform_device(dev);
  184. return container_of(pdev, struct ndtest_priv, pdev);
  185. }
  186. static int ndtest_config_get(struct ndtest_dimm *p, unsigned int buf_len,
  187. struct nd_cmd_get_config_data_hdr *hdr)
  188. {
  189. unsigned int len;
  190. if ((hdr->in_offset + hdr->in_length) > LABEL_SIZE)
  191. return -EINVAL;
  192. hdr->status = 0;
  193. len = min(hdr->in_length, LABEL_SIZE - hdr->in_offset);
  194. memcpy(hdr->out_buf, p->label_area + hdr->in_offset, len);
  195. return buf_len - len;
  196. }
  197. static int ndtest_config_set(struct ndtest_dimm *p, unsigned int buf_len,
  198. struct nd_cmd_set_config_hdr *hdr)
  199. {
  200. unsigned int len;
  201. if ((hdr->in_offset + hdr->in_length) > LABEL_SIZE)
  202. return -EINVAL;
  203. len = min(hdr->in_length, LABEL_SIZE - hdr->in_offset);
  204. memcpy(p->label_area + hdr->in_offset, hdr->in_buf, len);
  205. return buf_len - len;
  206. }
  207. static int ndtest_get_config_size(struct ndtest_dimm *dimm, unsigned int buf_len,
  208. struct nd_cmd_get_config_size *size)
  209. {
  210. size->status = 0;
  211. size->max_xfer = 8;
  212. size->config_size = dimm->config_size;
  213. return 0;
  214. }
  215. static int ndtest_ctl(struct nvdimm_bus_descriptor *nd_desc,
  216. struct nvdimm *nvdimm, unsigned int cmd, void *buf,
  217. unsigned int buf_len, int *cmd_rc)
  218. {
  219. struct ndtest_dimm *dimm;
  220. int _cmd_rc;
  221. if (!cmd_rc)
  222. cmd_rc = &_cmd_rc;
  223. *cmd_rc = 0;
  224. if (!nvdimm)
  225. return -EINVAL;
  226. dimm = nvdimm_provider_data(nvdimm);
  227. if (!dimm)
  228. return -EINVAL;
  229. switch (cmd) {
  230. case ND_CMD_GET_CONFIG_SIZE:
  231. *cmd_rc = ndtest_get_config_size(dimm, buf_len, buf);
  232. break;
  233. case ND_CMD_GET_CONFIG_DATA:
  234. *cmd_rc = ndtest_config_get(dimm, buf_len, buf);
  235. break;
  236. case ND_CMD_SET_CONFIG_DATA:
  237. *cmd_rc = ndtest_config_set(dimm, buf_len, buf);
  238. break;
  239. default:
  240. return -EINVAL;
  241. }
  242. /* Failures for a DIMM can be injected using fail_cmd and
  243. * fail_cmd_code, see the device attributes below
  244. */
  245. if ((1 << cmd) & dimm->fail_cmd)
  246. return dimm->fail_cmd_code ? dimm->fail_cmd_code : -EIO;
  247. return 0;
  248. }
  249. static struct nfit_test_resource *ndtest_resource_lookup(resource_size_t addr)
  250. {
  251. int i;
  252. for (i = 0; i < NUM_INSTANCES; i++) {
  253. struct nfit_test_resource *n, *nfit_res = NULL;
  254. struct ndtest_priv *t = instances[i];
  255. if (!t)
  256. continue;
  257. spin_lock(&ndtest_lock);
  258. list_for_each_entry(n, &t->resources, list) {
  259. if (addr >= n->res.start && (addr < n->res.start
  260. + resource_size(&n->res))) {
  261. nfit_res = n;
  262. break;
  263. } else if (addr >= (unsigned long) n->buf
  264. && (addr < (unsigned long) n->buf
  265. + resource_size(&n->res))) {
  266. nfit_res = n;
  267. break;
  268. }
  269. }
  270. spin_unlock(&ndtest_lock);
  271. if (nfit_res)
  272. return nfit_res;
  273. }
  274. pr_warn("Failed to get resource\n");
  275. return NULL;
  276. }
  277. static void ndtest_release_resource(void *data)
  278. {
  279. struct nfit_test_resource *res = data;
  280. spin_lock(&ndtest_lock);
  281. list_del(&res->list);
  282. spin_unlock(&ndtest_lock);
  283. if (resource_size(&res->res) >= DIMM_SIZE)
  284. gen_pool_free(ndtest_pool, res->res.start,
  285. resource_size(&res->res));
  286. vfree(res->buf);
  287. kfree(res);
  288. }
  289. static void *ndtest_alloc_resource(struct ndtest_priv *p, size_t size,
  290. dma_addr_t *dma)
  291. {
  292. dma_addr_t __dma;
  293. void *buf;
  294. struct nfit_test_resource *res;
  295. struct genpool_data_align data = {
  296. .align = SZ_128M,
  297. };
  298. res = kzalloc(sizeof(*res), GFP_KERNEL);
  299. if (!res)
  300. return NULL;
  301. buf = vmalloc(size);
  302. if (size >= DIMM_SIZE)
  303. __dma = gen_pool_alloc_algo(ndtest_pool, size,
  304. gen_pool_first_fit_align, &data);
  305. else
  306. __dma = (unsigned long) buf;
  307. if (!__dma)
  308. goto buf_err;
  309. INIT_LIST_HEAD(&res->list);
  310. res->dev = &p->pdev.dev;
  311. res->buf = buf;
  312. res->res.start = __dma;
  313. res->res.end = __dma + size - 1;
  314. res->res.name = "NFIT";
  315. spin_lock_init(&res->lock);
  316. INIT_LIST_HEAD(&res->requests);
  317. spin_lock(&ndtest_lock);
  318. list_add(&res->list, &p->resources);
  319. spin_unlock(&ndtest_lock);
  320. if (dma)
  321. *dma = __dma;
  322. if (!devm_add_action(&p->pdev.dev, ndtest_release_resource, res))
  323. return res->buf;
  324. buf_err:
  325. if (__dma && size >= DIMM_SIZE)
  326. gen_pool_free(ndtest_pool, __dma, size);
  327. if (buf)
  328. vfree(buf);
  329. kfree(res);
  330. return NULL;
  331. }
  332. static ssize_t range_index_show(struct device *dev,
  333. struct device_attribute *attr, char *buf)
  334. {
  335. struct nd_region *nd_region = to_nd_region(dev);
  336. struct ndtest_region *region = nd_region_provider_data(nd_region);
  337. return sprintf(buf, "%d\n", region->range_index);
  338. }
  339. static DEVICE_ATTR_RO(range_index);
  340. static struct attribute *ndtest_region_attributes[] = {
  341. &dev_attr_range_index.attr,
  342. NULL,
  343. };
  344. static const struct attribute_group ndtest_region_attribute_group = {
  345. .name = "papr",
  346. .attrs = ndtest_region_attributes,
  347. };
  348. static const struct attribute_group *ndtest_region_attribute_groups[] = {
  349. &ndtest_region_attribute_group,
  350. NULL,
  351. };
  352. static int ndtest_create_region(struct ndtest_priv *p,
  353. struct ndtest_region *region)
  354. {
  355. struct nd_mapping_desc mappings[NDTEST_MAX_MAPPING];
  356. struct nd_region_desc *ndr_desc, _ndr_desc;
  357. struct nd_interleave_set *nd_set;
  358. struct resource res;
  359. int i, ndimm = region->mapping[0].dimm;
  360. u64 uuid[2];
  361. memset(&res, 0, sizeof(res));
  362. memset(&mappings, 0, sizeof(mappings));
  363. memset(&_ndr_desc, 0, sizeof(_ndr_desc));
  364. ndr_desc = &_ndr_desc;
  365. if (!ndtest_alloc_resource(p, region->size, &res.start))
  366. return -ENOMEM;
  367. res.end = res.start + region->size - 1;
  368. ndr_desc->mapping = mappings;
  369. ndr_desc->res = &res;
  370. ndr_desc->provider_data = region;
  371. ndr_desc->attr_groups = ndtest_region_attribute_groups;
  372. if (uuid_parse(p->config->dimms[ndimm].uuid_str, (uuid_t *)uuid)) {
  373. pr_err("failed to parse UUID\n");
  374. return -ENXIO;
  375. }
  376. nd_set = devm_kzalloc(&p->pdev.dev, sizeof(*nd_set), GFP_KERNEL);
  377. if (!nd_set)
  378. return -ENOMEM;
  379. nd_set->cookie1 = cpu_to_le64(uuid[0]);
  380. nd_set->cookie2 = cpu_to_le64(uuid[1]);
  381. nd_set->altcookie = nd_set->cookie1;
  382. ndr_desc->nd_set = nd_set;
  383. for (i = 0; i < region->num_mappings; i++) {
  384. ndimm = region->mapping[i].dimm;
  385. mappings[i].start = region->mapping[i].start;
  386. mappings[i].size = region->mapping[i].size;
  387. mappings[i].position = region->mapping[i].position;
  388. mappings[i].nvdimm = p->config->dimms[ndimm].nvdimm;
  389. }
  390. ndr_desc->num_mappings = region->num_mappings;
  391. region->region = nvdimm_pmem_region_create(p->bus, ndr_desc);
  392. if (!region->region) {
  393. dev_err(&p->pdev.dev, "Error registering region %pR\n",
  394. ndr_desc->res);
  395. return -ENXIO;
  396. }
  397. return 0;
  398. }
  399. static int ndtest_init_regions(struct ndtest_priv *p)
  400. {
  401. int i, ret = 0;
  402. for (i = 0; i < p->config->num_regions; i++) {
  403. ret = ndtest_create_region(p, &p->config->regions[i]);
  404. if (ret)
  405. return ret;
  406. }
  407. return 0;
  408. }
  409. static void put_dimms(void *data)
  410. {
  411. struct ndtest_priv *p = data;
  412. int i;
  413. for (i = 0; i < p->config->dimm_count; i++)
  414. if (p->config->dimms[i].dev) {
  415. device_unregister(p->config->dimms[i].dev);
  416. p->config->dimms[i].dev = NULL;
  417. }
  418. }
  419. static ssize_t handle_show(struct device *dev, struct device_attribute *attr,
  420. char *buf)
  421. {
  422. struct ndtest_dimm *dimm = dev_get_drvdata(dev);
  423. return sprintf(buf, "%#x\n", dimm->handle);
  424. }
  425. static DEVICE_ATTR_RO(handle);
  426. static ssize_t fail_cmd_show(struct device *dev, struct device_attribute *attr,
  427. char *buf)
  428. {
  429. struct ndtest_dimm *dimm = dev_get_drvdata(dev);
  430. return sprintf(buf, "%#x\n", dimm->fail_cmd);
  431. }
  432. static ssize_t fail_cmd_store(struct device *dev, struct device_attribute *attr,
  433. const char *buf, size_t size)
  434. {
  435. struct ndtest_dimm *dimm = dev_get_drvdata(dev);
  436. unsigned long val;
  437. ssize_t rc;
  438. rc = kstrtol(buf, 0, &val);
  439. if (rc)
  440. return rc;
  441. dimm->fail_cmd = val;
  442. return size;
  443. }
  444. static DEVICE_ATTR_RW(fail_cmd);
  445. static ssize_t fail_cmd_code_show(struct device *dev, struct device_attribute *attr,
  446. char *buf)
  447. {
  448. struct ndtest_dimm *dimm = dev_get_drvdata(dev);
  449. return sprintf(buf, "%d\n", dimm->fail_cmd_code);
  450. }
  451. static ssize_t fail_cmd_code_store(struct device *dev, struct device_attribute *attr,
  452. const char *buf, size_t size)
  453. {
  454. struct ndtest_dimm *dimm = dev_get_drvdata(dev);
  455. unsigned long val;
  456. ssize_t rc;
  457. rc = kstrtol(buf, 0, &val);
  458. if (rc)
  459. return rc;
  460. dimm->fail_cmd_code = val;
  461. return size;
  462. }
  463. static DEVICE_ATTR_RW(fail_cmd_code);
  464. static struct attribute *dimm_attributes[] = {
  465. &dev_attr_handle.attr,
  466. &dev_attr_fail_cmd.attr,
  467. &dev_attr_fail_cmd_code.attr,
  468. NULL,
  469. };
  470. static struct attribute_group dimm_attribute_group = {
  471. .attrs = dimm_attributes,
  472. };
  473. static const struct attribute_group *dimm_attribute_groups[] = {
  474. &dimm_attribute_group,
  475. NULL,
  476. };
  477. static ssize_t phys_id_show(struct device *dev,
  478. struct device_attribute *attr, char *buf)
  479. {
  480. struct nvdimm *nvdimm = to_nvdimm(dev);
  481. struct ndtest_dimm *dimm = nvdimm_provider_data(nvdimm);
  482. return sprintf(buf, "%#x\n", dimm->physical_id);
  483. }
  484. static DEVICE_ATTR_RO(phys_id);
  485. static ssize_t vendor_show(struct device *dev,
  486. struct device_attribute *attr, char *buf)
  487. {
  488. return sprintf(buf, "0x1234567\n");
  489. }
  490. static DEVICE_ATTR_RO(vendor);
  491. static ssize_t id_show(struct device *dev,
  492. struct device_attribute *attr, char *buf)
  493. {
  494. struct nvdimm *nvdimm = to_nvdimm(dev);
  495. struct ndtest_dimm *dimm = nvdimm_provider_data(nvdimm);
  496. return sprintf(buf, "%04x-%02x-%04x-%08x", 0xabcd,
  497. 0xa, 2016, ~(dimm->handle));
  498. }
  499. static DEVICE_ATTR_RO(id);
  500. static ssize_t nvdimm_handle_show(struct device *dev,
  501. struct device_attribute *attr, char *buf)
  502. {
  503. struct nvdimm *nvdimm = to_nvdimm(dev);
  504. struct ndtest_dimm *dimm = nvdimm_provider_data(nvdimm);
  505. return sprintf(buf, "%#x\n", dimm->handle);
  506. }
  507. static struct device_attribute dev_attr_nvdimm_show_handle = {
  508. .attr = { .name = "handle", .mode = 0444 },
  509. .show = nvdimm_handle_show,
  510. };
  511. static ssize_t subsystem_vendor_show(struct device *dev,
  512. struct device_attribute *attr, char *buf)
  513. {
  514. return sprintf(buf, "0x%04x\n", 0);
  515. }
  516. static DEVICE_ATTR_RO(subsystem_vendor);
  517. static ssize_t dirty_shutdown_show(struct device *dev,
  518. struct device_attribute *attr, char *buf)
  519. {
  520. return sprintf(buf, "%d\n", 42);
  521. }
  522. static DEVICE_ATTR_RO(dirty_shutdown);
  523. static ssize_t formats_show(struct device *dev,
  524. struct device_attribute *attr, char *buf)
  525. {
  526. struct nvdimm *nvdimm = to_nvdimm(dev);
  527. struct ndtest_dimm *dimm = nvdimm_provider_data(nvdimm);
  528. return sprintf(buf, "%d\n", dimm->num_formats);
  529. }
  530. static DEVICE_ATTR_RO(formats);
  531. static ssize_t format_show(struct device *dev,
  532. struct device_attribute *attr, char *buf)
  533. {
  534. struct nvdimm *nvdimm = to_nvdimm(dev);
  535. struct ndtest_dimm *dimm = nvdimm_provider_data(nvdimm);
  536. if (dimm->num_formats > 1)
  537. return sprintf(buf, "0x201\n");
  538. return sprintf(buf, "0x101\n");
  539. }
  540. static DEVICE_ATTR_RO(format);
  541. static ssize_t format1_show(struct device *dev, struct device_attribute *attr,
  542. char *buf)
  543. {
  544. return sprintf(buf, "0x301\n");
  545. }
  546. static DEVICE_ATTR_RO(format1);
  547. static umode_t ndtest_nvdimm_attr_visible(struct kobject *kobj,
  548. struct attribute *a, int n)
  549. {
  550. struct device *dev = container_of(kobj, struct device, kobj);
  551. struct nvdimm *nvdimm = to_nvdimm(dev);
  552. struct ndtest_dimm *dimm = nvdimm_provider_data(nvdimm);
  553. if (a == &dev_attr_format1.attr && dimm->num_formats <= 1)
  554. return 0;
  555. return a->mode;
  556. }
  557. static ssize_t flags_show(struct device *dev,
  558. struct device_attribute *attr, char *buf)
  559. {
  560. struct nvdimm *nvdimm = to_nvdimm(dev);
  561. struct ndtest_dimm *dimm = nvdimm_provider_data(nvdimm);
  562. struct seq_buf s;
  563. u64 flags;
  564. flags = dimm->flags;
  565. seq_buf_init(&s, buf, PAGE_SIZE);
  566. if (flags & PAPR_PMEM_UNARMED_MASK)
  567. seq_buf_printf(&s, "not_armed ");
  568. if (flags & PAPR_PMEM_BAD_SHUTDOWN_MASK)
  569. seq_buf_printf(&s, "flush_fail ");
  570. if (flags & PAPR_PMEM_BAD_RESTORE_MASK)
  571. seq_buf_printf(&s, "restore_fail ");
  572. if (flags & PAPR_PMEM_SAVE_MASK)
  573. seq_buf_printf(&s, "save_fail ");
  574. if (flags & PAPR_PMEM_SMART_EVENT_MASK)
  575. seq_buf_printf(&s, "smart_notify ");
  576. if (seq_buf_used(&s))
  577. seq_buf_printf(&s, "\n");
  578. return seq_buf_used(&s);
  579. }
  580. static DEVICE_ATTR_RO(flags);
  581. static struct attribute *ndtest_nvdimm_attributes[] = {
  582. &dev_attr_nvdimm_show_handle.attr,
  583. &dev_attr_vendor.attr,
  584. &dev_attr_id.attr,
  585. &dev_attr_phys_id.attr,
  586. &dev_attr_subsystem_vendor.attr,
  587. &dev_attr_dirty_shutdown.attr,
  588. &dev_attr_formats.attr,
  589. &dev_attr_format.attr,
  590. &dev_attr_format1.attr,
  591. &dev_attr_flags.attr,
  592. NULL,
  593. };
  594. static const struct attribute_group ndtest_nvdimm_attribute_group = {
  595. .name = "papr",
  596. .attrs = ndtest_nvdimm_attributes,
  597. .is_visible = ndtest_nvdimm_attr_visible,
  598. };
  599. static const struct attribute_group *ndtest_nvdimm_attribute_groups[] = {
  600. &ndtest_nvdimm_attribute_group,
  601. NULL,
  602. };
  603. static int ndtest_dimm_register(struct ndtest_priv *priv,
  604. struct ndtest_dimm *dimm, int id)
  605. {
  606. struct device *dev = &priv->pdev.dev;
  607. unsigned long dimm_flags = dimm->flags;
  608. if (dimm->num_formats > 1)
  609. set_bit(NDD_LABELING, &dimm_flags);
  610. if (dimm->flags & PAPR_PMEM_UNARMED_MASK)
  611. set_bit(NDD_UNARMED, &dimm_flags);
  612. dimm->nvdimm = nvdimm_create(priv->bus, dimm,
  613. ndtest_nvdimm_attribute_groups, dimm_flags,
  614. NDTEST_SCM_DIMM_CMD_MASK, 0, NULL);
  615. if (!dimm->nvdimm) {
  616. dev_err(dev, "Error creating DIMM object for %pOF\n", priv->dn);
  617. return -ENXIO;
  618. }
  619. dimm->dev = device_create_with_groups(&ndtest_dimm_class,
  620. &priv->pdev.dev,
  621. 0, dimm, dimm_attribute_groups,
  622. "test_dimm%d", id);
  623. if (!dimm->dev) {
  624. pr_err("Could not create dimm device attributes\n");
  625. return -ENOMEM;
  626. }
  627. return 0;
  628. }
  629. static int ndtest_nvdimm_init(struct ndtest_priv *p)
  630. {
  631. struct ndtest_dimm *d;
  632. void *res;
  633. int i, id;
  634. for (i = 0; i < p->config->dimm_count; i++) {
  635. d = &p->config->dimms[i];
  636. d->id = id = p->config->dimm_start + i;
  637. res = ndtest_alloc_resource(p, LABEL_SIZE, NULL);
  638. if (!res)
  639. return -ENOMEM;
  640. d->label_area = res;
  641. sprintf(d->label_area, "label%d", id);
  642. d->config_size = LABEL_SIZE;
  643. if (!ndtest_alloc_resource(p, d->size,
  644. &p->dimm_dma[id]))
  645. return -ENOMEM;
  646. if (!ndtest_alloc_resource(p, LABEL_SIZE,
  647. &p->label_dma[id]))
  648. return -ENOMEM;
  649. if (!ndtest_alloc_resource(p, LABEL_SIZE,
  650. &p->dcr_dma[id]))
  651. return -ENOMEM;
  652. d->address = p->dimm_dma[id];
  653. ndtest_dimm_register(p, d, id);
  654. }
  655. return 0;
  656. }
  657. static ssize_t compatible_show(struct device *dev,
  658. struct device_attribute *attr, char *buf)
  659. {
  660. return sprintf(buf, "nvdimm_test");
  661. }
  662. static DEVICE_ATTR_RO(compatible);
  663. static struct attribute *of_node_attributes[] = {
  664. &dev_attr_compatible.attr,
  665. NULL
  666. };
  667. static const struct attribute_group of_node_attribute_group = {
  668. .name = "of_node",
  669. .attrs = of_node_attributes,
  670. };
  671. static const struct attribute_group *ndtest_attribute_groups[] = {
  672. &of_node_attribute_group,
  673. NULL,
  674. };
  675. static int ndtest_bus_register(struct ndtest_priv *p)
  676. {
  677. p->config = &bus_configs[p->pdev.id];
  678. p->bus_desc.ndctl = ndtest_ctl;
  679. p->bus_desc.module = THIS_MODULE;
  680. p->bus_desc.provider_name = NULL;
  681. p->bus_desc.attr_groups = ndtest_attribute_groups;
  682. p->bus = nvdimm_bus_register(&p->pdev.dev, &p->bus_desc);
  683. if (!p->bus) {
  684. dev_err(&p->pdev.dev, "Error creating nvdimm bus %pOF\n", p->dn);
  685. return -ENOMEM;
  686. }
  687. return 0;
  688. }
  689. static void ndtest_remove(struct platform_device *pdev)
  690. {
  691. struct ndtest_priv *p = to_ndtest_priv(&pdev->dev);
  692. nvdimm_bus_unregister(p->bus);
  693. }
  694. static int ndtest_probe(struct platform_device *pdev)
  695. {
  696. struct ndtest_priv *p;
  697. int rc;
  698. p = to_ndtest_priv(&pdev->dev);
  699. if (ndtest_bus_register(p))
  700. return -ENOMEM;
  701. p->dcr_dma = devm_kcalloc(&p->pdev.dev, NUM_DCR,
  702. sizeof(dma_addr_t), GFP_KERNEL);
  703. if (!p->dcr_dma) {
  704. rc = -ENOMEM;
  705. goto err;
  706. }
  707. p->label_dma = devm_kcalloc(&p->pdev.dev, NUM_DCR,
  708. sizeof(dma_addr_t), GFP_KERNEL);
  709. if (!p->label_dma) {
  710. rc = -ENOMEM;
  711. goto err;
  712. }
  713. p->dimm_dma = devm_kcalloc(&p->pdev.dev, NUM_DCR,
  714. sizeof(dma_addr_t), GFP_KERNEL);
  715. if (!p->dimm_dma) {
  716. rc = -ENOMEM;
  717. goto err;
  718. }
  719. rc = ndtest_nvdimm_init(p);
  720. if (rc)
  721. goto err;
  722. rc = ndtest_init_regions(p);
  723. if (rc)
  724. goto err;
  725. rc = devm_add_action_or_reset(&pdev->dev, put_dimms, p);
  726. if (rc)
  727. goto err;
  728. platform_set_drvdata(pdev, p);
  729. return 0;
  730. err:
  731. pr_err("%s:%d Failed nvdimm init\n", __func__, __LINE__);
  732. return rc;
  733. }
  734. static const struct platform_device_id ndtest_id[] = {
  735. { KBUILD_MODNAME },
  736. { },
  737. };
  738. static struct platform_driver ndtest_driver = {
  739. .probe = ndtest_probe,
  740. .remove_new = ndtest_remove,
  741. .driver = {
  742. .name = KBUILD_MODNAME,
  743. },
  744. .id_table = ndtest_id,
  745. };
  746. static void ndtest_release(struct device *dev)
  747. {
  748. struct ndtest_priv *p = to_ndtest_priv(dev);
  749. kfree(p);
  750. }
  751. static void cleanup_devices(void)
  752. {
  753. int i;
  754. for (i = 0; i < NUM_INSTANCES; i++)
  755. if (instances[i])
  756. platform_device_unregister(&instances[i]->pdev);
  757. nfit_test_teardown();
  758. if (ndtest_pool)
  759. gen_pool_destroy(ndtest_pool);
  760. class_unregister(&ndtest_dimm_class);
  761. }
  762. static __init int ndtest_init(void)
  763. {
  764. int rc, i;
  765. pmem_test();
  766. libnvdimm_test();
  767. device_dax_test();
  768. dax_pmem_test();
  769. nfit_test_setup(ndtest_resource_lookup, NULL);
  770. rc = class_register(&ndtest_dimm_class);
  771. if (rc)
  772. goto err_register;
  773. ndtest_pool = gen_pool_create(ilog2(SZ_4M), NUMA_NO_NODE);
  774. if (!ndtest_pool) {
  775. rc = -ENOMEM;
  776. goto err_register;
  777. }
  778. if (gen_pool_add(ndtest_pool, SZ_4G, SZ_4G, NUMA_NO_NODE)) {
  779. rc = -ENOMEM;
  780. goto err_register;
  781. }
  782. /* Each instance can be taken as a bus, which can have multiple dimms */
  783. for (i = 0; i < NUM_INSTANCES; i++) {
  784. struct ndtest_priv *priv;
  785. struct platform_device *pdev;
  786. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  787. if (!priv) {
  788. rc = -ENOMEM;
  789. goto err_register;
  790. }
  791. INIT_LIST_HEAD(&priv->resources);
  792. pdev = &priv->pdev;
  793. pdev->name = KBUILD_MODNAME;
  794. pdev->id = i;
  795. pdev->dev.release = ndtest_release;
  796. rc = platform_device_register(pdev);
  797. if (rc) {
  798. put_device(&pdev->dev);
  799. goto err_register;
  800. }
  801. get_device(&pdev->dev);
  802. instances[i] = priv;
  803. }
  804. rc = platform_driver_register(&ndtest_driver);
  805. if (rc)
  806. goto err_register;
  807. return 0;
  808. err_register:
  809. pr_err("Error registering platform device\n");
  810. cleanup_devices();
  811. return rc;
  812. }
  813. static __exit void ndtest_exit(void)
  814. {
  815. cleanup_devices();
  816. platform_driver_unregister(&ndtest_driver);
  817. }
  818. module_init(ndtest_init);
  819. module_exit(ndtest_exit);
  820. MODULE_DESCRIPTION("Test non-NFIT devices");
  821. MODULE_LICENSE("GPL");
  822. MODULE_AUTHOR("IBM Corporation");