arch_timer.h 1.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * RISC-V Arch Timer(sstc) specific interface
  4. *
  5. * Copyright (c) 2024 Intel Corporation
  6. */
  7. #ifndef SELFTEST_KVM_ARCH_TIMER_H
  8. #define SELFTEST_KVM_ARCH_TIMER_H
  9. #include <asm/csr.h>
  10. #include <asm/vdso/processor.h>
  11. static unsigned long timer_freq;
  12. #define msec_to_cycles(msec) \
  13. ((timer_freq) * (uint64_t)(msec) / 1000)
  14. #define usec_to_cycles(usec) \
  15. ((timer_freq) * (uint64_t)(usec) / 1000000)
  16. #define cycles_to_usec(cycles) \
  17. ((uint64_t)(cycles) * 1000000 / (timer_freq))
  18. static inline uint64_t timer_get_cycles(void)
  19. {
  20. return csr_read(CSR_TIME);
  21. }
  22. static inline void timer_set_cmp(uint64_t cval)
  23. {
  24. csr_write(CSR_STIMECMP, cval);
  25. }
  26. static inline uint64_t timer_get_cmp(void)
  27. {
  28. return csr_read(CSR_STIMECMP);
  29. }
  30. static inline void timer_irq_enable(void)
  31. {
  32. csr_set(CSR_SIE, IE_TIE);
  33. }
  34. static inline void timer_irq_disable(void)
  35. {
  36. csr_clear(CSR_SIE, IE_TIE);
  37. }
  38. static inline void timer_set_next_cmp_ms(uint32_t msec)
  39. {
  40. uint64_t now_ct = timer_get_cycles();
  41. uint64_t next_ct = now_ct + msec_to_cycles(msec);
  42. timer_set_cmp(next_ct);
  43. }
  44. static inline void __delay(uint64_t cycles)
  45. {
  46. uint64_t start = timer_get_cycles();
  47. while ((timer_get_cycles() - start) < cycles)
  48. cpu_relax();
  49. }
  50. static inline void udelay(unsigned long usec)
  51. {
  52. __delay(usec_to_cycles(usec));
  53. }
  54. #endif /* SELFTEST_KVM_ARCH_TIMER_H */