rseq-s390.h 5.4 KB

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  1. /* SPDX-License-Identifier: LGPL-2.1 OR MIT */
  2. /*
  3. * RSEQ_SIG uses the trap4 instruction. As Linux does not make use of the
  4. * access-register mode nor the linkage stack this instruction will always
  5. * cause a special-operation exception (the trap-enabled bit in the DUCT
  6. * is and will stay 0). The instruction pattern is
  7. * b2 ff 0f ff trap4 4095(%r0)
  8. */
  9. #define RSEQ_SIG 0xB2FF0FFF
  10. #define rseq_smp_mb() __asm__ __volatile__ ("bcr 15,0" ::: "memory")
  11. #define rseq_smp_rmb() rseq_smp_mb()
  12. #define rseq_smp_wmb() rseq_smp_mb()
  13. #define rseq_smp_load_acquire(p) \
  14. __extension__ ({ \
  15. rseq_unqual_scalar_typeof(*(p)) ____p1 = RSEQ_READ_ONCE(*(p)); \
  16. rseq_barrier(); \
  17. ____p1; \
  18. })
  19. #define rseq_smp_acquire__after_ctrl_dep() rseq_smp_rmb()
  20. #define rseq_smp_store_release(p, v) \
  21. do { \
  22. rseq_barrier(); \
  23. RSEQ_WRITE_ONCE(*(p), v); \
  24. } while (0)
  25. #ifdef __s390x__
  26. #define LONG_L "lg"
  27. #define LONG_S "stg"
  28. #define LONG_LT_R "ltgr"
  29. #define LONG_CMP "cg"
  30. #define LONG_CMP_R "cgr"
  31. #define LONG_ADDI "aghi"
  32. #define LONG_ADD_R "agr"
  33. #define __RSEQ_ASM_DEFINE_TABLE(label, version, flags, \
  34. start_ip, post_commit_offset, abort_ip) \
  35. ".pushsection __rseq_cs, \"aw\"\n\t" \
  36. ".balign 32\n\t" \
  37. __rseq_str(label) ":\n\t" \
  38. ".long " __rseq_str(version) ", " __rseq_str(flags) "\n\t" \
  39. ".quad " __rseq_str(start_ip) ", " __rseq_str(post_commit_offset) ", " __rseq_str(abort_ip) "\n\t" \
  40. ".popsection\n\t" \
  41. ".pushsection __rseq_cs_ptr_array, \"aw\"\n\t" \
  42. ".quad " __rseq_str(label) "b\n\t" \
  43. ".popsection\n\t"
  44. /*
  45. * Exit points of a rseq critical section consist of all instructions outside
  46. * of the critical section where a critical section can either branch to or
  47. * reach through the normal course of its execution. The abort IP and the
  48. * post-commit IP are already part of the __rseq_cs section and should not be
  49. * explicitly defined as additional exit points. Knowing all exit points is
  50. * useful to assist debuggers stepping over the critical section.
  51. */
  52. #define RSEQ_ASM_DEFINE_EXIT_POINT(start_ip, exit_ip) \
  53. ".pushsection __rseq_exit_point_array, \"aw\"\n\t" \
  54. ".quad " __rseq_str(start_ip) ", " __rseq_str(exit_ip) "\n\t" \
  55. ".popsection\n\t"
  56. #elif __s390__
  57. #define __RSEQ_ASM_DEFINE_TABLE(label, version, flags, \
  58. start_ip, post_commit_offset, abort_ip) \
  59. ".pushsection __rseq_cs, \"aw\"\n\t" \
  60. ".balign 32\n\t" \
  61. __rseq_str(label) ":\n\t" \
  62. ".long " __rseq_str(version) ", " __rseq_str(flags) "\n\t" \
  63. ".long 0x0, " __rseq_str(start_ip) ", 0x0, " __rseq_str(post_commit_offset) ", 0x0, " __rseq_str(abort_ip) "\n\t" \
  64. ".popsection\n\t" \
  65. ".pushsection __rseq_cs_ptr_array, \"aw\"\n\t" \
  66. ".long 0x0, " __rseq_str(label) "b\n\t" \
  67. ".popsection\n\t"
  68. /*
  69. * Exit points of a rseq critical section consist of all instructions outside
  70. * of the critical section where a critical section can either branch to or
  71. * reach through the normal course of its execution. The abort IP and the
  72. * post-commit IP are already part of the __rseq_cs section and should not be
  73. * explicitly defined as additional exit points. Knowing all exit points is
  74. * useful to assist debuggers stepping over the critical section.
  75. */
  76. #define RSEQ_ASM_DEFINE_EXIT_POINT(start_ip, exit_ip) \
  77. ".pushsection __rseq_exit_point_array, \"aw\"\n\t" \
  78. ".long 0x0, " __rseq_str(start_ip) ", 0x0, " __rseq_str(exit_ip) "\n\t" \
  79. ".popsection\n\t"
  80. #define LONG_L "l"
  81. #define LONG_S "st"
  82. #define LONG_LT_R "ltr"
  83. #define LONG_CMP "c"
  84. #define LONG_CMP_R "cr"
  85. #define LONG_ADDI "ahi"
  86. #define LONG_ADD_R "ar"
  87. #endif
  88. #define RSEQ_ASM_DEFINE_TABLE(label, start_ip, post_commit_ip, abort_ip) \
  89. __RSEQ_ASM_DEFINE_TABLE(label, 0x0, 0x0, start_ip, \
  90. (post_commit_ip - start_ip), abort_ip)
  91. #define RSEQ_ASM_STORE_RSEQ_CS(label, cs_label, rseq_cs) \
  92. RSEQ_INJECT_ASM(1) \
  93. "larl %%r0, " __rseq_str(cs_label) "\n\t" \
  94. LONG_S " %%r0, %[" __rseq_str(rseq_cs) "]\n\t" \
  95. __rseq_str(label) ":\n\t"
  96. #define RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, label) \
  97. RSEQ_INJECT_ASM(2) \
  98. "c %[" __rseq_str(cpu_id) "], %[" __rseq_str(current_cpu_id) "]\n\t" \
  99. "jnz " __rseq_str(label) "\n\t"
  100. #define RSEQ_ASM_DEFINE_ABORT(label, teardown, abort_label) \
  101. ".pushsection __rseq_failure, \"ax\"\n\t" \
  102. ".long " __rseq_str(RSEQ_SIG) "\n\t" \
  103. __rseq_str(label) ":\n\t" \
  104. teardown \
  105. "jg %l[" __rseq_str(abort_label) "]\n\t" \
  106. ".popsection\n\t"
  107. #define RSEQ_ASM_DEFINE_CMPFAIL(label, teardown, cmpfail_label) \
  108. ".pushsection __rseq_failure, \"ax\"\n\t" \
  109. __rseq_str(label) ":\n\t" \
  110. teardown \
  111. "jg %l[" __rseq_str(cmpfail_label) "]\n\t" \
  112. ".popsection\n\t"
  113. /* Per-cpu-id indexing. */
  114. #define RSEQ_TEMPLATE_CPU_ID
  115. #define RSEQ_TEMPLATE_MO_RELAXED
  116. #include "rseq-s390-bits.h"
  117. #undef RSEQ_TEMPLATE_MO_RELAXED
  118. #define RSEQ_TEMPLATE_MO_RELEASE
  119. #include "rseq-s390-bits.h"
  120. #undef RSEQ_TEMPLATE_MO_RELEASE
  121. #undef RSEQ_TEMPLATE_CPU_ID
  122. /* Per-mm-cid indexing. */
  123. #define RSEQ_TEMPLATE_MM_CID
  124. #define RSEQ_TEMPLATE_MO_RELAXED
  125. #include "rseq-s390-bits.h"
  126. #undef RSEQ_TEMPLATE_MO_RELAXED
  127. #define RSEQ_TEMPLATE_MO_RELEASE
  128. #include "rseq-s390-bits.h"
  129. #undef RSEQ_TEMPLATE_MO_RELEASE
  130. #undef RSEQ_TEMPLATE_MM_CID
  131. /* APIs which are not based on cpu ids. */
  132. #define RSEQ_TEMPLATE_CPU_ID_NONE
  133. #define RSEQ_TEMPLATE_MO_RELAXED
  134. #include "rseq-s390-bits.h"
  135. #undef RSEQ_TEMPLATE_MO_RELAXED
  136. #undef RSEQ_TEMPLATE_CPU_ID_NONE