coreboot_table.c 4.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
  4. */
  5. #include <common.h>
  6. #include <malloc.h>
  7. #include <net.h>
  8. #include <vesa.h>
  9. #include <acpi/acpi_s3.h>
  10. #include <asm/coreboot_tables.h>
  11. #include <asm/e820.h>
  12. #include <asm/global_data.h>
  13. DECLARE_GLOBAL_DATA_PTR;
  14. int high_table_reserve(void)
  15. {
  16. /* adjust stack pointer to reserve space for configuration tables */
  17. gd->arch.high_table_limit = gd->start_addr_sp;
  18. gd->start_addr_sp -= CONFIG_HIGH_TABLE_SIZE;
  19. gd->arch.high_table_ptr = gd->start_addr_sp;
  20. /* clear the memory */
  21. if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) &&
  22. gd->arch.prev_sleep_state != ACPI_S3) {
  23. memset((void *)gd->arch.high_table_ptr, 0,
  24. CONFIG_HIGH_TABLE_SIZE);
  25. }
  26. gd->start_addr_sp &= ~0xf;
  27. return 0;
  28. }
  29. void *high_table_malloc(size_t bytes)
  30. {
  31. u32 new_ptr;
  32. void *ptr;
  33. new_ptr = gd->arch.high_table_ptr + bytes;
  34. if (new_ptr >= gd->arch.high_table_limit)
  35. return NULL;
  36. ptr = (void *)gd->arch.high_table_ptr;
  37. gd->arch.high_table_ptr = new_ptr;
  38. return ptr;
  39. }
  40. /**
  41. * cb_table_init() - initialize a coreboot table header
  42. *
  43. * This fills in the coreboot table header signature and the header bytes.
  44. * Other fields are set to zero.
  45. *
  46. * @cbh: coreboot table header address
  47. */
  48. static void cb_table_init(struct cb_header *cbh)
  49. {
  50. memset(cbh, 0, sizeof(struct cb_header));
  51. memcpy(cbh->signature, "LBIO", 4);
  52. cbh->header_bytes = sizeof(struct cb_header);
  53. }
  54. /**
  55. * cb_table_add_entry() - add a coreboot table entry
  56. *
  57. * This increases the coreboot table entry size with added table entry length
  58. * and increases entry count by 1.
  59. *
  60. * @cbh: coreboot table header address
  61. * @cbr: to be added table entry address
  62. * @return: pointer to next table entry address
  63. */
  64. static u32 cb_table_add_entry(struct cb_header *cbh, struct cb_record *cbr)
  65. {
  66. cbh->table_bytes += cbr->size;
  67. cbh->table_entries++;
  68. return (u32)cbr + cbr->size;
  69. }
  70. /**
  71. * cb_table_finalize() - finalize the coreboot table
  72. *
  73. * This calculates the checksum for all coreboot table entries as well as
  74. * the checksum for the coreboot header itself.
  75. *
  76. * @cbh: coreboot table header address
  77. */
  78. static void cb_table_finalize(struct cb_header *cbh)
  79. {
  80. struct cb_record *cbr = (struct cb_record *)(cbh + 1);
  81. cbh->table_checksum = compute_ip_checksum(cbr, cbh->table_bytes);
  82. cbh->header_checksum = compute_ip_checksum(cbh, cbh->header_bytes);
  83. }
  84. void write_coreboot_table(u32 addr, struct memory_area *cfg_tables)
  85. {
  86. struct cb_header *cbh = (struct cb_header *)addr;
  87. struct cb_record *cbr;
  88. struct cb_memory *mem;
  89. struct cb_memory_range *map;
  90. struct e820_entry e820[32];
  91. struct cb_framebuffer *fb;
  92. struct vesa_mode_info *vesa;
  93. int i, num;
  94. cb_table_init(cbh);
  95. cbr = (struct cb_record *)(cbh + 1);
  96. /*
  97. * Two type of coreboot table entries are generated by us.
  98. * They are 'struct cb_memory' and 'struct cb_framebuffer'.
  99. */
  100. /* populate memory map table */
  101. mem = (struct cb_memory *)cbr;
  102. mem->tag = CB_TAG_MEMORY;
  103. map = mem->map;
  104. /* first install e820 defined memory maps */
  105. num = install_e820_map(ARRAY_SIZE(e820), e820);
  106. for (i = 0; i < num; i++) {
  107. map->start.lo = e820[i].addr & 0xffffffff;
  108. map->start.hi = e820[i].addr >> 32;
  109. map->size.lo = e820[i].size & 0xffffffff;
  110. map->size.hi = e820[i].size >> 32;
  111. map->type = e820[i].type;
  112. map++;
  113. }
  114. /* then install all configuration tables */
  115. while (cfg_tables->size) {
  116. map->start.lo = cfg_tables->start & 0xffffffff;
  117. map->start.hi = cfg_tables->start >> 32;
  118. map->size.lo = cfg_tables->size & 0xffffffff;
  119. map->size.hi = cfg_tables->size >> 32;
  120. map->type = CB_MEM_TABLE;
  121. map++;
  122. num++;
  123. cfg_tables++;
  124. }
  125. mem->size = num * sizeof(struct cb_memory_range) +
  126. sizeof(struct cb_record);
  127. cbr = (struct cb_record *)cb_table_add_entry(cbh, cbr);
  128. /* populate framebuffer table if we have sane vesa info */
  129. vesa = &mode_info.vesa;
  130. if (vesa->x_resolution && vesa->y_resolution) {
  131. fb = (struct cb_framebuffer *)cbr;
  132. fb->tag = CB_TAG_FRAMEBUFFER;
  133. fb->size = sizeof(struct cb_framebuffer);
  134. fb->x_resolution = vesa->x_resolution;
  135. fb->y_resolution = vesa->y_resolution;
  136. fb->bits_per_pixel = vesa->bits_per_pixel;
  137. fb->bytes_per_line = vesa->bytes_per_scanline;
  138. fb->physical_address = vesa->phys_base_ptr;
  139. fb->red_mask_size = vesa->red_mask_size;
  140. fb->red_mask_pos = vesa->red_mask_pos;
  141. fb->green_mask_size = vesa->green_mask_size;
  142. fb->green_mask_pos = vesa->green_mask_pos;
  143. fb->blue_mask_size = vesa->blue_mask_size;
  144. fb->blue_mask_pos = vesa->blue_mask_pos;
  145. fb->reserved_mask_size = vesa->reserved_mask_size;
  146. fb->reserved_mask_pos = vesa->reserved_mask_pos;
  147. cbr = (struct cb_record *)cb_table_add_entry(cbh, cbr);
  148. }
  149. cb_table_finalize(cbh);
  150. }