board.c 4.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
  4. * (C) Copyright 2013 - 2018 Xilinx, Inc.
  5. */
  6. #include <common.h>
  7. #include <debug_uart.h>
  8. #include <dfu.h>
  9. #include <init.h>
  10. #include <log.h>
  11. #include <dm/uclass.h>
  12. #include <env.h>
  13. #include <env_internal.h>
  14. #include <fdtdec.h>
  15. #include <fpga.h>
  16. #include <malloc.h>
  17. #include <memalign.h>
  18. #include <mmc.h>
  19. #include <watchdog.h>
  20. #include <wdt.h>
  21. #include <zynqpl.h>
  22. #include <asm/global_data.h>
  23. #include <asm/arch/hardware.h>
  24. #include <asm/arch/sys_proto.h>
  25. #include "../common/board.h"
  26. DECLARE_GLOBAL_DATA_PTR;
  27. #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DEBUG_UART_BOARD_INIT)
  28. void board_debug_uart_init(void)
  29. {
  30. /* Add initialization sequence if UART is not configured */
  31. }
  32. #endif
  33. int board_init(void)
  34. {
  35. if (IS_ENABLED(CONFIG_SPL_BUILD))
  36. printf("Silicon version:\t%d\n", zynq_get_silicon_version());
  37. if (CONFIG_IS_ENABLED(DM_I2C) && CONFIG_IS_ENABLED(I2C_EEPROM))
  38. xilinx_read_eeprom();
  39. return 0;
  40. }
  41. int board_late_init(void)
  42. {
  43. int env_targets_len = 0;
  44. const char *mode;
  45. char *new_targets;
  46. char *env_targets;
  47. if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
  48. debug("Saved variables - Skipping\n");
  49. return 0;
  50. }
  51. if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG))
  52. return 0;
  53. switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
  54. case ZYNQ_BM_QSPI:
  55. mode = "qspi";
  56. env_set("modeboot", "qspiboot");
  57. break;
  58. case ZYNQ_BM_NAND:
  59. mode = "nand";
  60. env_set("modeboot", "nandboot");
  61. break;
  62. case ZYNQ_BM_NOR:
  63. mode = "nor";
  64. env_set("modeboot", "norboot");
  65. break;
  66. case ZYNQ_BM_SD:
  67. mode = "mmc0";
  68. env_set("modeboot", "sdboot");
  69. break;
  70. case ZYNQ_BM_JTAG:
  71. mode = "jtag pxe dhcp";
  72. env_set("modeboot", "jtagboot");
  73. break;
  74. default:
  75. mode = "";
  76. env_set("modeboot", "");
  77. break;
  78. }
  79. /*
  80. * One terminating char + one byte for space between mode
  81. * and default boot_targets
  82. */
  83. env_targets = env_get("boot_targets");
  84. if (env_targets)
  85. env_targets_len = strlen(env_targets);
  86. new_targets = calloc(1, strlen(mode) + env_targets_len + 2);
  87. if (!new_targets)
  88. return -ENOMEM;
  89. sprintf(new_targets, "%s %s", mode,
  90. env_targets ? env_targets : "");
  91. env_set("boot_targets", new_targets);
  92. return board_late_init_xilinx();
  93. }
  94. #if !defined(CFG_SYS_SDRAM_BASE) && !defined(CFG_SYS_SDRAM_SIZE)
  95. int dram_init_banksize(void)
  96. {
  97. return fdtdec_setup_memory_banksize();
  98. }
  99. int dram_init(void)
  100. {
  101. if (fdtdec_setup_mem_size_base() != 0)
  102. return -EINVAL;
  103. zynq_ddrc_init();
  104. return 0;
  105. }
  106. #else
  107. int dram_init(void)
  108. {
  109. gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
  110. CFG_SYS_SDRAM_SIZE);
  111. zynq_ddrc_init();
  112. return 0;
  113. }
  114. #endif
  115. enum env_location env_get_location(enum env_operation op, int prio)
  116. {
  117. u32 bootmode = zynq_slcr_get_boot_mode() & ZYNQ_BM_MASK;
  118. if (prio)
  119. return ENVL_UNKNOWN;
  120. switch (bootmode) {
  121. case ZYNQ_BM_SD:
  122. if (IS_ENABLED(CONFIG_ENV_IS_IN_FAT))
  123. return ENVL_FAT;
  124. if (IS_ENABLED(CONFIG_ENV_IS_IN_EXT4))
  125. return ENVL_EXT4;
  126. return ENVL_NOWHERE;
  127. case ZYNQ_BM_NAND:
  128. if (IS_ENABLED(CONFIG_ENV_IS_IN_NAND))
  129. return ENVL_NAND;
  130. if (IS_ENABLED(CONFIG_ENV_IS_IN_UBI))
  131. return ENVL_UBI;
  132. return ENVL_NOWHERE;
  133. case ZYNQ_BM_NOR:
  134. case ZYNQ_BM_QSPI:
  135. if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH))
  136. return ENVL_SPI_FLASH;
  137. return ENVL_NOWHERE;
  138. case ZYNQ_BM_JTAG:
  139. default:
  140. return ENVL_NOWHERE;
  141. }
  142. }
  143. #if defined(CONFIG_SET_DFU_ALT_INFO)
  144. #define DFU_ALT_BUF_LEN SZ_1K
  145. void set_dfu_alt_info(char *interface, char *devstr)
  146. {
  147. ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN);
  148. if (env_get("dfu_alt_info"))
  149. return;
  150. memset(buf, 0, sizeof(buf));
  151. switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
  152. case ZYNQ_BM_SD:
  153. snprintf(buf, DFU_ALT_BUF_LEN,
  154. "mmc 0=boot.bin fat 0 1;"
  155. "%s fat 0 1", CONFIG_SPL_FS_LOAD_PAYLOAD_NAME);
  156. break;
  157. case ZYNQ_BM_QSPI:
  158. snprintf(buf, DFU_ALT_BUF_LEN,
  159. "sf 0:0=boot.bin raw 0 0x1500000;"
  160. "%s raw 0x%x 0x500000",
  161. CONFIG_SPL_FS_LOAD_PAYLOAD_NAME,
  162. CONFIG_SYS_SPI_U_BOOT_OFFS);
  163. break;
  164. default:
  165. return;
  166. }
  167. env_set("dfu_alt_info", buf);
  168. puts("DFU alt info setting: done\n");
  169. }
  170. #endif