soft_i2c.c 9.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2009
  4. * Heiko Schocher, DENX Software Engineering, hs@denx.de.
  5. * Changes for multibus/multiadapter I2C support.
  6. *
  7. * (C) Copyright 2001, 2002
  8. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  9. *
  10. * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
  11. * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
  12. * Neil Russell.
  13. *
  14. * NOTE: This driver should be converted to driver model before June 2017.
  15. * Please see doc/driver-model/i2c-howto.rst for instructions.
  16. */
  17. #include <common.h>
  18. #if defined(CONFIG_AT91FAMILY)
  19. #include <asm/io.h>
  20. #include <asm/arch/hardware.h>
  21. #include <asm/arch/at91_pio.h>
  22. #ifdef CONFIG_ATMEL_LEGACY
  23. #include <asm/arch/gpio.h>
  24. #endif
  25. #endif
  26. #include <i2c.h>
  27. #include <asm/global_data.h>
  28. #include <linux/delay.h>
  29. #if defined(CONFIG_SOFT_I2C_GPIO_SCL)
  30. # include <asm/gpio.h>
  31. # ifndef I2C_GPIO_SYNC
  32. # define I2C_GPIO_SYNC
  33. # endif
  34. # ifndef I2C_INIT
  35. # define I2C_INIT \
  36. do { \
  37. gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \
  38. gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \
  39. } while (0)
  40. # endif
  41. # ifndef I2C_ACTIVE
  42. # define I2C_ACTIVE do { } while (0)
  43. # endif
  44. # ifndef I2C_TRISTATE
  45. # define I2C_TRISTATE do { } while (0)
  46. # endif
  47. # ifndef I2C_READ
  48. # define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA)
  49. # endif
  50. # ifndef I2C_SDA
  51. # define I2C_SDA(bit) \
  52. do { \
  53. if (bit) \
  54. gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
  55. else \
  56. gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \
  57. I2C_GPIO_SYNC; \
  58. } while (0)
  59. # endif
  60. # ifndef I2C_SCL
  61. # define I2C_SCL(bit) \
  62. do { \
  63. gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \
  64. I2C_GPIO_SYNC; \
  65. } while (0)
  66. # endif
  67. # ifndef I2C_DELAY
  68. # define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
  69. # endif
  70. #endif
  71. /* #define DEBUG_I2C */
  72. DECLARE_GLOBAL_DATA_PTR;
  73. #ifndef I2C_SOFT_DECLARATIONS
  74. # define I2C_SOFT_DECLARATIONS
  75. #endif
  76. /*-----------------------------------------------------------------------
  77. * Definitions
  78. */
  79. #define RETRIES 0
  80. #define I2C_ACK 0 /* PD_SDA level to ack a byte */
  81. #define I2C_NOACK 1 /* PD_SDA level to noack a byte */
  82. #ifdef DEBUG_I2C
  83. #define PRINTD(fmt,args...) do { \
  84. printf (fmt ,##args); \
  85. } while (0)
  86. #else
  87. #define PRINTD(fmt,args...)
  88. #endif
  89. /*-----------------------------------------------------------------------
  90. * Local functions
  91. */
  92. #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
  93. static void send_reset (void);
  94. #endif
  95. static void send_start (void);
  96. static void send_stop (void);
  97. static void send_ack (int);
  98. static int write_byte (uchar byte);
  99. static uchar read_byte (int);
  100. #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
  101. /*-----------------------------------------------------------------------
  102. * Send a reset sequence consisting of 9 clocks with the data signal high
  103. * to clock any confused device back into an idle state. Also send a
  104. * <stop> at the end of the sequence for belts & suspenders.
  105. */
  106. static void send_reset(void)
  107. {
  108. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  109. int j;
  110. I2C_SCL(1);
  111. I2C_SDA(1);
  112. #ifdef I2C_INIT
  113. I2C_INIT;
  114. #endif
  115. I2C_TRISTATE;
  116. for(j = 0; j < 9; j++) {
  117. I2C_SCL(0);
  118. I2C_DELAY;
  119. I2C_DELAY;
  120. I2C_SCL(1);
  121. I2C_DELAY;
  122. I2C_DELAY;
  123. }
  124. send_stop();
  125. I2C_TRISTATE;
  126. }
  127. #endif
  128. /*-----------------------------------------------------------------------
  129. * START: High -> Low on SDA while SCL is High
  130. */
  131. static void send_start(void)
  132. {
  133. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  134. I2C_DELAY;
  135. I2C_SDA(1);
  136. I2C_ACTIVE;
  137. I2C_DELAY;
  138. I2C_SCL(1);
  139. I2C_DELAY;
  140. I2C_SDA(0);
  141. I2C_DELAY;
  142. }
  143. /*-----------------------------------------------------------------------
  144. * STOP: Low -> High on SDA while SCL is High
  145. */
  146. static void send_stop(void)
  147. {
  148. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  149. I2C_SCL(0);
  150. I2C_DELAY;
  151. I2C_SDA(0);
  152. I2C_ACTIVE;
  153. I2C_DELAY;
  154. I2C_SCL(1);
  155. I2C_DELAY;
  156. I2C_SDA(1);
  157. I2C_DELAY;
  158. I2C_TRISTATE;
  159. }
  160. /*-----------------------------------------------------------------------
  161. * ack should be I2C_ACK or I2C_NOACK
  162. */
  163. static void send_ack(int ack)
  164. {
  165. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  166. I2C_SCL(0);
  167. I2C_DELAY;
  168. I2C_ACTIVE;
  169. I2C_SDA(ack);
  170. I2C_DELAY;
  171. I2C_SCL(1);
  172. I2C_DELAY;
  173. I2C_DELAY;
  174. I2C_SCL(0);
  175. I2C_DELAY;
  176. }
  177. /*-----------------------------------------------------------------------
  178. * Send 8 bits and look for an acknowledgement.
  179. */
  180. static int write_byte(uchar data)
  181. {
  182. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  183. int j;
  184. int nack;
  185. I2C_ACTIVE;
  186. for(j = 0; j < 8; j++) {
  187. I2C_SCL(0);
  188. I2C_DELAY;
  189. I2C_SDA(data & 0x80);
  190. I2C_DELAY;
  191. I2C_SCL(1);
  192. I2C_DELAY;
  193. I2C_DELAY;
  194. data <<= 1;
  195. }
  196. /*
  197. * Look for an <ACK>(negative logic) and return it.
  198. */
  199. I2C_SCL(0);
  200. I2C_DELAY;
  201. I2C_SDA(1);
  202. I2C_TRISTATE;
  203. I2C_DELAY;
  204. I2C_SCL(1);
  205. I2C_DELAY;
  206. I2C_DELAY;
  207. nack = I2C_READ;
  208. I2C_SCL(0);
  209. I2C_DELAY;
  210. I2C_ACTIVE;
  211. return(nack); /* not a nack is an ack */
  212. }
  213. /*-----------------------------------------------------------------------
  214. * if ack == I2C_ACK, ACK the byte so can continue reading, else
  215. * send I2C_NOACK to end the read.
  216. */
  217. static uchar read_byte(int ack)
  218. {
  219. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  220. int data;
  221. int j;
  222. /*
  223. * Read 8 bits, MSB first.
  224. */
  225. I2C_TRISTATE;
  226. I2C_SDA(1);
  227. data = 0;
  228. for(j = 0; j < 8; j++) {
  229. I2C_SCL(0);
  230. I2C_DELAY;
  231. I2C_SCL(1);
  232. I2C_DELAY;
  233. data <<= 1;
  234. data |= I2C_READ;
  235. I2C_DELAY;
  236. }
  237. send_ack(ack);
  238. return(data);
  239. }
  240. /*-----------------------------------------------------------------------
  241. * Initialization
  242. */
  243. static void soft_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
  244. {
  245. #if defined(CONFIG_SYS_I2C_INIT_BOARD)
  246. /* call board specific i2c bus reset routine before accessing the */
  247. /* environment, which might be in a chip on that bus. For details */
  248. /* about this problem see doc/I2C_Edge_Conditions. */
  249. i2c_init_board();
  250. #else
  251. /*
  252. * WARNING: Do NOT save speed in a static variable: if the
  253. * I2C routines are called before RAM is initialized (to read
  254. * the DIMM SPD, for instance), RAM won't be usable and your
  255. * system will crash.
  256. */
  257. send_reset ();
  258. #endif
  259. }
  260. /*-----------------------------------------------------------------------
  261. * Probe to see if a chip is present. Also good for checking for the
  262. * completion of EEPROM writes since the chip stops responding until
  263. * the write completes (typically 10mSec).
  264. */
  265. static int soft_i2c_probe(struct i2c_adapter *adap, uint8_t addr)
  266. {
  267. int rc;
  268. /*
  269. * perform 1 byte write transaction with just address byte
  270. * (fake write)
  271. */
  272. send_start();
  273. rc = write_byte ((addr << 1) | 0);
  274. send_stop();
  275. return (rc ? 1 : 0);
  276. }
  277. /*-----------------------------------------------------------------------
  278. * Read bytes
  279. */
  280. static int soft_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
  281. int alen, uchar *buffer, int len)
  282. {
  283. int shift;
  284. PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
  285. chip, addr, alen, buffer, len);
  286. #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
  287. /*
  288. * EEPROM chips that implement "address overflow" are ones
  289. * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
  290. * address and the extra bits end up in the "chip address"
  291. * bit slots. This makes a 24WC08 (1Kbyte) chip look like
  292. * four 256 byte chips.
  293. *
  294. * Note that we consider the length of the address field to
  295. * still be one byte because the extra address bits are
  296. * hidden in the chip address.
  297. */
  298. chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
  299. PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
  300. chip, addr);
  301. #endif
  302. /*
  303. * Do the addressing portion of a write cycle to set the
  304. * chip's address pointer. If the address length is zero,
  305. * don't do the normal write cycle to set the address pointer,
  306. * there is no address pointer in this chip.
  307. */
  308. send_start();
  309. if(alen > 0) {
  310. if(write_byte(chip << 1)) { /* write cycle */
  311. send_stop();
  312. PRINTD("i2c_read, no chip responded %02X\n", chip);
  313. return(1);
  314. }
  315. shift = (alen-1) * 8;
  316. while(alen-- > 0) {
  317. if(write_byte(addr >> shift)) {
  318. PRINTD("i2c_read, address not <ACK>ed\n");
  319. return(1);
  320. }
  321. shift -= 8;
  322. }
  323. /* Some I2C chips need a stop/start sequence here,
  324. * other chips don't work with a full stop and need
  325. * only a start. Default behaviour is to send the
  326. * stop/start sequence.
  327. */
  328. #ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
  329. send_start();
  330. #else
  331. send_stop();
  332. send_start();
  333. #endif
  334. }
  335. /*
  336. * Send the chip address again, this time for a read cycle.
  337. * Then read the data. On the last byte, we do a NACK instead
  338. * of an ACK(len == 0) to terminate the read.
  339. */
  340. write_byte((chip << 1) | 1); /* read cycle */
  341. while(len-- > 0) {
  342. *buffer++ = read_byte(len == 0);
  343. }
  344. send_stop();
  345. return(0);
  346. }
  347. /*-----------------------------------------------------------------------
  348. * Write bytes
  349. */
  350. static int soft_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
  351. int alen, uchar *buffer, int len)
  352. {
  353. int shift, failures = 0;
  354. PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
  355. chip, addr, alen, buffer, len);
  356. send_start();
  357. if(write_byte(chip << 1)) { /* write cycle */
  358. send_stop();
  359. PRINTD("i2c_write, no chip responded %02X\n", chip);
  360. return(1);
  361. }
  362. shift = (alen-1) * 8;
  363. while(alen-- > 0) {
  364. if(write_byte(addr >> shift)) {
  365. PRINTD("i2c_write, address not <ACK>ed\n");
  366. return(1);
  367. }
  368. shift -= 8;
  369. }
  370. while(len-- > 0) {
  371. if(write_byte(*buffer++)) {
  372. failures++;
  373. }
  374. }
  375. send_stop();
  376. return(failures);
  377. }
  378. /*
  379. * Register soft i2c adapters
  380. */
  381. U_BOOT_I2C_ADAP_COMPLETE(soft00, soft_i2c_init, soft_i2c_probe,
  382. soft_i2c_read, soft_i2c_write, NULL,
  383. CONFIG_SYS_I2C_SOFT_SPEED, CONFIG_SYS_I2C_SOFT_SLAVE,
  384. 0)