smc911x.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * SMSC LAN9[12]1[567] Network driver
  4. *
  5. * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
  6. */
  7. #include <common.h>
  8. #include <command.h>
  9. #include <malloc.h>
  10. #include <net.h>
  11. #include <miiphy.h>
  12. #include <linux/io.h>
  13. #include <linux/delay.h>
  14. #include <linux/types.h>
  15. #include "smc911x.h"
  16. struct chip_id {
  17. u16 id;
  18. char *name;
  19. };
  20. struct smc911x_priv {
  21. phys_addr_t iobase;
  22. const struct chip_id *chipid;
  23. unsigned char enetaddr[6];
  24. bool use_32_bit_io;
  25. };
  26. static const struct chip_id chip_ids[] = {
  27. { CHIP_89218, "LAN89218" },
  28. { CHIP_9115, "LAN9115" },
  29. { CHIP_9116, "LAN9116" },
  30. { CHIP_9117, "LAN9117" },
  31. { CHIP_9118, "LAN9118" },
  32. { CHIP_9211, "LAN9211" },
  33. { CHIP_9215, "LAN9215" },
  34. { CHIP_9216, "LAN9216" },
  35. { CHIP_9217, "LAN9217" },
  36. { CHIP_9218, "LAN9218" },
  37. { CHIP_9220, "LAN9220" },
  38. { CHIP_9221, "LAN9221" },
  39. { 0, NULL },
  40. };
  41. #define DRIVERNAME "smc911x"
  42. static u32 smc911x_reg_read(struct smc911x_priv *priv, u32 offset)
  43. {
  44. if (priv->use_32_bit_io)
  45. return readl(priv->iobase + offset);
  46. return (readw(priv->iobase + offset) & 0xffff) |
  47. (readw(priv->iobase + offset + 2) << 16);
  48. }
  49. static void smc911x_reg_write(struct smc911x_priv *priv, u32 offset, u32 val)
  50. {
  51. if (priv->use_32_bit_io) {
  52. writel(val, priv->iobase + offset);
  53. } else {
  54. writew(val & 0xffff, priv->iobase + offset);
  55. writew(val >> 16, priv->iobase + offset + 2);
  56. }
  57. }
  58. static u32 smc911x_get_mac_csr(struct smc911x_priv *priv, u8 reg)
  59. {
  60. while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
  61. ;
  62. smc911x_reg_write(priv, MAC_CSR_CMD,
  63. MAC_CSR_CMD_CSR_BUSY | MAC_CSR_CMD_R_NOT_W | reg);
  64. while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
  65. ;
  66. return smc911x_reg_read(priv, MAC_CSR_DATA);
  67. }
  68. static void smc911x_set_mac_csr(struct smc911x_priv *priv, u8 reg, u32 data)
  69. {
  70. while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
  71. ;
  72. smc911x_reg_write(priv, MAC_CSR_DATA, data);
  73. smc911x_reg_write(priv, MAC_CSR_CMD, MAC_CSR_CMD_CSR_BUSY | reg);
  74. while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
  75. ;
  76. }
  77. static int smc911x_detect_chip(struct smc911x_priv *priv)
  78. {
  79. unsigned long val, i;
  80. val = smc911x_reg_read(priv, BYTE_TEST);
  81. if (val == 0xffffffff) {
  82. /* Special case -- no chip present */
  83. return -1;
  84. } else if (val != 0x87654321) {
  85. printf(DRIVERNAME ": Invalid chip endian 0x%08lx\n", val);
  86. return -1;
  87. }
  88. val = smc911x_reg_read(priv, ID_REV) >> 16;
  89. for (i = 0; chip_ids[i].id != 0; i++) {
  90. if (chip_ids[i].id == val) break;
  91. }
  92. if (!chip_ids[i].id) {
  93. printf(DRIVERNAME ": Unknown chip ID %04lx\n", val);
  94. return -1;
  95. }
  96. priv->chipid = &chip_ids[i];
  97. return 0;
  98. }
  99. static void smc911x_reset(struct smc911x_priv *priv)
  100. {
  101. int timeout;
  102. /*
  103. * Take out of PM setting first
  104. * Device is already wake up if PMT_CTRL_READY bit is set
  105. */
  106. if ((smc911x_reg_read(priv, PMT_CTRL) & PMT_CTRL_READY) == 0) {
  107. /* Write to the bytetest will take out of powerdown */
  108. smc911x_reg_write(priv, BYTE_TEST, 0x0);
  109. timeout = 10;
  110. while (timeout-- &&
  111. !(smc911x_reg_read(priv, PMT_CTRL) & PMT_CTRL_READY))
  112. udelay(10);
  113. if (timeout < 0) {
  114. printf(DRIVERNAME
  115. ": timeout waiting for PM restore\n");
  116. return;
  117. }
  118. }
  119. /* Disable interrupts */
  120. smc911x_reg_write(priv, INT_EN, 0);
  121. smc911x_reg_write(priv, HW_CFG, HW_CFG_SRST);
  122. timeout = 1000;
  123. while (timeout-- && smc911x_reg_read(priv, E2P_CMD) & E2P_CMD_EPC_BUSY)
  124. udelay(10);
  125. if (timeout < 0) {
  126. printf(DRIVERNAME ": reset timeout\n");
  127. return;
  128. }
  129. /* Reset the FIFO level and flow control settings */
  130. smc911x_set_mac_csr(priv, FLOW, FLOW_FCPT | FLOW_FCEN);
  131. smc911x_reg_write(priv, AFC_CFG, 0x0050287F);
  132. /* Set to LED outputs */
  133. smc911x_reg_write(priv, GPIO_CFG, 0x70070000);
  134. }
  135. static void smc911x_handle_mac_address(struct smc911x_priv *priv)
  136. {
  137. unsigned long addrh, addrl;
  138. unsigned char *m = priv->enetaddr;
  139. addrl = m[0] | (m[1] << 8) | (m[2] << 16) | (m[3] << 24);
  140. addrh = m[4] | (m[5] << 8);
  141. smc911x_set_mac_csr(priv, ADDRL, addrl);
  142. smc911x_set_mac_csr(priv, ADDRH, addrh);
  143. printf(DRIVERNAME ": MAC %pM\n", m);
  144. }
  145. static bool smc911x_read_mac_address(struct smc911x_priv *priv)
  146. {
  147. u32 addrh, addrl;
  148. /* address is obtained from optional eeprom */
  149. addrh = smc911x_get_mac_csr(priv, ADDRH);
  150. addrl = smc911x_get_mac_csr(priv, ADDRL);
  151. if (addrl == 0xffffffff && addrh == 0x0000ffff)
  152. return false;
  153. priv->enetaddr[0] = addrl;
  154. priv->enetaddr[1] = addrl >> 8;
  155. priv->enetaddr[2] = addrl >> 16;
  156. priv->enetaddr[3] = addrl >> 24;
  157. priv->enetaddr[4] = addrh;
  158. priv->enetaddr[5] = addrh >> 8;
  159. return true;
  160. }
  161. static int smc911x_eth_phy_read(struct smc911x_priv *priv,
  162. u8 phy, u8 reg, u16 *val)
  163. {
  164. while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
  165. ;
  166. smc911x_set_mac_csr(priv, MII_ACC, phy << 11 | reg << 6 |
  167. MII_ACC_MII_BUSY);
  168. while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
  169. ;
  170. *val = smc911x_get_mac_csr(priv, MII_DATA);
  171. return 0;
  172. }
  173. static int smc911x_eth_phy_write(struct smc911x_priv *priv,
  174. u8 phy, u8 reg, u16 val)
  175. {
  176. while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
  177. ;
  178. smc911x_set_mac_csr(priv, MII_DATA, val);
  179. smc911x_set_mac_csr(priv, MII_ACC,
  180. phy << 11 | reg << 6 | MII_ACC_MII_BUSY | MII_ACC_MII_WRITE);
  181. while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
  182. ;
  183. return 0;
  184. }
  185. static int smc911x_phy_reset(struct smc911x_priv *priv)
  186. {
  187. u32 reg;
  188. reg = smc911x_reg_read(priv, PMT_CTRL);
  189. reg &= ~0xfffff030;
  190. reg |= PMT_CTRL_PHY_RST;
  191. smc911x_reg_write(priv, PMT_CTRL, reg);
  192. mdelay(100);
  193. return 0;
  194. }
  195. static void smc911x_phy_configure(struct smc911x_priv *priv)
  196. {
  197. int timeout;
  198. u16 status;
  199. smc911x_phy_reset(priv);
  200. smc911x_eth_phy_write(priv, 1, MII_BMCR, BMCR_RESET);
  201. mdelay(1);
  202. smc911x_eth_phy_write(priv, 1, MII_ADVERTISE, 0x01e1);
  203. smc911x_eth_phy_write(priv, 1, MII_BMCR, BMCR_ANENABLE |
  204. BMCR_ANRESTART);
  205. timeout = 5000;
  206. do {
  207. mdelay(1);
  208. if ((timeout--) == 0)
  209. goto err_out;
  210. if (smc911x_eth_phy_read(priv, 1, MII_BMSR, &status) != 0)
  211. goto err_out;
  212. } while (!(status & BMSR_LSTATUS));
  213. printf(DRIVERNAME ": phy initialized\n");
  214. return;
  215. err_out:
  216. printf(DRIVERNAME ": autonegotiation timed out\n");
  217. }
  218. static void smc911x_enable(struct smc911x_priv *priv)
  219. {
  220. /* Enable TX */
  221. smc911x_reg_write(priv, HW_CFG, 8 << 16 | HW_CFG_SF);
  222. smc911x_reg_write(priv, GPT_CFG, GPT_CFG_TIMER_EN | 10000);
  223. smc911x_reg_write(priv, TX_CFG, TX_CFG_TX_ON);
  224. /* no padding to start of packets */
  225. smc911x_reg_write(priv, RX_CFG, 0);
  226. smc911x_set_mac_csr(priv, MAC_CR, MAC_CR_TXEN | MAC_CR_RXEN |
  227. MAC_CR_HBDIS);
  228. }
  229. static int smc911x_init_common(struct smc911x_priv *priv)
  230. {
  231. const struct chip_id *id = priv->chipid;
  232. printf(DRIVERNAME ": detected %s controller\n", id->name);
  233. smc911x_reset(priv);
  234. /* Configure the PHY, initialize the link state */
  235. smc911x_phy_configure(priv);
  236. smc911x_handle_mac_address(priv);
  237. /* Turn on Tx + Rx */
  238. smc911x_enable(priv);
  239. return 0;
  240. }
  241. static int smc911x_send_common(struct smc911x_priv *priv,
  242. void *packet, int length)
  243. {
  244. u32 *data = (u32*)packet;
  245. u32 tmplen;
  246. u32 status;
  247. smc911x_reg_write(priv, TX_DATA_FIFO, TX_CMD_A_INT_FIRST_SEG |
  248. TX_CMD_A_INT_LAST_SEG | length);
  249. smc911x_reg_write(priv, TX_DATA_FIFO, length);
  250. tmplen = (length + 3) / 4;
  251. while (tmplen--)
  252. smc911x_reg_write(priv, TX_DATA_FIFO, *data++);
  253. /* wait for transmission */
  254. while (!((smc911x_reg_read(priv, TX_FIFO_INF) &
  255. TX_FIFO_INF_TSUSED) >> 16));
  256. /* get status. Ignore 'no carrier' error, it has no meaning for
  257. * full duplex operation
  258. */
  259. status = smc911x_reg_read(priv, TX_STATUS_FIFO) &
  260. (TX_STS_LOC | TX_STS_LATE_COLL | TX_STS_MANY_COLL |
  261. TX_STS_MANY_DEFER | TX_STS_UNDERRUN);
  262. if (!status)
  263. return 0;
  264. printf(DRIVERNAME ": failed to send packet: %s%s%s%s%s\n",
  265. status & TX_STS_LOC ? "TX_STS_LOC " : "",
  266. status & TX_STS_LATE_COLL ? "TX_STS_LATE_COLL " : "",
  267. status & TX_STS_MANY_COLL ? "TX_STS_MANY_COLL " : "",
  268. status & TX_STS_MANY_DEFER ? "TX_STS_MANY_DEFER " : "",
  269. status & TX_STS_UNDERRUN ? "TX_STS_UNDERRUN" : "");
  270. return -1;
  271. }
  272. static void smc911x_halt_common(struct smc911x_priv *priv)
  273. {
  274. smc911x_reset(priv);
  275. smc911x_handle_mac_address(priv);
  276. }
  277. static int smc911x_recv_common(struct smc911x_priv *priv, u32 *data)
  278. {
  279. u32 pktlen, tmplen;
  280. u32 status;
  281. status = smc911x_reg_read(priv, RX_FIFO_INF);
  282. if (!(status & RX_FIFO_INF_RXSUSED))
  283. return 0;
  284. status = smc911x_reg_read(priv, RX_STATUS_FIFO);
  285. pktlen = (status & RX_STS_PKT_LEN) >> 16;
  286. smc911x_reg_write(priv, RX_CFG, 0);
  287. tmplen = (pktlen + 3) / 4;
  288. while (tmplen--)
  289. *data++ = smc911x_reg_read(priv, RX_DATA_FIFO);
  290. if (status & RX_STS_ES) {
  291. printf(DRIVERNAME
  292. ": dropped bad packet. Status: 0x%08x\n",
  293. status);
  294. return 0;
  295. }
  296. return pktlen;
  297. }
  298. static int smc911x_start(struct udevice *dev)
  299. {
  300. struct eth_pdata *plat = dev_get_plat(dev);
  301. struct smc911x_priv *priv = dev_get_priv(dev);
  302. memcpy(priv->enetaddr, plat->enetaddr, sizeof(plat->enetaddr));
  303. return smc911x_init_common(priv);
  304. }
  305. static void smc911x_stop(struct udevice *dev)
  306. {
  307. struct smc911x_priv *priv = dev_get_priv(dev);
  308. smc911x_halt_common(priv);
  309. }
  310. static int smc911x_send(struct udevice *dev, void *packet, int length)
  311. {
  312. struct smc911x_priv *priv = dev_get_priv(dev);
  313. int ret;
  314. ret = smc911x_send_common(priv, packet, length);
  315. return ret ? 0 : -ETIMEDOUT;
  316. }
  317. static int smc911x_recv(struct udevice *dev, int flags, uchar **packetp)
  318. {
  319. struct smc911x_priv *priv = dev_get_priv(dev);
  320. u32 *data = (u32 *)net_rx_packets[0];
  321. int ret;
  322. ret = smc911x_recv_common(priv, data);
  323. if (ret)
  324. *packetp = (void *)data;
  325. return ret ? ret : -EAGAIN;
  326. }
  327. static int smc911x_read_rom_hwaddr(struct udevice *dev)
  328. {
  329. struct smc911x_priv *priv = dev_get_priv(dev);
  330. struct eth_pdata *pdata = dev_get_plat(dev);
  331. if (!smc911x_read_mac_address(priv))
  332. return -ENODEV;
  333. memcpy(pdata->enetaddr, priv->enetaddr, sizeof(pdata->enetaddr));
  334. return 0;
  335. }
  336. static int smc911x_bind(struct udevice *dev)
  337. {
  338. return device_set_name(dev, dev->name);
  339. }
  340. static int smc911x_probe(struct udevice *dev)
  341. {
  342. struct smc911x_priv *priv = dev_get_priv(dev);
  343. int ret;
  344. /* Try to detect chip. Will fail if not present. */
  345. ret = smc911x_detect_chip(priv);
  346. if (ret)
  347. return ret;
  348. smc911x_read_rom_hwaddr(dev);
  349. return 0;
  350. }
  351. static int smc911x_of_to_plat(struct udevice *dev)
  352. {
  353. struct smc911x_priv *priv = dev_get_priv(dev);
  354. struct eth_pdata *pdata = dev_get_plat(dev);
  355. u32 io_width;
  356. int ret;
  357. pdata->iobase = dev_read_addr(dev);
  358. priv->iobase = pdata->iobase;
  359. ret = dev_read_u32(dev, "reg-io-width", &io_width);
  360. if (!ret)
  361. priv->use_32_bit_io = (io_width == 4);
  362. else
  363. priv->use_32_bit_io = CONFIG_IS_ENABLED(SMC911X_32_BIT);
  364. return 0;
  365. }
  366. static const struct eth_ops smc911x_ops = {
  367. .start = smc911x_start,
  368. .send = smc911x_send,
  369. .recv = smc911x_recv,
  370. .stop = smc911x_stop,
  371. .read_rom_hwaddr = smc911x_read_rom_hwaddr,
  372. };
  373. static const struct udevice_id smc911x_ids[] = {
  374. { .compatible = "smsc,lan9115" },
  375. { }
  376. };
  377. U_BOOT_DRIVER(smc911x) = {
  378. .name = "eth_smc911x",
  379. .id = UCLASS_ETH,
  380. .of_match = smc911x_ids,
  381. .bind = smc911x_bind,
  382. .of_to_plat = smc911x_of_to_plat,
  383. .probe = smc911x_probe,
  384. .ops = &smc911x_ops,
  385. .priv_auto = sizeof(struct smc911x_priv),
  386. .plat_auto = sizeof(struct eth_pdata),
  387. .flags = DM_FLAG_ALLOC_PRIV_DMA,
  388. };