i2c-i801.rst 6.6 KB

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  1. ======================
  2. Kernel driver i2c-i801
  3. ======================
  4. Supported adapters:
  5. * Intel 82801AA and 82801AB (ICH and ICH0 - part of the
  6. '810' and '810E' chipsets)
  7. * Intel 82801BA (ICH2 - part of the '815E' chipset)
  8. * Intel 82801CA/CAM (ICH3)
  9. * Intel 82801DB (ICH4) (HW PEC supported)
  10. * Intel 82801EB/ER (ICH5) (HW PEC supported)
  11. * Intel 6300ESB
  12. * Intel 82801FB/FR/FW/FRW (ICH6)
  13. * Intel 82801G (ICH7)
  14. * Intel 631xESB/632xESB (ESB2)
  15. * Intel 82801H (ICH8)
  16. * Intel 82801I (ICH9)
  17. * Intel EP80579 (Tolapai)
  18. * Intel 82801JI (ICH10)
  19. * Intel 5/3400 Series (PCH)
  20. * Intel 6 Series (PCH)
  21. * Intel Patsburg (PCH)
  22. * Intel DH89xxCC (PCH)
  23. * Intel Panther Point (PCH)
  24. * Intel Lynx Point (PCH)
  25. * Intel Avoton (SOC)
  26. * Intel Wellsburg (PCH)
  27. * Intel Coleto Creek (PCH)
  28. * Intel Wildcat Point (PCH)
  29. * Intel BayTrail (SOC)
  30. * Intel Braswell (SOC)
  31. * Intel Sunrise Point (PCH)
  32. * Intel Kaby Lake (PCH)
  33. * Intel DNV (SOC)
  34. * Intel Broxton (SOC)
  35. * Intel Lewisburg (PCH)
  36. * Intel Gemini Lake (SOC)
  37. * Intel Cannon Lake (PCH)
  38. * Intel Cedar Fork (PCH)
  39. * Intel Ice Lake (PCH)
  40. * Intel Comet Lake (PCH)
  41. * Intel Elkhart Lake (PCH)
  42. * Intel Tiger Lake (PCH)
  43. * Intel Jasper Lake (SOC)
  44. * Intel Emmitsburg (PCH)
  45. * Intel Alder Lake (PCH)
  46. * Intel Raptor Lake (PCH)
  47. * Intel Meteor Lake (SOC and PCH)
  48. * Intel Birch Stream (SOC)
  49. * Intel Arrow Lake (SOC)
  50. * Intel Panther Lake (SOC)
  51. Datasheets: Publicly available at the Intel website
  52. On Intel Patsburg and later chipsets, both the normal host SMBus controller
  53. and the additional 'Integrated Device Function' controllers are supported.
  54. Authors:
  55. - Mark Studebaker <mdsxyz123@yahoo.com>
  56. - Jean Delvare <jdelvare@suse.de>
  57. Module Parameters
  58. -----------------
  59. * disable_features (bit vector)
  60. Disable selected features normally supported by the device. This makes it
  61. possible to work around possible driver or hardware bugs if the feature in
  62. question doesn't work as intended for whatever reason. Bit values:
  63. ==== =========================================
  64. 0x01 disable SMBus PEC
  65. 0x02 disable the block buffer
  66. 0x08 disable the I2C block read functionality
  67. 0x10 don't use interrupts
  68. 0x20 disable SMBus Host Notify
  69. ==== =========================================
  70. Description
  71. -----------
  72. The ICH (properly known as the 82801AA), ICH0 (82801AB), ICH2 (82801BA),
  73. ICH3 (82801CA/CAM) and later devices (PCH) are Intel chips that are a part of
  74. Intel's '810' chipset for Celeron-based PCs, '810E' chipset for
  75. Pentium-based PCs, '815E' chipset, and others.
  76. The ICH chips contain at least SEVEN separate PCI functions in TWO logical
  77. PCI devices. An output of lspci will show something similar to the
  78. following::
  79. 00:1e.0 PCI bridge: Intel Corporation: Unknown device 2418 (rev 01)
  80. 00:1f.0 ISA bridge: Intel Corporation: Unknown device 2410 (rev 01)
  81. 00:1f.1 IDE interface: Intel Corporation: Unknown device 2411 (rev 01)
  82. 00:1f.2 USB Controller: Intel Corporation: Unknown device 2412 (rev 01)
  83. 00:1f.3 Unknown class [0c05]: Intel Corporation: Unknown device 2413 (rev 01)
  84. The SMBus controller is function 3 in device 1f. Class 0c05 is SMBus Serial
  85. Controller.
  86. The ICH chips are quite similar to Intel's PIIX4 chip, at least in the
  87. SMBus controller.
  88. Process Call Support
  89. --------------------
  90. Block process call is supported on the 82801EB (ICH5) and later chips.
  91. I2C Block Read Support
  92. ----------------------
  93. I2C block read is supported on the 82801EB (ICH5) and later chips.
  94. SMBus 2.0 Support
  95. -----------------
  96. The 82801DB (ICH4) and later chips support several SMBus 2.0 features.
  97. Interrupt Support
  98. -----------------
  99. PCI interrupt support is supported on the 82801EB (ICH5) and later chips.
  100. Hidden ICH SMBus
  101. ----------------
  102. If your system has an Intel ICH south bridge, but you do NOT see the
  103. SMBus device at 00:1f.3 in lspci, and you can't figure out any way in the
  104. BIOS to enable it, it means it has been hidden by the BIOS code. Asus is
  105. well known for first doing this on their P4B motherboard, and many other
  106. boards after that. Some vendor machines are affected as well.
  107. The first thing to try is the "i2c-scmi" ACPI driver. It could be that the
  108. SMBus was hidden on purpose because it'll be driven by ACPI. If the
  109. i2c-scmi driver works for you, just forget about the i2c-i801 driver and
  110. don't try to unhide the ICH SMBus. Even if i2c-scmi doesn't work, you
  111. better make sure that the SMBus isn't used by the ACPI code. Try loading
  112. the "fan" and "thermal" drivers, and check in /sys/class/thermal. If you
  113. find a thermal zone with type "acpitz", it's likely that the ACPI is
  114. accessing the SMBus and it's safer not to unhide it. Only once you are
  115. certain that ACPI isn't using the SMBus, you can attempt to unhide it.
  116. In order to unhide the SMBus, we need to change the value of a PCI
  117. register before the kernel enumerates the PCI devices. This is done in
  118. drivers/pci/quirks.c, where all affected boards must be listed (see
  119. function asus_hides_smbus_hostbridge.) If the SMBus device is missing,
  120. and you think there's something interesting on the SMBus (e.g. a
  121. hardware monitoring chip), you need to add your board to the list.
  122. The motherboard is identified using the subvendor and subdevice IDs of the
  123. host bridge PCI device. Get yours with ``lspci -n -v -s 00:00.0``::
  124. 00:00.0 Class 0600: 8086:2570 (rev 02)
  125. Subsystem: 1043:80f2
  126. Flags: bus master, fast devsel, latency 0
  127. Memory at fc000000 (32-bit, prefetchable) [size=32M]
  128. Capabilities: [e4] #09 [2106]
  129. Capabilities: [a0] AGP version 3.0
  130. Here the host bridge ID is 2570 (82865G/PE/P), the subvendor ID is 1043
  131. (Asus) and the subdevice ID is 80f2 (P4P800-X). You can find the symbolic
  132. names for the bridge ID and the subvendor ID in include/linux/pci_ids.h,
  133. and then add a case for your subdevice ID at the right place in
  134. drivers/pci/quirks.c. Then please give it very good testing, to make sure
  135. that the unhidden SMBus doesn't conflict with e.g. ACPI.
  136. If it works, proves useful (i.e. there are usable chips on the SMBus)
  137. and seems safe, please submit a patch for inclusion into the kernel.
  138. Note: There's a useful script in lm_sensors 2.10.2 and later, named
  139. unhide_ICH_SMBus (in prog/hotplug), which uses the fakephp driver to
  140. temporarily unhide the SMBus without having to patch and recompile your
  141. kernel. It's very convenient if you just want to check if there's
  142. anything interesting on your hidden ICH SMBus.
  143. ----------------------------------------------------------------------------
  144. The lm_sensors project gratefully acknowledges the support of Texas
  145. Instruments in the initial development of this driver.
  146. The lm_sensors project gratefully acknowledges the support of Intel in the
  147. development of SMBus 2.0 / ICH4 features of this driver.