gpio-fault-injection.rst 6.0 KB

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  1. =========================
  2. Linux I2C fault injection
  3. =========================
  4. The GPIO based I2C bus master driver can be configured to provide fault
  5. injection capabilities. It is then meant to be connected to another I2C bus
  6. which is driven by the I2C bus master driver under test. The GPIO fault
  7. injection driver can create special states on the bus which the other I2C bus
  8. master driver should handle gracefully.
  9. Once the Kconfig option I2C_GPIO_FAULT_INJECTOR is enabled, there will be an
  10. 'i2c-fault-injector' subdirectory in the Kernel debugfs filesystem, usually
  11. mounted at /sys/kernel/debug. There will be a separate subdirectory per GPIO
  12. driven I2C bus. Each subdirectory will contain files to trigger the fault
  13. injection. They will be described now along with their intended use-cases.
  14. Wire states
  15. ===========
  16. "scl"
  17. -----
  18. By reading this file, you get the current state of SCL. By writing, you can
  19. change its state to either force it low or to release it again. So, by using
  20. "echo 0 > scl" you force SCL low and thus, no communication will be possible
  21. because the bus master under test will not be able to clock. It should detect
  22. the condition of SCL being unresponsive and report an error to the upper
  23. layers.
  24. "sda"
  25. -----
  26. By reading this file, you get the current state of SDA. By writing, you can
  27. change its state to either force it low or to release it again. So, by using
  28. "echo 0 > sda" you force SDA low and thus, data cannot be transmitted. The bus
  29. master under test should detect this condition and trigger a bus recovery (see
  30. I2C specification version 4, section 3.1.16) using the helpers of the Linux I2C
  31. core (see 'struct bus_recovery_info'). However, the bus recovery will not
  32. succeed because SDA is still pinned low until you manually release it again
  33. with "echo 1 > sda". A test with an automatic release can be done with the
  34. "incomplete transfers" class of fault injectors.
  35. Incomplete transfers
  36. ====================
  37. The following fault injectors create situations where SDA will be held low by a
  38. device. Bus recovery should be able to fix these situations. But please note:
  39. there are I2C client devices which detect a stuck SDA on their side and release
  40. it on their own after a few milliseconds. Also, there might be an external
  41. device deglitching and monitoring the I2C bus. It could also detect a stuck SDA
  42. and will init a bus recovery on its own. If you want to implement bus recovery
  43. in a bus master driver, make sure you checked your hardware setup for such
  44. devices before. And always verify with a scope or logic analyzer!
  45. "incomplete_address_phase"
  46. --------------------------
  47. This file is write only and you need to write the address of an existing I2C
  48. client device to it. Then, a read transfer to this device will be started, but
  49. it will stop at the ACK phase after the address of the client has been
  50. transmitted. Because the device will ACK its presence, this results in SDA
  51. being pulled low by the device while SCL is high. So, similar to the "sda" file
  52. above, the bus master under test should detect this condition and try a bus
  53. recovery. This time, however, it should succeed and the device should release
  54. SDA after toggling SCL.
  55. "incomplete_write_byte"
  56. -----------------------
  57. Similar to above, this file is write only and you need to write the address of
  58. an existing I2C client device to it.
  59. The injector will again stop at one ACK phase, so the device will keep SDA low
  60. because it acknowledges data. However, there are two differences compared to
  61. 'incomplete_address_phase':
  62. a) the message sent out will be a write message
  63. b) after the address byte, a 0x00 byte will be transferred. Then, stop at ACK.
  64. This is a highly delicate state, the device is set up to write any data to
  65. register 0x00 (if it has registers) when further clock pulses happen on SCL.
  66. This is why bus recovery (up to 9 clock pulses) must either check SDA or send
  67. additional STOP conditions to ensure the bus has been released. Otherwise
  68. random data will be written to a device!
  69. Lost arbitration
  70. ================
  71. Here, we want to simulate the condition where the master under test loses the
  72. bus arbitration against another master in a multi-master setup.
  73. "lose_arbitration"
  74. ------------------
  75. This file is write only and you need to write the duration of the arbitration
  76. interference (in µs, maximum is 100ms). The calling process will then sleep
  77. and wait for the next bus clock. The process is interruptible, though.
  78. Arbitration lost is achieved by waiting for SCL going down by the master under
  79. test and then pulling SDA low for some time. So, the I2C address sent out
  80. should be corrupted and that should be detected properly. That means that the
  81. address sent out should have a lot of '1' bits to be able to detect corruption.
  82. There doesn't need to be a device at this address because arbitration lost
  83. should be detected beforehand. Also note, that SCL going down is monitored
  84. using interrupts, so the interrupt latency might cause the first bits to be not
  85. corrupted. A good starting point for using this fault injector on an otherwise
  86. idle bus is::
  87. # echo 200 > lose_arbitration &
  88. # i2cget -y <bus_to_test> 0x3f
  89. Panic during transfer
  90. =====================
  91. This fault injector will create a Kernel panic once the master under test
  92. started a transfer. This usually means that the state machine of the bus master
  93. driver will be ungracefully interrupted and the bus may end up in an unusual
  94. state. Use this to check if your shutdown/reboot/boot code can handle this
  95. scenario.
  96. "inject_panic"
  97. --------------
  98. This file is write only and you need to write the delay between the detected
  99. start of a transmission and the induced Kernel panic (in µs, maximum is 100ms).
  100. The calling process will then sleep and wait for the next bus clock. The
  101. process is interruptible, though.
  102. Start of a transfer is detected by waiting for SCL going down by the master
  103. under test. A good starting point for using this fault injector is::
  104. # echo 0 > inject_panic &
  105. # i2cget -y <bus_to_test> <some_address>
  106. Note that there doesn't need to be a device listening to the address you are
  107. using. Results may vary depending on that, though.