apple_m1_pmu.h 2.2 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364
  1. // SPDX-License-Identifier: GPL-2.0
  2. #ifndef __ASM_APPLE_M1_PMU_h
  3. #define __ASM_APPLE_M1_PMU_h
  4. #include <linux/bits.h>
  5. #include <asm/sysreg.h>
  6. /* Counters */
  7. #define SYS_IMP_APL_PMC0_EL1 sys_reg(3, 2, 15, 0, 0)
  8. #define SYS_IMP_APL_PMC1_EL1 sys_reg(3, 2, 15, 1, 0)
  9. #define SYS_IMP_APL_PMC2_EL1 sys_reg(3, 2, 15, 2, 0)
  10. #define SYS_IMP_APL_PMC3_EL1 sys_reg(3, 2, 15, 3, 0)
  11. #define SYS_IMP_APL_PMC4_EL1 sys_reg(3, 2, 15, 4, 0)
  12. #define SYS_IMP_APL_PMC5_EL1 sys_reg(3, 2, 15, 5, 0)
  13. #define SYS_IMP_APL_PMC6_EL1 sys_reg(3, 2, 15, 6, 0)
  14. #define SYS_IMP_APL_PMC7_EL1 sys_reg(3, 2, 15, 7, 0)
  15. #define SYS_IMP_APL_PMC8_EL1 sys_reg(3, 2, 15, 9, 0)
  16. #define SYS_IMP_APL_PMC9_EL1 sys_reg(3, 2, 15, 10, 0)
  17. /* Core PMC control register */
  18. #define SYS_IMP_APL_PMCR0_EL1 sys_reg(3, 1, 15, 0, 0)
  19. #define PMCR0_CNT_ENABLE_0_7 GENMASK(7, 0)
  20. #define PMCR0_IMODE GENMASK(10, 8)
  21. #define PMCR0_IMODE_OFF 0
  22. #define PMCR0_IMODE_PMI 1
  23. #define PMCR0_IMODE_AIC 2
  24. #define PMCR0_IMODE_HALT 3
  25. #define PMCR0_IMODE_FIQ 4
  26. #define PMCR0_IACT BIT(11)
  27. #define PMCR0_PMI_ENABLE_0_7 GENMASK(19, 12)
  28. #define PMCR0_STOP_CNT_ON_PMI BIT(20)
  29. #define PMCR0_CNT_GLOB_L2C_EVT BIT(21)
  30. #define PMCR0_DEFER_PMI_TO_ERET BIT(22)
  31. #define PMCR0_ALLOW_CNT_EN_EL0 BIT(30)
  32. #define PMCR0_CNT_ENABLE_8_9 GENMASK(33, 32)
  33. #define PMCR0_PMI_ENABLE_8_9 GENMASK(45, 44)
  34. #define SYS_IMP_APL_PMCR1_EL1 sys_reg(3, 1, 15, 1, 0)
  35. #define PMCR1_COUNT_A64_EL0_0_7 GENMASK(15, 8)
  36. #define PMCR1_COUNT_A64_EL1_0_7 GENMASK(23, 16)
  37. #define PMCR1_COUNT_A64_EL0_8_9 GENMASK(41, 40)
  38. #define PMCR1_COUNT_A64_EL1_8_9 GENMASK(49, 48)
  39. #define SYS_IMP_APL_PMCR2_EL1 sys_reg(3, 1, 15, 2, 0)
  40. #define SYS_IMP_APL_PMCR3_EL1 sys_reg(3, 1, 15, 3, 0)
  41. #define SYS_IMP_APL_PMCR4_EL1 sys_reg(3, 1, 15, 4, 0)
  42. #define SYS_IMP_APL_PMESR0_EL1 sys_reg(3, 1, 15, 5, 0)
  43. #define PMESR0_EVT_CNT_2 GENMASK(7, 0)
  44. #define PMESR0_EVT_CNT_3 GENMASK(15, 8)
  45. #define PMESR0_EVT_CNT_4 GENMASK(23, 16)
  46. #define PMESR0_EVT_CNT_5 GENMASK(31, 24)
  47. #define SYS_IMP_APL_PMESR1_EL1 sys_reg(3, 1, 15, 6, 0)
  48. #define PMESR1_EVT_CNT_6 GENMASK(7, 0)
  49. #define PMESR1_EVT_CNT_7 GENMASK(15, 8)
  50. #define PMESR1_EVT_CNT_8 GENMASK(23, 16)
  51. #define PMESR1_EVT_CNT_9 GENMASK(31, 24)
  52. #define SYS_IMP_APL_PMSR_EL1 sys_reg(3, 1, 15, 13, 0)
  53. #define PMSR_OVERFLOW GENMASK(9, 0)
  54. #endif /* __ASM_APPLE_M1_PMU_h */